Blackfin arch: add TWIx_REGBASE and SPIx_REGBASE to specific CPU header files, use...

Signed-off-by: Bryan Wu <bryan.wu@analog.com>

diff --git a/include/asm-blackfin/bfin5xx_spi.h b/include/asm-blackfin/bfin5xx_spi.h
index 95c1c95..f617d87 100644 (file)
--- a/include/asm-blackfin/bfin5xx_spi.h
+++ b/include/asm-blackfin/bfin5xx_spi.h
@@ -21,8 +21,6 @@
 #ifndef _SPI_CHANNEL_H_
 #define _SPI_CHANNEL_H_
 
-#define SPI0_REGBASE       0xffc00500
-
 #define SPI_READ              0
 #define SPI_WRITE             1
 

diff --git a/include/asm-blackfin/mach-bf527/defBF52x_base.h b/include/asm-blackfin/mach-bf527/defBF52x_base.h
index 0b2fb50..b1ff67d 100644 (file)
--- a/include/asm-blackfin/mach-bf527/defBF52x_base.h
+++ b/include/asm-blackfin/mach-bf527/defBF52x_base.h
@@ -102,6 +102,7 @@
 
 
 /* SPI Controller                      (0xFFC00500 - 0xFFC005FF)                                                               */
+#define SPI0_REGBASE                   0xFFC00500
 #define SPI_CTL                                0xFFC00500      /* SPI Control Register                                         */
 #define SPI_FLG                                0xFFC00504      /* SPI Flag register                                            */
 #define SPI_STAT                       0xFFC00508      /* SPI Status register                                          */
@@ -480,6 +481,7 @@
 
 
 /* Two-Wire Interface          (0xFFC01400 - 0xFFC014FF)                                                               */
+#define TWI0_REGBASE                   0xFFC01400
 #define TWI_CLKDIV                     0xFFC01400      /* Serial Clock Divider Register                        */
 #define TWI_CONTROL                    0xFFC01404      /* TWI Control Register                                         */
 #define TWI_SLAVE_CTL          0xFFC01408      /* Slave Mode Control Register                          */

diff --git a/include/asm-blackfin/mach-bf533/defBF532.h b/include/asm-blackfin/mach-bf533/defBF532.h
index 81b4af1..37134aa 100644 (file)
--- a/include/asm-blackfin/mach-bf533/defBF532.h
+++ b/include/asm-blackfin/mach-bf533/defBF532.h
@@ -104,6 +104,7 @@
 #define UART_GCTL                               0xFFC00424     /* Global Control Register */
 
 /* SPI Controller (0xFFC00500 - 0xFFC005FF) */
+#define SPI0_REGBASE                   0xFFC00500
 #define SPI_CTL                        0xFFC00500      /* SPI Control Register */
 #define SPI_FLG                        0xFFC00504      /* SPI Flag register */
 #define SPI_STAT                       0xFFC00508      /* SPI Status register */

diff --git a/include/asm-blackfin/mach-bf537/defBF534.h b/include/asm-blackfin/mach-bf537/defBF534.h
index dce4c54..d0d80d3 100644 (file)
--- a/include/asm-blackfin/mach-bf537/defBF534.h
+++ b/include/asm-blackfin/mach-bf537/defBF534.h
@@ -86,6 +86,7 @@
 #define UART0_GCTL                     0xFFC00424      /* Global Control Register                                      */
 
 /* SPI Controller                      (0xFFC00500 - 0xFFC005FF)                                                               */
+#define SPI0_REGBASE                   0xFFC00500
 #define SPI_CTL                                0xFFC00500      /* SPI Control Register                                         */
 #define SPI_FLG                                0xFFC00504      /* SPI Flag register                                            */
 #define SPI_STAT                       0xFFC00508      /* SPI Status register                                          */
@@ -456,6 +457,7 @@
 #define PPI_FRAME                      0xFFC01010      /* PPI Frame Length Register    */
 
 /* Two-Wire Interface          (0xFFC01400 - 0xFFC014FF)                                                               */
+#define TWI0_REGBASE                   0xFFC01400
 #define TWI_CLKDIV                     0xFFC01400      /* Serial Clock Divider Register                        */
 #define TWI_CONTROL                    0xFFC01404      /* TWI Control Register                                         */
 #define TWI_SLAVE_CTL          0xFFC01408      /* Slave Mode Control Register                          */

diff --git a/include/asm-blackfin/mach-bf548/defBF544.h b/include/asm-blackfin/mach-bf548/defBF544.h
index dd955dc..760307e 100644 (file)
--- a/include/asm-blackfin/mach-bf548/defBF544.h
+++ b/include/asm-blackfin/mach-bf548/defBF544.h
@@ -81,6 +81,7 @@
 
 /* Two Wire Interface Registers (TWI1) */
 
+#define                     TWI1_REGBASE  0xffc02200
 #define                      TWI1_CLKDIV  0xffc02200   /* Clock Divider Register */
 #define                     TWI1_CONTROL  0xffc02204   /* TWI Control Register */
 #define                  TWI1_SLAVE_CTRL  0xffc02208   /* TWI Slave Mode Control Register */

diff --git a/include/asm-blackfin/mach-bf548/defBF548.h b/include/asm-blackfin/mach-bf548/defBF548.h
index 8d4214e..70af33c 100644 (file)
--- a/include/asm-blackfin/mach-bf548/defBF548.h
+++ b/include/asm-blackfin/mach-bf548/defBF548.h
@@ -120,6 +120,7 @@
 
 /* Two Wire Interface Registers (TWI1) */
 
+#define                     TWI1_REGBASE  0xffc02200
 #define                      TWI1_CLKDIV  0xffc02200   /* Clock Divider Register */
 #define                     TWI1_CONTROL  0xffc02204   /* TWI Control Register */
 #define                  TWI1_SLAVE_CTRL  0xffc02208   /* TWI Slave Mode Control Register */
@@ -139,6 +140,7 @@
 
 /* SPI2  Registers */
 
+#define                     SPI2_REGBASE  0xffc02400
 #define                         SPI2_CTL  0xffc02400   /* SPI2 Control Register */
 #define                         SPI2_FLG  0xffc02404   /* SPI2 Flag Register */
 #define                        SPI2_STAT  0xffc02408   /* SPI2 Status Register */

diff --git a/include/asm-blackfin/mach-bf548/defBF549.h b/include/asm-blackfin/mach-bf548/defBF549.h
index c2f4734..50b3fe5 100644 (file)
--- a/include/asm-blackfin/mach-bf548/defBF549.h
+++ b/include/asm-blackfin/mach-bf548/defBF549.h
@@ -121,6 +121,7 @@
 
 /* Two Wire Interface Registers (TWI1) */
 
+#define                     TWI1_REGBASE  0xffc02200
 #define                      TWI1_CLKDIV  0xffc02200   /* Clock Divider Register */
 #define                     TWI1_CONTROL  0xffc02204   /* TWI Control Register */
 #define                  TWI1_SLAVE_CTRL  0xffc02208   /* TWI Slave Mode Control Register */
@@ -140,6 +141,7 @@
 
 /* SPI2  Registers */
 
+#define                     SPI2_REGBASE  0xffc02400
 #define                         SPI2_CTL  0xffc02400   /* SPI2 Control Register */
 #define                         SPI2_FLG  0xffc02404   /* SPI2 Flag Register */
 #define                        SPI2_STAT  0xffc02408   /* SPI2 Status Register */

diff --git a/include/asm-blackfin/mach-bf548/defBF54x_base.h b/include/asm-blackfin/mach-bf548/defBF54x_base.h
index 895ddd4..e2632db 100644 (file)
--- a/include/asm-blackfin/mach-bf548/defBF54x_base.h
+++ b/include/asm-blackfin/mach-bf548/defBF54x_base.h
@@ -109,6 +109,7 @@
 
 /* SPI0 Registers */
 
+#define                     SPI0_REGBASE  0xffc00500
 #define                         SPI0_CTL  0xffc00500   /* SPI0 Control Register */
 #define                         SPI0_FLG  0xffc00504   /* SPI0 Flag Register */
 #define                        SPI0_STAT  0xffc00508   /* SPI0 Status Register */
@@ -121,6 +122,7 @@
 
 /* Two Wire Interface Registers (TWI0) */
 
+#define                     TWI0_REGBASE  0xffc00700
 #define                      TWI0_CLKDIV  0xffc00700   /* Clock Divider Register */
 #define                     TWI0_CONTROL  0xffc00704   /* TWI Control Register */
 #define                  TWI0_SLAVE_CTRL  0xffc00708   /* TWI Slave Mode Control Register */
@@ -978,6 +980,7 @@
 
 /* SPI1 Registers */
 
+#define                     SPI1_REGBASE  0xffc02300
 #define                         SPI1_CTL  0xffc02300   /* SPI1 Control Register */
 #define                         SPI1_FLG  0xffc02304   /* SPI1 Flag Register */
 #define                        SPI1_STAT  0xffc02308   /* SPI1 Status Register */

diff --git a/include/asm-blackfin/mach-bf561/defBF561.h b/include/asm-blackfin/mach-bf561/defBF561.h
index 0f2dc6e..bf7dc4e 100644 (file)
--- a/include/asm-blackfin/mach-bf561/defBF561.h
+++ b/include/asm-blackfin/mach-bf561/defBF561.h
@@ -120,6 +120,7 @@
 #define UART_GCTL                      0xFFC00424      /* Global Control Register */
 
 /* SPI Controller (0xFFC00500 - 0xFFC005FF) */
+#define SPI0_REGBASE                   0xFFC00500
 #define SPI_CTL                        0xFFC00500      /* SPI Control Register */
 #define SPI_FLG                        0xFFC00504      /* SPI Flag register */
 #define SPI_STAT                       0xFFC00508      /* SPI Status register */