drm/amdgpu: put MQDs in VRAM
authorAlex Deucher <alexander.deucher@amd.com>
Wed, 26 Apr 2023 19:30:13 +0000 (15:30 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 9 Jun 2023 13:30:58 +0000 (09:30 -0400)
Reduces preemption latency.
Only enable this for gfx10 and 11 for now
to avoid changing behavior on gfx 8 and 9.

v2: move MES MQDs into VRAM as well (YuBiao)
v3: enable on gfx10, 11 only (Alex)
v4: minor style changes, document why gfx10/11 only (Alex)

Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

index 90f5d30..b91be56 100644 (file)
@@ -382,6 +382,11 @@ int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev,
        int r, i, j;
        struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id];
        struct amdgpu_ring *ring = &kiq->ring;
+       u32 domain = AMDGPU_GEM_DOMAIN_GTT;
+
+       /* Only enable on gfx10 and 11 for now to avoid changing behavior on older chips */
+       if (adev->ip_versions[GC_HWIP][0] >= IP_VERSION(10, 0, 0))
+               domain |= AMDGPU_GEM_DOMAIN_VRAM;
 
        /* create MQD for KIQ */
        if (!adev->enable_mes_kiq && !ring->mqd_obj) {
@@ -413,7 +418,7 @@ int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev,
                        ring = &adev->gfx.gfx_ring[i];
                        if (!ring->mqd_obj) {
                                r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE,
-                                                           AMDGPU_GEM_DOMAIN_GTT, &ring->mqd_obj,
+                                                           domain, &ring->mqd_obj,
                                                            &ring->mqd_gpu_addr, &ring->mqd_ptr);
                                if (r) {
                                        dev_warn(adev->dev, "failed to create ring mqd bo (%d)", r);
@@ -435,7 +440,7 @@ int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev,
                ring = &adev->gfx.compute_ring[j];
                if (!ring->mqd_obj) {
                        r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE,
-                                                   AMDGPU_GEM_DOMAIN_GTT, &ring->mqd_obj,
+                                                   domain, &ring->mqd_obj,
                                                    &ring->mqd_gpu_addr, &ring->mqd_ptr);
                        if (r) {
                                dev_warn(adev->dev, "failed to create ring mqd bo (%d)", r);
index 0599f8a..4560476 100644 (file)
@@ -901,6 +901,7 @@ static int mes_v10_1_mqd_sw_init(struct amdgpu_device *adev,
                return 0;
 
        r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE,
+                                   AMDGPU_GEM_DOMAIN_VRAM |
                                    AMDGPU_GEM_DOMAIN_GTT, &ring->mqd_obj,
                                    &ring->mqd_gpu_addr, &ring->mqd_ptr);
        if (r) {
index e853bcb..3adb450 100644 (file)
@@ -999,6 +999,7 @@ static int mes_v11_0_mqd_sw_init(struct amdgpu_device *adev,
                return 0;
 
        r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE,
+                                   AMDGPU_GEM_DOMAIN_VRAM |
                                    AMDGPU_GEM_DOMAIN_GTT, &ring->mqd_obj,
                                    &ring->mqd_gpu_addr, &ring->mqd_ptr);
        if (r) {