rusticl/kernel: explicitly set rounding modes

Since dbbf566588c ("aco,ac/llvm,radeonsi: lower f2f16 to f2f16_rtz in nir")
radeonsi behavior changed and some of the core fp16 ops broke as a result.

We should explicitly specify the rounding mode until we add an gallium API
for drivers to advertize what they prefer.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26655>
(cherry picked from commit d136583c82d5036696b322bbe966490b321c96e1)

diff --git a/.pick_status.json b/.pick_status.json
index 866721e..75d0378 100644 (file)
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -504,7 +504,7 @@
         "description": "rusticl/kernel: explicitly set rounding modes",
         "nominated": true,
         "nomination_type": 0,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": null,
         "notes": null

diff --git a/src/gallium/frontends/rusticl/core/kernel.rs b/src/gallium/frontends/rusticl/core/kernel.rs
index 21a604c..7a26867 100644 (file)
--- a/src/gallium/frontends/rusticl/core/kernel.rs
+++ b/src/gallium/frontends/rusticl/core/kernel.rs
@@ -734,6 +734,10 @@ pub(super) fn convert_spirv_to_nir(
          */
         nir.preserve_fp16_denorms();
 
+        // Set to rtne for now until drivers are able to report their prefered rounding mode, that
+        // also matches what we report via the API.
+        nir.set_fp_rounding_mode_rtne();
+
         let (args, internal_args) = lower_and_optimize_nir(dev, &mut nir, args, &dev.lib_clc);
 
         if let Some(cache) = cache {

diff --git a/src/gallium/frontends/rusticl/mesa/compiler/nir.rs b/src/gallium/frontends/rusticl/mesa/compiler/nir.rs
index bb5fafd..b61ec92 100644 (file)
--- a/src/gallium/frontends/rusticl/mesa/compiler/nir.rs
+++ b/src/gallium/frontends/rusticl/mesa/compiler/nir.rs
@@ -446,6 +446,15 @@ impl NirShader {
         }
     }
 
+    pub fn set_fp_rounding_mode_rtne(&mut self) {
+        unsafe {
+            self.nir.as_mut().info.float_controls_execution_mode |=
+                float_controls::FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16 as u32
+                    | float_controls::FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32 as u32
+                    | float_controls::FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64 as u32;
+        }
+    }
+
     pub fn reads_sysval(&self, sysval: gl_system_value) -> bool {
         let nir = unsafe { self.nir.as_ref() };
         bitset::test_bit(&nir.info.system_values_read, sysval as u32)