[PORT FROM R2] atomisp: CSS/FW release from Synergy BL 03Feb2012
authorLokesh Gupta <lokesh.gupta@intel.com>
Mon, 6 Feb 2012 21:23:03 +0000 (22:23 +0100)
committerbuildbot <buildbot@intel.com>
Mon, 13 Feb 2012 13:22:22 +0000 (05:22 -0800)
BZ: 23295

To crop off affected by filtering completely, crop size is changed 8 from 12.
Blue/Green woolen yarn will disappear.
This should be applied with new firmware together.

Change-Id: If6e48e991dd26cea0767d7aa6cb1e2fdb26a8690
Orig-Change-Id: Ic403b07e663b04c7c9ca2c83fce6d5ad005b3d51
Signed-off-by: Lokesh Gupta <lokesh.gupta@intel.com>
Reviewed-on: http://android.intel.com:8080/34899
Reviewed-by: Koski, Anttu <anttu.koski@intel.com>
Tested-by: Koski, Anttu <anttu.koski@intel.com>
Reviewed-by: buildbot <buildbot@intel.com>
Tested-by: buildbot <buildbot@intel.com>
drivers/media/video/atomisp/css/hrt/sp.map.h
drivers/media/video/atomisp/css/sh_css_binary_info.h
drivers/media/video/atomisp/css/sh_css_defs.h

index 0e45924..7bec69d 100644 (file)
 #define HIVE_MEM_vf_pp_args  scalar_processor_dmem
 #define HIVE_ADDR_vf_pp_args 0x2AE4
 #define HIVE_SIZE_vf_pp_args 76
-#define HIVE_ADDR_vf_pp_dynamic_entry 0x1A42
+#define HIVE_ADDR_vf_pp_dynamic_entry 0x1A06
 #define HIVE_MEM_current_thread  scalar_processor_dmem
 #define HIVE_ADDR_current_thread 0x29C8
 #define HIVE_SIZE_current_thread 4
-#define HIVE_ADDR_sp_raw_copy_entry 0x4CB
+#define HIVE_ADDR_sp_raw_copy_entry 0x4CC
 #define HIVE_MEM_sp_obarea_length_bq  scalar_processor_dmem
 #define HIVE_ADDR_sp_obarea_length_bq 0xFD8
 #define HIVE_SIZE_sp_obarea_length_bq 4
 #define HIVE_MEM_histogram_args  scalar_processor_dmem
 #define HIVE_ADDR_histogram_args 0x29C4
 #define HIVE_SIZE_histogram_args 4
-#define HIVE_ADDR_capture_pp_dynamic_entry 0x2A59
+#define HIVE_ADDR_capture_pp_dynamic_entry 0x2A18
 #define HIVE_MEM_isp_sdis_horiproj_num  scalar_processor_dmem
 #define HIVE_ADDR_isp_sdis_horiproj_num 0x1580
 #define HIVE_SIZE_isp_sdis_horiproj_num 4
index bdaacd8..2eef1a6 100644 (file)
 #define ISP_POST_ISP_OUTPUT_NUM_CHUNKS       2
 #define ISP_POST_ISP_DUMMY_BUF_VECTORS       0
 #define ISP_POST_ISP_LEFT_CROPPING           SH_CSS_MAX_LEFT_CROPPING
-#define ISP_POST_ISP_TOP_CROPPING            8
+#define ISP_POST_ISP_TOP_CROPPING            12
 #define ISP_POST_ISP_ENABLE_DVS_ENVELOPE     0
 #define ISP_POST_ISP_MAX_DVS_ENVELOPE_WIDTH  0
 #define ISP_POST_ISP_MAX_DVS_ENVELOPE_HEIGHT 0
 #define ISP_PREVIEW_DS_ENABLE_SDIS             0
 #define ISP_PREVIEW_DS_ENABLE_UDS              0
 #define ISP_PREVIEW_DS_LEFT_CROPPING           0
-#define ISP_PREVIEW_DS_TOP_CROPPING            8
+#define ISP_PREVIEW_DS_TOP_CROPPING            12
 #define ISP_PREVIEW_DS_ENABLE_DVS_ENVELOPE     0
 #define ISP_PREVIEW_DS_MAX_DVS_ENVELOPE_WIDTH  0
 #define ISP_PREVIEW_DS_MAX_DVS_ENVELOPE_HEIGHT 0
 #define ISP_PREVIEW_DZ_ENABLE_SDIS             0
 #define ISP_PREVIEW_DZ_OUTPUT_NUM_CHUNKS       1
 #define ISP_PREVIEW_DZ_DUMMY_BUF_VECTORS       0
-#define ISP_PREVIEW_DZ_TOP_CROPPING            8
+#define ISP_PREVIEW_DZ_TOP_CROPPING            12
 #define ISP_PREVIEW_DZ_ENABLE_DVS_ENVELOPE     0
 #define ISP_PREVIEW_DZ_MAX_DVS_ENVELOPE_WIDTH  0
 #define ISP_PREVIEW_DZ_MAX_DVS_ENVELOPE_HEIGHT 0
 #define ISP_PRIMARY_14MP_ENABLE_UDS              0
 #define ISP_PRIMARY_14MP_OUTPUT_NUM_CHUNKS       1
 #define ISP_PRIMARY_14MP_DUMMY_BUF_VECTORS       0
-#define ISP_PRIMARY_14MP_TOP_CROPPING            8
+#define ISP_PRIMARY_14MP_TOP_CROPPING            12
 #define ISP_PRIMARY_14MP_ENABLE_DVS_ENVELOPE     0
 #define ISP_PRIMARY_14MP_MAX_DVS_ENVELOPE_WIDTH  0
 #define ISP_PRIMARY_14MP_MAX_DVS_ENVELOPE_HEIGHT 0
 #define ISP_PRIMARY_16MP_OUTPUT_NUM_CHUNKS   1
 #define ISP_PRIMARY_16MP_DUMMY_BUF_VECTORS   0
 #define ISP_PRIMARY_16MP_LEFT_CROPPING       0
-#define ISP_PRIMARY_16MP_TOP_CROPPING        8
+#define ISP_PRIMARY_16MP_TOP_CROPPING        12
 #define ISP_PRIMARY_16MP_ENABLE_DVS_ENVELOPE 0
 #define ISP_PRIMARY_16MP_MAX_DVS_ENVELOPE_WIDTH   0
 #define ISP_PRIMARY_16MP_MAX_DVS_ENVELOPE_HEIGHT  0
 #define ISP_PRIMARY_8MP_ENABLE_UDS          0
 #define ISP_PRIMARY_8MP_OUTPUT_NUM_CHUNKS   1
 #define ISP_PRIMARY_8MP_DUMMY_BUF_VECTORS   0
-#define ISP_PRIMARY_8MP_TOP_CROPPING        8
+#define ISP_PRIMARY_8MP_TOP_CROPPING        12
 #define ISP_PRIMARY_8MP_ENABLE_DVS_ENVELOPE 0
 #define ISP_PRIMARY_8MP_MAX_DVS_ENVELOPE_WIDTH   0
 #define ISP_PRIMARY_8MP_MAX_DVS_ENVELOPE_HEIGHT  0
 #define ISP_PRIMARY_DS_ENABLE_SDIS          0
 #define ISP_PRIMARY_DS_ENABLE_UDS           0
 #define ISP_PRIMARY_DS_LEFT_CROPPING        0
-#define ISP_PRIMARY_DS_TOP_CROPPING         8
+#define ISP_PRIMARY_DS_TOP_CROPPING         12
 #define ISP_PRIMARY_DS_ENABLE_DVS_ENVELOPE  0
 #define ISP_PRIMARY_DS_MAX_DVS_ENVELOPE_WIDTH   0
 #define ISP_PRIMARY_DS_MAX_DVS_ENVELOPE_HEIGHT  0
 #define ISP_PRIMARY_SMALL_ENABLE_UDS          0
 #define ISP_PRIMARY_SMALL_OUTPUT_NUM_CHUNKS   2
 #define ISP_PRIMARY_SMALL_DUMMY_BUF_VECTORS   0
-#define ISP_PRIMARY_SMALL_TOP_CROPPING        8
+#define ISP_PRIMARY_SMALL_TOP_CROPPING        12
 #define ISP_PRIMARY_SMALL_ENABLE_DVS_ENVELOPE 0
 #define ISP_PRIMARY_SMALL_MAX_DVS_ENVELOPE_WIDTH   0
 #define ISP_PRIMARY_SMALL_MAX_DVS_ENVELOPE_HEIGHT  0
 #define ISP_PRIMARY_VAR_ENABLE_SDIS         0
 #define ISP_PRIMARY_VAR_ENABLE_UDS          0
 #define ISP_PRIMARY_VAR_DUMMY_BUF_VECTORS   0
-#define ISP_PRIMARY_VAR_TOP_CROPPING        8
+#define ISP_PRIMARY_VAR_TOP_CROPPING        12
 #define ISP_PRIMARY_VAR_ENABLE_DVS_ENVELOPE 0
 #define ISP_PRIMARY_VAR_MAX_DVS_ENVELOPE_WIDTH   0
 #define ISP_PRIMARY_VAR_MAX_DVS_ENVELOPE_HEIGHT  0
 #define ISP_PRIMARY_REF_ENABLE_UDS          0
 #define ISP_PRIMARY_REF_OUTPUT_NUM_CHUNKS   1
 #define ISP_PRIMARY_REF_DUMMY_BUF_VECTORS   0
-#define ISP_PRIMARY_REF_TOP_CROPPING        8
+#define ISP_PRIMARY_REF_TOP_CROPPING        12
 #define ISP_PRIMARY_REF_ENABLE_DVS_ENVELOPE 0
 #define ISP_PRIMARY_REF_MAX_DVS_ENVELOPE_WIDTH   0
 #define ISP_PRIMARY_REF_MAX_DVS_ENVELOPE_HEIGHT  0
 #define ISP_VIDEO_OFFLINE_OUTPUT_NUM_CHUNKS   1
 #define ISP_VIDEO_OFFLINE_DUMMY_BUF_VECTORS   0
 #define ISP_VIDEO_OFFLINE_LEFT_CROPPING       0
-#define ISP_VIDEO_OFFLINE_TOP_CROPPING        8
+#define ISP_VIDEO_OFFLINE_TOP_CROPPING        12
 #define ISP_VIDEO_OFFLINE_MAX_DVS_ENVELOPE_WIDTH   0
 #define ISP_VIDEO_OFFLINE_MAX_DVS_ENVELOPE_HEIGHT  0
 #define ISP_VIDEO_OFFLINE_MAX_OUTPUT_WIDTH    1920
 #define ISP_VIDEO_DS_ENABLE_FPNR          0
 #define ISP_VIDEO_DS_ENABLE_UDS           0
 #define ISP_VIDEO_DS_LEFT_CROPPING        0
-#define ISP_VIDEO_DS_TOP_CROPPING         8
+#define ISP_VIDEO_DS_TOP_CROPPING         12
 #define ISP_VIDEO_DS_MAX_DVS_ENVELOPE_WIDTH   0
 #define ISP_VIDEO_DS_MAX_DVS_ENVELOPE_HEIGHT  0
 #define ISP_VIDEO_DS_MAX_OUTPUT_WIDTH     1920
index 6854ed3..a9cf295 100644 (file)
@@ -92,7 +92,7 @@
 #if ISP_VEC_NELEMS == 16
 #define SH_CSS_MAX_LEFT_CROPPING          0
 #else
-#define SH_CSS_MAX_LEFT_CROPPING          8
+#define SH_CSS_MAX_LEFT_CROPPING          12
 #endif
 
 #define        SH_CSS_SP_MAX_WIDTH               1280
 
 /* The minimum dvs envelope is 8x8 to make sure the invalid rows/columns
    that result from filter initialization are skipped. */
-#define SH_CSS_MIN_DVS_ENVELOPE           8
+#define SH_CSS_MIN_DVS_ENVELOPE           12
 
 /* The FPGA system (vec_nelems == 16) only supports upto 5MP */
 #if ISP_VEC_NELEMS == 16