bool isCCKrate = false;
u8 rf_rx_num = 0;
u8 LNA_idx, VGA_idx;
- PPHY_STATUS_RPT_8192CD_T pPhyStaRpt = (PPHY_STATUS_RPT_8192CD_T)pPhyStatus;
+ struct PHY_STATUS_RPT_8192CD_T * pPhyStaRpt = (struct PHY_STATUS_RPT_8192CD_T *)pPhyStatus;
isCCKrate = pPktinfo->data_rate <= DESC_RATE11M;
pPhyInfo->rx_mimo_signal_quality[ODM_RF_PATH_A] = -1;
/* structure and define */
/* */
-typedef struct _Phy_Rx_AGC_Info {
+struct PHY_RX_AGC_INFO_T {
#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
u8 gain:7, trsw:1;
#else
u8 trsw:1, gain:7;
#endif
-} PHY_RX_AGC_INFO_T, *pPHY_RX_AGC_INFO_T;
+};
-typedef struct _Phy_Status_Rpt_8192cd {
- PHY_RX_AGC_INFO_T path_agc[2];
+struct PHY_STATUS_RPT_8192CD_T {
+ struct PHY_RX_AGC_INFO_T path_agc[2];
u8 ch_corr[2];
u8 cck_sig_qual_ofdm_pwdb_all;
u8 cck_agc_rpt_ofdm_cfosho_a;
u8 sgi_en:1;
u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */
#endif
-} PHY_STATUS_RPT_8192CD_T, *PPHY_STATUS_RPT_8192CD_T;
+};
-typedef struct _Phy_Status_Rpt_8812 {
+struct PHY_STATUS_RPT_8812_T {
/* 2012.05.24 LukeLee: This structure should take big/little endian in consideration later..... */
/* DWORD 0 */
u8 antidx_anta:3;
u8 antidx_antb:3;
u8 resvd_1:2;
-} PHY_STATUS_RPT_8812_T, *PPHY_STATUS_RPT_8812_T;
+};
void ODM_PhyStatusQuery(