bus: mhi: host: pci_generic: Add support for Quectel RM520N-GL modem
authorDuke Xin (辛安文) <duke_xinanwen@163.com>
Fri, 30 Jun 2023 06:23:18 +0000 (23:23 -0700)
committerManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Wed, 12 Jul 2023 12:21:43 +0000 (17:51 +0530)
Add MHI interface definition for RM520 product based on Qualcomm SDX6X chip

Signed-off-by: Duke Xin(辛安文) <duke_xinanwen@163.com>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Link: https://lore.kernel.org/r/20230630062318.12114-1-duke_xinanwen@163.com
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
drivers/bus/mhi/host/pci_generic.c

index 9ca0dc3..bbd64e9 100644 (file)
@@ -352,6 +352,16 @@ static const struct mhi_pci_dev_info mhi_quectel_em1xx_info = {
        .sideband_wake = true,
 };
 
+static const struct mhi_pci_dev_info mhi_quectel_rm5xx_info = {
+       .name = "quectel-rm5xx",
+       .edl = "qcom/prog_firehose_sdx6x.elf",
+       .config = &modem_quectel_em1xx_config,
+       .bar_num = MHI_PCI_DEFAULT_BAR_NUM,
+       .dma_data_width = 32,
+       .mru_default = 32768,
+       .sideband_wake = true,
+};
+
 static const struct mhi_channel_config mhi_foxconn_sdx55_channels[] = {
        MHI_CHANNEL_CONFIG_UL(0, "LOOPBACK", 32, 0),
        MHI_CHANNEL_CONFIG_DL(1, "LOOPBACK", 32, 0),
@@ -591,6 +601,9 @@ static const struct pci_device_id mhi_pci_id_table[] = {
                .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info },
        { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1002), /* EM160R-GL (sdx24) */
                .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info },
+       /* RM520N-GL (sdx6x), eSIM */
+       { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1004),
+               .driver_data = (kernel_ulong_t) &mhi_quectel_rm5xx_info },
        { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x100d), /* EM160R-GL (sdx24) */
                .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info },
        { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x2001), /* EM120R-GL for FCCL (sdx24) */