ARM: tegra: Fixup pinmux node names
authorThierry Reding <treding@nvidia.com>
Fri, 4 Nov 2022 12:18:37 +0000 (13:18 +0100)
committerThierry Reding <treding@nvidia.com>
Thu, 17 Nov 2022 23:21:33 +0000 (00:21 +0100)
Pinmux node names should have a pinmux- prefix and not use underscores.
Fix up some cases that didn't follow those rules.

Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm/boot/dts/tegra114-asus-tf701t.dts
arch/arm/boot/dts/tegra124-nyan-big.dts
arch/arm/boot/dts/tegra124-nyan-blaze.dts
arch/arm/boot/dts/tegra124-venice2.dts
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
arch/arm/boot/dts/tegra20-asus-tf101.dts
arch/arm/boot/dts/tegra20-seaboard.dts
arch/arm/boot/dts/tegra20-tamonten.dtsi
arch/arm/boot/dts/tegra20-ventana.dts

index 284209b..9279d24 100644 (file)
@@ -80,7 +80,7 @@
        };
 
        pinmux@70000868 {
-               asus_pad_ec_default: asus-pad-ec-default {
+               asus_pad_ec_default: pinmux-asus-pad-ec-default {
                        ec-interrupt {
                                nvidia,pins = "kb_col5_pq5";
                                nvidia,function = "kbc";
@@ -98,7 +98,7 @@
                        };
                };
 
-               backlight_default: backlight-default {
+               backlight_default: pinmux-backlight-default {
                        backlight-enable {
                                nvidia,pins = "gmi_ad10_ph2";
                                nvidia,function = "gmi";
                        };
                };
 
-               codec_default: codec-default {
+               codec_default: pinmux-codec-default {
                        ldo1-en {
                                nvidia,pins = "sdmmc1_wp_n_pv3";
                                nvidia,function = "sdmmc1";
                        };
                };
 
-               gpio_keys_default: gpio-keys-default {
+               gpio_keys_default: pinmux-gpio-keys-default {
                        power {
                                nvidia,pins = "kb_col0_pq0";
                                nvidia,function = "kbc";
                        };
                };
 
-               gpio_hall_sensor_default: gpio-hall-sensor-default {
+               gpio_hall_sensor_default: pinmux-gpio-hall-sensor-default {
                        ulpi_data4_po5 {
                                nvidia,pins = "ulpi_data4_po5";
                                nvidia,function = "spi2";
                        };
                };
 
-               hp_det_default: hp-det-default {
+               hp_det_default: pinmux-hp-det-default {
                        gmi_iordy_pi5 {
                                nvidia,pins = "kb_row7_pr7";
                                nvidia,function = "rsvd2";
                        };
                };
 
-               imu_default: imu-default {
+               imu_default: pinmux-imu-default {
                        kb_row3_pr3 {
                                nvidia,pins = "kb_row3_pr3";
                                nvidia,function = "rsvd3";
                        };
                };
 
-               pwm_default: pwm-default {
+               pwm_default: pinmux-pwm-default {
                        gmi_ad9_ph1 {
                                nvidia,pins = "gmi_ad9_ph1";
                                nvidia,function = "pwm1";
                };
 
                /* XXX make this something more sensible */
-               pwm_sleep: pwm-sleep {
+               pwm_sleep: pinmux-pwm-sleep {
                        gmi_ad9_ph1 {
                                nvidia,pins = "gmi_ad9_ph1";
                                nvidia,function = "pwm1";
                        };
                };
 
-               sdmmc3_default: sdmmc3-default {
+               sdmmc3_default: pinmux-sdmmc3-default {
                        sdmmc3_clk_pa6 {
                                nvidia,pins = "sdmmc3_clk_pa6";
                                nvidia,function = "sdmmc3";
                        };
                };
 
-               sdmmc3_vdd_default: sdmmc3-vdd-default {
+               sdmmc3_vdd_default: pinmux-sdmmc3-vdd-default {
                        gmi_clk_pk1 {
                                nvidia,pins = "gmi_clk_pk1";
                                nvidia,function = "gmi";
                        };
                };
 
-               vdd_lcd_default: vdd-lcd-default {
+               vdd_lcd_default: pinmux-vdd-lcd-default {
                        sdmmc4_clk_pcc4 {
                                nvidia,pins = "sdmmc4_clk_pcc4";
                                nvidia,function = "sdmmc4";
index fdc1d64..95e2d58 100644 (file)
@@ -39,7 +39,7 @@
                pinctrl-names = "default";
                pinctrl-0 = <&pinmux_default>;
 
-               pinmux_default: common {
+               pinmux_default: pinmux {
                        clk_32k_out_pa0 {
                                nvidia,pins = "clk_32k_out_pa0";
                                nvidia,pull = <TEGRA_PIN_PULL_NONE>;
index abdf445..dd56ffa 100644 (file)
@@ -37,7 +37,7 @@
                pinctrl-names = "default";
                pinctrl-0 = <&pinmux_default>;
 
-               pinmux_default: common {
+               pinmux_default: pinmux {
                        clk_32k_out_pa0 {
                                nvidia,pins = "clk_32k_out_pa0";
                                nvidia,pull = <TEGRA_PIN_PULL_NONE>;
index 8f40fcf..fce7496 100644 (file)
@@ -70,7 +70,7 @@
                pinctrl-names = "boot";
                pinctrl-0 = <&pinmux_boot>;
 
-               pinmux_boot: common {
+               pinmux_boot: pinmux {
                        dap_mclk1_pw4 {
                                nvidia,pins = "dap_mclk1_pw4";
                                nvidia,function = "extperiph1";
index dac6d02..17afc2c 100644 (file)
                        };
                };
 
-               state_i2cmux_ddc: pinmux_i2cmux_ddc {
+               state_i2cmux_ddc: pinmux-i2cmux-ddc {
                        ddc {
                                nvidia,pins = "ddc";
                                nvidia,function = "i2c2";
                        };
                };
 
-               state_i2cmux_pta: pinmux_i2cmux_pta {
+               state_i2cmux_pta: pinmux-i2cmux-pta {
                        ddc {
                                nvidia,pins = "ddc";
                                nvidia,function = "rsvd4";
                        };
                };
 
-               state_i2cmux_idle: pinmux_i2cmux_idle {
+               state_i2cmux_idle: pinmux-i2cmux-idle {
                        ddc {
                                nvidia,pins = "ddc";
                                nvidia,function = "rsvd4";
index 7107ce6..c39ddb4 100644 (file)
                        };
                };
 
-               state_i2cmux_ddc: pinmux_i2cmux_ddc {
+               state_i2cmux_ddc: pinmux-i2cmux-ddc {
                        ddc {
                                nvidia,pins = "ddc";
                                nvidia,function = "i2c2";
                        };
                };
 
-               state_i2cmux_pta: pinmux_i2cmux_pta {
+               state_i2cmux_pta: pinmux-i2cmux-pta {
                        ddc {
                                nvidia,pins = "ddc";
                                nvidia,function = "rsvd4";
                        };
                };
 
-               state_i2cmux_idle: pinmux_i2cmux_idle {
+               state_i2cmux_idle: pinmux-i2cmux-idle {
                        ddc {
                                nvidia,pins = "ddc";
                                nvidia,function = "rsvd4";
index 5b4c5ef..ab33ff6 100644 (file)
                        };
                };
 
-               state_i2cmux_ddc: pinmux_i2cmux_ddc {
+               state_i2cmux_ddc: pinmux-i2cmux-ddc {
                        ddc {
                                nvidia,pins = "ddc";
                                nvidia,function = "i2c2";
                        };
                };
 
-               state_i2cmux_pta: pinmux_i2cmux_pta {
+               state_i2cmux_pta: pinmux-i2cmux-pta {
                        ddc {
                                nvidia,pins = "ddc";
                                nvidia,function = "rsvd4";
                        };
                };
 
-               state_i2cmux_idle: pinmux_i2cmux_idle {
+               state_i2cmux_idle: pinmux-i2cmux-idle {
                        ddc {
                                nvidia,pins = "ddc";
                                nvidia,function = "rsvd4";
index 0e19bd0..980272a 100644 (file)
                        };
                };
 
-               state_i2cmux_ddc: pinmux_i2cmux_ddc {
+               state_i2cmux_ddc: pinmux-i2cmux-ddc {
                        ddc {
                                nvidia,pins = "ddc";
                                nvidia,function = "i2c2";
                        };
                };
 
-               state_i2cmux_pta: pinmux_i2cmux_pta {
+               state_i2cmux_pta: pinmux-i2cmux-pta {
                        ddc {
                                nvidia,pins = "ddc";
                                nvidia,function = "rsvd4";
                        };
                };
 
-               state_i2cmux_idle: pinmux_i2cmux_idle {
+               state_i2cmux_idle: pinmux-i2cmux-idle {
                        ddc {
                                nvidia,pins = "ddc";
                                nvidia,function = "rsvd4";
index caa17e8..2d7bb44 100644 (file)
                        };
                };
 
-               state_i2cmux_ddc: pinmux_i2cmux_ddc {
+               state_i2cmux_ddc: pinmux-i2cmux-ddc {
                        ddc {
                                nvidia,pins = "ddc";
                                nvidia,function = "i2c2";
                        };
                };
 
-               state_i2cmux_pta: pinmux_i2cmux_pta {
+               state_i2cmux_pta: pinmux-i2cmux-pta {
                        ddc {
                                nvidia,pins = "ddc";
                                nvidia,function = "rsvd4";
                        };
                };
 
-               state_i2cmux_idle: pinmux_i2cmux_idle {
+               state_i2cmux_idle: pinmux-i2cmux-idle {
                        ddc {
                                nvidia,pins = "ddc";
                                nvidia,function = "rsvd4";