drm/i915/fb: move intel_surf_alignment() to intel_fb.c

Split out fb related stuff from intel_display.c to intel_fb.c.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/0b894be3a6acff5fe917b686771a084a6c2aa535.1629721467.git.jani.nikula@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index ddc6bd4..a9e3ac0 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -901,70 +901,6 @@ unsigned int intel_remapped_info_size(const struct intel_remapped_info *rem_info
        return size;
 }
 
-static unsigned int intel_linear_alignment(const struct drm_i915_private *dev_priv)
-{
-       if (DISPLAY_VER(dev_priv) >= 9)
-               return 256 * 1024;
-       else if (IS_I965G(dev_priv) || IS_I965GM(dev_priv) ||
-                IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
-               return 128 * 1024;
-       else if (DISPLAY_VER(dev_priv) >= 4)
-               return 4 * 1024;
-       else
-               return 0;
-}
-
-unsigned int intel_surf_alignment(const struct drm_framebuffer *fb,
-                                 int color_plane)
-{
-       struct drm_i915_private *dev_priv = to_i915(fb->dev);
-
-       if (intel_fb_uses_dpt(fb))
-               return 512 * 4096;
-
-       /* AUX_DIST needs only 4K alignment */
-       if (is_ccs_plane(fb, color_plane))
-               return 4096;
-
-       if (is_semiplanar_uv_plane(fb, color_plane)) {
-               /*
-                * TODO: cross-check wrt. the bspec stride in bytes * 64 bytes
-                * alignment for linear UV planes on all platforms.
-                */
-               if (DISPLAY_VER(dev_priv) >= 12) {
-                       if (fb->modifier == DRM_FORMAT_MOD_LINEAR)
-                               return intel_linear_alignment(dev_priv);
-
-                       return intel_tile_row_size(fb, color_plane);
-               }
-
-               return 4096;
-       }
-
-       drm_WARN_ON(&dev_priv->drm, color_plane != 0);
-
-       switch (fb->modifier) {
-       case DRM_FORMAT_MOD_LINEAR:
-               return intel_linear_alignment(dev_priv);
-       case I915_FORMAT_MOD_X_TILED:
-               if (HAS_ASYNC_FLIPS(dev_priv))
-                       return 256 * 1024;
-               return 0;
-       case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
-       case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
-       case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
-               return 16 * 1024;
-       case I915_FORMAT_MOD_Y_TILED_CCS:
-       case I915_FORMAT_MOD_Yf_TILED_CCS:
-       case I915_FORMAT_MOD_Y_TILED:
-       case I915_FORMAT_MOD_Yf_TILED:
-               return 1 * 1024 * 1024;
-       default:
-               MISSING_CASE(fb->modifier);
-               return 0;
-       }
-}
-
 static bool intel_plane_uses_fence(const struct intel_plane_state *plane_state)
 {
        struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);

diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 695b874..4719ffc 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -628,9 +628,6 @@ struct intel_encoder *
 intel_get_crtc_new_encoder(const struct intel_atomic_state *state,
                           const struct intel_crtc_state *crtc_state);
 
-unsigned int intel_surf_alignment(const struct drm_framebuffer *fb,
-                                 int color_plane);
-
 void intel_display_driver_register(struct drm_i915_private *i915);
 void intel_display_driver_unregister(struct drm_i915_private *i915);
 

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 9e722cc..e24ee2a 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -184,6 +184,70 @@ unsigned int intel_cursor_alignment(const struct drm_i915_private *i915)
                return 4 * 1024;
 }
 
+static unsigned int intel_linear_alignment(const struct drm_i915_private *dev_priv)
+{
+       if (DISPLAY_VER(dev_priv) >= 9)
+               return 256 * 1024;
+       else if (IS_I965G(dev_priv) || IS_I965GM(dev_priv) ||
+                IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
+               return 128 * 1024;
+       else if (DISPLAY_VER(dev_priv) >= 4)
+               return 4 * 1024;
+       else
+               return 0;
+}
+
+unsigned int intel_surf_alignment(const struct drm_framebuffer *fb,
+                                 int color_plane)
+{
+       struct drm_i915_private *dev_priv = to_i915(fb->dev);
+
+       if (intel_fb_uses_dpt(fb))
+               return 512 * 4096;
+
+       /* AUX_DIST needs only 4K alignment */
+       if (is_ccs_plane(fb, color_plane))
+               return 4096;
+
+       if (is_semiplanar_uv_plane(fb, color_plane)) {
+               /*
+                * TODO: cross-check wrt. the bspec stride in bytes * 64 bytes
+                * alignment for linear UV planes on all platforms.
+                */
+               if (DISPLAY_VER(dev_priv) >= 12) {
+                       if (fb->modifier == DRM_FORMAT_MOD_LINEAR)
+                               return intel_linear_alignment(dev_priv);
+
+                       return intel_tile_row_size(fb, color_plane);
+               }
+
+               return 4096;
+       }
+
+       drm_WARN_ON(&dev_priv->drm, color_plane != 0);
+
+       switch (fb->modifier) {
+       case DRM_FORMAT_MOD_LINEAR:
+               return intel_linear_alignment(dev_priv);
+       case I915_FORMAT_MOD_X_TILED:
+               if (HAS_ASYNC_FLIPS(dev_priv))
+                       return 256 * 1024;
+               return 0;
+       case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
+       case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
+       case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
+               return 16 * 1024;
+       case I915_FORMAT_MOD_Y_TILED_CCS:
+       case I915_FORMAT_MOD_Yf_TILED_CCS:
+       case I915_FORMAT_MOD_Y_TILED:
+       case I915_FORMAT_MOD_Yf_TILED:
+               return 1 * 1024 * 1024;
+       default:
+               MISSING_CASE(fb->modifier);
+               return 0;
+       }
+}
+
 void intel_fb_plane_get_subsampling(int *hsub, int *vsub,
                                    const struct drm_framebuffer *fb,
                                    int color_plane)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.h b/drivers/gpu/drm/i915/display/intel_fb.h
index f3d677c..0b0a831 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -34,6 +34,8 @@ unsigned int intel_tile_row_size(const struct drm_framebuffer *fb, int color_pla
 unsigned int intel_fb_align_height(const struct drm_framebuffer *fb,
                                   int color_plane, unsigned int height);
 unsigned int intel_cursor_alignment(const struct drm_i915_private *i915);
+unsigned int intel_surf_alignment(const struct drm_framebuffer *fb,
+                                 int color_plane);
 
 void intel_fb_plane_get_subsampling(int *hsub, int *vsub,
                                    const struct drm_framebuffer *fb,