arm64: dts: st: add stm32mp257f-ev1 board support
authorAlexandre Torgue <alexandre.torgue@foss.st.com>
Thu, 18 Nov 2021 11:26:49 +0000 (12:26 +0100)
committerAlexandre Torgue <alexandre.torgue@foss.st.com>
Thu, 8 Jun 2023 14:01:45 +0000 (16:01 +0200)
Add STM32MP257F Evaluation board support. It embeds a STM32MP257FAI SoC,
with 4GB of DDR4, TSN switch (2+1 ports), 2*USB typeA, 1*USB2 typeC,
SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ...

Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
arch/arm64/boot/dts/Makefile
arch/arm64/boot/dts/st/Makefile [new file with mode: 0644]
arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
arch/arm64/boot/dts/st/stm32mp257f-ev1.dts [new file with mode: 0644]

index 7b107fa..30dd634 100644 (file)
@@ -27,6 +27,7 @@ subdir-y += renesas
 subdir-y += rockchip
 subdir-y += socionext
 subdir-y += sprd
+subdir-y += st
 subdir-y += synaptics
 subdir-y += tesla
 subdir-y += ti
diff --git a/arch/arm64/boot/dts/st/Makefile b/arch/arm64/boot/dts/st/Makefile
new file mode 100644 (file)
index 0000000..881fe12
--- /dev/null
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0-only
+dtb-$(CONFIG_ARCH_STM32) += stm32mp257f-ev1.dtb
index 5bd2776..d34a1d5 100644 (file)
@@ -5,3 +5,34 @@
  */
 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
 
+&pinctrl {
+       usart2_pins_a: usart2-0 {
+               pins1 {
+                       pinmux = <STM32_PINMUX('A', 4, AF6)>; /* USART2_TX */
+                       bias-disable;
+                       drive-push-pull;
+                       slew-rate = <0>;
+               };
+               pins2 {
+                       pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
+                       bias-disable;
+               };
+       };
+
+       usart2_idle_pins_a: usart2-idle-0 {
+               pins1 {
+                       pinmux = <STM32_PINMUX('A', 4, ANALOG)>; /* USART2_TX */
+               };
+               pins2 {
+                       pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
+                       bias-disable;
+               };
+       };
+
+       usart2_sleep_pins_a: usart2-sleep-0 {
+               pins {
+                       pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* USART2_TX */
+                                <STM32_PINMUX('A', 8, ANALOG)>; /* USART2_RX */
+               };
+       };
+};
diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts
new file mode 100644 (file)
index 0000000..39b4726
--- /dev/null
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
+ */
+
+/dts-v1/;
+
+#include "stm32mp257.dtsi"
+#include "stm32mp25xf.dtsi"
+#include "stm32mp25-pinctrl.dtsi"
+#include "stm32mp25xxai-pinctrl.dtsi"
+
+/ {
+       model = "STMicroelectronics STM32MP257F-EV1 Evaluation Board";
+       compatible = "st,stm32mp257f-ev1", "st,stm32mp257";
+
+       aliases {
+               serial0 = &usart2;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       memory@80000000 {
+               device_type = "memory";
+               reg = <0x0 0x80000000 0x1 0x0>;
+       };
+
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               fw@80000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x0 0x80000000 0x0 0x4000000>;
+                       no-map;
+               };
+       };
+};
+
+&usart2 {
+       pinctrl-names = "default", "idle", "sleep";
+       pinctrl-0 = <&usart2_pins_a>;
+       pinctrl-1 = <&usart2_idle_pins_a>;
+       pinctrl-2 = <&usart2_sleep_pins_a>;
+       status = "okay";
+};