radeon: pull bus master enable into its own function
authorDave Airlie <airlied@redhat.com>
Sun, 2 Nov 2008 23:32:39 +0000 (09:32 +1000)
committerDave Airlie <airlied@redhat.com>
Sun, 2 Nov 2008 23:32:39 +0000 (09:32 +1000)
linux-core/radeon_pm.c
shared-core/radeon_cp.c
shared-core/radeon_drv.h

index 6b1e6f8..db8f44c 100644 (file)
@@ -93,7 +93,6 @@ int radeon_resume(struct drm_device *dev)
        struct drm_radeon_private *dev_priv = dev->dev_private;
        struct drm_framebuffer *fb;
        int i;
-       u32 tmp;
 
        if (!drm_core_check_feature(dev, DRIVER_MODESET))
                return 0;
@@ -104,10 +103,7 @@ int radeon_resume(struct drm_device *dev)
                return -1;
 
        /* Turn on bus mastering -todo fix properly */
-       if (dev_priv->chip_family < CHIP_RV380) {
-               tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
-               RADEON_WRITE(RADEON_BUS_CNTL, tmp);
-       }
+       radeon_enable_bm(dev_priv);
 
        DRM_ERROR("\n");
        /* on atom cards re init the whole card 
index 4f5c538..b6207c7 100644 (file)
@@ -194,6 +194,23 @@ static void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base)
        }
 }
 
+void radeon_enable_bm(struct drm_radeon_private *dev_priv)
+{
+       u32 tmp;
+       /* Turn on bus mastering */
+       if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
+           ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
+           ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
+               /* rs400, rs690/rs740 */
+               tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS400_BUS_MASTER_DIS;
+               RADEON_WRITE(RADEON_BUS_CNTL, tmp);
+       } else if (!(((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV380) ||
+                   ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R423))) {
+               /* r1xx, r2xx, r300, r(v)350, r420/r481, rs480 */
+               tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
+               RADEON_WRITE(RADEON_BUS_CNTL, tmp);
+       } /* PCIE cards appears to not need this */
+}
 
 void radeon_pll_errata_after_index(struct drm_radeon_private *dev_priv)
 {
@@ -686,7 +703,6 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
                                       drm_radeon_private_t * dev_priv)
 {
        u32 ring_start, cur_read_ptr;
-       u32 tmp;
 
        /* Initialize the memory controller. With new memory map, the fb location
         * is not changed, it should have been properly initialized already. Part
@@ -796,9 +812,7 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
        else
                RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x1f); 
 
-       /* Turn on bus mastering */
-       tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
-       RADEON_WRITE(RADEON_BUS_CNTL, tmp);
+       radeon_enable_bm(dev_priv);
 
        dev_priv->scratch[0] = 0;
        RADEON_WRITE(RADEON_LAST_FRAME_REG, 0);
index 2d592e4..0d5f762 100644 (file)
@@ -1691,7 +1691,7 @@ extern int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *
 extern int radeon_cs_init(struct drm_device *dev);
 void radeon_gem_update_offsets(struct drm_device *dev, struct drm_master *master);
 void radeon_init_memory_map(struct drm_device *dev);
-
+void radeon_enable_bm(struct drm_radeon_private *dev_priv);
 
 #define MARK_SAFE              1
 #define MARK_CHECK_OFFSET      2