spi: stm32: driver uses reset controller only at init
authorEtienne Carriere <etienne.carriere@st.com>
Fri, 5 Feb 2021 18:59:29 +0000 (19:59 +0100)
committerMark Brown <broonie@kernel.org>
Fri, 5 Feb 2021 19:16:59 +0000 (19:16 +0000)
Remove reset controller device reference from the device private
structure since it is used only at probe time and can be discarded
once used to reset the SPI device.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/1612551572-495-6-git-send-email-alain.volmat@foss.st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-stm32.c

index 8e4db21..5612348 100644 (file)
@@ -263,7 +263,6 @@ struct stm32_spi_cfg {
  * @base: virtual memory area
  * @clk: hw kernel clock feeding the SPI clock generator
  * @clk_rate: rate of the hw kernel clock feeding the SPI clock generator
- * @rst: SPI controller reset line
  * @lock: prevent I/O concurrent access
  * @irq: SPI controller interrupt line
  * @fifo_size: size of the embedded fifo in bytes
@@ -289,7 +288,6 @@ struct stm32_spi {
        void __iomem *base;
        struct clk *clk;
        u32 clk_rate;
-       struct reset_control *rst;
        spinlock_t lock; /* prevent I/O concurrent access */
        int irq;
        unsigned int fifo_size;
@@ -1811,6 +1809,7 @@ static int stm32_spi_probe(struct platform_device *pdev)
        struct spi_master *master;
        struct stm32_spi *spi;
        struct resource *res;
+       struct reset_control *rst;
        int ret;
 
        master = spi_alloc_master(&pdev->dev, sizeof(struct stm32_spi));
@@ -1872,11 +1871,11 @@ static int stm32_spi_probe(struct platform_device *pdev)
                goto err_clk_disable;
        }
 
-       spi->rst = devm_reset_control_get_exclusive(&pdev->dev, NULL);
-       if (!IS_ERR(spi->rst)) {
-               reset_control_assert(spi->rst);
+       rst = devm_reset_control_get_exclusive(&pdev->dev, NULL);
+       if (!IS_ERR(rst)) {
+               reset_control_assert(rst);
                udelay(2);
-               reset_control_deassert(spi->rst);
+               reset_control_deassert(rst);
        }
 
        if (spi->cfg->has_fifo)