case 0x4800:
case 0x7a00:
if (dev_priv->chipset >= 0xA0) {
+ *size = roundup(*size, 28672);
/* This is based on high end cards with 448 bits
* memory bus, could be different elsewhere.*/
*size += 6 * 28672;
* but we must also align to page size. */
*align = 2 * 8 * 28672;
} else if (dev_priv->chipset >= 0x90) {
+ *size = roundup(*size, 16384);
*size += 3 * 16384;
*align = 12 * 16384;
} else {
+ *size = roundup(*size, 8192);
*size += 3 * 8192;
/* 12 * 8192 is the actual alignment requirement
* but we must also align to page size. */
}
}
- *size = ALIGN(*size, PAGE_SIZE);
+ /* ALIGN works only on powers of two. */
+ *size = roundup(*size, PAGE_SIZE);
if (dev_priv->card_type == NV_50) {
- *size = ALIGN(*size, 65536);
+ *size = roundup(*size, 65536);
*align = max(65536, *align);
}
}
mode_cmd.bpp = surface_bpp;
mode_cmd.pitch = mode_cmd.width * (mode_cmd.bpp >> 3);
- mode_cmd.pitch = ALIGN(mode_cmd.pitch, 256);
+ mode_cmd.pitch = roundup(mode_cmd.pitch, 256);
mode_cmd.depth = surface_depth;
size = mode_cmd.pitch * mode_cmd.height;
- size = ALIGN(size, PAGE_SIZE);
+ size = roundup(size, PAGE_SIZE);
ret = nouveau_gem_new(dev, dev_priv->channel, size, 0, TTM_PL_FLAG_VRAM,
0, 0x0000, false, true, &nvbo);