dt-bindings: PCI: dra7xx: Add properties to enable x2 lane in dra7
authorKishon Vijay Abraham I <kishon@ti.com>
Thu, 24 Jan 2019 08:29:56 +0000 (13:59 +0530)
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Thu, 31 Jan 2019 17:15:02 +0000 (17:15 +0000)
Add syscon properties required for configuring PCIe in x2 lane mode.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/pci/ti-pci.txt

index e03d236..d5cbfe6 100644 (file)
@@ -13,6 +13,9 @@ PCIe DesignWare Controller
  - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>",
               where <X> is the instance number of the pcie from the HW spec.
  - num-lanes as specified in ../designware-pcie.txt
+ - ti,syscon-lane-sel : phandle/offset pair. Phandle to the system control
+                       module and the register offset to specify lane
+                       selection.
 
 HOST MODE
 =========