dts: starfive: Add overlay dts and fix pin conflict

Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>

diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
index 7701282..ac4756f 100644 (file)
--- a/arch/riscv/boot/dts/starfive/Makefile
+++ b/arch/riscv/boot/dts/starfive/Makefile
@@ -1,2 +1,12 @@
 # SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_SOC_STARFIVE_JH7110) += jh7110-visionfive-v2.dtb jh7110-evb.dtb jh7110-fpga.dtb
+subdir-y += evb-overlay
+dtb-$(CONFIG_SOC_STARFIVE_JH7110) += jh7110-visionfive-v2.dtb  \
+                               jh7110-evb.dtb                  \
+                               jh7110-fpga.dtb                 \
+                               jh7110-evb-can-pdm-pwmdac.dtb   \
+                               jh7110-evb-dvp-rgb2hdmi.dtb     \
+                               jh7110-evb-pcie-i2s-sd.dtb      \
+                               jh7110-evb-spi-uart2.dtb        \
+                               jh7110-evb-uart1-rgb2hdmi.dtb   \
+                               jh7110-evb-uart4-emmc.dtb       \
+                               jh7110-evb-uart5-pwm-i2c-tdm.dtb

diff --git a/arch/riscv/boot/dts/starfive/evb-overlay/Makefile b/arch/riscv/boot/dts/starfive/evb-overlay/Makefile
new file mode 100644 (file)
index 0000000..53c958e
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/evb-overlay/Makefile
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_SOC_STARFIVE_JH7110) += jh7110-evb-overlay-pcie.dtbo      \
+                               jh7110-evb-overlay-audio.dtbo           \
+                               jh7110-evb-overlay-spi.dtbo             \
+                               jh7110-evb-overlay-uart4-emmc.dtbo      \
+                               jh7110-evb-overlay-uart5-pwm.dtbo       \
+                               jh7110-evb-overlay-rgb2hdmi.dtbo

diff --git a/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-audio.dts b/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-audio.dts
new file mode 100644 (file)
index 0000000..68d519b
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-audio.dts
@@ -0,0 +1,49 @@
+/dts-v1/;
+/plugin/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/starfive,jh7110-pinfunc.h>
+/ {
+       compatible = "starfive,jh7110";
+
+       //can0
+       fragment@0 {
+               target-path = "/soc/can@130d0000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+
+       //can1
+       fragment@1 {
+               target-path = "/soc/can@130e0000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+
+       //i2srx_mst
+       fragment@2 {
+               target-path = "/soc/i2srx_mst@100e0000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+
+       //pdm
+       fragment@3 {
+               target-path = "/soc/pdm@100d0000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+
+       //pwmdac
+       fragment@4 {
+               target-path = "/soc/pwmdac@100b0000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+};
+
+ 

diff --git a/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-pcie.dts b/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-pcie.dts
new file mode 100644 (file)
index 0000000..2889088
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-pcie.dts
@@ -0,0 +1,127 @@
+/dts-v1/;
+/plugin/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/starfive,jh7110-pinfunc.h>
+/ {
+       compatible = "starfive,jh7110";
+
+       //gpio
+       fragment@0 {
+               target-path = "/soc/gpio@13040000";
+               __overlay__ {
+                       dt_sdcard1_pins: dt-sdcard1-pins {
+                               sdcard1-pins0 {
+                                       sf,pins = <PAD_GPIO56>;
+                                       sf,pinmux = <PAD_GPIO56_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                                       sf,pin-gpio-dout = <GPO_SDIO1_CCLK_OUT>;
+                                       sf,pin-gpio-doen = <OEN_LOW>;
+                               };
+
+                               sdcard1-pins1 {
+                                       sf,pins = <PAD_GPIO50>;
+                                       sf,pinmux = <PAD_GPIO50_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                                       sf,pin-gpio-dout = <GPO_SDIO1_CCMD_OUT>;
+                                       sf,pin-gpio-doen = <OEN_SDIO1_CCMD_OUT_EN>;
+                                       sf,pin-gpio-din =  <GPI_SDIO1_CCMD_IN>;
+                               };
+
+                               sdcard1-pins2 {
+                                       sf,pins = <PAD_GPIO49>;
+                                       sf,pinmux = <PAD_GPIO49_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                                       sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_0>;
+                                       sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_0>;
+                                       sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_0>;
+                               };
+
+                               sdcard1-pins3 {
+                                       sf,pins = <PAD_GPIO45>;
+                                       sf,pinmux = <PAD_GPIO45_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                                       sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_1>;
+                                       sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_1>;
+                                       sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_1>;
+                               };
+
+                               sdcard1-pins4 {
+                                       sf,pins = <PAD_GPIO62>;
+                                       sf,pinmux = <PAD_GPIO62_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                                       sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_2>;
+                                       sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_2>;
+                                       sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_2>;
+                               };
+
+                               sdcard1-pins5 {
+                                       sf,pins = <PAD_GPIO40>;
+                                       sf,pinmux = <PAD_GPIO40_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                                       sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_3>;
+                                       sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_3>;
+                                       sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_3>;
+                               };
+                       };
+               };
+       };
+
+       //uart3
+       fragment@1 {
+               target-path = "/soc/serial@12000000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+
+       //i2c0
+       fragment@2 {
+               target-path = "/soc/i2c@10030000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+
+       //usbdrd30
+       fragment@4 {
+               target-path = "/soc/usbdrd";
+               __overlay__ {
+                       status = "disabled";
+               };
+       };
+
+       //sdio1
+       fragment@5 {
+               target-path = "/soc/sdio1@16020000";
+               __overlay__ {
+                       clock-frequency = <102400000>;
+                       max-frequency = <100000000>;
+                       card-detect-delay = <300>;
+                       bus-width = <4>;
+                       broken-cd;
+                       cap-sd-highspeed;
+                       post-power-on-delay-ms = <200>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&dt_sdcard1_pins>;
+                       status = "okay";
+               };
+       };
+
+       //i2srx_3ch
+       fragment@7 {
+               target-path = "/soc/i2srx_3ch@100e0000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+
+       //i2stx_4ch1
+       fragment@8 {
+               target-path = "/soc/i2stx_4ch0@120b0000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+};
+
+ 

diff --git a/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-rgb2hdmi.dts b/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-rgb2hdmi.dts
new file mode 100644 (file)
index 0000000..baf03f2
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-rgb2hdmi.dts
@@ -0,0 +1,41 @@
+/dts-v1/;
+/plugin/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/starfive,jh7110-pinfunc.h>
+/ {
+       compatible = "starfive,jh7110";
+
+       //i2c3
+       fragment@0 {
+               target-path = "/soc/i2c@12030000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+
+       //dc8200
+       fragment@1 {
+               target-path = "/soc/dc8200@29400000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+
+       //hdmi_output
+       fragment@2 {
+               target-path = "/soc/tda988x_pin";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+
+       //uart1
+       fragment@3 {
+               target-path = "/soc/serial@10010000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+};
+
+ 

diff --git a/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-spi.dts b/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-spi.dts
new file mode 100644 (file)
index 0000000..33af315
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-spi.dts
@@ -0,0 +1,73 @@
+/dts-v1/;
+/plugin/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/starfive,jh7110-pinfunc.h>
+/ {
+       compatible = "starfive,jh7110";
+
+       //spi0
+       fragment@0 {
+               target-path = "/soc/spi@10060000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+
+       //spi1
+       fragment@1 {
+               target-path = "/soc/spi@10070000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+
+       //spi2
+       fragment@2 {
+               target-path = "/soc/spi@10080000";
+               __overlay__ {
+                       status = "disabled";
+               };
+       };
+
+       //spi3
+       fragment@3 {
+               target-path = "/soc/spi@12070000";
+               __overlay__ {
+                       status = "disabled";
+               };
+       };
+
+       //spi4
+       fragment@4 {
+               target-path = "/soc/spi@12080000";
+               __overlay__ {
+                       status = "disabled";
+               };
+       };
+
+       //spi5
+       fragment@5 {
+               target-path = "/soc/spi@12090000";
+               __overlay__ {
+                       status = "disabled";
+               };
+       };
+
+       //spi6
+       fragment@6 {
+               target-path = "/soc/spi@120A0000";
+               __overlay__ {
+                       status = "disabled";
+               };
+       };
+
+       //uart2
+       fragment@7 {
+               target-path = "/soc/serial@10020000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+};
+
+ 

diff --git a/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-uart4-emmc.dts b/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-uart4-emmc.dts
new file mode 100644 (file)
index 0000000..d92ae07
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-uart4-emmc.dts
@@ -0,0 +1,183 @@
+/dts-v1/;
+/plugin/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/starfive,jh7110-pinfunc.h>
+/ {
+       compatible = "starfive,jh7110";
+
+       //gpio
+       fragment@0 {
+               target-path = "/soc/gpio@13040000";
+               __overlay__ {
+                       dt_emmc0_pins: dt-emmc0-pins {
+                               emmc0-pins-rest {
+                                       sf,pins = <PAD_GPIO22>;
+                                       sf,pinmux = <PAD_GPIO22_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                                       sf,pin-gpio-dout = <GPO_SDIO0_RST_N>;
+                                       sf,pin-gpio-doen = <OEN_LOW>;
+                               };
+                       };
+
+                       dt_emmc1_pins: dt-emmc1-pins {
+                               emmc1-pins0-rest {
+                                       sf,pins = <PAD_GPIO51>;
+                                       sf,pinmux = <PAD_GPIO51_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                                       sf,pin-gpio-dout = <GPO_SDIO1_RST_N>;
+                                       sf,pin-gpio-doen = <OEN_LOW>;
+                               };
+
+                               emmc1-pins1 {
+                                       sf,pins = <PAD_GPIO38>;
+                                       sf,pinmux = <PAD_GPIO38_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                                       sf,pin-gpio-dout = <GPO_SDIO1_CCLK_OUT>;
+                                       sf,pin-gpio-doen = <OEN_LOW>;
+                               };
+
+
+                               emmc1-pins2 {
+                                       sf,pins = <PAD_GPIO36>;
+                                       sf,pinmux = <PAD_GPIO36_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                                       sf,pin-gpio-dout = <GPO_SDIO1_CCMD_OUT>;
+                                       sf,pin-gpio-doen = <OEN_SDIO1_CCMD_OUT_EN>;
+                                       sf,pin-gpio-din =  <GPI_SDIO1_CCMD_IN>;
+                               };
+
+                               emmc1-pins3 {
+                                       sf,pins = <PAD_GPIO43>;
+                                       sf,pinmux = <PAD_GPIO43_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                                       sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_0>;
+                                       sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_0>;
+                                       sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_0>;
+                               };
+
+                               emmc1-pins4 {
+                                       sf,pins = <PAD_GPIO48>;
+                                       sf,pinmux = <PAD_GPIO48_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                                       sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_1>;
+                                       sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_1>;
+                                       sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_1>;
+                               };
+
+                               emmc1-pins5 {
+                                       sf,pins = <PAD_GPIO53>;
+                                       sf,pinmux = <PAD_GPIO53_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                                       sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_2>;
+                                       sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_2>;
+                                       sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_2>;
+                               };
+
+                               emmc1-pins6 {
+                                       sf,pins = <PAD_GPIO63>;
+                                       sf,pinmux = <PAD_GPIO63_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                                       sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_3>;
+                                       sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_3>;
+                                       sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_3>;
+                               };
+
+                               emmc1-pins7 {
+                                       sf,pins = <PAD_GPIO52>;
+                                       sf,pinmux = <PAD_GPIO52_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                                       sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_4>;
+                                       sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_4>;
+                                       sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_4>;
+                               };
+
+                               emmc1-pins8 {
+                                       sf,pins = <PAD_GPIO39>;
+                                       sf,pinmux = <PAD_GPIO39_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                                       sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_5>;
+                                       sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_5>;
+                                       sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_5>;
+                               };
+
+                               emmc1-pins9 {
+                                       sf,pins = <PAD_GPIO46>;
+                                       sf,pinmux = <PAD_GPIO46_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                                       sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_6>;
+                                       sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_6>;
+                                       sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_6>;
+                               };
+
+                               emmc1-pins10 {
+                                       sf,pins = <PAD_GPIO47>;
+                                       sf,pinmux = <PAD_GPIO47_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                                       sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_7>;
+                                       sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_7>;
+                                       sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_7>;
+                               };
+                       };
+               };
+       };
+
+       //gpioa
+       fragment@1 {
+               target-path = "/soc/gpio@17020000";
+               __overlay__ {
+                       pwm_ch6to7_pins: pwm-ch6to7-pins {
+                               pwm-ch6-pins {
+                                       sf,pins = <PAD_RGPIO0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                                       sf,pin-gpio-dout = <U0_PWM_8CH_PTC_PWM_6>;
+                                       sf,pin-gpio-doen = <U0_PWM_8CH_PTC_OE_N_6>;
+                               };
+
+                               pwm-ch7-pins {
+                                       sf,pins = <PAD_RGPIO1>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                                       sf,pin-gpio-dout = <U0_PWM_8CH_PTC_PWM_7>;
+                                       sf,pin-gpio-doen = <U0_PWM_8CH_PTC_OE_N_7>;
+                               };
+                       };
+               };
+       };
+
+       //uart4
+       fragment@2 {
+               target-path = "/soc/serial@12010000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+
+       //sdio1
+       fragment@3 {
+               target-path = "/soc/sdio1@16020000";
+               __overlay__ {
+                       clock-frequency = <102400000>;
+                       max-frequency = <100000000>;
+                       card-detect-delay = <300>;
+                       bus-width = <8>;
+                       cap-mmc-hw-reset;
+                       non-removable;
+                       cap-mmc-highspeed;
+                       post-power-on-delay-ms = <200>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&dt_emmc1_pins>;
+                       status = "okay";
+               };
+       };
+
+       //ptc
+       fragment@4 {
+               target-path = "/soc/pwm@120d0000";
+               __overlay__ {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pwm_ch6to7_pins>;
+                       status = "okay";
+               };
+       };
+};
+
+ 

diff --git a/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-uart5-pwm.dts b/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-uart5-pwm.dts
new file mode 100644 (file)
index 0000000..bf91e84
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/evb-overlay/jh7110-evb-overlay-uart5-pwm.dts
@@ -0,0 +1,121 @@
+/dts-v1/;
+/plugin/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/starfive,jh7110-pinfunc.h>
+/ {
+       compatible = "starfive,jh7110";
+
+       //gpio
+       fragment@0 {
+               target-path = "/soc/gpio@13040000";
+               __overlay__ {
+                       dt_pwm_ch0to3_pins: dt-pwm-ch0to3-pins {
+                               pwm_ch0-pins {
+                                       sf,pins = <PAD_GPIO45>;
+                                       sf,pinmux = <PAD_GPIO45_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                                       sf,pin-gpio-dout = <GPO_PTC0_PWM_0>;
+                                       sf,pin-gpio-doen = <OEN_PTC0_PWM_0_OE_N>;
+                               };
+
+                               pwm_ch1-pins {
+                                       sf,pins = <PAD_GPIO46>;
+                                       sf,pinmux = <PAD_GPIO46_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                                       sf,pin-gpio-dout = <GPO_PTC0_PWM_1>;
+                                       sf,pin-gpio-doen = <OEN_PTC0_PWM_1_OE_N>;
+                               };
+
+                               pwm_ch2-pins {
+                                       sf,pins = <PAD_GPIO47>;
+                                       sf,pinmux = <PAD_GPIO47_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                                       sf,pin-gpio-dout = <GPO_PTC0_PWM_2>;
+                                       sf,pin-gpio-doen = <OEN_PTC0_PWM_2_OE_N>;
+                               };
+
+                               pwm_ch3-pins {
+                                       sf,pins = <PAD_GPIO48>;
+                                       sf,pinmux = <PAD_GPIO48_FUNC_SEL 0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                                       sf,pin-gpio-dout = <GPO_PTC0_PWM_3>;
+                                       sf,pin-gpio-doen = <OEN_PTC0_PWM_3_OE_N>;
+                               };
+                       };
+               };
+       };
+
+       //gpioa
+       fragment@1 {
+               target-path = "/soc/gpio@17020000";
+               __overlay__ {
+                       dt_pwm_ch4to5_pins: dt-pwm-ch4to5-pins {
+                               pwm-ch4-pins {
+                                       sf,pins = <PAD_RGPIO0>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                                       sf,pin-gpio-dout = <U0_PWM_8CH_PTC_PWM_4>;
+                                       sf,pin-gpio-doen = <U0_PWM_8CH_PTC_OE_N_4>;
+                               };
+
+                               pwm-ch5-pins {
+                                       sf,pins = <PAD_RGPIO1>;
+                                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                                       sf,pin-gpio-dout = <U0_PWM_8CH_PTC_PWM_5>;
+                                       sf,pin-gpio-doen = <U0_PWM_8CH_PTC_OE_N_5>;
+                               };
+                       };
+               };
+       };
+
+       //uart5
+       fragment@2 {
+               target-path = "/soc/serial@12020000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+
+       //ptc
+       fragment@3 {
+               target-path = "/soc/pwm@120d0000";
+               __overlay__ {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&dt_pwm_ch0to3_pins &dt_pwm_ch4to5_pins>;
+                       status = "okay";
+               };
+       };
+
+       //tdm
+       fragment@4 {
+               target-path = "/soc/tdm@10090000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+
+       //i2c0
+       fragment@5 {
+               target-path = "/soc/i2c@10030000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+
+       //i2c1
+       fragment@6 {
+               target-path = "/soc/i2c@10040000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+
+       //i2c3
+       fragment@7 {
+               target-path = "/soc/i2c@12030000";
+               __overlay__ {
+                       status = "okay";
+               };
+       };
+};
+
+ 

diff --git a/arch/riscv/boot/dts/starfive/jh7110_clk.dtsi b/arch/riscv/boot/dts/starfive/jh7110-clk.dtsi
similarity index 100%
rename from arch/riscv/boot/dts/starfive/jh7110_clk.dtsi
rename to arch/riscv/boot/dts/starfive/jh7110-clk.dtsi

diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
index 54fda8e..eaadfeb 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
@@ -6,7 +6,7 @@
 
 /dts-v1/;
 #include "jh7110.dtsi"
-#include "jh7110_pinctrl.dtsi"
+#include "jh7110-evb-pinctrl.dtsi"
 
 / {
        aliases {
@@ -71,10 +71,34 @@
        status = "okay";
 };
 
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart1_pins>;
+       status = "disabled";
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart2_pins>;
+       status = "disabled";
+};
+
 &uart3 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&uart3_pins>;
-       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart3_pins>;
+       status = "disabled";
+};
+
+&uart4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart4_pins>;
+       status = "disabled";
+};
+
+&uart5 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart5_pins>;
+       status = "disabled";
 };
 
 &dma {
@@ -128,7 +152,6 @@
        pinctrl-names = "default";
        pinctrl-0 = <&i2c1_pins>;
        status = "disabled";
-
 };
 
 &i2c2 {
@@ -139,7 +162,7 @@
        auto_calc_scl_lhcnt;
        pinctrl-names = "default";
        pinctrl-0 = <&i2c2_pins>;
-       status = "disabled";
+       status = "okay";
 
        seeed_plane_i2c@45 {
                compatible = "seeed_panel";
@@ -162,18 +185,7 @@
        auto_calc_scl_lhcnt;
        pinctrl-names = "default";
        pinctrl-0 = <&i2c3_pins>;
-       status = "okay";
-
-       tda998x@70 {
-               compatible = "nxp,tda998x";
-               reg = <0x70>;
-
-               port {
-                       tda998x_0_input: endpoint {
-                               remote-endpoint = <&hdmi_out>;
-                       };
-               };
-       };
+       status = "disabled";
 };
 
 &i2c4 {
@@ -226,6 +238,17 @@
                        };
                };
        };
+
+       tda998x@70 {
+               compatible = "nxp,tda998x";
+               reg = <0x70>;
+
+               port {
+                       tda998x_0_input: endpoint {
+                               remote-endpoint = <&hdmi_out>;
+                       };
+               };
+       };
 };
 
 &i2c5 {
@@ -287,43 +310,17 @@
                };
        };
 };
-/* default sd card */
+
 &sdio0 {
-       clock-frequency = <102400000>;
-       max-frequency = <200000000>;
-       card-detect-delay = <300>;
-       bus-width = <4>;
-       broken-cd;
-       cap-sd-highspeed;
-       post-power-on-delay-ms = <200>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&sdcard0_pins>;
-       //cd-gpios = <&gpio 23 0>;
-       status = "okay";
+       status = "disabled";
 };
 
 &sdio1 {
-       clock-frequency = <4000000>;
-       max-frequency = <1000000>;
-       card-detect-delay = <300>;
-       bus-width = <4>;
-       cap-sd-highspeed;
-       cap-sdio-irq;
-       cap-mmc-hw-reset;
-       non-removable;
-       enable-sdio-wakeup;
-       keep-power-in-suspend;
-       cap-mmc-highspeed;
-       post-power-on-delay-ms = <200>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&mmc1_pins>;
-       status = "okay";
+       status = "disabled";
 };
 
 &vin_sysctl {
        /* when use dvp open this pinctrl*/
-       //pinctrl-names = "default";
-       //pinctrl-0 = <&dvp_pins>;
        status = "okay";
 
        ports {
@@ -432,23 +429,25 @@
 };
 
 &can1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&can1_pins>;
        status = "disabled";
 };
 
 &tdm {
        pinctrl-names = "default";
        pinctrl-0 = <&tdm0_pins>;
-       status = "okay";
+       status = "disabled";
 };
 
 &spdif0 {
-       status = "okay";
+       status = "disabled";
 };
 
 &pwmdac {
        pinctrl-names = "default";
        pinctrl-0 = <&pwmdac0_pins>;
-       status = "okay";
+       status = "disabled";
 };
 
 &i2stx {
@@ -458,19 +457,19 @@
 &pdm {
        pinctrl-names = "default";
        pinctrl-0 = <&pdm0_pins>;
-       status = "okay";
+       status = "disabled";
 };
 
 &i2srx_mst {
        pinctrl-names = "default";
        pinctrl-0 = <&i2srx_clk_pins>;
-       status = "okay";
+       status = "disabled";
 };
 
 &i2srx_3ch {
        pinctrl-names = "default";
        pinctrl-0 = <&i2srx_pins>;
-       status = "okay";
+       status = "disabled";
 };
 
 &i2stx_4ch0 {
@@ -480,21 +479,15 @@
 &i2stx_4ch1 {
        pinctrl-names = "default";
        pinctrl-0 = <&i2s_clk_pins &i2stx_pins>;
-       status = "okay";
-};
-
-&ptc {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pwm_ch0_pins>;
-       status = "okay";
+       status = "disabled";
 };
 
 &spdif_transmitter {
-       status = "okay";
+       status = "disabled";
 };
 
 &spdif_receiver {
-       status = "okay";
+       status = "disabled";
 };
 
 &pwmdac_codec {
@@ -508,7 +501,7 @@
 &spi0 {
        pinctrl-names = "default";
        pinctrl-0 = <&ssp0_pins>;
-       status = "okay";
+       status = "disabled";
 
        spi_dev0: spi@0 {
                compatible = "rohm,dh2228fv";
@@ -608,7 +601,7 @@
        pinctrl-0 = <&pcie0_perst_default>;
        pinctrl-1 = <&pcie0_perst_active>;
        pinctrl-2 = <&pcie0_power_active>;
-       status = "okay";
+       status = "disabled";
 };
 
 &pcie1 {
@@ -616,7 +609,7 @@
        pinctrl-0 = <&pcie1_perst_default>;
        pinctrl-1 = <&pcie1_perst_active>;
        pinctrl-2 = <&pcie1_power_active>;
-       status = "okay";
+       status = "disabled";
 };
 
 &mailbox_contrl0 {
@@ -647,8 +640,6 @@
 };
 
 &dc8200 {
-       //pinctrl-names = "default";
-       //pinctrl-0 = <&rgb_pad_pins>;
        status = "okay";
 
        dc_out: port {
@@ -672,8 +663,6 @@
 
 &hdmi_output {
        status = "okay";
-       pinctrl-names = "default";
-       pinctrl-0 = <&rgb_pad_pins>;
 
        ports {
                #address-cells = <1>;
@@ -696,8 +685,14 @@
        };
 };
 
-&encoder {
+&tda988x_pin {
+       pinctrl-names = "default";
+       pinctrl-0 = <&rgb_pad_pins>;
        status = "disabled";
+};
+
+&encoder {
+       status = "okay";
 
        ports {
                #address-cells = <1>;
@@ -720,9 +715,11 @@
 };
 
 &mipi_dsi {
-       //pinctrl-names = "default";
-       //pinctrl-0 = <&mipitx_pins>;
-       status = "disabled";
+       status = "okay";
+};
+
+&mipi_dphy {
+       status = "okay";
 };
 
 &co_process {
@@ -733,7 +730,7 @@
        pinctrl-names = "default";
        pinctrl-0 = <&usb_pins>;
        dr_mode = "host"; /*host or peripheral*/
-       status = "okay";
+       status = "disabled";
 };
 
 &xrp {

diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb-can-pdm-pwmdac.dts b/arch/riscv/boot/dts/starfive/jh7110-evb-can-pdm-pwmdac.dts
new file mode 100644 (file)
index 0000000..2c543cc
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb-can-pdm-pwmdac.dts
@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2022 Hal Feng <hal.feng@starfivetech.com>
+ */
+
+/dts-v1/;
+#include "jh7110-evb.dtsi"
+#include "codecs/sf_pdm.dtsi"
+#include "codecs/sf_pwmdac.dtsi"
+
+/ {
+       model = "StarFive JH7110 EVB";
+       compatible = "starfive,jh7110-evb", "starfive,jh7110";
+};
+
+/* default sd card */
+&sdio0 {
+       clock-frequency = <102400000>;
+       max-frequency = <200000000>;
+       card-detect-delay = <300>;
+       bus-width = <4>;
+       broken-cd;
+       cap-sd-highspeed;
+       post-power-on-delay-ms = <200>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdcard0_pins>;
+       status = "okay";
+};
+
+&usbdrd30 {
+       status = "okay";
+};
+
+&pcie1 {
+       status = "okay";
+};
+
+&can0 {
+       status = "okay";
+};
+
+&can1 {
+       status = "okay";
+};
+
+&pwmdac_codec {
+       status = "okay";
+};
+
+&pwmdac {
+       status = "okay";
+};
+
+&pdm {
+       status = "okay";
+};
+
+&i2srx_mst {
+       status = "okay";
+};
+
+&dmic_codec {
+       status = "okay";
+};
\ No newline at end of file

diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb-dvp-rgb2hdmi.dts b/arch/riscv/boot/dts/starfive/jh7110-evb-dvp-rgb2hdmi.dts
new file mode 100644 (file)
index 0000000..8f7e9f6
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb-dvp-rgb2hdmi.dts
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2022 Hal Feng <hal.feng@starfivetech.com>
+ */
+
+/dts-v1/;
+#include "jh7110-evb.dtsi"
+
+/ {
+       model = "StarFive JH7110 EVB";
+       compatible = "starfive,jh7110-evb", "starfive,jh7110";
+};
+
+&vin_sysctl {
+       pinctrl-names = "default";
+       pinctrl-0 = <&dvp_pins>;
+};
+
+&hdmi_output {
+       status = "okay";
+};
+
+&tda988x_pin {
+       status = "okay";
+};
+
+&encoder {
+       status = "diabled";
+};
+
+&mipi_dsi {
+       status = "diabled";
+};

diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb-pcie-i2s-sd.dts b/arch/riscv/boot/dts/starfive/jh7110-evb-pcie-i2s-sd.dts
new file mode 100644 (file)
index 0000000..1aef330
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb-pcie-i2s-sd.dts
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2022 Hal Feng <hal.feng@starfivetech.com>
+ */
+
+/dts-v1/;
+#include "jh7110-evb.dtsi"
+#include "codecs/sf_wm8960.dtsi"
+
+/ {
+       model = "StarFive JH7110 EVB";
+       compatible = "starfive,jh7110-evb", "starfive,jh7110";
+};
+
+/* default sd card */
+&sdio0 {
+       clock-frequency = <102400000>;
+       max-frequency = <200000000>;
+       card-detect-delay = <300>;
+       bus-width = <4>;
+       broken-cd;
+       cap-sd-highspeed;
+       post-power-on-delay-ms = <200>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdcard0_pins>;
+       status = "okay";
+};
+
+&pcie1 {
+       status = "okay";
+};
+
+&sdio1 {
+       clock-frequency = <4000000>;
+       max-frequency = <1000000>;
+       card-detect-delay = <300>;
+       bus-width = <4>;
+       cap-sd-highspeed;
+       cap-sdio-irq;
+       cap-mmc-hw-reset;
+       non-removable;
+       enable-sdio-wakeup;
+       keep-power-in-suspend;
+       cap-mmc-highspeed;
+       post-power-on-delay-ms = <200>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdcard1_pins>;
+       status = "okay";
+};
+
+&pcie0 {
+       status = "okay";
+};
+
+&uart3 {
+       status = "okay";
+};
+
+&i2c0 {
+       status = "okay";
+};
+
+&i2srx_3ch {
+       status = "okay";
+};
+
+&i2stx_4ch1 {
+       status = "okay";
+};

diff --git a/arch/riscv/boot/dts/starfive/jh7110_pinctrl.dtsi b/arch/riscv/boot/dts/starfive/jh7110-evb-pinctrl.dtsi
similarity index 72%
rename from arch/riscv/boot/dts/starfive/jh7110_pinctrl.dtsi
rename to arch/riscv/boot/dts/starfive/jh7110-evb-pinctrl.dtsi
index b51f075..54ab3e0 100755 (executable)
--- a/arch/riscv/boot/dts/starfive/jh7110_pinctrl.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb-pinctrl.dtsi
@@ -11,7 +11,7 @@
                gmac0-pins-reset {
                        sf,pins = <PAD_GPIO13>;
                        sf,pinmux = <PAD_GPIO13_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_HIGH>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
@@ -20,7 +20,7 @@
        gmac1_pins: gmac1-pins {
                gmac1-pins0 {
                        sf,pins = <PAD_GMAC1_MDC>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|GPIO_SMT(1)|GPIO_DS(3))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1)|GPIO_SMT(1) | GPIO_DS(3))>;
                        sf,pin-syscon = <PADCFG_PAD_GMAC1_MDC_SYSCON IO_3_3V>;
                };
        };
@@ -28,7 +28,7 @@
        uart0_pins: uart0-pins {
                uart0-pins-tx {
                        sf,pins = <PAD_GPIO5>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|GPIO_DS(3))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | GPIO_DS(3))>;
                        sf,pin-gpio-dout = <GPO_UART0_SOUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
@@ -36,7 +36,7 @@
                uart0-pins-rx {
                        sf,pins = <PAD_GPIO6>;
                        sf,pinmux = <PAD_GPIO6_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|GPIO_PU(1))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | GPIO_PU(1))>;
                        sf,pin-gpio-doen = <OEN_HIGH>;
                        sf,pin-gpio-din =  <GPI_UART0_SIN>;
                };
@@ -44,32 +44,32 @@
 
        uart1_pins: uart1-pins {
                uart1-pins-tx {
-                       sf,pins = <PAD_GPIO41>;
-                       sf,pinmux = <PAD_GPIO41_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|GPIO_DS(3))>;
+                       sf,pins = <PAD_GPIO30>;
+                       sf,pinmux = <PAD_GPIO30_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | GPIO_DS(3))>;
                        sf,pin-gpio-dout = <GPO_UART1_SOUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
 
                uart1-pins-rx {
-                       sf,pins = <PAD_GPIO42>;
-                       sf,pinmux = <PAD_GPIO42_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|GPIO_PU(1))>;
+                       sf,pins = <PAD_GPIO31>;
+                       sf,pinmux = <PAD_GPIO31_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | GPIO_PU(1))>;
                        sf,pin-gpio-doen = <OEN_HIGH>;
                        sf,pin-gpio-din =  <GPI_UART1_SIN>;
                };
 
                uart1-pins-cts {
-                       sf,pins = <PAD_GPIO43>;
-                       sf,pinmux = <PAD_GPIO43_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO29>;
+                       sf,pinmux = <PAD_GPIO29_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-doen = <OEN_HIGH>;
                        sf,pin-gpio-din =  <GPI_UART1_CTS_N>;
                };
 
                uart1-pins-rts {
-                       sf,pins = <PAD_GPIO40>;
-                       sf,pinmux = <PAD_GPIO40_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO27>;
+                       sf,pinmux = <PAD_GPIO27_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_UART1_RTS_N>;
                        sf,pin-gpio-doen = <OEN_LOW>;
@@ -78,32 +78,32 @@
 
        uart2_pins: uart2-pins {
                uart2-pins-tx {
-                       sf,pins = <PAD_GPIO41>;
-                       sf,pinmux = <PAD_GPIO41_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|GPIO_DS(3))>;
+                       sf,pins = <PAD_GPIO30>;
+                       sf,pinmux = <PAD_GPIO30_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | GPIO_DS(3))>;
                        sf,pin-gpio-dout = <GPO_UART2_SOUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
 
                uart2-pins-rx {
-                       sf,pins = <PAD_GPIO42>;
-                       sf,pinmux = <PAD_GPIO42_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|GPIO_PU(1))>;
+                       sf,pins = <PAD_GPIO31>;
+                       sf,pinmux = <PAD_GPIO31_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | GPIO_PU(1))>;
                        sf,pin-gpio-doen = <OEN_HIGH>;
                        sf,pin-gpio-din =  <GPI_UART2_SIN>;
                };
 
                uart2-pins-cts {
-                       sf,pins = <PAD_GPIO43>;
-                       sf,pinmux = <PAD_GPIO43_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO29>;
+                       sf,pinmux = <PAD_GPIO29_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-doen = <OEN_HIGH>;
                        sf,pin-gpio-din =  <GPI_UART2_CTS_N>;
                };
 
                uart2-pins-rts {
-                       sf,pins = <PAD_GPIO40>;
-                       sf,pinmux = <PAD_GPIO40_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO27>;
+                       sf,pinmux = <PAD_GPIO27_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_UART2_RTS_N>;
                        sf,pin-gpio-doen = <OEN_LOW>;
@@ -114,7 +114,7 @@
                uart3-pins-tx {
                        sf,pins = <PAD_GPIO30>;
                        sf,pinmux = <PAD_GPIO30_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|GPIO_DS(3))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | GPIO_DS(3))>;
                        sf,pin-gpio-dout = <GPO_UART3_SOUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
@@ -122,7 +122,7 @@
                uart3-pins-rx {
                        sf,pins = <PAD_GPIO31>;
                        sf,pinmux = <PAD_GPIO31_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|GPIO_PU(1))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | GPIO_PU(1))>;
                        sf,pin-gpio-doen = <OEN_HIGH>;
                        sf,pin-gpio-din =  <GPI_UART3_SIN>;
                };
@@ -130,32 +130,32 @@
 
        uart4_pins: uart4-pins {
                uart4-pins-tx {
-                       sf,pins = <PAD_GPIO41>;
-                       sf,pinmux = <PAD_GPIO41_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|GPIO_DS(3))>;
+                       sf,pins = <PAD_GPIO30>;
+                       sf,pinmux = <PAD_GPIO30_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | GPIO_DS(3))>;
                        sf,pin-gpio-dout = <GPO_UART4_SOUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
 
                uart4-pins-rx {
-                       sf,pins = <PAD_GPIO42>;
-                       sf,pinmux = <PAD_GPIO42_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|GPIO_PU(1))>;
+                       sf,pins = <PAD_GPIO31>;
+                       sf,pinmux = <PAD_GPIO31_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | GPIO_PU(1))>;
                        sf,pin-gpio-doen = <OEN_HIGH>;
                        sf,pin-gpio-din =  <GPI_UART4_SIN>;
                };
 
                uart4-pins-cts {
-                       sf,pins = <PAD_GPIO43>;
-                       sf,pinmux = <PAD_GPIO43_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO29>;
+                       sf,pinmux = <PAD_GPIO29_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-doen = <OEN_HIGH>;
                        sf,pin-gpio-din =  <GPI_UART4_CTS_N>;
                };
 
                uart4-pins-rts {
-                       sf,pins = <PAD_GPIO40>;
-                       sf,pinmux = <PAD_GPIO40_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO27>;
+                       sf,pinmux = <PAD_GPIO27_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_UART4_RTS_N>;
                        sf,pin-gpio-doen = <OEN_LOW>;
@@ -164,32 +164,32 @@
 
        uart5_pins: uart5-pins {
                uart5-pins-tx {
-                       sf,pins = <PAD_GPIO41>;
-                       sf,pinmux = <PAD_GPIO41_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|GPIO_DS(3))>;
+                       sf,pins = <PAD_GPIO30>;
+                       sf,pinmux = <PAD_GPIO30_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | GPIO_DS(3))>;
                        sf,pin-gpio-dout = <GPO_UART5_SOUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
 
                uart5-pins-rx {
-                       sf,pins = <PAD_GPIO42>;
-                       sf,pinmux = <PAD_GPIO42_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|GPIO_PU(1))>;
+                       sf,pins = <PAD_GPIO31>;
+                       sf,pinmux = <PAD_GPIO31_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | GPIO_PU(1))>;
                        sf,pin-gpio-doen = <OEN_HIGH>;
                        sf,pin-gpio-din =  <GPI_UART5_SIN>;
                };
 
                uart5-pins-cts {
-                       sf,pins = <PAD_GPIO43>;
-                       sf,pinmux = <PAD_GPIO43_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO29>;
+                       sf,pinmux = <PAD_GPIO29_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-doen = <OEN_HIGH>;
                        sf,pin-gpio-din =  <GPI_UART5_CTS_N>;
                };
 
                uart5-pins-rts {
-                       sf,pins = <PAD_GPIO40>;
-                       sf,pinmux = <PAD_GPIO40_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO27>;
+                       sf,pinmux = <PAD_GPIO27_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_UART5_RTS_N>;
                        sf,pin-gpio-doen = <OEN_LOW>;
@@ -200,38 +200,36 @@
                i2c0-pins-scl {
                        sf,pins = <PAD_GPIO57>;
                        sf,pinmux = <PAD_GPIO57_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_LOW>;
                        sf,pin-gpio-doen = <OEN_I2C0_IC_CLK_OE>;
                        sf,pin-gpio-din =  <GPI_I2C0_IC_CLK_IN_A>;
                };
 
-/*
                i2c0-pins-sda {
                        sf,pins = <PAD_GPIO58>;
                        sf,pinmux = <PAD_GPIO58_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_LOW>;
                        sf,pin-gpio-doen = <OEN_I2C0_IC_DATA_OE>;
                        sf,pin-gpio-din =  <GPI_I2C0_IC_DATA_IN_A>;
                };
-*/
        };
 
        i2c1_pins: i2c1-pins {
                i2c1-pins-scl {
-                       sf,pins = <PAD_GPIO7>;
-                       sf,pinmux = <PAD_GPIO7_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pins = <PAD_GPIO49>;
+                       sf,pinmux = <PAD_GPIO49_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_LOW>;
                        sf,pin-gpio-doen = <OEN_I2C1_IC_CLK_OE>;
                        sf,pin-gpio-din =  <GPI_I2C1_IC_CLK_IN_A>;
                };
 
                i2c1-pins-sda {
-                       sf,pins = <PAD_GPIO8>;
-                       sf,pinmux = <PAD_GPIO8_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pins = <PAD_GPIO50>;
+                       sf,pinmux = <PAD_GPIO50_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_LOW>;
                        sf,pin-gpio-doen = <OEN_I2C1_IC_DATA_OE>;
                        sf,pin-gpio-din =  <GPI_I2C1_IC_DATA_IN_A>;
@@ -242,7 +240,7 @@
                i2c2-pins-scl {
                        sf,pins = <PAD_GPIO11>;
                        sf,pinmux = <PAD_GPIO11_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_LOW>;
                        sf,pin-gpio-doen = <OEN_I2C2_IC_CLK_OE>;
                        sf,pin-gpio-din =  <GPI_I2C2_IC_CLK_IN_A>;
@@ -251,7 +249,7 @@
                i2c2-pins-sda {
                        sf,pins = <PAD_GPIO9>;
                        sf,pinmux = <PAD_GPIO9_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_LOW>;
                        sf,pin-gpio-doen = <OEN_I2C2_IC_DATA_OE>;
                        sf,pin-gpio-din =  <GPI_I2C2_IC_DATA_IN_A>;
@@ -260,18 +258,18 @@
 
        i2c3_pins: i2c3-pins {
                i2c3-pins-scl {
-                       sf,pins = <PAD_GPIO27>;
-                       sf,pinmux = <PAD_GPIO27_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pins = <PAD_GPIO51>;
+                       sf,pinmux = <PAD_GPIO51_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_LOW>;
                        sf,pin-gpio-doen = <OEN_I2C3_IC_CLK_OE>;
                        sf,pin-gpio-din =  <GPI_I2C3_IC_CLK_IN_A>;
                };
 
                i2c3-pins-sda {
-                       sf,pins = <PAD_GPIO26>;
-                       sf,pinmux = <PAD_GPIO26_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pins = <PAD_GPIO52>;
+                       sf,pinmux = <PAD_GPIO52_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_LOW>;
                        sf,pin-gpio-doen = <OEN_I2C3_IC_DATA_OE>;
                        sf,pin-gpio-din =  <GPI_I2C3_IC_DATA_IN_A>;
@@ -282,7 +280,7 @@
                i2c4-pins-scl {
                        sf,pins = <PAD_GPIO18>;
                        sf,pinmux = <PAD_GPIO18_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_LOW>;
                        sf,pin-gpio-doen = <OEN_I2C4_IC_CLK_OE>;
                        sf,pin-gpio-din =  <GPI_I2C4_IC_CLK_IN_A>;
@@ -291,7 +289,7 @@
                i2c4-pins-sda {
                        sf,pins = <PAD_GPIO12>;
                        sf,pinmux = <PAD_GPIO12_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_LOW>;
                        sf,pin-gpio-doen = <OEN_I2C4_IC_DATA_OE>;
                        sf,pin-gpio-din =  <GPI_I2C4_IC_DATA_IN_A>;
@@ -302,7 +300,7 @@
                i2c5-pins-scl {
                        sf,pins = <PAD_GPIO19>;
                        sf,pinmux = <PAD_GPIO19_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_LOW>;
                        sf,pin-gpio-doen = <OEN_I2C5_IC_CLK_OE>;
                        sf,pin-gpio-din =  <GPI_I2C5_IC_CLK_IN_A>;
@@ -311,7 +309,7 @@
                i2c5-pins-sda {
                        sf,pins = <PAD_GPIO20>;
                        sf,pinmux = <PAD_GPIO20_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_LOW>;
                        sf,pin-gpio-doen = <OEN_I2C5_IC_DATA_OE>;
                        sf,pin-gpio-din =  <GPI_I2C5_IC_DATA_IN_A>;
@@ -322,7 +320,7 @@
                i2c6-pins-scl {
                        sf,pins = <PAD_GPIO16>;
                        sf,pinmux = <PAD_GPIO16_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_LOW>;
                        sf,pin-gpio-doen = <OEN_I2C6_IC_CLK_OE>;
                        sf,pin-gpio-din =  <GPI_I2C6_IC_CLK_IN_A>;
@@ -331,7 +329,7 @@
                i2c6-pins-sda {
                        sf,pins = <PAD_GPIO17>;
                        sf,pinmux = <PAD_GPIO17_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_LOW>;
                        sf,pin-gpio-doen = <OEN_I2C6_IC_DATA_OE>;
                        sf,pin-gpio-din =  <GPI_I2C6_IC_DATA_IN_A>;
@@ -342,7 +340,7 @@
                 mmc0-pins-rest {
                        sf,pins = <PAD_GPIO22>;
                        sf,pinmux = <PAD_GPIO22_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_SDIO0_RST_N>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
@@ -352,61 +350,160 @@
                 sdcard0-pins-rest {
                        sf,pins = <PAD_GPIO24>;
                        sf,pinmux = <PAD_GPIO24_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_SDIO0_RST_N>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
        };
 
-       mmc1_pins: mmc1-pins {
-                mmc1-pins0 {
-                       sf,pins = <PAD_GPIO10>;
-                       sf,pinmux = <PAD_GPIO10_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+       emmc1_pins: emmc1-pins {
+               emmc1-pins0-rest {
+                       sf,pins = <PAD_GPIO51>;
+                       sf,pinmux = <PAD_GPIO51_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                       sf,pin-gpio-dout = <GPO_SDIO1_RST_N>;
+                       sf,pin-gpio-doen = <OEN_LOW>;
+               };
+
+               emmc1-pins1 {
+                       sf,pins = <PAD_GPIO38>;
+                       sf,pinmux = <PAD_GPIO38_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_SDIO1_CCLK_OUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
 
-               mmc1-pins1 {
-                       sf,pins = <PAD_GPIO9>;
-                       sf,pinmux = <PAD_GPIO9_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+               emmc1-pins2 {
+                       sf,pins = <PAD_GPIO36>;
+                       sf,pinmux = <PAD_GPIO36_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_SDIO1_CCMD_OUT>;
                        sf,pin-gpio-doen = <OEN_SDIO1_CCMD_OUT_EN>;
                        sf,pin-gpio-din =  <GPI_SDIO1_CCMD_IN>;
                };
 
-               mmc1-pins2 {
-                       sf,pins = <PAD_GPIO11>;
-                       sf,pinmux = <PAD_GPIO11_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+               emmc1-pins3 {
+                       sf,pins = <PAD_GPIO43>;
+                       sf,pinmux = <PAD_GPIO43_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_0>;
                        sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_0>;
                        sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_0>;
                };
 
-               mmc1-pins3 {
-                       sf,pins = <PAD_GPIO12>;
-                       sf,pinmux = <PAD_GPIO12_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+               emmc1-pins4 {
+                       sf,pins = <PAD_GPIO48>;
+                       sf,pinmux = <PAD_GPIO48_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_1>;
                        sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_1>;
                        sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_1>;
                };
 
-               mmc1-pins4 {
-                       sf,pins = <PAD_GPIO7>;
-                       sf,pinmux = <PAD_GPIO7_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+               emmc1-pins5 {
+                       sf,pins = <PAD_GPIO53>;
+                       sf,pinmux = <PAD_GPIO53_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_2>;
                        sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_2>;
                        sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_2>;
                };
 
-               mmc1-pins5 {
-                       sf,pins = <PAD_GPIO8>;
-                       sf,pinmux = <PAD_GPIO8_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+               emmc1-pins6 {
+                       sf,pins = <PAD_GPIO63>;
+                       sf,pinmux = <PAD_GPIO63_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                       sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_3>;
+                       sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_3>;
+                       sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_3>;
+               };
+
+               emmc1-pins7 {
+                       sf,pins = <PAD_GPIO52>;
+                       sf,pinmux = <PAD_GPIO52_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                       sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_4>;
+                       sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_4>;
+                       sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_4>;
+               };
+
+               emmc1-pins8 {
+                       sf,pins = <PAD_GPIO39>;
+                       sf,pinmux = <PAD_GPIO39_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                       sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_5>;
+                       sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_5>;
+                       sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_5>;
+               };
+
+               emmc1-pins9 {
+                       sf,pins = <PAD_GPIO46>;
+                       sf,pinmux = <PAD_GPIO46_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                       sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_6>;
+                       sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_6>;
+                       sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_6>;
+               };
+
+               emmc1-pins10 {
+                       sf,pins = <PAD_GPIO47>;
+                       sf,pinmux = <PAD_GPIO47_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                       sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_7>;
+                       sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_7>;
+                       sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_7>;
+               };
+       };
+
+       sdcard1_pins: sdcard1-pins {
+               sdcard1-pins0 {
+                       sf,pins = <PAD_GPIO56>;
+                       sf,pinmux = <PAD_GPIO56_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                       sf,pin-gpio-dout = <GPO_SDIO1_CCLK_OUT>;
+                       sf,pin-gpio-doen = <OEN_LOW>;
+               };
+
+               sdcard1-pins1 {
+                       sf,pins = <PAD_GPIO50>;
+                       sf,pinmux = <PAD_GPIO50_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                       sf,pin-gpio-dout = <GPO_SDIO1_CCMD_OUT>;
+                       sf,pin-gpio-doen = <OEN_SDIO1_CCMD_OUT_EN>;
+                       sf,pin-gpio-din =  <GPI_SDIO1_CCMD_IN>;
+               };
+
+               sdcard1-pins2 {
+                       sf,pins = <PAD_GPIO49>;
+                       sf,pinmux = <PAD_GPIO49_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                       sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_0>;
+                       sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_0>;
+                       sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_0>;
+               };
+
+               sdcard1-pins3 {
+                       sf,pins = <PAD_GPIO45>;
+                       sf,pinmux = <PAD_GPIO45_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                       sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_1>;
+                       sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_1>;
+                       sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_1>;
+               };
+
+               sdcard1-pins4 {
+                       sf,pins = <PAD_GPIO62>;
+                       sf,pinmux = <PAD_GPIO62_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
+                       sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_2>;
+                       sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_2>;
+                       sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_2>;
+               };
+
+               sdcard1-pins5 {
+                       sf,pins = <PAD_GPIO40>;
+                       sf,pinmux = <PAD_GPIO40_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_SDIO1_CDATA_OUT_3>;
                        sf,pin-gpio-doen = <OEN_SDIO1_CDATA_OUT_EN_3>;
                        sf,pin-gpio-din =  <GPI_SDIO1_CDATA_IN_3>;
@@ -414,20 +511,18 @@
        };
 
        pwmdac0_pins: pwmdac0-pins {
-/*
                pwmdac0-pins-left {
                        sf,pins = <PAD_GPIO57>;
                        sf,pinmux = <PAD_GPIO57_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_PWMDAC0_LEFT_OUTPUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
-*/
 
                pwmdac0-pins-right {
                        sf,pins = <PAD_GPIO42>;
                        sf,pinmux = <PAD_GPIO42_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_PWMDAC0_RIGHT_OUTPUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
@@ -486,22 +581,21 @@
        };
 
        i2s_clk_pins: i2s-clk0 {
-                i2s-clk0_bclk {
-                       sf,pins = <PAD_GPIO38>;
-                       sf,pinmux = <PAD_GPIO38_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
-                       sf,pin-gpio-din = <GPI_I2STX0_BCLK_SLV GPI_I2SRX0_BCLK_SLV>;
-                       sf,pin-gpio-doen = <OEN_HIGH>;
-                };
-
-                i2s-clk0_lrclk {
-                       sf,pins = <PAD_GPIO63>;
-                       sf,pinmux = <PAD_GPIO63_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
-                       sf,pin-gpio-din = <GPI_I2STX0_LRCK_SLV GPI_I2SRX0_LRCK_SLV>;
-                       sf,pin-gpio-doen = <OEN_HIGH>;
-                };
+               i2s-clk0_bclk {
+                       sf,pins = <PAD_GPIO38>;
+                       sf,pinmux = <PAD_GPIO38_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                       sf,pin-gpio-din = <GPI_I2STX0_BCLK_SLV GPI_I2SRX0_BCLK_SLV>;
+                       sf,pin-gpio-doen = <OEN_HIGH>;
+               };
 
+               i2s-clk0_lrclk {
+                       sf,pins = <PAD_GPIO63>;
+                       sf,pinmux = <PAD_GPIO63_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                       sf,pin-gpio-din = <GPI_I2STX0_LRCK_SLV GPI_I2SRX0_LRCK_SLV>;
+                       sf,pin-gpio-doen = <OEN_HIGH>;
+               };
        };
 
        i2stx_pins: i2stx-pins {
@@ -562,8 +656,8 @@
 
        can1_pins: can1-pins {
                can1-pins0 {
-                       sf,pins = <PAD_GPIO28>;
-                       sf,pinmux = <PAD_GPIO28_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO29>;
+                       sf,pinmux = <PAD_GPIO29_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_CAN1_CTRL_TXD>;
                        sf,pin-gpio-doen = <OEN_LOW>;
@@ -586,44 +680,68 @@
                };
        };
 
-       pwm_ch0_pins: pwm_ch0-pins {
-               pwm_ch0-pins0 {
-                       sf,pins = <PAD_GPIO51>;
-                       sf,pinmux = <PAD_GPIO51_FUNC_SEL 0>;
+       pwm_ch0to3_pins: pwm-ch0to3-pins {
+               pwm_ch0-pins {
+                       sf,pins = <PAD_GPIO45>;
+                       sf,pinmux = <PAD_GPIO45_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_PTC0_PWM_0>;
                        sf,pin-gpio-doen = <OEN_PTC0_PWM_0_OE_N>;
                };
+
+               pwm_ch1-pins {
+                       sf,pins = <PAD_GPIO46>;
+                       sf,pinmux = <PAD_GPIO46_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                       sf,pin-gpio-dout = <GPO_PTC0_PWM_1>;
+                       sf,pin-gpio-doen = <OEN_PTC0_PWM_1_OE_N>;
+               };
+
+               pwm_ch2-pins {
+                       sf,pins = <PAD_GPIO47>;
+                       sf,pinmux = <PAD_GPIO47_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                       sf,pin-gpio-dout = <GPO_PTC0_PWM_2>;
+                       sf,pin-gpio-doen = <OEN_PTC0_PWM_2_OE_N>;
+               };
+
+               pwm_ch3-pins {
+                       sf,pins = <PAD_GPIO48>;
+                       sf,pinmux = <PAD_GPIO48_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                       sf,pin-gpio-dout = <GPO_PTC0_PWM_3>;
+                       sf,pin-gpio-doen = <OEN_PTC0_PWM_3_OE_N>;
+               };
        };
 
        ssp0_pins: ssp0-pins {
                ssp0-pins_tx {
-                       sf,pins = <PAD_GPIO52>;
-                       sf,pinmux = <PAD_GPIO52_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO38>;
+                       sf,pinmux = <PAD_GPIO38_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI0_SSPTXD>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
 
                ssp0-pins_rx {
-                       sf,pins = <PAD_GPIO53>;
-                       sf,pinmux = <PAD_GPIO53_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO39>;
+                       sf,pinmux = <PAD_GPIO39_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-doen = <OEN_HIGH>;
                        sf,pin-gpio-din =  <GPI_SPI0_SSPRXD>;
                };
 
                ssp0-pins_clk {
-                       sf,pins = <PAD_GPIO48>;
-                       sf,pinmux = <PAD_GPIO48_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO36>;
+                       sf,pinmux = <PAD_GPIO36_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI0_SSPCLKOUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
 
                ssp0-pins_cs {
-                       sf,pins = <PAD_GPIO49>;
-                       sf,pinmux = <PAD_GPIO49_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO37>;
+                       sf,pinmux = <PAD_GPIO37_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI0_SSPFSSOUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
@@ -632,32 +750,32 @@
 
        ssp1_pins: ssp1-pins {
                ssp1-pins_tx {
-                       sf,pins = <PAD_GPIO52>;
-                       sf,pinmux = <PAD_GPIO52_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO42>;
+                       sf,pinmux = <PAD_GPIO42_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI1_SSPTXD>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
 
                ssp1-pins_rx {
-                       sf,pins = <PAD_GPIO53>;
-                       sf,pinmux = <PAD_GPIO53_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO43>;
+                       sf,pinmux = <PAD_GPIO43_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-doen = <OEN_HIGH>;
                        sf,pin-gpio-din =  <GPI_SPI1_SSPRXD>;
                };
 
                ssp1-pins_clk {
-                       sf,pins = <PAD_GPIO48>;
-                       sf,pinmux = <PAD_GPIO48_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO40>;
+                       sf,pinmux = <PAD_GPIO40_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI1_SSPCLKOUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
 
                ssp1-pins_cs {
-                       sf,pins = <PAD_GPIO49>;
-                       sf,pinmux = <PAD_GPIO49_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO41>;
+                       sf,pinmux = <PAD_GPIO41_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI1_SSPFSSOUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
@@ -666,32 +784,32 @@
 
        ssp2_pins: ssp2-pins {
                ssp2-pins_tx {
-                       sf,pins = <PAD_GPIO52>;
-                       sf,pinmux = <PAD_GPIO52_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO46>;
+                       sf,pinmux = <PAD_GPIO46_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI2_SSPTXD>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
 
                ssp2-pins_rx {
-                       sf,pins = <PAD_GPIO53>;
-                       sf,pinmux = <PAD_GPIO53_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO47>;
+                       sf,pinmux = <PAD_GPIO47_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-doen = <OEN_HIGH>;
                        sf,pin-gpio-din =  <GPI_SPI2_SSPRXD>;
                };
 
                ssp2-pins_clk {
-                       sf,pins = <PAD_GPIO48>;
-                       sf,pinmux = <PAD_GPIO48_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO44>;
+                       sf,pinmux = <PAD_GPIO44_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI2_SSPCLKOUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
 
                ssp2-pins_cs {
-                       sf,pins = <PAD_GPIO49>;
-                       sf,pinmux = <PAD_GPIO49_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO45>;
+                       sf,pinmux = <PAD_GPIO45_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI2_SSPFSSOUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
@@ -700,16 +818,16 @@
 
        ssp3_pins: ssp3-pins {
                ssp3-pins_tx {
-                       sf,pins = <PAD_GPIO52>;
-                       sf,pinmux = <PAD_GPIO52_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO50>;
+                       sf,pinmux = <PAD_GPIO50_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI3_SSPTXD>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
 
                ssp3-pins_rx {
-                       sf,pins = <PAD_GPIO53>;
-                       sf,pinmux = <PAD_GPIO53_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO51>;
+                       sf,pinmux = <PAD_GPIO51_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-doen = <OEN_HIGH>;
                        sf,pin-gpio-din =  <GPI_SPI3_SSPRXD>;
@@ -734,32 +852,32 @@
 
        ssp4_pins: ssp4-pins {
                ssp4-pins_tx {
-                       sf,pins = <PAD_GPIO52>;
-                       sf,pinmux = <PAD_GPIO52_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO54>;
+                       sf,pinmux = <PAD_GPIO54_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI4_SSPTXD>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
 
                ssp4-pins_rx {
-                       sf,pins = <PAD_GPIO53>;
-                       sf,pinmux = <PAD_GPIO53_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO55>;
+                       sf,pinmux = <PAD_GPIO55_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-doen = <OEN_HIGH>;
                        sf,pin-gpio-din =  <GPI_SPI4_SSPRXD>;
                };
 
                ssp4-pins_clk {
-                       sf,pins = <PAD_GPIO48>;
-                       sf,pinmux = <PAD_GPIO48_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO52>;
+                       sf,pinmux = <PAD_GPIO52_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI4_SSPCLKOUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
 
                ssp4-pins_cs {
-                       sf,pins = <PAD_GPIO49>;
-                       sf,pinmux = <PAD_GPIO49_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO53>;
+                       sf,pinmux = <PAD_GPIO53_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI4_SSPFSSOUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
@@ -768,32 +886,32 @@
 
        ssp5_pins: ssp5-pins {
                ssp5-pins_tx {
-                       sf,pins = <PAD_GPIO52>;
-                       sf,pinmux = <PAD_GPIO52_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO58>;
+                       sf,pinmux = <PAD_GPIO58_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI5_SSPTXD>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
 
                ssp5-pins_rx {
-                       sf,pins = <PAD_GPIO53>;
-                       sf,pinmux = <PAD_GPIO53_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO59>;
+                       sf,pinmux = <PAD_GPIO59_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-doen = <OEN_HIGH>;
                        sf,pin-gpio-din =  <GPI_SPI5_SSPRXD>;
                };
 
                ssp5-pins_clk {
-                       sf,pins = <PAD_GPIO48>;
-                       sf,pinmux = <PAD_GPIO48_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO56>;
+                       sf,pinmux = <PAD_GPIO56_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI5_SSPCLKOUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
 
                ssp5-pins_cs {
-                       sf,pins = <PAD_GPIO49>;
-                       sf,pinmux = <PAD_GPIO49_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO57>;
+                       sf,pinmux = <PAD_GPIO57_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI5_SSPFSSOUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
@@ -802,32 +920,32 @@
 
        ssp6_pins: ssp6-pins {
                ssp6-pins_tx {
-                       sf,pins = <PAD_GPIO52>;
-                       sf,pinmux = <PAD_GPIO52_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO62>;
+                       sf,pinmux = <PAD_GPIO62_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI6_SSPTXD>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
 
                ssp6-pins_rx {
-                       sf,pins = <PAD_GPIO53>;
-                       sf,pinmux = <PAD_GPIO53_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO63>;
+                       sf,pinmux = <PAD_GPIO63_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-doen = <OEN_HIGH>;
                        sf,pin-gpio-din =  <GPI_SPI6_SSPRXD>;
                };
 
                ssp6-pins_clk {
-                       sf,pins = <PAD_GPIO48>;
-                       sf,pinmux = <PAD_GPIO48_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO60>;
+                       sf,pinmux = <PAD_GPIO60_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI6_SSPCLKOUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
 
                ssp6-pins_cs {
-                       sf,pins = <PAD_GPIO49>;
-                       sf,pinmux = <PAD_GPIO49_FUNC_SEL 0>;
+                       sf,pins = <PAD_GPIO61>;
+                       sf,pinmux = <PAD_GPIO61_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_SPI6_SSPFSSOUT>;
                        sf,pin-gpio-doen = <OEN_LOW>;
@@ -952,13 +1070,13 @@
                        sf,pinmux = <PAD_GPIO37_FUNC_SEL 1>;
                        sf,pin-ioconfig = <IO(GPIO_IE(0))>;
                };
-/*
+
                rgb-2-pins {
                        sf,pins = <PAD_GPIO38>;
                        sf,pinmux = <PAD_GPIO38_FUNC_SEL 1>;
                        sf,pin-ioconfig = <IO(GPIO_IE(0))>;
                };
-*/
+
                rgb-3-pins {
                        sf,pins = <PAD_GPIO39>;
                        sf,pinmux = <PAD_GPIO39_FUNC_SEL 1>;
@@ -984,13 +1102,13 @@
                        sf,pinmux = <PAD_GPIO43_FUNC_SEL 1>;
                        sf,pin-ioconfig = <IO(GPIO_IE(0))>;
                };
-/*
+
                rgb-8-pins {
                        sf,pins = <PAD_GPIO44>;
                        sf,pinmux = <PAD_GPIO44_FUNC_SEL 1>;
                        sf,pin-ioconfig = <IO(GPIO_IE(0))>;
                };
-*/
+
                rgb-9-pins {
                        sf,pins = <PAD_GPIO45>;
                        sf,pinmux = <PAD_GPIO45_FUNC_SEL 1>;
@@ -1051,7 +1169,7 @@
                        sf,pinmux = <PAD_GPIO56_FUNC_SEL 1>;
                        sf,pin-ioconfig = <IO(GPIO_IE(0))>;
                };
-/*
+
                rgb-21-pins {
                        sf,pins = <PAD_GPIO57>;
                        sf,pinmux = <PAD_GPIO57_FUNC_SEL 1>;
@@ -1062,7 +1180,7 @@
                        sf,pinmux = <PAD_GPIO58_FUNC_SEL 1>;
                        sf,pin-ioconfig = <IO(GPIO_IE(0))>;
                };
-*/
+
                rgb-23-pins {
                        sf,pins = <PAD_GPIO59>;
                        sf,pinmux = <PAD_GPIO59_FUNC_SEL 1>;
@@ -1083,19 +1201,20 @@
                        sf,pinmux = <PAD_GPIO62_FUNC_SEL 1>;
                        sf,pin-ioconfig = <IO(GPIO_IE(0))>;
                };
-/*
+
                rgb-27-pins {
                        sf,pins = <PAD_GPIO63>;
                        sf,pinmux = <PAD_GPIO63_FUNC_SEL 1>;
                        sf,pin-ioconfig = <IO(GPIO_IE(0))>;
                };
-*/
+
        };
+
        inno_hdmi_pins: inno_hdmi-pins {
                inno_hdmi-scl {
                        sf,pins = <PAD_GPIO7>;
                        //sf,pinmux = <PAD_GPIO7_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_HDMI0_DDC_SCL_OUT>;
                        sf,pin-gpio-doen = <OEN_HDMI0_DDC_SCL_OEN>;
                        sf,pin-gpio-din =  <GPI_HDMI0_DDC_SCL_IN>;
@@ -1104,7 +1223,7 @@
                inno_hdmi-sda {
                        sf,pins = <PAD_GPIO8>;
                        //sf,pinmux = <PAD_GPIO8_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-dout = <GPO_HDMI0_DDC_SDA_OUT>;
                        sf,pin-gpio-doen = <OEN_HDMI0_DDC_SDA_OEN>;
                        sf,pin-gpio-din =  <GPI_HDMI0_DDC_SDA_IN>;
@@ -1112,7 +1231,7 @@
                inno_hdmi-cec-pins {
                        sf,pins = <PAD_GPIO14>;
                        //sf,pinmux = <PAD_GPIO14_FUNC_SEL 0>;
-                       sf,pin-ioconfig = <IO(GPIO_IE(1)|(GPIO_PU(1)))>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1) | (GPIO_PU(1)))>;
                        sf,pin-gpio-doen = <OEN_HDMI0_CEC_SDA_OEN>;
                        sf,pin-gpio-dout = <GPO_HDMI0_CEC_SDA_OUT>;
                        sf,pin-gpio-din =  <GPI_HDMI0_CEC_SDA_IN>;
@@ -1137,13 +1256,13 @@
                        sf,pinmux = <PAD_GPIO37_FUNC_SEL 1>;
                        sf,pin-ioconfig = <IO(GPIO_IE(0))>;
                };
-/*
+
                mipitx-3-pins {
                        sf,pins = <PAD_GPIO38>;
                        sf,pinmux = <PAD_GPIO38_FUNC_SEL 1>;
                        sf,pin-ioconfig = <IO(GPIO_IE(0))>;
                };
-*/
+
                mipitx-4-pins {
                        sf,pins = <PAD_GPIO39>;
                        sf,pinmux = <PAD_GPIO39_FUNC_SEL 1>;
@@ -1234,3 +1353,37 @@
                };
        };
 };
+
+&gpioa {
+       pwm_ch4to5_pins: pwm-ch4to5-pins {
+               pwm-ch4-pins {
+                       sf,pins = <PAD_RGPIO0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                       sf,pin-gpio-dout = <U0_PWM_8CH_PTC_PWM_4>;
+                       sf,pin-gpio-doen = <U0_PWM_8CH_PTC_OE_N_4>;
+               };
+
+               pwm-ch5-pins {
+                       sf,pins = <PAD_RGPIO1>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                       sf,pin-gpio-dout = <U0_PWM_8CH_PTC_PWM_5>;
+                       sf,pin-gpio-doen = <U0_PWM_8CH_PTC_OE_N_5>;
+               };
+       };
+
+       pwm_ch6to7_pins: pwm-ch6to7-pins {
+               pwm-ch6-pins {
+                       sf,pins = <PAD_RGPIO0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                       sf,pin-gpio-dout = <U0_PWM_8CH_PTC_PWM_6>;
+                       sf,pin-gpio-doen = <U0_PWM_8CH_PTC_OE_N_6>;
+               };
+
+               pwm-ch7-pins {
+                       sf,pins = <PAD_RGPIO1>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                       sf,pin-gpio-dout = <U0_PWM_8CH_PTC_PWM_7>;
+                       sf,pin-gpio-doen = <U0_PWM_8CH_PTC_OE_N_7>;
+               };
+       };
+};
\ No newline at end of file

diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb-spi-uart2.dts b/arch/riscv/boot/dts/starfive/jh7110-evb-spi-uart2.dts
new file mode 100644 (file)
index 0000000..e9ad788
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb-spi-uart2.dts
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2022 Hal Feng <hal.feng@starfivetech.com>
+ */
+
+/dts-v1/;
+#include "jh7110-evb.dtsi"
+
+/ {
+       model = "StarFive JH7110 EVB";
+       compatible = "starfive,jh7110-evb", "starfive,jh7110";
+};
+
+/* default sd card */
+&sdio0 {
+       clock-frequency = <102400000>;
+       max-frequency = <200000000>;
+       card-detect-delay = <300>;
+       bus-width = <4>;
+       broken-cd;
+       cap-sd-highspeed;
+       post-power-on-delay-ms = <200>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdcard0_pins>;
+       status = "okay";
+};
+
+&usbdrd30 {
+       status = "okay";
+};
+
+
+&pcie1 {
+       status = "okay";
+};
+
+&uart2 {
+       status = "okay";
+};
+
+&spi0 {
+       status = "okay";
+};
+
+&spi1 {
+       status = "okay";
+};
+
+&spi2 {
+       status = "okay";
+};
+
+&spi3 {
+       status = "okay";
+};
+
+&spi4 {
+       status = "okay";
+};
+
+&spi5 {
+       status = "okay";
+};
+
+&spi6 {
+       status = "okay";
+};
+
+

diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb-uart1-rgb2hdmi.dts b/arch/riscv/boot/dts/starfive/jh7110-evb-uart1-rgb2hdmi.dts
new file mode 100644 (file)
index 0000000..29fdb5a
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb-uart1-rgb2hdmi.dts
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2022 Hal Feng <hal.feng@starfivetech.com>
+ */
+
+/dts-v1/;
+#include "jh7110-evb.dtsi"
+
+/ {
+       model = "StarFive JH7110 EVB";
+       compatible = "starfive,jh7110-evb", "starfive,jh7110";
+};
+
+/* default sd card */
+&sdio0 {
+       clock-frequency = <102400000>;
+       max-frequency = <200000000>;
+       card-detect-delay = <300>;
+       bus-width = <4>;
+       broken-cd;
+       cap-sd-highspeed;
+       post-power-on-delay-ms = <200>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdcard0_pins>;
+       status = "okay";
+};
+
+&usbdrd30 {
+       status = "okay";
+};
+
+
+&pcie1 {
+       status = "okay";
+};
+
+&uart1 {
+       status = "okay";
+};
+
+&hdmi_output {
+       status = "okay";
+};
+
+&tda988x_pin {
+       status = "okay";
+};
+
+&encoder {
+       status = "diabled";
+};
+
+&mipi_dsi {
+       status = "diabled";
+};

diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb-uart4-emmc.dts b/arch/riscv/boot/dts/starfive/jh7110-evb-uart4-emmc.dts
new file mode 100644 (file)
index 0000000..046f485
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb-uart4-emmc.dts
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2022 Hal Feng <hal.feng@starfivetech.com>
+ */
+
+/dts-v1/;
+#include "jh7110-evb.dtsi"
+
+/ {
+       model = "StarFive JH7110 EVB";
+       compatible = "starfive,jh7110-evb", "starfive,jh7110";
+};
+
+&usbdrd30 {
+       status = "okay";
+};
+
+
+&pcie1 {
+       status = "okay";
+};
+
+&uart4 {
+       status = "okay";
+};
+
+&sdio0 {
+       clock-frequency = <102400000>;
+       max-frequency = <100000000>;
+       card-detect-delay = <300>;
+       bus-width = <8>;
+       cap-mmc-highspeed;
+       mmc-hs400-1_8v;
+       mmc-hs400-enhanced-strobe;
+       non-removable;
+       cap-mmc-hw-reset;
+       post-power-on-delay-ms = <200>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc0_pins>;
+       status = "okay";
+};
+
+&sdio1 {
+       clock-frequency = <102400000>;
+       max-frequency = <100000000>;
+       card-detect-delay = <300>;
+       bus-width = <8>;
+       cap-mmc-hw-reset;
+       non-removable;
+       cap-mmc-highspeed;
+       post-power-on-delay-ms = <200>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&emmc1_pins>;
+       status = "okay";
+};
+
+&ptc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pwm_ch6to7_pins>;
+       status = "okay";
+};

diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb-uart5-pwm-i2c-tdm.dts b/arch/riscv/boot/dts/starfive/jh7110-evb-uart5-pwm-i2c-tdm.dts
new file mode 100644 (file)
index 0000000..2da364b
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb-uart5-pwm-i2c-tdm.dts
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2022 Hal Feng <hal.feng@starfivetech.com>
+ */
+
+/dts-v1/;
+#include "jh7110-evb.dtsi"
+#include "codecs/sf_tdm.dtsi"
+
+/ {
+       model = "StarFive JH7110 EVB";
+       compatible = "starfive,jh7110-evb", "starfive,jh7110";
+};
+
+/* default sd card */
+&sdio0 {
+       clock-frequency = <102400000>;
+       max-frequency = <200000000>;
+       card-detect-delay = <300>;
+       bus-width = <4>;
+       broken-cd;
+       cap-sd-highspeed;
+       post-power-on-delay-ms = <200>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdcard0_pins>;
+       status = "okay";
+};
+
+&usbdrd30 {
+       status = "okay";
+};
+
+&pcie1 {
+       status = "okay";
+};
+
+&uart5 {
+       status = "okay";
+};
+
+&ptc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pwm_ch0to3_pins &pwm_ch4to5_pins>;
+       status = "okay";
+};
+
+&tdm {
+       status = "okay";
+};
+
+&i2c0 {
+       status = "okay";
+};
+
+&i2c1 {
+       status = "okay";
+};
+
+&i2c3 {
+       status = "okay";
+};

diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb.dts b/arch/riscv/boot/dts/starfive/jh7110-evb.dts
index 812d2c1..73cecdc 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-evb.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb.dts
@@ -5,57 +5,30 @@
  */
 
 /dts-v1/;
-#include "jh7110-common.dtsi"
-#include "codecs/sf_wm8960.dtsi"
-//#include "codecs/sf_pwmdac.dtsi"
+#include "jh7110-evb.dtsi"
 
 / {
        model = "StarFive JH7110 EVB";
        compatible = "starfive,jh7110-evb", "starfive,jh7110";
 };
 
+/* default sd card */
+&sdio0 {
+       clock-frequency = <102400000>;
+       max-frequency = <200000000>;
+       card-detect-delay = <300>;
+       bus-width = <4>;
+       broken-cd;
+       cap-sd-highspeed;
+       post-power-on-delay-ms = <200>;
+       status = "okay";
+};
+
+&usbdrd30 {
+       status = "okay";
+};
 
-&i2c5 {
-       pmic: stf7110_evb_reg@50 {
-               compatible = "stf,jh7110-evb-regulator";
-               reg = <0x50>;
 
-               regulators {
-                       hdmi_1p8: LDO_REG1 {
-                               regulator-name = "hdmi_1p8";
-                               regulator-min-microvolt = <1800000>;
-                               regulator-max-microvolt = <1800000>;
-                       };
-                       mipitx_1p8: LDO_REG2 {
-                               regulator-name = "mipitx_1p8";
-                               regulator-min-microvolt = <1800000>;
-                               regulator-max-microvolt = <1800000>;
-                       };
-                       mipirx_1p8: LDO_REG3 {
-                               regulator-name = "mipirx_1p8";
-                               regulator-min-microvolt = <1800000>;
-                               regulator-max-microvolt = <1800000>;
-                       };
-                       hdmi_0p9: LDO_REG4 {
-                               regulator-name = "hdmi_0p9";
-                               regulator-min-microvolt = <900000>;
-                               regulator-max-microvolt = <900000>;
-                       };
-                       mipitx_0p9: LDO_REG5 {
-                               regulator-name = "mipitx_0p9";
-                               regulator-min-microvolt = <900000>;
-                               regulator-max-microvolt = <900000>;
-                       };
-                       mipirx_0p9: LDO_REG6 {
-                               regulator-name = "mipirx_0p9";
-                               regulator-min-microvolt = <900000>;
-                               regulator-max-microvolt = <900000>;
-                       };
-                       sdio_vdd: LDO_REG7 {
-                               regulator-name = "sdio_vdd";
-                               regulator-min-microvolt = <1800000>;
-                               regulator-max-microvolt = <3300000>;
-                       };
-               };
-       };
+&pcie1 {
+       status = "okay";
 };

diff --git a/arch/riscv/boot/dts/starfive/jh7110-evb.dtsi b/arch/riscv/boot/dts/starfive/jh7110-evb.dtsi
new file mode 100644 (file)
index 0000000..58019b5
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/jh7110-evb.dtsi
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2022 Hal Feng <hal.feng@starfivetech.com>
+ */
+
+/dts-v1/;
+#include "jh7110-common.dtsi"
+
+&i2c5 {
+       pmic: stf7110_evb_reg@50 {
+               compatible = "stf,jh7110-evb-regulator";
+               reg = <0x50>;
+
+               regulators {
+                       hdmi_1p8: LDO_REG1 {
+                               regulator-name = "hdmi_1p8";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                       };
+                       mipitx_1p8: LDO_REG2 {
+                               regulator-name = "mipitx_1p8";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                       };
+                       mipirx_1p8: LDO_REG3 {
+                               regulator-name = "mipirx_1p8";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                       };
+                       hdmi_0p9: LDO_REG4 {
+                               regulator-name = "hdmi_0p9";
+                               regulator-min-microvolt = <900000>;
+                               regulator-max-microvolt = <900000>;
+                       };
+                       mipitx_0p9: LDO_REG5 {
+                               regulator-name = "mipitx_0p9";
+                               regulator-min-microvolt = <900000>;
+                               regulator-max-microvolt = <900000>;
+                       };
+                       mipirx_0p9: LDO_REG6 {
+                               regulator-name = "mipirx_0p9";
+                               regulator-min-microvolt = <900000>;
+                               regulator-max-microvolt = <900000>;
+                       };
+                       sdio_vdd: LDO_REG7 {
+                               regulator-name = "sdio_vdd";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+               };
+       };
+};

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index fa0388a..9d438e6 100755 (executable)
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -5,7 +5,7 @@
  */
 
 /dts-v1/;
-#include "jh7110_clk.dtsi"
+#include "jh7110-clk.dtsi"
 #include <dt-bindings/reset/starfive-jh7110.h>
 #include <dt-bindings/clock/starfive-jh7110-clkgen.h>
 #include <dt-bindings/clock/starfive-jh7110-vout.h>
@@ -1480,6 +1480,11 @@
                        reg = <0 0x295B0000 0 0x90>;
                };
 
+               tda988x_pin: tda988x_pin {
+                       compatible = "starfive,tda998x_rgb_pin";
+                       status = "disabled";
+               };
+
                hdmi_output: hdmi-output {
                        compatible = "verisilicon,hdmi-encoder";
                        verisilicon,dss-syscon = <&dssctrl>;
@@ -1593,7 +1598,7 @@
 
                        mipi_panel: panel@0 {
                                /*compatible = "";*/
-                               status = "disabled";
+                               status = "okay";
                        };
                };
 
@@ -1621,39 +1626,6 @@
                        simple-audio-card,name = "Starfive-Multi-Sound-Card";
                        #address-cells = <1>;
                        #size-cells = <0>;
-
-                       simple-audio-card,dai-link@0 {
-                               reg = <0>;
-                               status = "okay";
-                               format = "dsp_a";
-                               bitclock-master = <&dailink_master>;
-                               frame-master = <&dailink_master>;
-               
-                               widgets =
-                                               "Microphone", "Mic Jack",
-                                               "Line", "Line In",
-                                               "Line", "Line Out",
-                                               "Speaker", "Speaker",
-                                               "Headphone", "Headphone Jack";
-                               routing =
-                                               "Headphone Jack", "HP_L",
-                                               "Headphone Jack", "HP_R",
-                                               "Speaker", "SPK_LP",
-                                               "Speaker", "SPK_LN",
-                                               "LINPUT1", "Mic Jack",
-                                               "LINPUT3", "Mic Jack",
-                                               "RINPUT1", "Mic Jack",
-                                               "RINPUT2", "Mic Jack";
-                               cpu {
-                                       sound-dai = <&tdm>;
-                               };
-               
-                               dailink_master:codec {
-                                       sound-dai = <&wm8960>;
-                                       clocks = <&wm8960_mclk>;
-                                       clock-names = "mclk";
-                               };
-                       };
                };
 
                co_process: e24@0 {

diff --git a/drivers/gpu/drm/i2c/Makefile b/drivers/gpu/drm/i2c/Makefile
index a962f6f..07e5f36 100644 (file)
--- a/drivers/gpu/drm/i2c/Makefile
+++ b/drivers/gpu/drm/i2c/Makefile
@@ -6,5 +6,5 @@ sil164-y := sil164_drv.o
 obj-$(CONFIG_DRM_I2C_SIL164) += sil164.o
 
 tda998x-y := tda998x_drv.o
-obj-$(CONFIG_DRM_I2C_NXP_TDA998X) += tda998x.o
+obj-$(CONFIG_DRM_I2C_NXP_TDA998X) += tda998x.o tda998x_pin.o
 obj-$(CONFIG_DRM_I2C_NXP_TDA9950) += tda9950.o

diff --git a/drivers/gpu/drm/i2c/tda998x_pin.c b/drivers/gpu/drm/i2c/tda998x_pin.c
new file mode 100644 (file)
index 0000000..995efc8
--- /dev/null
+++ b/drivers/gpu/drm/i2c/tda998x_pin.c
@@ -0,0 +1,47 @@
+#include <linux/module.h>\r
+#include <linux/of_platform.h>\r
+#include <linux/iommu.h>\r
+#include <drm/drm_drv.h>\r
+#include <drm/drm_of.h>\r
+\r
+#define DRIVER_NAME    "starfive"\r
+#define DRIVER_DESC    "StarFive Soc DRM"\r
+#define DRIVER_DATE    "20220624"\r
+#define DRIVER_MAJOR   1\r
+#define DRIVER_MINOR   0\r
+#define DRIVER_VERSION "v1.0.0"\r
+\r
+static struct drm_driver starfive_drm_driver = {\r
+       .name   = DRIVER_NAME,\r
+       .desc   = DRIVER_DESC,\r
+       .date   = DRIVER_DATE,\r
+       .major  = DRIVER_MAJOR,\r
+       .minor  = DRIVER_MINOR,\r
+};\r
+\r
+static int starfive_drm_platform_probe(struct platform_device *pdev)\r
+{\r
+       dev_info(&pdev->dev, "%s, ok\n", __func__);\r
+\r
+       return 0;\r
+}\r
+\r
+static const struct of_device_id tda998x_rgb_dt_ids[] = {\r
+       { .compatible = "starfive,tda998x_rgb_pin", },\r
+       { /* sentinel */ },\r
+};\r
+MODULE_DEVICE_TABLE(of, starfive_drm_dt_ids);\r
+\r
+static struct platform_driver starfive_drm_platform_driver = {\r
+       .probe = starfive_drm_platform_probe,\r
+       .driver = {\r
+               .name = "tda998x_rgb_dt_ids",\r
+               .of_match_table = tda998x_rgb_dt_ids,\r
+       },\r
+};\r
+\r
+module_platform_driver(starfive_drm_platform_driver);\r
+\r
+MODULE_AUTHOR("David Li <david.li@starfivetech.com>");\r
+MODULE_DESCRIPTION("starfive DRM Driver");\r
+MODULE_LICENSE("GPL v2");\r