imx6ull: synchronise device tree with linux
authorMarcel Ziswiler <marcel.ziswiler@toradex.com>
Sat, 22 Oct 2022 21:59:33 +0000 (23:59 +0200)
committerStefano Babic <sbabic@denx.de>
Mon, 24 Oct 2022 11:43:21 +0000 (13:43 +0200)
Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
arch/arm/dts/imx6ull-colibri.dtsi
arch/arm/dts/imx6ull.dtsi

index 15621e0..577a424 100644 (file)
@@ -94,7 +94,6 @@
 };
 
 &adc1 {
-       num-channels = <10>;
        vref-supply = <&reg_module_3v3_avdd>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_adc1>;
        atmel_mxt_ts: touchscreen@4a {
                compatible = "atmel,maxtouch";
                pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_atmel_conn>;
+               pinctrl-0 = <&pinctrl_atmel_conn &pinctrl_atmel_snvs_conn>;
                reg = <0x4a>;
                interrupt-parent = <&gpio5>;
                interrupts = <4 IRQ_TYPE_EDGE_FALLING>;       /* SODIMM 107 / INT */
        pinctrl_atmel_conn: atmelconngrp {
                fsl,pins = <
                        MX6UL_PAD_JTAG_MOD__GPIO1_IO10          0xb0a0  /* SODIMM 106 */
-                       MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04     0xb0a0  /* SODIMM 107 */
                >;
        };
 
 };
 
 &iomuxc_snvs {
+       pinctrl_atmel_snvs_conn: atmelsnvsconngrp {
+               fsl,pins = <
+                       MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04     0xb0a0  /* SODIMM 107 */
+               >;
+       };
+
        pinctrl_snvs_gpio1: snvsgpio1grp {
                fsl,pins = <
                        MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06     0x110a0 /* SODIMM 93 */
index 9bf6749..2bccd45 100644 (file)
@@ -50,7 +50,7 @@
 };
 
 / {
-       soc {
+       soc: soc {
                aips3: bus@2200000 {
                        compatible = "fsl,aips-bus", "simple-bus";
                        #address-cells = <1>;