APICState *s = opaque;
int bsp;
+ cpu_synchronize_state(s->cpu_env);
+
bsp = cpu_is_bsp(s->cpu_env);
s->apicbase = 0xfee00000 |
(bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE;
while (!qemu_system_ready)
qemu_cond_timedwait(&qemu_system_cond, &qemu_global_mutex, 100);
- cpu_synchronize_state(env);
-
while (1) {
- qemu_wait_io_event(env);
if (cpu_can_run(env))
qemu_cpu_exec(env);
+ qemu_wait_io_event(env);
}
return NULL;
while (!qemu_system_ready)
qemu_cond_timedwait(&qemu_system_cond, &qemu_global_mutex, 100);
- for (env = first_cpu; env != NULL; env = env->next_cpu) {
- cpu_synchronize_state(env);
- }
while (1) {
tcg_cpu_exec();
qemu_wait_io_event(cur_cpu);