PCI: tegra194: Fix runtime PM imbalance on error
authorDinghao Liu <dinghao.liu@zju.edu.cn>
Thu, 21 May 2020 03:13:49 +0000 (11:13 +0800)
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Fri, 29 May 2020 10:24:31 +0000 (11:24 +0100)
pm_runtime_get_sync() increments the runtime PM usage counter even
when it returns an error code. Thus a pairing decrement is needed on
the error handling path to keep the counter balanced.

Link: https://lore.kernel.org/r/20200521031355.7022-1-dinghao.liu@zju.edu.cn
Signed-off-by: Dinghao Liu <dinghao.liu@zju.edu.cn>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Vidya Sagar <vidyas@nvidia.com>
drivers/pci/controller/dwc/pcie-tegra194.c

index ae30a2f..2c0d2ce 100644 (file)
@@ -1623,7 +1623,7 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie)
        ret = pinctrl_pm_select_default_state(dev);
        if (ret < 0) {
                dev_err(dev, "Failed to configure sideband pins: %d\n", ret);
-               goto fail_pinctrl;
+               goto fail_pm_get_sync;
        }
 
        tegra_pcie_init_controller(pcie);
@@ -1650,9 +1650,8 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie)
 
 fail_host_init:
        tegra_pcie_deinit_controller(pcie);
-fail_pinctrl:
-       pm_runtime_put_sync(dev);
 fail_pm_get_sync:
+       pm_runtime_put_sync(dev);
        pm_runtime_disable(dev);
        return ret;
 }