dt-bindings: ARM: Mediatek: Remove msdc binding of MT8192 clock
authorMatthias Brugger <matthias.bgg@gmail.com>
Mon, 23 May 2022 10:23:38 +0000 (12:23 +0200)
committerStephen Boyd <sboyd@kernel.org>
Thu, 9 Jun 2022 22:45:22 +0000 (15:45 -0700)
The code controlling msdc clock gate was moved inthe the consumer, the MMC
driver. This node did never represent a working implementation of any
peripheral. It was just a lonely clock gate that wasn't used. Delete the
binding description of this node.

Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220523102339.21927-2-matthias.bgg@kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml

index c8c67c0..b57cc2e 100644 (file)
@@ -24,7 +24,6 @@ properties:
           - mediatek,mt8192-imp_iic_wrap_w
           - mediatek,mt8192-imp_iic_wrap_n
           - mediatek,mt8192-msdc_top
-          - mediatek,mt8192-msdc
           - mediatek,mt8192-mfgcfg
           - mediatek,mt8192-imgsys
           - mediatek,mt8192-imgsys2
@@ -108,13 +107,6 @@ examples:
     };
 
   - |
-    msdc: clock-controller@11f60000 {
-        compatible = "mediatek,mt8192-msdc";
-        reg = <0x11f60000 0x1000>;
-        #clock-cells = <1>;
-    };
-
-  - |
     mfgcfg: clock-controller@13fbf000 {
         compatible = "mediatek,mt8192-mfgcfg";
         reg = <0x13fbf000 0x1000>;