Just use the default WriteCvtSS2I/WriteCvtSD2I folded variants (already used by the VCVTSS2SI/VCVTSD2SI AVX variants).
Confirmed with agner and uops.info - there should be no difference between the SSE/AVX1 variants in folded load latency
}
def: InstRW<[SBWriteResGroup87], (instrs FARCALL64m)>;
-def SBWriteResGroup93 : SchedWriteRes<[SBPort0,SBPort1,SBPort23]> {
- let Latency = 9;
- let NumMicroOps = 3;
- let ResourceCycles = [1,1,1];
-}
-def: InstRW<[SBWriteResGroup93], (instregex "CVT(T?)(SD|SS)2SI(64)?rm")>;
-
def SBWriteResGroup95 : SchedWriteRes<[SBPort5,SBPort01,SBPort23]> {
let Latency = 9;
let NumMicroOps = 3;
# CHECK-NEXT: 3 10 1.00 * cvtsi2ssq (%rax), %xmm2
# CHECK-NEXT: 2 5 1.00 cvtss2si %xmm0, %ecx
# CHECK-NEXT: 2 5 1.00 cvtss2si %xmm0, %rcx
-# CHECK-NEXT: 3 9 1.00 * cvtss2si (%rax), %ecx
-# CHECK-NEXT: 3 9 1.00 * cvtss2si (%rax), %rcx
+# CHECK-NEXT: 3 10 1.00 * cvtss2si (%rax), %ecx
+# CHECK-NEXT: 3 10 1.00 * cvtss2si (%rax), %rcx
# CHECK-NEXT: 1 3 1.00 cvttps2pi %xmm0, %mm2
# CHECK-NEXT: 2 9 1.00 * cvttps2pi (%rax), %mm2
# CHECK-NEXT: 2 5 1.00 cvttss2si %xmm0, %ecx
# CHECK-NEXT: 2 5 1.00 cvttss2si %xmm0, %rcx
-# CHECK-NEXT: 3 9 1.00 * cvttss2si (%rax), %ecx
-# CHECK-NEXT: 3 9 1.00 * cvttss2si (%rax), %rcx
+# CHECK-NEXT: 3 10 1.00 * cvttss2si (%rax), %ecx
+# CHECK-NEXT: 3 10 1.00 * cvttss2si (%rax), %rcx
# CHECK-NEXT: 1 14 14.00 divps %xmm0, %xmm2
# CHECK-NEXT: 2 20 14.00 * divps (%rax), %xmm2
# CHECK-NEXT: 1 14 14.00 divss %xmm0, %xmm2
# CHECK-NEXT: 2 7 1.00 * cvtps2pd (%rax), %xmm2
# CHECK-NEXT: 2 5 1.00 cvtsd2si %xmm0, %ecx
# CHECK-NEXT: 2 5 1.00 cvtsd2si %xmm0, %rcx
-# CHECK-NEXT: 3 9 1.00 * cvtsd2si (%rax), %ecx
-# CHECK-NEXT: 3 9 1.00 * cvtsd2si (%rax), %rcx
+# CHECK-NEXT: 3 10 1.00 * cvtsd2si (%rax), %ecx
+# CHECK-NEXT: 3 10 1.00 * cvtsd2si (%rax), %rcx
# CHECK-NEXT: 2 4 1.00 cvtsd2ss %xmm0, %xmm2
# CHECK-NEXT: 3 10 1.00 * cvtsd2ss (%rax), %xmm2
# CHECK-NEXT: 2 4 1.00 cvtsi2sd %ecx, %xmm2
# CHECK-NEXT: 2 9 1.00 * cvttps2dq (%rax), %xmm2
# CHECK-NEXT: 2 5 1.00 cvttsd2si %xmm0, %ecx
# CHECK-NEXT: 2 5 1.00 cvttsd2si %xmm0, %rcx
-# CHECK-NEXT: 3 9 1.00 * cvttsd2si (%rax), %ecx
-# CHECK-NEXT: 3 9 1.00 * cvttsd2si (%rax), %rcx
+# CHECK-NEXT: 3 10 1.00 * cvttsd2si (%rax), %ecx
+# CHECK-NEXT: 3 10 1.00 * cvttsd2si (%rax), %rcx
# CHECK-NEXT: 1 22 22.00 divpd %xmm0, %xmm2
# CHECK-NEXT: 2 28 22.00 * divpd (%rax), %xmm2
# CHECK-NEXT: 1 22 22.00 divsd %xmm0, %xmm2
# CHECK-NEXT: 3 10 1.00 * cvtsi2ssq (%rax), %xmm2
# CHECK-NEXT: 2 5 1.00 cvtss2si %xmm0, %ecx
# CHECK-NEXT: 2 5 1.00 cvtss2si %xmm0, %rcx
-# CHECK-NEXT: 3 9 1.00 * cvtss2si (%rax), %ecx
-# CHECK-NEXT: 3 9 1.00 * cvtss2si (%rax), %rcx
+# CHECK-NEXT: 3 10 1.00 * cvtss2si (%rax), %ecx
+# CHECK-NEXT: 3 10 1.00 * cvtss2si (%rax), %rcx
# CHECK-NEXT: 1 3 1.00 cvttps2pi %xmm0, %mm2
# CHECK-NEXT: 2 9 1.00 * cvttps2pi (%rax), %mm2
# CHECK-NEXT: 2 5 1.00 cvttss2si %xmm0, %ecx
# CHECK-NEXT: 2 5 1.00 cvttss2si %xmm0, %rcx
-# CHECK-NEXT: 3 9 1.00 * cvttss2si (%rax), %ecx
-# CHECK-NEXT: 3 9 1.00 * cvttss2si (%rax), %rcx
+# CHECK-NEXT: 3 10 1.00 * cvttss2si (%rax), %ecx
+# CHECK-NEXT: 3 10 1.00 * cvttss2si (%rax), %rcx
# CHECK-NEXT: 1 14 14.00 divps %xmm0, %xmm2
# CHECK-NEXT: 2 20 14.00 * divps (%rax), %xmm2
# CHECK-NEXT: 1 14 14.00 divss %xmm0, %xmm2
# CHECK-NEXT: 2 7 1.00 * cvtps2pd (%rax), %xmm2
# CHECK-NEXT: 2 5 1.00 cvtsd2si %xmm0, %ecx
# CHECK-NEXT: 2 5 1.00 cvtsd2si %xmm0, %rcx
-# CHECK-NEXT: 3 9 1.00 * cvtsd2si (%rax), %ecx
-# CHECK-NEXT: 3 9 1.00 * cvtsd2si (%rax), %rcx
+# CHECK-NEXT: 3 10 1.00 * cvtsd2si (%rax), %ecx
+# CHECK-NEXT: 3 10 1.00 * cvtsd2si (%rax), %rcx
# CHECK-NEXT: 2 4 1.00 cvtsd2ss %xmm0, %xmm2
# CHECK-NEXT: 3 10 1.00 * cvtsd2ss (%rax), %xmm2
# CHECK-NEXT: 2 4 1.00 cvtsi2sd %ecx, %xmm2
# CHECK-NEXT: 2 9 1.00 * cvttps2dq (%rax), %xmm2
# CHECK-NEXT: 2 5 1.00 cvttsd2si %xmm0, %ecx
# CHECK-NEXT: 2 5 1.00 cvttsd2si %xmm0, %rcx
-# CHECK-NEXT: 3 9 1.00 * cvttsd2si (%rax), %ecx
-# CHECK-NEXT: 3 9 1.00 * cvttsd2si (%rax), %rcx
+# CHECK-NEXT: 3 10 1.00 * cvttsd2si (%rax), %ecx
+# CHECK-NEXT: 3 10 1.00 * cvttsd2si (%rax), %rcx
# CHECK-NEXT: 1 22 22.00 divpd %xmm0, %xmm2
# CHECK-NEXT: 2 28 22.00 * divpd (%rax), %xmm2
# CHECK-NEXT: 1 22 22.00 divsd %xmm0, %xmm2
# CHECK-NEXT: 3 10 1.00 * cvtsi2ssq (%rax), %xmm2
# CHECK-NEXT: 2 5 1.00 cvtss2si %xmm0, %ecx
# CHECK-NEXT: 2 5 1.00 cvtss2si %xmm0, %rcx
-# CHECK-NEXT: 3 9 1.00 * cvtss2si (%rax), %ecx
-# CHECK-NEXT: 3 9 1.00 * cvtss2si (%rax), %rcx
+# CHECK-NEXT: 3 10 1.00 * cvtss2si (%rax), %ecx
+# CHECK-NEXT: 3 10 1.00 * cvtss2si (%rax), %rcx
# CHECK-NEXT: 1 3 1.00 cvttps2pi %xmm0, %mm2
# CHECK-NEXT: 2 9 1.00 * cvttps2pi (%rax), %mm2
# CHECK-NEXT: 2 5 1.00 cvttss2si %xmm0, %ecx
# CHECK-NEXT: 2 5 1.00 cvttss2si %xmm0, %rcx
-# CHECK-NEXT: 3 9 1.00 * cvttss2si (%rax), %ecx
-# CHECK-NEXT: 3 9 1.00 * cvttss2si (%rax), %rcx
+# CHECK-NEXT: 3 10 1.00 * cvttss2si (%rax), %ecx
+# CHECK-NEXT: 3 10 1.00 * cvttss2si (%rax), %rcx
# CHECK-NEXT: 1 14 14.00 divps %xmm0, %xmm2
# CHECK-NEXT: 2 20 14.00 * divps (%rax), %xmm2
# CHECK-NEXT: 1 14 14.00 divss %xmm0, %xmm2
# CHECK-NEXT: 2 7 1.00 * cvtps2pd (%rax), %xmm2
# CHECK-NEXT: 2 5 1.00 cvtsd2si %xmm0, %ecx
# CHECK-NEXT: 2 5 1.00 cvtsd2si %xmm0, %rcx
-# CHECK-NEXT: 3 9 1.00 * cvtsd2si (%rax), %ecx
-# CHECK-NEXT: 3 9 1.00 * cvtsd2si (%rax), %rcx
+# CHECK-NEXT: 3 10 1.00 * cvtsd2si (%rax), %ecx
+# CHECK-NEXT: 3 10 1.00 * cvtsd2si (%rax), %rcx
# CHECK-NEXT: 2 4 1.00 cvtsd2ss %xmm0, %xmm2
# CHECK-NEXT: 3 10 1.00 * cvtsd2ss (%rax), %xmm2
# CHECK-NEXT: 2 4 1.00 cvtsi2sd %ecx, %xmm2
# CHECK-NEXT: 2 9 1.00 * cvttps2dq (%rax), %xmm2
# CHECK-NEXT: 2 5 1.00 cvttsd2si %xmm0, %ecx
# CHECK-NEXT: 2 5 1.00 cvttsd2si %xmm0, %rcx
-# CHECK-NEXT: 3 9 1.00 * cvttsd2si (%rax), %ecx
-# CHECK-NEXT: 3 9 1.00 * cvttsd2si (%rax), %rcx
+# CHECK-NEXT: 3 10 1.00 * cvttsd2si (%rax), %ecx
+# CHECK-NEXT: 3 10 1.00 * cvttsd2si (%rax), %rcx
# CHECK-NEXT: 1 22 22.00 divpd %xmm0, %xmm2
# CHECK-NEXT: 2 28 22.00 * divpd (%rax), %xmm2
# CHECK-NEXT: 1 22 22.00 divsd %xmm0, %xmm2