drm/radeon/dpm: adjust the vblank time checks for eg, ni, si

According to the internal teams, we never hit the limit for
mclk switching on these asics, so we can disable the check.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/radeon/cypress_dpm.c b/drivers/gpu/drm/radeon/cypress_dpm.c
index 7e5d0b5..95a66db 100644 (file)
--- a/drivers/gpu/drm/radeon/cypress_dpm.c
+++ b/drivers/gpu/drm/radeon/cypress_dpm.c
@@ -2166,7 +2166,8 @@ bool cypress_dpm_vblank_too_short(struct radeon_device *rdev)
 {
        struct rv7xx_power_info *pi = rv770_get_pi(rdev);
        u32 vblank_time = r600_dpm_get_vblank_time(rdev);
-       u32 switch_limit = pi->mem_gddr5 ? 450 : 300;
+       /* we never hit the non-gddr5 limit so disable it */
+       u32 switch_limit = pi->mem_gddr5 ? 450 : 0;
 
        if (vblank_time < switch_limit)
                return true;

diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c
index f0f5f74..238078c 100644 (file)
--- a/drivers/gpu/drm/radeon/ni_dpm.c
+++ b/drivers/gpu/drm/radeon/ni_dpm.c
@@ -769,7 +769,8 @@ bool ni_dpm_vblank_too_short(struct radeon_device *rdev)
 {
        struct rv7xx_power_info *pi = rv770_get_pi(rdev);
        u32 vblank_time = r600_dpm_get_vblank_time(rdev);
-       u32 switch_limit = pi->mem_gddr5 ? 450 : 300;
+       /* we never hit the non-gddr5 limit so disable it */
+       u32 switch_limit = pi->mem_gddr5 ? 450 : 0;
 
        if (vblank_time < switch_limit)
                return true;