drm/amdgpu/gfx10: enlarge CP_MEC_DOORBELL_RANGE_UPPER to cover full doorbell.
authorYifan Zhang <yifan1.zhang@amd.com>
Thu, 10 Jun 2021 02:10:07 +0000 (10:10 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Jun 2021 21:25:42 +0000 (17:25 -0400)
If GC has entered CGPG, ringing doorbell > first page doesn't wakeup GC.
Enlarge CP_MEC_DOORBELL_RANGE_UPPER to workaround this issue.

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

index 2d56b60..20e1762 100644 (file)
@@ -6970,8 +6970,12 @@ static int gfx_v10_0_kiq_init_register(struct amdgpu_ring *ring)
        if (ring->use_doorbell) {
                WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER,
                        (adev->doorbell_index.kiq * 2) << 2);
+               /* If GC has entered CGPG, ringing doorbell > first page doesn't
+                * wakeup GC. Enlarge CP_MEC_DOORBELL_RANGE_UPPER to workaround
+                * this issue.
+                */
                WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
-                       (adev->doorbell_index.userqueue_end * 2) << 2);
+                       (adev->doorbell.size - 4));
        }
 
        WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL,