[TII] remove overrides of isUnpredicatedTerminator
authorNick Desaulniers <ndesaulniers@google.com>
Tue, 28 Apr 2020 15:34:01 +0000 (08:34 -0700)
committerNick Desaulniers <ndesaulniers@google.com>
Tue, 28 Apr 2020 15:47:28 +0000 (08:47 -0700)
Summary:
They all match the base implementation in
TargetInstrInfo::isUnpredicatedTerminator.

Follow up to D62749.

Reviewers: echristo, MaskRay, hfinkel

Reviewed By: echristo

Subscribers: wuzish, nemanjai, hiraditya, kbarton, llvm-commits, srhines

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D78976

llvm/include/llvm/CodeGen/TargetInstrInfo.h
llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
llvm/lib/Target/MSP430/MSP430InstrInfo.h
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/lib/Target/PowerPC/PPCInstrInfo.h

index 7792738f4ec97660f7c87d1bfaa14cb31389790d..f36385d7df7970114c0724cdaec4e10bf698d864 100644 (file)
@@ -1316,7 +1316,7 @@ public:
 
   /// Returns true if the instruction is a
   /// terminator instruction that has not been predicated.
-  virtual bool isUnpredicatedTerminator(const MachineInstr &MI) const;
+  bool isUnpredicatedTerminator(const MachineInstr &MI) const;
 
   /// Returns true if MI is an unconditional tail call.
   virtual bool isUnconditionalTailCall(const MachineInstr &MI) const {
index a07ec4eb2e2db93eda71fba0ffdb974a3192f97e..130211878be17a3ee7f525879eefef63179b07d0 100644 (file)
@@ -160,18 +160,6 @@ reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
   return false;
 }
 
-bool MSP430InstrInfo::isUnpredicatedTerminator(const MachineInstr &MI) const {
-  if (!MI.isTerminator())
-    return false;
-
-  // Conditional branch is a special case.
-  if (MI.isBranch() && !MI.isBarrier())
-    return true;
-  if (!MI.isPredicable())
-    return true;
-  return !isPredicated(MI);
-}
-
 bool MSP430InstrInfo::analyzeBranch(MachineBasicBlock &MBB,
                                     MachineBasicBlock *&TBB,
                                     MachineBasicBlock *&FBB,
index 1f532a3d240201c437faf79d69aac07b520d3b8c..710913b2d36f6401e5d16608d5e2f830b02b277b 100644 (file)
@@ -56,7 +56,6 @@ public:
   // Branch folding goodness
   bool
   reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
-  bool isUnpredicatedTerminator(const MachineInstr &MI) const override;
   bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
                      MachineBasicBlock *&FBB,
                      SmallVectorImpl<MachineOperand> &Cond,
index eb5e2ffe243fdeccd0d08dba1d58072f46cf6d5a..1ab3891c568f1fe703e97b14ccc0b553ef7c4af8 100644 (file)
@@ -1452,17 +1452,6 @@ bool PPCInstrInfo::isPredicated(const MachineInstr &MI) const {
   return false;
 }
 
-bool PPCInstrInfo::isUnpredicatedTerminator(const MachineInstr &MI) const {
-  if (!MI.isTerminator())
-    return false;
-
-  // Conditional branch is a special case.
-  if (MI.isBranch() && !MI.isBarrier())
-    return true;
-
-  return !isPredicated(MI);
-}
-
 bool PPCInstrInfo::PredicateInstruction(MachineInstr &MI,
                                         ArrayRef<MachineOperand> Pred) const {
   unsigned OpC = MI.getOpcode();
index d8c8388e455472e7d4bf8efaf9ab717b89a175ef..02f5a78ca3bbdab6df1a0122fd8194abb330583f 100644 (file)
@@ -364,8 +364,6 @@ public:
   // Predication support.
   bool isPredicated(const MachineInstr &MI) const override;
 
-  bool isUnpredicatedTerminator(const MachineInstr &MI) const override;
-
   bool PredicateInstruction(MachineInstr &MI,
                             ArrayRef<MachineOperand> Pred) const override;