arm64: dts: allwinner: Use constants for RTC clock indexes
authorSamuel Holland <samuel@sholland.org>
Tue, 7 Jun 2022 01:24:38 +0000 (20:24 -0500)
committerJernej Skrabec <jernej.skrabec@gmail.com>
Mon, 13 Jun 2022 20:52:40 +0000 (22:52 +0200)
The binding header provides descriptive names for the RTC clock indexes,
since the indexes were arbitrarily chosen by the binding, not by the
hardware. Let's use the names, so the meaning is clearer.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220607012438.18183-2-samuel@sholland.org
arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts
arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts
arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi

index f17cc89..8233582 100644 (file)
@@ -58,7 +58,7 @@
 
        wifi_pwrseq: wifi-pwrseq {
                compatible = "mmc-pwrseq-simple";
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "ext_clock";
                reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* WL-PMU-EN: PL2 */
        };
index 997a193..e6d5bc0 100644 (file)
@@ -56,7 +56,7 @@
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
                reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "ext_clock";
        };
 };
 
        bluetooth {
                compatible = "brcm,bcm43438-bt";
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "lpo";
                vbat-supply = <&reg_dldo2>;
                vddio-supply = <&reg_dldo4>;
index e47ff06..0af6dcd 100644 (file)
@@ -43,7 +43,7 @@
 
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "ext_clock";
                reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
        };
index c519d9f..e2f9633 100644 (file)
@@ -71,7 +71,7 @@
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
                reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 */
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "ext_clock";
        };
 };
        bluetooth {
                compatible = "brcm,bcm43438-bt";
                max-speed = <1500000>;
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "lpo";
                vbat-supply = <&reg_dldo2>;
                vddio-supply = <&reg_dldo4>;
index de77c87..77b5349 100644 (file)
@@ -4,6 +4,7 @@
 //    Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
 
 #include <dt-bindings/clock/sun50i-a64-ccu.h>
+#include <dt-bindings/clock/sun6i-rtc.h>
 #include <dt-bindings/clock/sun8i-de2.h>
 #include <dt-bindings/clock/sun8i-r-ccu.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
                ccu: clock@1c20000 {
                        compatible = "allwinner,sun50i-a64-ccu";
                        reg = <0x01c20000 0x400>;
-                       clocks = <&osc24M>, <&rtc 0>;
+                       clocks = <&osc24M>, <&rtc CLK_OSC32K>;
                        clock-names = "hosc", "losc";
                        #clock-cells = <1>;
                        #reset-cells = <1>;
                        interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
+                       clocks = <&ccu CLK_BUS_PIO>, <&osc24M>,
+                                <&rtc CLK_OSC32K>;
                        clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        #gpio-cells = <3>;
                        reg-io-width = <1>;
                        interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
-                                <&ccu CLK_HDMI>, <&rtc 0>;
+                                <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>;
                        clock-names = "iahb", "isfr", "tmds", "cec";
                        resets = <&ccu RST_BUS_HDMI1>;
                        reset-names = "ctrl";
                r_ccu: clock@1f01400 {
                        compatible = "allwinner,sun50i-a64-r-ccu";
                        reg = <0x01f01400 0x100>;
-                       clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
+                       clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>,
                                 <&ccu CLK_PLL_PERIPH0>;
                        clock-names = "hosc", "losc", "iosc", "pll-periph";
                        #clock-cells = <1>;
index c45d7b7..6fc65e8 100644 (file)
@@ -86,7 +86,7 @@
 
        wifi_pwrseq: wifi-pwrseq {
                compatible = "mmc-pwrseq-simple";
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "ext_clock";
                reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
                post-power-on-delay-ms = <200>;
 
        bluetooth {
                compatible = "brcm,bcm4345c5";
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "lpo";
                device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */
                host-wakeup-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */
index e877085..fb31dcb 100644 (file)
@@ -13,7 +13,7 @@
 
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "ext_clock";
                reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
                post-power-on-delay-ms = <200>;
@@ -64,7 +64,7 @@
 
        bluetooth {
                compatible = "brcm,bcm4345c5";
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "lpo";
                device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */
                host-wakeup-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */
index edb71e4..4903d63 100644 (file)
@@ -78,7 +78,7 @@
 
        wifi_pwrseq: wifi-pwrseq {
                compatible = "mmc-pwrseq-simple";
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "ext_clock";
                reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
        };
index fbe94ab..5a28303 100644 (file)
@@ -4,6 +4,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/sun50i-h6-ccu.h>
 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
+#include <dt-bindings/clock/sun6i-rtc.h>
 #include <dt-bindings/clock/sun8i-de2.h>
 #include <dt-bindings/clock/sun8i-tcon-top.h>
 #include <dt-bindings/reset/sun50i-h6-ccu.h>
                ccu: clock@3001000 {
                        compatible = "allwinner,sun50i-h6-ccu";
                        reg = <0x03001000 0x1000>;
-                       clocks = <&osc24M>, <&rtc 0>, <&rtc 2>;
+                       clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>;
                        clock-names = "hosc", "losc", "iosc";
                        #clock-cells = <1>;
                        #reset-cells = <1>;
                                     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc 0>;
+                       clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc CLK_OSC32K>;
                        clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        #gpio-cells = <3>;
                        interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&ccu CLK_BUS_XHCI>,
                                 <&ccu CLK_BUS_XHCI>,
-                                <&rtc 0>;
+                                <&rtc CLK_OSC32K>;
                        clock-names = "ref", "bus_early", "suspend";
                        resets = <&ccu RST_BUS_XHCI>;
                        /*
                r_ccu: clock@7010000 {
                        compatible = "allwinner,sun50i-h6-r-ccu";
                        reg = <0x07010000 0x400>;
-                       clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
+                       clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>,
                                 <&ccu CLK_PLL_PERIPH0>;
                        clock-names = "hosc", "losc", "iosc", "pll-periph";
                        #clock-cells = <1>;
                        interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&rtc 0>;
+                       clocks = <&r_ccu CLK_R_APB1>, <&osc24M>,
+                                <&rtc CLK_OSC32K>;
                        clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        #gpio-cells = <3>;