drm/amdgpu: mode1 reset needs to recover mp1 for mp0 v13_0_10
authorYiPeng Chai <YiPeng.Chai@amd.com>
Tue, 8 Aug 2023 02:02:30 +0000 (10:02 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Aug 2023 22:07:41 +0000 (18:07 -0400)
Mode1 reset needs to recover mp1 in fatal error case
for mp0 v13_0_10.

v2:
  Define a macro to wrap psp function calls.

Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c

index 3c7d905..3384eb9 100644 (file)
@@ -132,6 +132,7 @@ struct psp_funcs {
        int (*read_usbc_pd_fw)(struct psp_context *psp, uint32_t *fw_ver);
        int (*update_spirom)(struct psp_context *psp, uint64_t fw_pri_mc_addr);
        int (*vbflash_stat)(struct psp_context *psp);
+       int (*fatal_error_recovery_quirk)(struct psp_context *psp);
 };
 
 struct ta_funcs {
@@ -445,6 +446,10 @@ struct amdgpu_psp_funcs {
        ((psp)->funcs->vbflash_stat ? \
        (psp)->funcs->vbflash_stat((psp)) : -EINVAL)
 
+#define psp_fatal_error_recovery_quirk(psp) \
+       ((psp)->funcs->fatal_error_recovery_quirk ? \
+       (psp)->funcs->fatal_error_recovery_quirk((psp)) : 0)
+
 extern const struct amd_ip_funcs psp_ip_funcs;
 
 extern const struct amdgpu_ip_block_version psp_v3_1_ip_block;
index da52d7c..7689395 100644 (file)
@@ -2064,6 +2064,8 @@ static void amdgpu_ras_do_recovery(struct work_struct *work)
                        if (ras->gpu_reset_flags & AMDGPU_RAS_GPU_RESET_MODE1_RESET) {
                                ras->gpu_reset_flags &= ~AMDGPU_RAS_GPU_RESET_MODE1_RESET;
                                set_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);
+
+                               psp_fatal_error_recovery_quirk(&adev->psp);
                        }
                }
 
index 58db1ee..10b17bd 100644 (file)
@@ -691,6 +691,27 @@ static int psp_v13_0_vbflash_status(struct psp_context *psp)
        return RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_115);
 }
 
+static int psp_v13_0_fatal_error_recovery_quirk(struct psp_context *psp)
+{
+       struct amdgpu_device *adev = psp->adev;
+
+       if (adev->ip_versions[MP0_HWIP][0] == IP_VERSION(13, 0, 10)) {
+               uint32_t  reg_data;
+               /* MP1 fatal error: trigger PSP dram read to unhalt PSP
+                * during MP1 triggered sync flood.
+                */
+               reg_data = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_67);
+               WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_67, reg_data + 0x10);
+
+               /* delay 1000ms for the mode1 reset for fatal error
+                * to be recovered back.
+                */
+               msleep(1000);
+       }
+
+       return 0;
+}
+
 static const struct psp_funcs psp_v13_0_funcs = {
        .init_microcode = psp_v13_0_init_microcode,
        .bootloader_load_kdb = psp_v13_0_bootloader_load_kdb,
@@ -710,7 +731,8 @@ static const struct psp_funcs psp_v13_0_funcs = {
        .load_usbc_pd_fw = psp_v13_0_load_usbc_pd_fw,
        .read_usbc_pd_fw = psp_v13_0_read_usbc_pd_fw,
        .update_spirom = psp_v13_0_update_spirom,
-       .vbflash_stat = psp_v13_0_vbflash_status
+       .vbflash_stat = psp_v13_0_vbflash_status,
+       .fatal_error_recovery_quirk = psp_v13_0_fatal_error_recovery_quirk,
 };
 
 void psp_v13_0_set_psp_funcs(struct psp_context *psp)