int board_init(void)
{
- gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+ gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100UL);
#if defined CONFIG_EXYNOS_TMU
if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) {
debug("%s: Failed to init TMU\n", __func__);
int dram_init(void)
{
unsigned int i;
+#ifdef CONFIG_FDTDEC_MEMORY
+ int dram_banks;
+
+ uint64_t mem_size[CONFIG_NR_DRAM_BANKS];
+
+ dram_banks = fdtdec_decode_memory(gd->fdt_blob, NULL, mem_size,
+ CONFIG_NR_DRAM_BANKS);
+
+ for (i = 0; i < dram_banks; i++)
+ gd->ram_size += (uint32_t)mem_size[i];
+#else
unsigned long addr;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
}
+#endif
return 0;
}
int dram_init_banksize(void)
{
unsigned int i;
+#ifdef CONFIG_FDTDEC_MEMORY
+ int dram_banks;
+
+ uint64_t mem_addr[CONFIG_NR_DRAM_BANKS];
+ uint64_t mem_size[CONFIG_NR_DRAM_BANKS];
+
+ dram_banks = fdtdec_decode_memory(gd->fdt_blob, mem_addr, mem_size,
+ CONFIG_NR_DRAM_BANKS);
+
+ for (i = 0; i < dram_banks; i++) {
+ gd->bd->bi_dram[i].start = (uint32_t)mem_addr[i];
+ gd->bd->bi_dram[i].size = (uint32_t)mem_size[i];
+ }
+#else
unsigned long addr, size;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
gd->bd->bi_dram[i].start = addr;
gd->bd->bi_dram[i].size = size;
}
-
+#endif
return 0;
}