drm/sti: enable gdp pixel clock in atomic_update

Set gdp pix clock rate and parent in atomic_check function and enable
it in the atomic_update only the first time.

Signed-off-by: Vincent Abriou <vincent.abriou@st.com>

diff --git a/drivers/gpu/drm/sti/sti_gdp.c b/drivers/gpu/drm/sti/sti_gdp.c
index 877d053..7255234 100644 (file)
--- a/drivers/gpu/drm/sti/sti_gdp.c
+++ b/drivers/gpu/drm/sti/sti_gdp.c
@@ -610,7 +610,6 @@ static int sti_gdp_atomic_check(struct drm_plane *drm_plane,
        struct sti_plane *plane = to_sti_plane(drm_plane);
        struct sti_gdp *gdp = to_sti_gdp(plane);
        struct drm_crtc *crtc = state->crtc;
-       struct sti_compositor *compo = dev_get_drvdata(gdp->dev);
        struct drm_framebuffer *fb =  state->fb;
        struct drm_crtc_state *crtc_state;
        struct sti_mixer *mixer;
@@ -648,45 +647,30 @@ static int sti_gdp_atomic_check(struct drm_plane *drm_plane,
                return -EINVAL;
        }
 
-       if (!gdp->vtg) {
-               /* Register gdp callback */
-               gdp->vtg = compo->vtg[mixer->id];
-               if (sti_vtg_register_client(gdp->vtg,
-                                           &gdp->vtg_field_nb, crtc)) {
-                       DRM_ERROR("Cannot register VTG notifier\n");
+       /* Set gdp clock */
+       if (gdp->clk_pix) {
+               struct clk *clkp;
+               int rate = mode->clock * 1000;
+               int res;
+
+               /*
+                * According to the mixer used, the gdp pixel clock
+                * should have a different parent clock.
+                */
+               if (mixer->id == STI_MIXER_MAIN)
+                       clkp = gdp->clk_main_parent;
+               else
+                       clkp = gdp->clk_aux_parent;
+
+               if (clkp)
+                       clk_set_parent(gdp->clk_pix, clkp);
+
+               res = clk_set_rate(gdp->clk_pix, rate);
+               if (res < 0) {
+                       DRM_ERROR("Cannot set rate (%dHz) for gdp\n",
+                                 rate);
                        return -EINVAL;
                }
-
-               /* Set and enable gdp clock */
-               if (gdp->clk_pix) {
-                       struct clk *clkp;
-                       int rate = mode->clock * 1000;
-                       int res;
-
-                       /*
-                        * According to the mixer used, the gdp pixel clock
-                        * should have a different parent clock.
-                        */
-                       if (mixer->id == STI_MIXER_MAIN)
-                               clkp = gdp->clk_main_parent;
-                       else
-                               clkp = gdp->clk_aux_parent;
-
-                       if (clkp)
-                               clk_set_parent(gdp->clk_pix, clkp);
-
-                       res = clk_set_rate(gdp->clk_pix, rate);
-                       if (res < 0) {
-                               DRM_ERROR("Cannot set rate (%dHz) for gdp\n",
-                                         rate);
-                               return -EINVAL;
-                       }
-
-                       if (clk_prepare_enable(gdp->clk_pix)) {
-                               DRM_ERROR("Failed to prepare/enable gdp\n");
-                               return -EINVAL;
-                       }
-               }
        }
 
        DRM_DEBUG_KMS("CRTC:%d (%s) drm plane:%d (%s)\n",
@@ -724,6 +708,16 @@ static void sti_gdp_atomic_update(struct drm_plane *drm_plane,
        if (!crtc || !fb)
                return;
 
+       if (!gdp->vtg) {
+               struct sti_compositor *compo = dev_get_drvdata(gdp->dev);
+               struct sti_mixer *mixer = to_sti_mixer(crtc);
+
+               /* Register gdp callback */
+               gdp->vtg = compo->vtg[mixer->id];
+               sti_vtg_register_client(gdp->vtg, &gdp->vtg_field_nb, crtc);
+               clk_prepare_enable(gdp->clk_pix);
+       }
+
        mode = &crtc->mode;
        dst_x = state->crtc_x;
        dst_y = state->crtc_y;