And use it in panfrost_bo to store a GPU/CPU pointer tuple.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
if (size) {
state->bo = panfrost_bo_create(dev, size, PAN_BO_EXECUTE);
- memcpy(state->bo->cpu, program->compiled.data, size);
- shader = state->bo->gpu;
+ memcpy(state->bo->ptr.cpu, program->compiled.data, size);
+ shader = state->bo->ptr.gpu;
}
/* Midgard needs the first tag on the bottom nibble */
if (!program->blend_ret_offsets[i])
continue;
- state->blend_ret_addrs[i] = (state->bo->gpu & UINT32_MAX) +
+ state->blend_ret_addrs[i] = (state->bo->ptr.gpu & UINT32_MAX) +
program->blend_ret_offsets[i];
assert(!(state->blend_ret_addrs[i] & 0x7));
}
/* Size check */
assert((*shader_offset + shader->size) < 4096);
- memcpy((*bo)->cpu + *shader_offset, shader->buffer, shader->size);
+ memcpy((*bo)->ptr.cpu + *shader_offset, shader->buffer, shader->size);
struct panfrost_blend_final final = {
.is_shader = true,
.shader = {
.work_count = shader->work_count,
.first_tag = shader->first_tag,
- .gpu = (*bo)->gpu + *shader_offset,
+ .gpu = (*bo)->ptr.gpu + *shader_offset,
},
.load_dest = rt->load_dest,
};
{
struct panfrost_device *dev = pan_device(batch->ctx->base.screen);
- struct panfrost_transfer t =
+ struct panfrost_ptr t =
panfrost_pool_alloc_aligned(&batch->pool,
MALI_LOCAL_STORAGE_LENGTH,
64);
dev->core_count);
ls.tls_size = panfrost_get_stack_shift(batch->stack_size);
- ls.tls_base_pointer = stack->gpu;
+ ls.tls_base_pointer = stack->ptr.gpu;
}
}
PAN_BO_ACCESS_SHARED |
PAN_BO_ACCESS_READ |
PAN_BO_ACCESS_VERTEX_TILER);
- out = rsrc->bo->gpu + offset;
+ out = rsrc->bo->ptr.gpu + offset;
/* Check the cache */
needs_indices = !panfrost_minmax_cache_get(rsrc->index_cache,
} else {
/* Otherwise, we need to upload to transient memory */
const uint8_t *ibuf8 = (const uint8_t *) info->index.user;
- struct panfrost_transfer T =
+ struct panfrost_ptr T =
panfrost_pool_alloc_aligned(&batch->pool,
info->count * info->index_size,
info->index_size);
* TODO: Ensure that's always the case.
*/
assert((blend[i].shader.gpu & (0xffffffffull << 32)) ==
- (fs->bo->gpu & (0xffffffffull << 32)));
+ (fs->bo->ptr.gpu & (0xffffffffull << 32)));
cfg.bifrost.internal.shader.pc = (u32)blend[i].shader.gpu;
assert(!(fs->blend_ret_addrs[i] & 0x7));
cfg.bifrost.internal.shader.return_value = fs->blend_ret_addrs[i];
PAN_BO_ACCESS_READ |
PAN_BO_ACCESS_VERTEX_TILER);
- return pan_resource(ss->upload.rsrc)->bo->gpu + ss->upload.offset;
+ return pan_resource(ss->upload.rsrc)->bo->ptr.gpu + ss->upload.offset;
}
mali_ptr
struct panfrost_device *dev = pan_device(ctx->base.screen);
unsigned rt_count = MAX2(ctx->pipe_framebuffer.nr_cbufs, 1);
- struct panfrost_transfer xfer;
+ struct panfrost_ptr xfer;
unsigned rt_size;
if (dev->quirks & MIDGARD_SFBD)
if (maxx == 0 || maxy == 0)
maxx = maxy = minx = miny = 1;
- struct panfrost_transfer T = panfrost_pool_alloc(&batch->pool, MALI_VIEWPORT_LENGTH);
+ struct panfrost_ptr T = panfrost_pool_alloc(&batch->pool, MALI_VIEWPORT_LENGTH);
pan_pack(T.cpu, VIEWPORT, cfg) {
/* [minx, maxx) and [miny, maxy) are exclusive ranges, but
/* Alignment gauranteed by
* PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT */
- return rsrc->bo->gpu + cb->buffer_offset;
+ return rsrc->bo->ptr.gpu + cb->buffer_offset;
} else if (cb->user_buffer) {
return panfrost_pool_upload_aligned(&batch->pool,
cb->user_buffer +
panfrost_bo_access_for_stage(st));
/* Upload address and size as sysval */
- uniform->du[0] = bo->gpu + sb.buffer_offset;
+ uniform->du[0] = bo->ptr.gpu + sb.buffer_offset;
uniform->u[2] = sb.buffer_size;
}
struct panfrost_resource *rsrc = pan_resource(cb->buffer);
if (rsrc)
- return rsrc->bo->cpu;
+ return rsrc->bo->ptr.cpu;
else if (cb->user_buffer)
return cb->user_buffer;
else
size_t sys_size = sizeof(float) * 4 * ss->sysval_count;
size_t uniform_size = has_uniforms ? (buf->cb[0].buffer_size) : 0;
size_t size = sys_size + uniform_size;
- struct panfrost_transfer transfer =
+ struct panfrost_ptr transfer =
panfrost_pool_alloc_aligned(&batch->pool, size, 16);
/* Upload sysvals requested by the shader */
unsigned ubo_count = 32 - __builtin_clz(buf->enabled_mask | 1);
size_t sz = MALI_UNIFORM_BUFFER_LENGTH * ubo_count;
- struct panfrost_transfer ubos =
+ struct panfrost_ptr ubos =
panfrost_pool_alloc_aligned(&batch->pool, sz,
MALI_UNIFORM_BUFFER_LENGTH);
struct panfrost_bo *bo = panfrost_batch_get_shared_memory(batch,
shared_size,
1);
- struct panfrost_transfer t =
+ struct panfrost_ptr t =
panfrost_pool_alloc_aligned(&batch->pool,
MALI_LOCAL_STORAGE_LENGTH,
64);
pan_pack(t.cpu, LOCAL_STORAGE, ls) {
- ls.wls_base_pointer = bo->gpu;
+ ls.wls_base_pointer = bo->ptr.gpu;
ls.wls_instances = log2_instances;
ls.wls_size_scale = util_logbase2(single_size) + 1;
};
PAN_BO_ACCESS_SHARED | PAN_BO_ACCESS_READ |
panfrost_bo_access_for_stage(st));
- return view->bo->gpu;
+ return view->bo->ptr.gpu;
}
static void
struct pipe_context *pctx)
{
struct panfrost_resource *rsrc = pan_resource(view->base.texture);
- if (view->texture_bo != rsrc->bo->gpu ||
+ if (view->texture_bo != rsrc->bo->ptr.gpu ||
view->modifier != rsrc->modifier) {
panfrost_bo_unreference(view->bo);
panfrost_create_sampler_view_bo(view, pctx, &rsrc->base);
return 0;
if (device->quirks & IS_BIFROST) {
- struct panfrost_transfer T = panfrost_pool_alloc_aligned(&batch->pool,
+ struct panfrost_ptr T = panfrost_pool_alloc_aligned(&batch->pool,
MALI_BIFROST_TEXTURE_LENGTH *
ctx->sampler_view_count[stage],
MALI_BIFROST_TEXTURE_LENGTH);
assert(MALI_BIFROST_SAMPLER_LENGTH == MALI_MIDGARD_SAMPLER_LENGTH);
size_t sz = desc_size * ctx->sampler_count[stage];
- struct panfrost_transfer T = panfrost_pool_alloc_aligned(&batch->pool, sz, desc_size);
+ struct panfrost_ptr T = panfrost_pool_alloc_aligned(&batch->pool, sz, desc_size);
struct mali_midgard_sampler_packed *out = (struct mali_midgard_sampler_packed *) T.cpu;
for (unsigned i = 0; i < ctx->sampler_count[stage]; ++i)
/* Worst case: everything is NPOT, which is only possible if instancing
* is enabled. Otherwise single record is gauranteed */
- struct panfrost_transfer S = panfrost_pool_alloc_aligned(&batch->pool,
+ struct panfrost_ptr S = panfrost_pool_alloc_aligned(&batch->pool,
MALI_ATTRIBUTE_BUFFER_LENGTH * vs->attribute_count *
(ctx->instance_count > 1 ? 2 : 1),
MALI_ATTRIBUTE_BUFFER_LENGTH * 2);
- struct panfrost_transfer T = panfrost_pool_alloc_aligned(&batch->pool,
+ struct panfrost_ptr T = panfrost_pool_alloc_aligned(&batch->pool,
MALI_ATTRIBUTE_LENGTH * vs->attribute_count,
MALI_ATTRIBUTE_LENGTH);
PAN_BO_ACCESS_VERTEX_TILER);
/* Mask off lower bits, see offset fixup below */
- mali_ptr raw_addr = rsrc->bo->gpu + buf->buffer_offset;
+ mali_ptr raw_addr = rsrc->bo->ptr.gpu + buf->buffer_offset;
mali_ptr addr = raw_addr & ~63;
/* Since we advanced the base pointer, we shrink the buffer
PAN_BO_ACCESS_FRAGMENT);
/* We will have an offset applied to get alignment */
- mali_ptr addr = bo->gpu + target->buffer_offset + (pan_so_target(target)->offset * stride);
+ mali_ptr addr = bo->ptr.gpu + target->buffer_offset + (pan_so_target(target)->offset * stride);
pan_pack(slot, ATTRIBUTE_BUFFER, cfg) {
cfg.pointer = (addr & ~63);
vs_size = MALI_ATTRIBUTE_LENGTH * vs->varying_count;
fs_size = MALI_ATTRIBUTE_LENGTH * fs->varying_count;
- struct panfrost_transfer trans = panfrost_pool_alloc_aligned(
+ struct panfrost_ptr trans = panfrost_pool_alloc_aligned(
&batch->pool, vs_size + fs_size, MALI_ATTRIBUTE_LENGTH);
struct pipe_stream_output_info *so = &vs->stream_output;
}
unsigned xfb_base = pan_xfb_base(present);
- struct panfrost_transfer T = panfrost_pool_alloc_aligned(&batch->pool,
+ struct panfrost_ptr T = panfrost_pool_alloc_aligned(&batch->pool,
MALI_ATTRIBUTE_BUFFER_LENGTH * (xfb_base + ctx->streamout.num_targets),
MALI_ATTRIBUTE_BUFFER_LENGTH * 2);
struct mali_attribute_buffer_packed *varyings =
void
panfrost_emit_vertex_tiler_jobs(struct panfrost_batch *batch,
- const struct panfrost_transfer *vertex_job,
- const struct panfrost_transfer *tiler_job)
+ const struct panfrost_ptr *vertex_job,
+ const struct panfrost_ptr *tiler_job)
{
struct panfrost_context *ctx = batch->ctx;
bool wallpapering = ctx->wallpaper_batch && batch->scoreboard.tiler_dep;
void
panfrost_emit_vertex_tiler_jobs(struct panfrost_batch *batch,
- const struct panfrost_transfer *vertex_job,
- const struct panfrost_transfer *tiler_job);
+ const struct panfrost_ptr *vertex_job,
+ const struct panfrost_ptr *tiler_job);
mali_ptr
panfrost_emit_sample_locations(struct panfrost_batch *batch);
ctx->compute_grid = info;
/* TODO: Stub */
- struct panfrost_transfer t =
+ struct panfrost_ptr t =
panfrost_pool_alloc_aligned(&batch->pool,
MALI_COMPUTE_JOB_LENGTH,
64);
header_size +
t.polygon_list_size);
- t.heap_start = device->tiler_heap->gpu;
- t.heap_end = device->tiler_heap->gpu +
+ t.heap_start = device->tiler_heap->ptr.gpu;
+ t.heap_end = device->tiler_heap->ptr.gpu +
device->tiler_heap->size;
} else {
struct panfrost_bo *tiler_dummy;
header_size = MALI_MIDGARD_TILER_MINIMUM_HEADER_SIZE;
/* The tiler is disabled, so don't allow the tiler heap */
- t.heap_start = tiler_dummy->gpu;
+ t.heap_start = tiler_dummy->ptr.gpu;
t.heap_end = t.heap_start;
/* Use a dummy polygon list */
- t.polygon_list = tiler_dummy->gpu;
+ t.polygon_list = tiler_dummy->ptr.gpu;
/* Disable the tiler */
if (hierarchy)
t.polygon_list_size = MALI_MIDGARD_TILER_MINIMUM_HEADER_SIZE + 4;
/* We don't have a WRITE_VALUE job, so write the polygon list manually */
- uint32_t *polygon_list_body = (uint32_t *) (tiler_dummy->cpu + header_size);
+ uint32_t *polygon_list_body = (uint32_t *) (tiler_dummy->ptr.cpu + header_size);
polygon_list_body[0] = 0xa0000000; /* TODO: Just that? */
}
}
cfg.occlusion_query = MALI_OCCLUSION_MODE_COUNTER;
else
cfg.occlusion_query = MALI_OCCLUSION_MODE_PREDICATE;
- cfg.occlusion = ctx->occlusion_query->bo->gpu;
+ cfg.occlusion = ctx->occlusion_query->bo->ptr.gpu;
panfrost_batch_add_bo(ctx->batch, ctx->occlusion_query->bo,
PAN_BO_ACCESS_SHARED |
PAN_BO_ACCESS_RW |
ctx->active_prim = info->mode;
bool is_bifrost = device->quirks & IS_BIFROST;
- struct panfrost_transfer tiler =
+ struct panfrost_ptr tiler =
panfrost_pool_alloc_aligned(&batch->pool,
is_bifrost ?
MALI_BIFROST_TILER_JOB_LENGTH :
MALI_MIDGARD_TILER_JOB_LENGTH,
64);
- struct panfrost_transfer vertex =
+ struct panfrost_ptr vertex =
panfrost_pool_alloc_aligned(&batch->pool,
MALI_COMPUTE_JOB_LENGTH,
64);
desc = util_format_description(format);
}
- so->texture_bo = prsrc->bo->gpu;
+ so->texture_bo = prsrc->bo->ptr.gpu;
so->modifier = prsrc->modifier;
unsigned char user_swizzle[4] = {
texture->nr_samples,
prsrc->cubemap_stride,
panfrost_translate_swizzle_4(composed_swizzle),
- prsrc->bo->gpu,
+ prsrc->bo->ptr.gpu,
prsrc->slices,
so->bo);
} else {
so->bo = panfrost_bo_create(device, size, 0);
panfrost_new_texture(
- so->bo->cpu,
+ so->bo->ptr.cpu,
texture->width0, texture->height0,
depth, array_size,
format,
texture->nr_samples,
prsrc->cubemap_stride,
panfrost_translate_swizzle_4(user_swizzle),
- prsrc->bo->gpu,
+ prsrc->bo->ptr.gpu,
prsrc->slices);
}
}
}
/* Default to 0 if nothing at all drawn. */
- memset(query->bo->cpu, 0, size);
+ memset(query->bo->ptr.cpu, 0, size);
query->msaa = (ctx->pipe_framebuffer.samples > 1);
-
ctx->occlusion_query = query;
break;
}
panfrost_bo_wait(query->bo, INT64_MAX, false);
/* Read back the query results */
- uint64_t *result = (uint64_t *) query->bo->cpu;
+ uint64_t *result = (uint64_t *) query->bo->ptr.cpu;
if (query->type == PIPE_QUERY_OCCLUSION_COUNTER) {
uint64_t passed = 0;
bool
panfrost_writes_point_size(struct panfrost_context *ctx);
-struct panfrost_transfer
+struct panfrost_ptr
panfrost_vertex_tiler_job(struct panfrost_context *ctx, bool is_tiler);
void
assert(batch->maxx > batch->minx);
assert(batch->maxy > batch->miny);
- struct panfrost_transfer transfer =
+ struct panfrost_ptr transfer =
panfrost_pool_alloc_aligned(&batch->pool,
MALI_FRAGMENT_JOB_LENGTH, 64);
PAN_BO_ACCESS_FRAGMENT);
}
- return batch->polygon_list->gpu;
+ return batch->polygon_list->ptr.gpu;
}
struct panfrost_bo *
return batch->tiler_meta;
struct panfrost_device *dev = pan_device(batch->ctx->base.screen);
- struct panfrost_transfer t =
+ struct panfrost_ptr t =
panfrost_pool_alloc_aligned(&batch->pool, MALI_BIFROST_TILER_HEAP_LENGTH, 64);
pan_pack(t.cpu, BIFROST_TILER_HEAP, heap) {
heap.size = dev->tiler_heap->size;
- heap.base = dev->tiler_heap->gpu;
- heap.bottom = dev->tiler_heap->gpu;
- heap.top = dev->tiler_heap->gpu + dev->tiler_heap->size;
+ heap.base = dev->tiler_heap->ptr.gpu;
+ heap.bottom = dev->tiler_heap->ptr.gpu;
+ heap.top = dev->tiler_heap->ptr.gpu + dev->tiler_heap->size;
}
mali_ptr heap = t.gpu;
PAN_BO_ACCESS_READ |
PAN_BO_ACCESS_FRAGMENT);
- memcpy(bo->cpu, b->buffer, b->size);
+ memcpy(bo->ptr.cpu, b->buffer, b->size);
assert(b->work_count <= 4);
- blend_shader = bo->gpu | b->first_tag;
+ blend_shader = bo->ptr.gpu | b->first_tag;
}
- struct panfrost_transfer transfer = panfrost_pool_alloc_aligned(&batch->pool,
+ struct panfrost_ptr transfer = panfrost_pool_alloc_aligned(&batch->pool,
4 * 4 * 6 * rsrc->damage.inverted_len, 64);
for (unsigned i = 0; i < rsrc->damage.inverted_len; ++i) {
struct panfrost_bo *tiler_dummy;
/* Framebuffer descriptor. */
- struct panfrost_transfer framebuffer;
+ struct panfrost_ptr framebuffer;
/* Bifrost tiler meta descriptor. */
mali_ptr tiler_meta;
ext->crc_row_stride = slice->checksum_stride;
if (slice->checksum_bo)
- ext->crc_base = slice->checksum_bo->gpu;
+ ext->crc_base = slice->checksum_bo->ptr.gpu;
else
- ext->crc_base = rsrc->bo->gpu + slice->checksum_offset;
+ ext->crc_base = rsrc->bo->ptr.gpu + slice->checksum_offset;
if ((batch->clear & PIPE_CLEAR_COLOR0) && version >= 7) {
ext->crc_clear_color = batch->clear_color[0][0] |
dev->thread_tls_alloc,
dev->core_count);
ls.tls_size = shift;
- ls.tls_base_pointer = bo->gpu;
+ ls.tls_base_pointer = bo->ptr.gpu;
}
ls.wls_instances = MALI_LOCAL_STORAGE_NO_WORKGROUP_MEM;
{
struct panfrost_device *dev = pan_device(batch->ctx->base.screen);
unsigned vertex_count = has_draws;
- struct panfrost_transfer t =
+ struct panfrost_ptr t =
panfrost_pool_alloc_aligned(&batch->pool,
panfrost_mfbd_size(batch), 64);
void *fb = t.cpu, *zs_crc_ext, *rts;
}
static void *
-panfrost_transfer_map(struct pipe_context *pctx,
+panfrost_ptr_map(struct pipe_context *pctx,
struct pipe_resource *resource,
unsigned level,
unsigned usage, /* a combination of PIPE_MAP_x */
}
panfrost_bo_mmap(staging->bo);
- return staging->bo->cpu;
+ return staging->bo->ptr.cpu;
}
/* If we haven't already mmaped, now's the time */
panfrost_bo_mmap(bo);
if (dev->debug & (PAN_DBG_TRACE | PAN_DBG_SYNC))
- pandecode_inject_mmap(bo->gpu, bo->cpu, bo->size, NULL);
+ pandecode_inject_mmap(bo->ptr.gpu, bo->ptr.cpu, bo->size, NULL);
bool create_new_bo = usage & PIPE_MAP_DISCARD_WHOLE_RESOURCE;
bool copy_resource = false;
if (newbo) {
if (copy_resource)
- memcpy(newbo->cpu, rsrc->bo->cpu, bo->size);
+ memcpy(newbo->ptr.cpu, rsrc->bo->ptr.cpu, bo->size);
panfrost_bo_unreference(bo);
rsrc->bo = newbo;
if ((usage & PIPE_MAP_READ) && rsrc->slices[level].initialized) {
panfrost_load_tiled_image(
transfer->map,
- bo->cpu + rsrc->slices[level].offset,
+ bo->ptr.cpu + rsrc->slices[level].offset,
box->x, box->y, box->width, box->height,
transfer->base.stride,
rsrc->slices[level].stride,
panfrost_minmax_cache_invalidate(rsrc->index_cache, &transfer->base);
}
- return bo->cpu
+ return bo->ptr.cpu
+ rsrc->slices[level].offset
+ transfer->base.box.z * transfer->base.layer_stride
+ transfer->base.box.y * rsrc->slices[level].stride
}
static void
-panfrost_transfer_unmap(struct pipe_context *pctx,
+panfrost_ptr_unmap(struct pipe_context *pctx,
struct pipe_transfer *transfer)
{
/* Gallium expects writeback here, so we tile */
prsrc->modifier = DRM_FORMAT_MOD_LINEAR;
util_copy_rect(
- bo->cpu + prsrc->slices[0].offset,
+ bo->ptr.cpu + prsrc->slices[0].offset,
prsrc->base.format,
prsrc->slices[0].stride,
0, 0,
0, 0);
} else {
panfrost_store_tiled_image(
- bo->cpu + prsrc->slices[transfer->level].offset,
+ bo->ptr.cpu + prsrc->slices[transfer->level].offset,
trans->map,
transfer->box.x, transfer->box.y,
transfer->box.width, transfer->box.height,
}
static void
-panfrost_transfer_flush_region(struct pipe_context *pctx,
+panfrost_ptr_flush_region(struct pipe_context *pctx,
struct pipe_transfer *transfer,
const struct pipe_box *box)
{
unsigned level, unsigned face, unsigned sample)
{
bool is_3d = rsrc->base.target == PIPE_TEXTURE_3D;
- return rsrc->bo->gpu + panfrost_texture_offset(rsrc->slices, is_3d, rsrc->cubemap_stride, level, face, sample);
+ return rsrc->bo->ptr.gpu +
+ panfrost_texture_offset(rsrc->slices, is_3d,
+ rsrc->cubemap_stride,
+ level, face, sample);
}
static void
static const struct u_transfer_vtbl transfer_vtbl = {
.resource_create = panfrost_resource_create,
.resource_destroy = panfrost_resource_destroy,
- .transfer_map = panfrost_transfer_map,
- .transfer_unmap = panfrost_transfer_unmap,
- .transfer_flush_region = panfrost_transfer_flush_region,
+ .transfer_map = panfrost_ptr_map,
+ .transfer_unmap = panfrost_ptr_unmap,
+ .transfer_flush_region = panfrost_ptr_flush_region,
.get_internal_format = panfrost_resource_get_internal_format,
.set_stencil = panfrost_resource_set_stencil,
.get_stencil = panfrost_resource_get_stencil,
unreachable("Invalid render modifier.");
fb->zs_block_format = MALI_BLOCK_FORMAT_TILED_U_INTERLEAVED;
- fb->zs_writeback.base = rsrc->bo->gpu + rsrc->slices[level].offset;
+ fb->zs_writeback.base = rsrc->bo->ptr.gpu + rsrc->slices[level].offset;
fb->zs_writeback.row_stride = rsrc->slices[level].stride * 16;
switch (surf->format) {
case PIPE_FORMAT_Z24_UNORM_S8_UINT:
panfrost_batch_get_scratchpad(batch,
shift,
dev->thread_tls_alloc,
- dev->core_count)->gpu;
+ dev->core_count)->ptr.gpu;
}
}
mali_ptr
panfrost_sfbd_fragment(struct panfrost_batch *batch, bool has_draws)
{
- struct panfrost_transfer t =
+ struct panfrost_ptr t =
panfrost_pool_alloc_aligned(&batch->pool,
MALI_SINGLE_TARGET_FRAMEBUFFER_LENGTH,
64);
struct panfrost_slice *slice = &rsrc->slices[level];
params.crc_buffer.row_stride = slice->checksum_stride;
- params.crc_buffer.base = bo->gpu + slice->checksum_offset;
+ params.crc_buffer.base = bo->ptr.gpu + slice->checksum_offset;
}
}
bit_bo_create(struct panfrost_device *dev, size_t size)
{
struct panfrost_bo *bo = panfrost_bo_create(dev, size, PAN_BO_EXECUTE);
- pandecode_inject_mmap(bo->gpu, bo->cpu, bo->size, NULL);
+ pandecode_inject_mmap(bo->ptr.gpu, bo->ptr.cpu, bo->size, NULL);
return bo;
}
struct panfrost_bo **bos, size_t bo_count, enum bit_debug debug)
{
struct panfrost_bo *job = bit_bo_create(dev, 4096);
- pan_pack(job->cpu, JOB_HEADER, cfg) {
+ pan_pack(job->ptr.cpu, JOB_HEADER, cfg) {
cfg.type = T;
cfg.index = 1;
}
- memcpy(job->cpu + MALI_JOB_HEADER_LENGTH, payload, payload_size);
+ memcpy(job->ptr.cpu + MALI_JOB_HEADER_LENGTH, payload, payload_size);
uint32_t *bo_handles = calloc(sizeof(uint32_t), bo_count);
assert(!ret);
struct drm_panfrost_submit submit = {
- .jc = job->gpu,
+ .jc = job->ptr.gpu,
.bo_handles = (uintptr_t) bo_handles,
.bo_handle_count = bo_count,
.out_sync = syncobj,
bit_sanity_check(struct panfrost_device *dev)
{
struct panfrost_bo *scratch = bit_bo_create(dev, 65536);
- ((uint32_t *) scratch->cpu)[0] = 0xAA;
+ ((uint32_t *) scratch->ptr.cpu)[0] = 0xAA;
struct mali_write_value_job_payload_packed payload;
pan_pack(&payload, WRITE_VALUE_JOB_PAYLOAD, cfg) {
- cfg.address = scratch->gpu;
+ cfg.address = scratch->ptr.gpu;
cfg.type = MALI_WRITE_VALUE_TYPE_ZERO;
};
bool success = bit_submit(dev, MALI_JOB_TYPE_WRITE_VALUE,
&payload, sizeof(payload), bos, 1, false);
- return success && (((uint8_t *) scratch->cpu)[0] == 0x0);
+ return success && (((uint8_t *) scratch->ptr.cpu)[0] == 0x0);
}
/* Constructs a vertex job */
struct panfrost_bo *var = bit_bo_create(dev, 4096);
struct panfrost_bo *attr = bit_bo_create(dev, 4096);
- pan_pack(attr->cpu, ATTRIBUTE, cfg) {
+ pan_pack(attr->ptr.cpu, ATTRIBUTE, cfg) {
cfg.format = (MALI_RGBA32UI << 12);
cfg.offset_enable = true;
}
- pan_pack(var->cpu, ATTRIBUTE, cfg) {
+ pan_pack(var->ptr.cpu, ATTRIBUTE, cfg) {
cfg.format = (MALI_RGBA32UI << 12);
cfg.offset_enable = false;
}
- pan_pack(var->cpu + 256, ATTRIBUTE_BUFFER, cfg) {
- cfg.pointer = (var->gpu + 1024);
+ pan_pack(var->ptr.cpu + 256, ATTRIBUTE_BUFFER, cfg) {
+ cfg.pointer = (var->ptr.gpu + 1024);
cfg.size = 1024;
}
- pan_pack(attr->cpu + 256, ATTRIBUTE_BUFFER, cfg) {
- cfg.pointer = (attr->gpu + 1024);
+ pan_pack(attr->ptr.cpu + 256, ATTRIBUTE_BUFFER, cfg) {
+ cfg.pointer = (attr->ptr.gpu + 1024);
cfg.size = 1024;
}
- pan_pack(ubo->cpu, UNIFORM_BUFFER, cfg) {
+ pan_pack(ubo->ptr.cpu, UNIFORM_BUFFER, cfg) {
cfg.entries = sz_ubo / 16;
- cfg.pointer = ubo->gpu + 1024;
+ cfg.pointer = ubo->ptr.gpu + 1024;
}
if (sz_ubo)
- memcpy(ubo->cpu + 1024, iubo, sz_ubo);
+ memcpy(ubo->ptr.cpu + 1024, iubo, sz_ubo);
if (sz_attr)
- memcpy(attr->cpu + 1024, iattr, sz_attr);
+ memcpy(attr->ptr.cpu + 1024, iattr, sz_attr);
struct panfrost_bo *shmem = bit_bo_create(dev, 4096);
- pan_pack(shmem->cpu, LOCAL_STORAGE, cfg) {
+ pan_pack(shmem->ptr.cpu, LOCAL_STORAGE, cfg) {
cfg.wls_instances = MALI_LOCAL_STORAGE_NO_WORKGROUP_MEM;
}
- pan_pack(shader_desc->cpu, RENDERER_STATE, cfg) {
- cfg.shader.shader = shader->gpu;
+ pan_pack(shader_desc->ptr.cpu, RENDERER_STATE, cfg) {
+ cfg.shader.shader = shader->ptr.gpu;
cfg.shader.attribute_count = cfg.shader.varying_count = 1;
cfg.properties.uniform_buffer_count = 1;
cfg.properties.bifrost.zs_update_operation = MALI_PIXEL_KILL_STRONG_EARLY;
cfg.preload.uniform_count = (sz_ubo / 16);
}
- memcpy(shader->cpu, prog->compiled.data, prog->compiled.size);
+ memcpy(shader->ptr.cpu, prog->compiled.data, prog->compiled.size);
struct mali_compute_job_packed job;
pan_section_pack(&job, COMPUTE_JOB, DRAW, cfg) {
cfg.draw_descriptor_is_64b = true;
- cfg.thread_storage = shmem->gpu;
- cfg.state = shader_desc->gpu;
- cfg.push_uniforms = ubo->gpu + 1024;
- cfg.uniform_buffers = ubo->gpu;
- cfg.attributes = attr->gpu;
- cfg.attribute_buffers = attr->gpu + 256;
- cfg.varyings = var->gpu;
- cfg.varying_buffers = var->gpu + 256;
+ cfg.thread_storage = shmem->ptr.gpu;
+ cfg.state = shader_desc->ptr.gpu;
+ cfg.push_uniforms = ubo->ptr.gpu + 1024;
+ cfg.uniform_buffers = ubo->ptr.gpu;
+ cfg.attributes = attr->ptr.gpu;
+ cfg.attribute_buffers = attr->ptr.gpu + 256;
+ cfg.varyings = var->ptr.gpu;
+ cfg.varying_buffers = var->ptr.gpu + 256;
}
void *invocation = pan_section_ptr(&job, COMPUTE_JOB, INVOCATION);
/* Check the output varyings */
- uint32_t *output = (uint32_t *) (var->cpu + 1024);
+ uint32_t *output = (uint32_t *) (var->ptr.cpu + 1024);
float *foutput = (float *) output;
float *fexpected = (float *) expected;
nir_types[T], ms);
assert(offset + program->compiled.size < total_size);
- memcpy(dev->blit_shaders.bo->cpu + offset, program->compiled.data, program->compiled.size);
+ memcpy(dev->blit_shaders.bo->ptr.cpu + offset,
+ program->compiled.data, program->compiled.size);
- shader->shader = (dev->blit_shaders.bo->gpu + offset) | program->first_tag;
+ shader->shader = (dev->blit_shaders.bo->ptr.gpu + offset) |
+ program->first_tag;
int rt = loc - FRAG_RESULT_DATA0;
if (rt >= 0 && rt < 8 && program->blend_ret_offsets[rt])
unsigned width = u_minify(image->width0, image->first_level);
unsigned height = u_minify(image->height0, image->first_level);
- struct panfrost_transfer viewport = panfrost_pool_alloc(pool, MALI_VIEWPORT_LENGTH);
- struct panfrost_transfer sampler = panfrost_pool_alloc(pool, MALI_MIDGARD_SAMPLER_LENGTH);
- struct panfrost_transfer varying = panfrost_pool_alloc(pool, MALI_ATTRIBUTE_LENGTH);
- struct panfrost_transfer varying_buffer = panfrost_pool_alloc(pool, MALI_ATTRIBUTE_BUFFER_LENGTH);
+ struct panfrost_ptr viewport = panfrost_pool_alloc(pool, MALI_VIEWPORT_LENGTH);
+ struct panfrost_ptr sampler = panfrost_pool_alloc(pool, MALI_MIDGARD_SAMPLER_LENGTH);
+ struct panfrost_ptr varying = panfrost_pool_alloc(pool, MALI_ATTRIBUTE_LENGTH);
+ struct panfrost_ptr varying_buffer = panfrost_pool_alloc(pool, MALI_ATTRIBUTE_BUFFER_LENGTH);
pan_pack(viewport.cpu, VIEWPORT, cfg) {
cfg.scissor_maximum_x = width - 1; /* Inclusive */
bool ms = image->nr_samples > 1;
- struct panfrost_transfer shader_meta_t =
+ struct panfrost_ptr shader_meta_t =
panfrost_pool_alloc_aligned(pool,
MALI_RENDERER_STATE_LENGTH +
8 * MALI_BLEND_LENGTH,
* textures, removing the need to separately key the blit shaders for
* 2D and 3D variants */
- struct panfrost_transfer texture_t = panfrost_pool_alloc_aligned(
+ struct panfrost_ptr texture_t = panfrost_pool_alloc_aligned(
pool, MALI_MIDGARD_TEXTURE_LENGTH + sizeof(mali_ptr) * 2 * MAX2(image->nr_samples, 1), 128);
panfrost_new_texture(texture_t.cpu,
image->nr_samples,
0,
(MALI_CHANNEL_R << 0) | (MALI_CHANNEL_G << 3) | (MALI_CHANNEL_B << 6) | (MALI_CHANNEL_A << 9),
- image->bo->gpu + image->first_layer *
+ image->bo->ptr.gpu + image->first_layer *
panfrost_get_layer_stride(image->slices,
image->dim == MALI_TEXTURE_DIMENSION_3D,
image->cubemap_stride, image->first_level),
}
}
- struct panfrost_transfer t =
+ struct panfrost_ptr t =
panfrost_pool_alloc_aligned(pool, MALI_MIDGARD_TILER_JOB_LENGTH, 64);
pan_section_pack(t.cpu, MIDGARD_TILER_JOB, DRAW, cfg) {
assert(!memcmp(bo, &((struct panfrost_bo){}), sizeof(*bo)));
bo->size = create_bo.size;
- bo->gpu = create_bo.offset;
+ bo->ptr.gpu = create_bo.offset;
bo->gem_handle = create_bo.handle;
bo->flags = flags;
bo->dev = dev;
struct drm_panfrost_mmap_bo mmap_bo = { .handle = bo->gem_handle };
int ret;
- if (bo->cpu)
+ if (bo->ptr.cpu)
return;
ret = drmIoctl(bo->dev->fd, DRM_IOCTL_PANFROST_MMAP_BO, &mmap_bo);
assert(0);
}
- bo->cpu = os_mmap(NULL, bo->size, PROT_READ | PROT_WRITE, MAP_SHARED,
- bo->dev->fd, mmap_bo.offset);
- if (bo->cpu == MAP_FAILED) {
- fprintf(stderr, "mmap failed: %p %m\n", bo->cpu);
+ bo->ptr.cpu = os_mmap(NULL, bo->size, PROT_READ | PROT_WRITE, MAP_SHARED,
+ bo->dev->fd, mmap_bo.offset);
+ if (bo->ptr.cpu == MAP_FAILED) {
+ fprintf(stderr, "mmap failed: %p %m\n", bo->ptr.cpu);
assert(0);
}
}
static void
panfrost_bo_munmap(struct panfrost_bo *bo)
{
- if (!bo->cpu)
+ if (!bo->ptr.cpu)
return;
- if (os_munmap((void *) (uintptr_t)bo->cpu, bo->size)) {
+ if (os_munmap((void *) (uintptr_t)bo->ptr.cpu, bo->size)) {
perror("munmap");
abort();
}
- bo->cpu = NULL;
+ bo->ptr.cpu = NULL;
}
struct panfrost_bo *
if (dev->debug & (PAN_DBG_TRACE | PAN_DBG_SYNC)) {
if (flags & PAN_BO_INVISIBLE)
- pandecode_inject_mmap(bo->gpu, NULL, bo->size, NULL);
+ pandecode_inject_mmap(bo->ptr.gpu, NULL, bo->size, NULL);
else if (!(flags & PAN_BO_DELAY_MMAP))
- pandecode_inject_mmap(bo->gpu, bo->cpu, bo->size, NULL);
+ pandecode_inject_mmap(bo->ptr.gpu, bo->ptr.cpu, bo->size, NULL);
}
return bo;
assert(!ret);
bo->dev = dev;
- bo->gpu = (mali_ptr) get_bo_offset.offset;
+ bo->ptr.gpu = (mali_ptr) get_bo_offset.offset;
bo->size = lseek(fd, 0, SEEK_END);
bo->flags = PAN_BO_SHARED;
bo->gem_handle = gem_handle;
p_atomic_set(&bo->refcnt, 1);
else
panfrost_bo_reference(bo);
- assert(bo->cpu);
+ assert(bo->ptr.cpu);
}
pthread_mutex_unlock(&dev->bo_map_lock);
/* BO is accessed by the fragment job. */
#define PAN_BO_ACCESS_FRAGMENT (1 << 4)
+struct panfrost_ptr {
+ /* CPU address */
+ void *cpu;
+
+ /* GPU address */
+ mali_ptr gpu;
+};
+
struct panfrost_bo {
/* Must be first for casting */
struct list_head bucket_link;
struct panfrost_device *dev;
/* Mapping for the entire object (all levels) */
- uint8_t *cpu;
-
- /* GPU address for the object */
- mali_ptr gpu;
+ struct panfrost_ptr ptr;
/* Size of all entire trees */
size_t size;
}
}
-struct panfrost_transfer
+struct panfrost_ptr
panfrost_pool_alloc_aligned(struct pan_pool *pool, size_t sz, unsigned alignment)
{
assert(alignment == util_next_power_of_two(alignment));
pool->transient_offset = offset + sz;
- struct panfrost_transfer ret = {
- .cpu = bo->cpu + offset,
- .gpu = bo->gpu + offset,
+ struct panfrost_ptr ret = {
+ .cpu = bo->ptr.cpu + offset,
+ .gpu = bo->ptr.gpu + offset,
};
return ret;
mali_ptr
panfrost_pool_upload_aligned(struct pan_pool *pool, const void *data, size_t sz, unsigned alignment)
{
- struct panfrost_transfer transfer = panfrost_pool_alloc_aligned(pool, sz, alignment);
+ struct panfrost_ptr transfer = panfrost_pool_alloc_aligned(pool, sz, alignment);
memcpy(transfer.cpu, data, sz);
return transfer.gpu;
}
#include <stddef.h>
#include <midgard_pack.h>
+#include "pan_bo.h"
#include "util/u_dynarray.h"
/* Represents a fat pointer for GPU-mapped memory, returned from the transient
* allocator and not used for much else */
-struct panfrost_transfer {
- uint8_t *cpu;
- mali_ptr gpu;
-};
-
-struct panfrost_transfer
+struct panfrost_ptr
panfrost_pool_alloc_aligned(struct pan_pool *pool, size_t sz, unsigned alignment);
/* Default to self-alignment */
-static inline struct panfrost_transfer
+static inline struct panfrost_ptr
panfrost_pool_alloc(struct pan_pool *pool, size_t sz)
{
assert(sz == util_next_power_of_two(sz));
return panfrost_pool_alloc_aligned(pool, sz, sz);
}
-struct panfrost_transfer
+struct panfrost_ptr
panfrost_pool_alloc(struct pan_pool *pool, size_t sz);
mali_ptr
enum mali_job_type type,
bool barrier,
unsigned local_dep,
- const struct panfrost_transfer *job,
+ const struct panfrost_ptr *job,
bool inject)
{
bool is_bifrost = !!(pool->dev->quirks & IS_BIFROST);
/* Okay, we do. Let's generate it. We'll need the job's polygon list
* regardless of size. */
- struct panfrost_transfer transfer =
+ struct panfrost_ptr transfer =
panfrost_pool_alloc_aligned(pool,
MALI_WRITE_VALUE_JOB_LENGTH,
64);
enum mali_job_type type,
bool barrier,
unsigned local_dep,
- const struct panfrost_transfer *job,
+ const struct panfrost_ptr *job,
bool inject);
void panfrost_scoreboard_initialize_tiler(
assert(mali_format);
panfrost_emit_texture_payload(
- (mali_ptr *) payload->cpu,
+ payload->ptr.cpu,
desc,
mali_format,
dim,
cfg.swizzle = swizzle;
cfg.texel_ordering = panfrost_modifier_to_layout(modifier);
cfg.levels = last_level - first_level;
- cfg.surfaces = payload->gpu;
+ cfg.surfaces = payload->ptr.gpu;
/* We specify API-level LOD clamps in the sampler descriptor
* and use these clamps simply for bounds checking */
projects / platform / upstream / mesa.git / commitdiff