ARM: socfpga: add bindings doc for arria10 fpga manager
authorAlan Tull <atull@opensource.altera.com>
Tue, 12 Jul 2016 19:07:08 +0000 (14:07 -0500)
committerRob Herring <robh@kernel.org>
Fri, 18 Nov 2016 17:55:18 +0000 (11:55 -0600)
Add a device tree bindings document for the SoCFPGA Arria10
FPGA Manager driver.

Signed-off-by: Alan Tull <atull@opensource.altera.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-By: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/fpga/altera-socfpga-a10-fpga-mgr.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/fpga/altera-socfpga-a10-fpga-mgr.txt b/Documentation/devicetree/bindings/fpga/altera-socfpga-a10-fpga-mgr.txt
new file mode 100644 (file)
index 0000000..2fd8e7a
--- /dev/null
@@ -0,0 +1,19 @@
+Altera SOCFPGA Arria10 FPGA Manager
+
+Required properties:
+- compatible : should contain "altr,socfpga-a10-fpga-mgr"
+- reg        : base address and size for memory mapped io.
+               - The first index is for FPGA manager register access.
+               - The second index is for writing FPGA configuration data.
+- resets     : Phandle and reset specifier for the device's reset.
+- clocks     : Clocks used by the device.
+
+Example:
+
+       fpga_mgr: fpga-mgr@ffd03000 {
+               compatible = "altr,socfpga-a10-fpga-mgr";
+               reg = <0xffd03000 0x100
+                      0xffcfe400 0x20>;
+               clocks = <&l4_mp_clk>;
+               resets = <&rst FPGAMGR_RESET>;
+       };