--- /dev/null
+From f6a817e452d873efbdd6efab609932524ce24e3a Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 2 Apr 2014 11:21:56 -0300
+Subject: [media] v4l: vsp1: Remove unexisting rt clocks
+
+The VSP1 has no rt clock. Remove them from the driver.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
+(cherry picked from commit 4fc7878401f9980a5f1c24caae9b19adf61ea3f8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/media/platform/vsp1/vsp1.h | 1 -
+ drivers/media/platform/vsp1/vsp1_drv.c | 40 +++++-----------------------------
+ 2 files changed, 5 insertions(+), 36 deletions(-)
+
+diff --git a/drivers/media/platform/vsp1/vsp1.h b/drivers/media/platform/vsp1/vsp1.h
+index 0313210c6e9e..8626e9b956c2 100644
+--- a/drivers/media/platform/vsp1/vsp1.h
++++ b/drivers/media/platform/vsp1/vsp1.h
+@@ -45,7 +45,6 @@ struct vsp1_device {
+
+ void __iomem *mmio;
+ struct clk *clock;
+- struct clk *rt_clock;
+
+ struct mutex lock;
+ int ref_count;
+diff --git a/drivers/media/platform/vsp1/vsp1_drv.c b/drivers/media/platform/vsp1/vsp1_drv.c
+index 2f74f0e0ddf5..3cd2df5af90e 100644
+--- a/drivers/media/platform/vsp1/vsp1_drv.c
++++ b/drivers/media/platform/vsp1/vsp1_drv.c
+@@ -329,33 +329,6 @@ static int vsp1_device_init(struct vsp1_device *vsp1)
+ return 0;
+ }
+
+-static int vsp1_clocks_enable(struct vsp1_device *vsp1)
+-{
+- int ret;
+-
+- ret = clk_prepare_enable(vsp1->clock);
+- if (ret < 0)
+- return ret;
+-
+- if (IS_ERR(vsp1->rt_clock))
+- return 0;
+-
+- ret = clk_prepare_enable(vsp1->rt_clock);
+- if (ret < 0) {
+- clk_disable_unprepare(vsp1->clock);
+- return ret;
+- }
+-
+- return 0;
+-}
+-
+-static void vsp1_clocks_disable(struct vsp1_device *vsp1)
+-{
+- if (!IS_ERR(vsp1->rt_clock))
+- clk_disable_unprepare(vsp1->rt_clock);
+- clk_disable_unprepare(vsp1->clock);
+-}
+-
+ /*
+ * vsp1_device_get - Acquire the VSP1 device
+ *
+@@ -373,7 +346,7 @@ struct vsp1_device *vsp1_device_get(struct vsp1_device *vsp1)
+ if (vsp1->ref_count > 0)
+ goto done;
+
+- ret = vsp1_clocks_enable(vsp1);
++ ret = clk_prepare_enable(vsp1->clock);
+ if (ret < 0) {
+ __vsp1 = NULL;
+ goto done;
+@@ -381,7 +354,7 @@ struct vsp1_device *vsp1_device_get(struct vsp1_device *vsp1)
+
+ ret = vsp1_device_init(vsp1);
+ if (ret < 0) {
+- vsp1_clocks_disable(vsp1);
++ clk_disable_unprepare(vsp1->clock);
+ __vsp1 = NULL;
+ goto done;
+ }
+@@ -405,7 +378,7 @@ void vsp1_device_put(struct vsp1_device *vsp1)
+ mutex_lock(&vsp1->lock);
+
+ if (--vsp1->ref_count == 0)
+- vsp1_clocks_disable(vsp1);
++ clk_disable_unprepare(vsp1->clock);
+
+ mutex_unlock(&vsp1->lock);
+ }
+@@ -424,7 +397,7 @@ static int vsp1_pm_suspend(struct device *dev)
+ if (vsp1->ref_count == 0)
+ return 0;
+
+- vsp1_clocks_disable(vsp1);
++ clk_disable_unprepare(vsp1->clock);
+ return 0;
+ }
+
+@@ -437,7 +410,7 @@ static int vsp1_pm_resume(struct device *dev)
+ if (vsp1->ref_count)
+ return 0;
+
+- return vsp1_clocks_enable(vsp1);
++ return clk_prepare_enable(vsp1->clock);
+ }
+ #endif
+
+@@ -511,9 +484,6 @@ static int vsp1_probe(struct platform_device *pdev)
+ return PTR_ERR(vsp1->clock);
+ }
+
+- /* The RT clock is optional */
+- vsp1->rt_clock = devm_clk_get(&pdev->dev, "rt");
+-
+ irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ if (!irq) {
+ dev_err(&pdev->dev, "missing IRQ\n");
+--
+2.1.2
+
--- /dev/null
+From 5764dfb13907c155962e2909dd9b6a54e3c46c57 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 5 Mar 2014 15:49:19 -0300
+Subject: [media] v4l: vsp1: uds: Enable scaling of alpha layer
+
+Scaling of the alpha layer is disabled as both the RPF and WPF are
+configured to hardcode the alpha value to 255. This results in a 0 alpha
+value at the UDS output, making the image invisible when alpha blended
+in the BRU. Fix it by enabling scaling of the alpha layer.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
+(cherry picked from commit 6051f5f860671577b0759a0d054781b3e599d1cd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/media/platform/vsp1/vsp1_uds.c | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/drivers/media/platform/vsp1/vsp1_uds.c b/drivers/media/platform/vsp1/vsp1_uds.c
+index 622342ac7770..1b20f28cbc39 100644
+--- a/drivers/media/platform/vsp1/vsp1_uds.c
++++ b/drivers/media/platform/vsp1/vsp1_uds.c
+@@ -131,7 +131,7 @@ static int uds_s_stream(struct v4l2_subdev *subdev, int enable)
+ return 0;
+
+ /* Enable multi-tap scaling. */
+- vsp1_uds_write(uds, VI6_UDS_CTRL, VI6_UDS_CTRL_BC);
++ vsp1_uds_write(uds, VI6_UDS_CTRL, VI6_UDS_CTRL_AON | VI6_UDS_CTRL_BC);
+
+ vsp1_uds_write(uds, VI6_UDS_PASS_BWIDTH,
+ (uds_passband_width(uds->hscale)
+@@ -139,7 +139,6 @@ static int uds_s_stream(struct v4l2_subdev *subdev, int enable)
+ (uds_passband_width(uds->vscale)
+ << VI6_UDS_PASS_BWIDTH_V_SHIFT));
+
+-
+ /* Set the scaling ratios and the output size. */
+ format = &uds->entity.formats[UDS_PAD_SOURCE];
+
+--
+2.1.2
+
--- /dev/null
+From ffcbf3facd3daadde62c5972001f35f9e0465663 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 10 Jul 2013 18:37:27 -0300
+Subject: [media] v4l: vsp1: Support multi-input entities
+
+Rework the route configuration code to support entities with multiple
+sink pads.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
+(cherry picked from commit d9b45ed3d8b75e8cf38c8cd1563c29217eecba27)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/media/platform/vsp1/vsp1_entity.c | 54 +++++++++++++++---------------
+ drivers/media/platform/vsp1/vsp1_entity.h | 23 +++++++++++-
+ drivers/media/platform/vsp1/vsp1_hsit.c | 7 +--
+ drivers/media/platform/vsp1/vsp1_lif.c | 1
+ drivers/media/platform/vsp1/vsp1_lut.c | 1
+ drivers/media/platform/vsp1/vsp1_rpf.c | 1
+ drivers/media/platform/vsp1/vsp1_sru.c | 1
+ drivers/media/platform/vsp1/vsp1_uds.c | 1
+ drivers/media/platform/vsp1/vsp1_video.c | 7 ++-
+ drivers/media/platform/vsp1/vsp1_wpf.c | 1
+ 10 files changed, 54 insertions(+), 43 deletions(-)
+
+--- a/drivers/media/platform/vsp1/vsp1_entity.c
++++ b/drivers/media/platform/vsp1/vsp1_entity.c
+@@ -100,8 +100,10 @@ static int vsp1_entity_link_setup(struct
+ if (source->sink)
+ return -EBUSY;
+ source->sink = remote->entity;
++ source->sink_pad = remote->index;
+ } else {
+ source->sink = NULL;
++ source->sink_pad = 0;
+ }
+
+ return 0;
+@@ -116,42 +118,40 @@ const struct media_entity_operations vsp
+ * Initialization
+ */
+
++static const struct vsp1_route vsp1_routes[] = {
++ { VSP1_ENTITY_HSI, 0, VI6_DPR_HSI_ROUTE, { VI6_DPR_NODE_HSI, } },
++ { VSP1_ENTITY_HST, 0, VI6_DPR_HST_ROUTE, { VI6_DPR_NODE_HST, } },
++ { VSP1_ENTITY_LIF, 0, 0, { VI6_DPR_NODE_LIF, } },
++ { VSP1_ENTITY_LUT, 0, VI6_DPR_LUT_ROUTE, { VI6_DPR_NODE_LUT, } },
++ { VSP1_ENTITY_RPF, 0, VI6_DPR_RPF_ROUTE(0), { VI6_DPR_NODE_RPF(0), } },
++ { VSP1_ENTITY_RPF, 1, VI6_DPR_RPF_ROUTE(1), { VI6_DPR_NODE_RPF(1), } },
++ { VSP1_ENTITY_RPF, 2, VI6_DPR_RPF_ROUTE(2), { VI6_DPR_NODE_RPF(2), } },
++ { VSP1_ENTITY_RPF, 3, VI6_DPR_RPF_ROUTE(3), { VI6_DPR_NODE_RPF(3), } },
++ { VSP1_ENTITY_RPF, 4, VI6_DPR_RPF_ROUTE(4), { VI6_DPR_NODE_RPF(4), } },
++ { VSP1_ENTITY_SRU, 0, VI6_DPR_SRU_ROUTE, { VI6_DPR_NODE_SRU, } },
++ { VSP1_ENTITY_UDS, 0, VI6_DPR_UDS_ROUTE(0), { VI6_DPR_NODE_UDS(0), } },
++ { VSP1_ENTITY_UDS, 1, VI6_DPR_UDS_ROUTE(1), { VI6_DPR_NODE_UDS(1), } },
++ { VSP1_ENTITY_UDS, 2, VI6_DPR_UDS_ROUTE(2), { VI6_DPR_NODE_UDS(2), } },
++ { VSP1_ENTITY_WPF, 0, 0, { VI6_DPR_NODE_WPF(0), } },
++ { VSP1_ENTITY_WPF, 1, 0, { VI6_DPR_NODE_WPF(1), } },
++ { VSP1_ENTITY_WPF, 2, 0, { VI6_DPR_NODE_WPF(2), } },
++ { VSP1_ENTITY_WPF, 3, 0, { VI6_DPR_NODE_WPF(3), } },
++};
++
+ int vsp1_entity_init(struct vsp1_device *vsp1, struct vsp1_entity *entity,
+ unsigned int num_pads)
+ {
+- static const struct {
+- unsigned int id;
+- unsigned int reg;
+- } routes[] = {
+- { VI6_DPR_NODE_HSI, VI6_DPR_HSI_ROUTE },
+- { VI6_DPR_NODE_HST, VI6_DPR_HST_ROUTE },
+- { VI6_DPR_NODE_LIF, 0 },
+- { VI6_DPR_NODE_LUT, VI6_DPR_LUT_ROUTE },
+- { VI6_DPR_NODE_RPF(0), VI6_DPR_RPF_ROUTE(0) },
+- { VI6_DPR_NODE_RPF(1), VI6_DPR_RPF_ROUTE(1) },
+- { VI6_DPR_NODE_RPF(2), VI6_DPR_RPF_ROUTE(2) },
+- { VI6_DPR_NODE_RPF(3), VI6_DPR_RPF_ROUTE(3) },
+- { VI6_DPR_NODE_RPF(4), VI6_DPR_RPF_ROUTE(4) },
+- { VI6_DPR_NODE_SRU, VI6_DPR_SRU_ROUTE },
+- { VI6_DPR_NODE_UDS(0), VI6_DPR_UDS_ROUTE(0) },
+- { VI6_DPR_NODE_UDS(1), VI6_DPR_UDS_ROUTE(1) },
+- { VI6_DPR_NODE_UDS(2), VI6_DPR_UDS_ROUTE(2) },
+- { VI6_DPR_NODE_WPF(0), 0 },
+- { VI6_DPR_NODE_WPF(1), 0 },
+- { VI6_DPR_NODE_WPF(2), 0 },
+- { VI6_DPR_NODE_WPF(3), 0 },
+- };
+-
+ unsigned int i;
+
+- for (i = 0; i < ARRAY_SIZE(routes); ++i) {
+- if (routes[i].id == entity->id) {
+- entity->route = routes[i].reg;
++ for (i = 0; i < ARRAY_SIZE(vsp1_routes); ++i) {
++ if (vsp1_routes[i].type == entity->type &&
++ vsp1_routes[i].index == entity->index) {
++ entity->route = &vsp1_routes[i];
+ break;
+ }
+ }
+
+- if (i == ARRAY_SIZE(routes))
++ if (i == ARRAY_SIZE(vsp1_routes))
+ return -EINVAL;
+
+ entity->vsp1 = vsp1;
+--- a/drivers/media/platform/vsp1/vsp1_entity.h
++++ b/drivers/media/platform/vsp1/vsp1_entity.h
+@@ -30,13 +30,31 @@ enum vsp1_entity_type {
+ VSP1_ENTITY_WPF,
+ };
+
++/*
++ * struct vsp1_route - Entity routing configuration
++ * @type: Entity type this routing entry is associated with
++ * @index: Entity index this routing entry is associated with
++ * @reg: Output routing configuration register
++ * @inputs: Target node value for each input
++ *
++ * Each $vsp1_route entry describes routing configuration for the entity
++ * specified by the entry's @type and @index. @reg indicates the register that
++ * holds output routing configuration for the entity, and the @inputs array
++ * store the target node value for each input of the entity.
++ */
++struct vsp1_route {
++ enum vsp1_entity_type type;
++ unsigned int index;
++ unsigned int reg;
++ unsigned int inputs[4];
++};
++
+ struct vsp1_entity {
+ struct vsp1_device *vsp1;
+
+ enum vsp1_entity_type type;
+ unsigned int index;
+- unsigned int id;
+- unsigned int route;
++ const struct vsp1_route *route;
+
+ struct list_head list_dev;
+ struct list_head list_pipe;
+@@ -45,6 +63,7 @@ struct vsp1_entity {
+ unsigned int source_pad;
+
+ struct media_entity *sink;
++ unsigned int sink_pad;
+
+ struct v4l2_subdev subdev;
+ struct v4l2_mbus_framefmt *formats;
+--- a/drivers/media/platform/vsp1/vsp1_hsit.c
++++ b/drivers/media/platform/vsp1/vsp1_hsit.c
+@@ -193,13 +193,10 @@ struct vsp1_hsit *vsp1_hsit_create(struc
+
+ hsit->inverse = inverse;
+
+- if (inverse) {
++ if (inverse)
+ hsit->entity.type = VSP1_ENTITY_HSI;
+- hsit->entity.id = VI6_DPR_NODE_HSI;
+- } else {
++ else
+ hsit->entity.type = VSP1_ENTITY_HST;
+- hsit->entity.id = VI6_DPR_NODE_HST;
+- }
+
+ ret = vsp1_entity_init(vsp1, &hsit->entity, 2);
+ if (ret < 0)
+--- a/drivers/media/platform/vsp1/vsp1_lif.c
++++ b/drivers/media/platform/vsp1/vsp1_lif.c
+@@ -215,7 +215,6 @@ struct vsp1_lif *vsp1_lif_create(struct
+ return ERR_PTR(-ENOMEM);
+
+ lif->entity.type = VSP1_ENTITY_LIF;
+- lif->entity.id = VI6_DPR_NODE_LIF;
+
+ ret = vsp1_entity_init(vsp1, &lif->entity, 2);
+ if (ret < 0)
+--- a/drivers/media/platform/vsp1/vsp1_lut.c
++++ b/drivers/media/platform/vsp1/vsp1_lut.c
+@@ -229,7 +229,6 @@ struct vsp1_lut *vsp1_lut_create(struct
+ return ERR_PTR(-ENOMEM);
+
+ lut->entity.type = VSP1_ENTITY_LUT;
+- lut->entity.id = VI6_DPR_NODE_LUT;
+
+ ret = vsp1_entity_init(vsp1, &lut->entity, 2);
+ if (ret < 0)
+--- a/drivers/media/platform/vsp1/vsp1_rpf.c
++++ b/drivers/media/platform/vsp1/vsp1_rpf.c
+@@ -176,7 +176,6 @@ struct vsp1_rwpf *vsp1_rpf_create(struct
+
+ rpf->entity.type = VSP1_ENTITY_RPF;
+ rpf->entity.index = index;
+- rpf->entity.id = VI6_DPR_NODE_RPF(index);
+
+ ret = vsp1_entity_init(vsp1, &rpf->entity, 2);
+ if (ret < 0)
+--- a/drivers/media/platform/vsp1/vsp1_sru.c
++++ b/drivers/media/platform/vsp1/vsp1_sru.c
+@@ -327,7 +327,6 @@ struct vsp1_sru *vsp1_sru_create(struct
+ return ERR_PTR(-ENOMEM);
+
+ sru->entity.type = VSP1_ENTITY_SRU;
+- sru->entity.id = VI6_DPR_NODE_SRU;
+
+ ret = vsp1_entity_init(vsp1, &sru->entity, 2);
+ if (ret < 0)
+--- a/drivers/media/platform/vsp1/vsp1_uds.c
++++ b/drivers/media/platform/vsp1/vsp1_uds.c
+@@ -322,7 +322,6 @@ struct vsp1_uds *vsp1_uds_create(struct
+
+ uds->entity.type = VSP1_ENTITY_UDS;
+ uds->entity.index = index;
+- uds->entity.id = VI6_DPR_NODE_UDS(index);
+
+ ret = vsp1_entity_init(vsp1, &uds->entity, 2);
+ if (ret < 0)
+--- a/drivers/media/platform/vsp1/vsp1_video.c
++++ b/drivers/media/platform/vsp1/vsp1_video.c
+@@ -461,7 +461,7 @@ static int vsp1_pipeline_stop(struct vsp
+
+ list_for_each_entry(entity, &pipe->entities, list_pipe) {
+ if (entity->route)
+- vsp1_write(entity->vsp1, entity->route,
++ vsp1_write(entity->vsp1, entity->route->reg,
+ VI6_DPR_NODE_UNUSED);
+
+ v4l2_subdev_call(&entity->subdev, video, s_stream, 0);
+@@ -678,11 +678,12 @@ static void vsp1_entity_route_setup(stru
+ {
+ struct vsp1_entity *sink;
+
+- if (source->route == 0)
++ if (source->route->reg == 0)
+ return;
+
+ sink = container_of(source->sink, struct vsp1_entity, subdev.entity);
+- vsp1_write(source->vsp1, source->route, sink->id);
++ vsp1_write(source->vsp1, source->route->reg,
++ sink->route->inputs[source->sink_pad]);
+ }
+
+ static int vsp1_video_start_streaming(struct vb2_queue *vq, unsigned int count)
+--- a/drivers/media/platform/vsp1/vsp1_wpf.c
++++ b/drivers/media/platform/vsp1/vsp1_wpf.c
+@@ -181,7 +181,6 @@ struct vsp1_rwpf *vsp1_wpf_create(struct
+
+ wpf->entity.type = VSP1_ENTITY_WPF;
+ wpf->entity.index = index;
+- wpf->entity.id = VI6_DPR_NODE_WPF(index);
+
+ ret = vsp1_entity_init(vsp1, &wpf->entity, 2);
+ if (ret < 0)
--- /dev/null
+From e71ae3c9c4d461976d62989144f495cffca5daeb Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 10 Jul 2013 18:03:46 -0300
+Subject: [media] v4l: vsp1: Add BRU support
+
+The Blend ROP Unit performs blending and ROP operations for up to four
+sources.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
+(cherry picked from commit 629bb6d4b38fe62d36ab52ad22c3ab726f6ce6e8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/media/platform/vsp1/Makefile | 2 +-
+ drivers/media/platform/vsp1/vsp1.h | 2 +
+ drivers/media/platform/vsp1/vsp1_bru.c | 395 ++++++++++++++++++++++++++++++
+ drivers/media/platform/vsp1/vsp1_bru.h | 39 +++
+ drivers/media/platform/vsp1/vsp1_drv.c | 9 +
+ drivers/media/platform/vsp1/vsp1_entity.c | 3 +
+ drivers/media/platform/vsp1/vsp1_entity.h | 1 +
+ drivers/media/platform/vsp1/vsp1_regs.h | 98 ++++++++
+ drivers/media/platform/vsp1/vsp1_rpf.c | 6 +-
+ drivers/media/platform/vsp1/vsp1_rwpf.h | 4 +
+ drivers/media/platform/vsp1/vsp1_video.c | 19 ++
+ drivers/media/platform/vsp1/vsp1_video.h | 1 +
+ drivers/media/platform/vsp1/vsp1_wpf.c | 12 +-
+ 13 files changed, 586 insertions(+), 5 deletions(-)
+ create mode 100644 drivers/media/platform/vsp1/vsp1_bru.c
+ create mode 100644 drivers/media/platform/vsp1/vsp1_bru.h
+
+diff --git a/drivers/media/platform/vsp1/Makefile b/drivers/media/platform/vsp1/Makefile
+index 151cecd0ea25..6a93f928dfde 100644
+--- a/drivers/media/platform/vsp1/Makefile
++++ b/drivers/media/platform/vsp1/Makefile
+@@ -1,6 +1,6 @@
+ vsp1-y := vsp1_drv.o vsp1_entity.o vsp1_video.o
+ vsp1-y += vsp1_rpf.o vsp1_rwpf.o vsp1_wpf.o
+ vsp1-y += vsp1_hsit.o vsp1_lif.o vsp1_lut.o
+-vsp1-y += vsp1_sru.o vsp1_uds.o
++vsp1-y += vsp1_bru.o vsp1_sru.o vsp1_uds.o
+
+ obj-$(CONFIG_VIDEO_RENESAS_VSP1) += vsp1.o
+diff --git a/drivers/media/platform/vsp1/vsp1.h b/drivers/media/platform/vsp1/vsp1.h
+index 8626e9b956c2..6ca2cf20d545 100644
+--- a/drivers/media/platform/vsp1/vsp1.h
++++ b/drivers/media/platform/vsp1/vsp1.h
+@@ -28,6 +28,7 @@ struct clk;
+ struct device;
+
+ struct vsp1_platform_data;
++struct vsp1_bru;
+ struct vsp1_hsit;
+ struct vsp1_lif;
+ struct vsp1_lut;
+@@ -49,6 +50,7 @@ struct vsp1_device {
+ struct mutex lock;
+ int ref_count;
+
++ struct vsp1_bru *bru;
+ struct vsp1_hsit *hsi;
+ struct vsp1_hsit *hst;
+ struct vsp1_lif *lif;
+diff --git a/drivers/media/platform/vsp1/vsp1_bru.c b/drivers/media/platform/vsp1/vsp1_bru.c
+new file mode 100644
+index 000000000000..f80695480060
+--- /dev/null
++++ b/drivers/media/platform/vsp1/vsp1_bru.c
+@@ -0,0 +1,395 @@
++/*
++ * vsp1_bru.c -- R-Car VSP1 Blend ROP Unit
++ *
++ * Copyright (C) 2013 Renesas Corporation
++ *
++ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++#include <linux/device.h>
++#include <linux/gfp.h>
++
++#include <media/v4l2-subdev.h>
++
++#include "vsp1.h"
++#include "vsp1_bru.h"
++
++#define BRU_MIN_SIZE 4U
++#define BRU_MAX_SIZE 8190U
++
++/* -----------------------------------------------------------------------------
++ * Device Access
++ */
++
++static inline u32 vsp1_bru_read(struct vsp1_bru *bru, u32 reg)
++{
++ return vsp1_read(bru->entity.vsp1, reg);
++}
++
++static inline void vsp1_bru_write(struct vsp1_bru *bru, u32 reg, u32 data)
++{
++ vsp1_write(bru->entity.vsp1, reg, data);
++}
++
++/* -----------------------------------------------------------------------------
++ * V4L2 Subdevice Core Operations
++ */
++
++static bool bru_is_input_enabled(struct vsp1_bru *bru, unsigned int input)
++{
++ return media_entity_remote_pad(&bru->entity.pads[input]) != NULL;
++}
++
++static int bru_s_stream(struct v4l2_subdev *subdev, int enable)
++{
++ struct vsp1_bru *bru = to_bru(subdev);
++ struct v4l2_mbus_framefmt *format;
++ unsigned int i;
++
++ if (!enable)
++ return 0;
++
++ format = &bru->entity.formats[BRU_PAD_SOURCE];
++
++ /* The hardware is extremely flexible but we have no userspace API to
++ * expose all the parameters, nor is it clear whether we would have use
++ * cases for all the supported modes. Let's just harcode the parameters
++ * to sane default values for now.
++ */
++
++ /* Disable both color data normalization and dithering. */
++ vsp1_bru_write(bru, VI6_BRU_INCTRL, 0);
++
++ /* Set the background position to cover the whole output image and
++ * set its color to opaque black.
++ */
++ vsp1_bru_write(bru, VI6_BRU_VIRRPF_SIZE,
++ (format->width << VI6_BRU_VIRRPF_SIZE_HSIZE_SHIFT) |
++ (format->height << VI6_BRU_VIRRPF_SIZE_VSIZE_SHIFT));
++ vsp1_bru_write(bru, VI6_BRU_VIRRPF_LOC, 0);
++ vsp1_bru_write(bru, VI6_BRU_VIRRPF_COL,
++ 0xff << VI6_BRU_VIRRPF_COL_A_SHIFT);
++
++ /* Route BRU input 1 as SRC input to the ROP unit and configure the ROP
++ * unit with a NOP operation to make BRU input 1 available as the
++ * Blend/ROP unit B SRC input.
++ */
++ vsp1_bru_write(bru, VI6_BRU_ROP, VI6_BRU_ROP_DSTSEL_BRUIN(1) |
++ VI6_BRU_ROP_CROP(VI6_ROP_NOP) |
++ VI6_BRU_ROP_AROP(VI6_ROP_NOP));
++
++ for (i = 0; i < 4; ++i) {
++ u32 ctrl = 0;
++
++ /* Configure all Blend/ROP units corresponding to an enabled BRU
++ * input for alpha blending. Blend/ROP units corresponding to
++ * disabled BRU inputs are used in ROP NOP mode to ignore the
++ * SRC input.
++ */
++ if (bru_is_input_enabled(bru, i))
++ ctrl |= VI6_BRU_CTRL_RBC;
++ else
++ ctrl |= VI6_BRU_CTRL_CROP(VI6_ROP_NOP)
++ | VI6_BRU_CTRL_AROP(VI6_ROP_NOP);
++
++ /* Select the virtual RPF as the Blend/ROP unit A DST input to
++ * serve as a background color.
++ */
++ if (i == 0)
++ ctrl |= VI6_BRU_CTRL_DSTSEL_VRPF;
++
++ /* Route BRU inputs 0 to 3 as SRC inputs to Blend/ROP units A to
++ * D in that order. The Blend/ROP unit B SRC is hardwired to the
++ * ROP unit output, the corresponding register bits must be set
++ * to 0.
++ */
++ if (i != 1)
++ ctrl |= VI6_BRU_CTRL_SRCSEL_BRUIN(i);
++
++ vsp1_bru_write(bru, VI6_BRU_CTRL(i), ctrl);
++
++ /* Harcode the blending formula to
++ *
++ * DSTc = DSTc * (1 - SRCa) + SRCc * SRCa
++ * DSTa = DSTa * (1 - SRCa) + SRCa
++ */
++ vsp1_bru_write(bru, VI6_BRU_BLD(i),
++ VI6_BRU_BLD_CCMDX_255_SRC_A |
++ VI6_BRU_BLD_CCMDY_SRC_A |
++ VI6_BRU_BLD_ACMDX_255_SRC_A |
++ VI6_BRU_BLD_ACMDY_COEFY |
++ (0xff << VI6_BRU_BLD_COEFY_SHIFT));
++ }
++
++ return 0;
++}
++
++/* -----------------------------------------------------------------------------
++ * V4L2 Subdevice Pad Operations
++ */
++
++/*
++ * The BRU can't perform format conversion, all sink and source formats must be
++ * identical. We pick the format on the first sink pad (pad 0) and propagate it
++ * to all other pads.
++ */
++
++static int bru_enum_mbus_code(struct v4l2_subdev *subdev,
++ struct v4l2_subdev_fh *fh,
++ struct v4l2_subdev_mbus_code_enum *code)
++{
++ static const unsigned int codes[] = {
++ V4L2_MBUS_FMT_ARGB8888_1X32,
++ V4L2_MBUS_FMT_AYUV8_1X32,
++ };
++ struct v4l2_mbus_framefmt *format;
++
++ if (code->pad == BRU_PAD_SINK(0)) {
++ if (code->index >= ARRAY_SIZE(codes))
++ return -EINVAL;
++
++ code->code = codes[code->index];
++ } else {
++ if (code->index)
++ return -EINVAL;
++
++ format = v4l2_subdev_get_try_format(fh, BRU_PAD_SINK(0));
++ code->code = format->code;
++ }
++
++ return 0;
++}
++
++static int bru_enum_frame_size(struct v4l2_subdev *subdev,
++ struct v4l2_subdev_fh *fh,
++ struct v4l2_subdev_frame_size_enum *fse)
++{
++ if (fse->index)
++ return -EINVAL;
++
++ if (fse->code != V4L2_MBUS_FMT_ARGB8888_1X32 &&
++ fse->code != V4L2_MBUS_FMT_AYUV8_1X32)
++ return -EINVAL;
++
++ fse->min_width = BRU_MIN_SIZE;
++ fse->max_width = BRU_MAX_SIZE;
++ fse->min_height = BRU_MIN_SIZE;
++ fse->max_height = BRU_MAX_SIZE;
++
++ return 0;
++}
++
++static struct v4l2_rect *bru_get_compose(struct vsp1_bru *bru,
++ struct v4l2_subdev_fh *fh,
++ unsigned int pad, u32 which)
++{
++ switch (which) {
++ case V4L2_SUBDEV_FORMAT_TRY:
++ return v4l2_subdev_get_try_crop(fh, pad);
++ case V4L2_SUBDEV_FORMAT_ACTIVE:
++ return &bru->compose[pad];
++ default:
++ return NULL;
++ }
++}
++
++static int bru_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh,
++ struct v4l2_subdev_format *fmt)
++{
++ struct vsp1_bru *bru = to_bru(subdev);
++
++ fmt->format = *vsp1_entity_get_pad_format(&bru->entity, fh, fmt->pad,
++ fmt->which);
++
++ return 0;
++}
++
++static void bru_try_format(struct vsp1_bru *bru, struct v4l2_subdev_fh *fh,
++ unsigned int pad, struct v4l2_mbus_framefmt *fmt,
++ enum v4l2_subdev_format_whence which)
++{
++ struct v4l2_mbus_framefmt *format;
++
++ switch (pad) {
++ case BRU_PAD_SINK(0):
++ /* Default to YUV if the requested format is not supported. */
++ if (fmt->code != V4L2_MBUS_FMT_ARGB8888_1X32 &&
++ fmt->code != V4L2_MBUS_FMT_AYUV8_1X32)
++ fmt->code = V4L2_MBUS_FMT_AYUV8_1X32;
++ break;
++
++ default:
++ /* The BRU can't perform format conversion. */
++ format = vsp1_entity_get_pad_format(&bru->entity, fh,
++ BRU_PAD_SINK(0), which);
++ fmt->code = format->code;
++ break;
++ }
++
++ fmt->width = clamp(fmt->width, BRU_MIN_SIZE, BRU_MAX_SIZE);
++ fmt->height = clamp(fmt->height, BRU_MIN_SIZE, BRU_MAX_SIZE);
++ fmt->field = V4L2_FIELD_NONE;
++ fmt->colorspace = V4L2_COLORSPACE_SRGB;
++}
++
++static int bru_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh,
++ struct v4l2_subdev_format *fmt)
++{
++ struct vsp1_bru *bru = to_bru(subdev);
++ struct v4l2_mbus_framefmt *format;
++
++ bru_try_format(bru, fh, fmt->pad, &fmt->format, fmt->which);
++
++ format = vsp1_entity_get_pad_format(&bru->entity, fh, fmt->pad,
++ fmt->which);
++ *format = fmt->format;
++
++ /* Reset the compose rectangle */
++ if (fmt->pad != BRU_PAD_SOURCE) {
++ struct v4l2_rect *compose;
++
++ compose = bru_get_compose(bru, fh, fmt->pad, fmt->which);
++ compose->left = 0;
++ compose->top = 0;
++ compose->width = format->width;
++ compose->height = format->height;
++ }
++
++ /* Propagate the format code to all pads */
++ if (fmt->pad == BRU_PAD_SINK(0)) {
++ unsigned int i;
++
++ for (i = 0; i <= BRU_PAD_SOURCE; ++i) {
++ format = vsp1_entity_get_pad_format(&bru->entity, fh,
++ i, fmt->which);
++ format->code = fmt->format.code;
++ }
++ }
++
++ return 0;
++}
++
++static int bru_get_selection(struct v4l2_subdev *subdev,
++ struct v4l2_subdev_fh *fh,
++ struct v4l2_subdev_selection *sel)
++{
++ struct vsp1_bru *bru = to_bru(subdev);
++
++ if (sel->pad == BRU_PAD_SOURCE)
++ return -EINVAL;
++
++ switch (sel->target) {
++ case V4L2_SEL_TGT_COMPOSE_BOUNDS:
++ sel->r.left = 0;
++ sel->r.top = 0;
++ sel->r.width = BRU_MAX_SIZE;
++ sel->r.height = BRU_MAX_SIZE;
++ return 0;
++
++ case V4L2_SEL_TGT_COMPOSE:
++ sel->r = *bru_get_compose(bru, fh, sel->pad, sel->which);
++ return 0;
++
++ default:
++ return -EINVAL;
++ }
++}
++
++static int bru_set_selection(struct v4l2_subdev *subdev,
++ struct v4l2_subdev_fh *fh,
++ struct v4l2_subdev_selection *sel)
++{
++ struct vsp1_bru *bru = to_bru(subdev);
++ struct v4l2_mbus_framefmt *format;
++ struct v4l2_rect *compose;
++
++ if (sel->pad == BRU_PAD_SOURCE)
++ return -EINVAL;
++
++ if (sel->target != V4L2_SEL_TGT_COMPOSE)
++ return -EINVAL;
++
++ /* The compose rectangle top left corner must be inside the output
++ * frame.
++ */
++ format = vsp1_entity_get_pad_format(&bru->entity, fh, BRU_PAD_SOURCE,
++ sel->which);
++ sel->r.left = clamp_t(unsigned int, sel->r.left, 0, format->width - 1);
++ sel->r.top = clamp_t(unsigned int, sel->r.top, 0, format->height - 1);
++
++ /* Scaling isn't supported, the compose rectangle size must be identical
++ * to the sink format size.
++ */
++ format = vsp1_entity_get_pad_format(&bru->entity, fh, sel->pad,
++ sel->which);
++ sel->r.width = format->width;
++ sel->r.height = format->height;
++
++ compose = bru_get_compose(bru, fh, sel->pad, sel->which);
++ *compose = sel->r;
++
++ return 0;
++}
++
++/* -----------------------------------------------------------------------------
++ * V4L2 Subdevice Operations
++ */
++
++static struct v4l2_subdev_video_ops bru_video_ops = {
++ .s_stream = bru_s_stream,
++};
++
++static struct v4l2_subdev_pad_ops bru_pad_ops = {
++ .enum_mbus_code = bru_enum_mbus_code,
++ .enum_frame_size = bru_enum_frame_size,
++ .get_fmt = bru_get_format,
++ .set_fmt = bru_set_format,
++ .get_selection = bru_get_selection,
++ .set_selection = bru_set_selection,
++};
++
++static struct v4l2_subdev_ops bru_ops = {
++ .video = &bru_video_ops,
++ .pad = &bru_pad_ops,
++};
++
++/* -----------------------------------------------------------------------------
++ * Initialization and Cleanup
++ */
++
++struct vsp1_bru *vsp1_bru_create(struct vsp1_device *vsp1)
++{
++ struct v4l2_subdev *subdev;
++ struct vsp1_bru *bru;
++ int ret;
++
++ bru = devm_kzalloc(vsp1->dev, sizeof(*bru), GFP_KERNEL);
++ if (bru == NULL)
++ return ERR_PTR(-ENOMEM);
++
++ bru->entity.type = VSP1_ENTITY_BRU;
++
++ ret = vsp1_entity_init(vsp1, &bru->entity, 5);
++ if (ret < 0)
++ return ERR_PTR(ret);
++
++ /* Initialize the V4L2 subdev. */
++ subdev = &bru->entity.subdev;
++ v4l2_subdev_init(subdev, &bru_ops);
++
++ subdev->entity.ops = &vsp1_media_ops;
++ subdev->internal_ops = &vsp1_subdev_internal_ops;
++ snprintf(subdev->name, sizeof(subdev->name), "%s bru",
++ dev_name(vsp1->dev));
++ v4l2_set_subdevdata(subdev, bru);
++ subdev->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
++
++ vsp1_entity_init_formats(subdev, NULL);
++
++ return bru;
++}
+diff --git a/drivers/media/platform/vsp1/vsp1_bru.h b/drivers/media/platform/vsp1/vsp1_bru.h
+new file mode 100644
+index 000000000000..37062704dbf6
+--- /dev/null
++++ b/drivers/media/platform/vsp1/vsp1_bru.h
+@@ -0,0 +1,39 @@
++/*
++ * vsp1_bru.h -- R-Car VSP1 Blend ROP Unit
++ *
++ * Copyright (C) 2013 Renesas Corporation
++ *
++ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++#ifndef __VSP1_BRU_H__
++#define __VSP1_BRU_H__
++
++#include <media/media-entity.h>
++#include <media/v4l2-subdev.h>
++
++#include "vsp1_entity.h"
++
++struct vsp1_device;
++
++#define BRU_PAD_SINK(n) (n)
++#define BRU_PAD_SOURCE 4
++
++struct vsp1_bru {
++ struct vsp1_entity entity;
++
++ struct v4l2_rect compose[4];
++};
++
++static inline struct vsp1_bru *to_bru(struct v4l2_subdev *subdev)
++{
++ return container_of(subdev, struct vsp1_bru, entity.subdev);
++}
++
++struct vsp1_bru *vsp1_bru_create(struct vsp1_device *vsp1);
++
++#endif /* __VSP1_BRU_H__ */
+diff --git a/drivers/media/platform/vsp1/vsp1_drv.c b/drivers/media/platform/vsp1/vsp1_drv.c
+index 3cd2df5af90e..28e1de3270e0 100644
+--- a/drivers/media/platform/vsp1/vsp1_drv.c
++++ b/drivers/media/platform/vsp1/vsp1_drv.c
+@@ -20,6 +20,7 @@
+ #include <linux/videodev2.h>
+
+ #include "vsp1.h"
++#include "vsp1_bru.h"
+ #include "vsp1_hsit.h"
+ #include "vsp1_lif.h"
+ #include "vsp1_lut.h"
+@@ -155,6 +156,14 @@ static int vsp1_create_entities(struct vsp1_device *vsp1)
+ }
+
+ /* Instantiate all the entities. */
++ vsp1->bru = vsp1_bru_create(vsp1);
++ if (IS_ERR(vsp1->bru)) {
++ ret = PTR_ERR(vsp1->bru);
++ goto done;
++ }
++
++ list_add_tail(&vsp1->bru->entity.list_dev, &vsp1->entities);
++
+ vsp1->hsi = vsp1_hsit_create(vsp1, true);
+ if (IS_ERR(vsp1->hsi)) {
+ ret = PTR_ERR(vsp1->hsi);
+diff --git a/drivers/media/platform/vsp1/vsp1_entity.c b/drivers/media/platform/vsp1/vsp1_entity.c
+index a9022f858aa5..44167834285d 100644
+--- a/drivers/media/platform/vsp1/vsp1_entity.c
++++ b/drivers/media/platform/vsp1/vsp1_entity.c
+@@ -119,6 +119,9 @@ const struct media_entity_operations vsp1_media_ops = {
+ */
+
+ static const struct vsp1_route vsp1_routes[] = {
++ { VSP1_ENTITY_BRU, 0, VI6_DPR_BRU_ROUTE,
++ { VI6_DPR_NODE_BRU_IN(0), VI6_DPR_NODE_BRU_IN(1),
++ VI6_DPR_NODE_BRU_IN(2), VI6_DPR_NODE_BRU_IN(3), } },
+ { VSP1_ENTITY_HSI, 0, VI6_DPR_HSI_ROUTE, { VI6_DPR_NODE_HSI, } },
+ { VSP1_ENTITY_HST, 0, VI6_DPR_HST_ROUTE, { VI6_DPR_NODE_HST, } },
+ { VSP1_ENTITY_LIF, 0, 0, { VI6_DPR_NODE_LIF, } },
+diff --git a/drivers/media/platform/vsp1/vsp1_entity.h b/drivers/media/platform/vsp1/vsp1_entity.h
+index 3c6a5c831bcf..7afbd8a7ba66 100644
+--- a/drivers/media/platform/vsp1/vsp1_entity.h
++++ b/drivers/media/platform/vsp1/vsp1_entity.h
+@@ -20,6 +20,7 @@
+ struct vsp1_device;
+
+ enum vsp1_entity_type {
++ VSP1_ENTITY_BRU,
+ VSP1_ENTITY_HSI,
+ VSP1_ENTITY_HST,
+ VSP1_ENTITY_LIF,
+diff --git a/drivers/media/platform/vsp1/vsp1_regs.h b/drivers/media/platform/vsp1/vsp1_regs.h
+index 28650806c20f..3e74b44286f6 100644
+--- a/drivers/media/platform/vsp1/vsp1_regs.h
++++ b/drivers/media/platform/vsp1/vsp1_regs.h
+@@ -451,13 +451,111 @@
+ * BRU Control Registers
+ */
+
++#define VI6_ROP_NOP 0
++#define VI6_ROP_AND 1
++#define VI6_ROP_AND_REV 2
++#define VI6_ROP_COPY 3
++#define VI6_ROP_AND_INV 4
++#define VI6_ROP_CLEAR 5
++#define VI6_ROP_XOR 6
++#define VI6_ROP_OR 7
++#define VI6_ROP_NOR 8
++#define VI6_ROP_EQUIV 9
++#define VI6_ROP_INVERT 10
++#define VI6_ROP_OR_REV 11
++#define VI6_ROP_COPY_INV 12
++#define VI6_ROP_OR_INV 13
++#define VI6_ROP_NAND 14
++#define VI6_ROP_SET 15
++
+ #define VI6_BRU_INCTRL 0x2c00
++#define VI6_BRU_INCTRL_NRM (1 << 28)
++#define VI6_BRU_INCTRL_DnON (1 << (16 + (n)))
++#define VI6_BRU_INCTRL_DITHn_OFF (0 << ((n) * 4))
++#define VI6_BRU_INCTRL_DITHn_18BPP (1 << ((n) * 4))
++#define VI6_BRU_INCTRL_DITHn_16BPP (2 << ((n) * 4))
++#define VI6_BRU_INCTRL_DITHn_15BPP (3 << ((n) * 4))
++#define VI6_BRU_INCTRL_DITHn_12BPP (4 << ((n) * 4))
++#define VI6_BRU_INCTRL_DITHn_8BPP (5 << ((n) * 4))
++#define VI6_BRU_INCTRL_DITHn_MASK (7 << ((n) * 4))
++#define VI6_BRU_INCTRL_DITHn_SHIFT ((n) * 4)
++
+ #define VI6_BRU_VIRRPF_SIZE 0x2c04
++#define VI6_BRU_VIRRPF_SIZE_HSIZE_MASK (0x1fff << 16)
++#define VI6_BRU_VIRRPF_SIZE_HSIZE_SHIFT 16
++#define VI6_BRU_VIRRPF_SIZE_VSIZE_MASK (0x1fff << 0)
++#define VI6_BRU_VIRRPF_SIZE_VSIZE_SHIFT 0
++
+ #define VI6_BRU_VIRRPF_LOC 0x2c08
++#define VI6_BRU_VIRRPF_LOC_HCOORD_MASK (0x1fff << 16)
++#define VI6_BRU_VIRRPF_LOC_HCOORD_SHIFT 16
++#define VI6_BRU_VIRRPF_LOC_VCOORD_MASK (0x1fff << 0)
++#define VI6_BRU_VIRRPF_LOC_VCOORD_SHIFT 0
++
+ #define VI6_BRU_VIRRPF_COL 0x2c0c
++#define VI6_BRU_VIRRPF_COL_A_MASK (0xff << 24)
++#define VI6_BRU_VIRRPF_COL_A_SHIFT 24
++#define VI6_BRU_VIRRPF_COL_RCR_MASK (0xff << 16)
++#define VI6_BRU_VIRRPF_COL_RCR_SHIFT 16
++#define VI6_BRU_VIRRPF_COL_GY_MASK (0xff << 8)
++#define VI6_BRU_VIRRPF_COL_GY_SHIFT 8
++#define VI6_BRU_VIRRPF_COL_BCB_MASK (0xff << 0)
++#define VI6_BRU_VIRRPF_COL_BCB_SHIFT 0
++
+ #define VI6_BRU_CTRL(n) (0x2c10 + (n) * 8)
++#define VI6_BRU_CTRL_RBC (1 << 31)
++#define VI6_BRU_CTRL_DSTSEL_BRUIN(n) ((n) << 20)
++#define VI6_BRU_CTRL_DSTSEL_VRPF (4 << 20)
++#define VI6_BRU_CTRL_DSTSEL_MASK (7 << 20)
++#define VI6_BRU_CTRL_SRCSEL_BRUIN(n) ((n) << 16)
++#define VI6_BRU_CTRL_SRCSEL_VRPF (4 << 16)
++#define VI6_BRU_CTRL_SRCSEL_MASK (7 << 16)
++#define VI6_BRU_CTRL_CROP(rop) ((rop) << 4)
++#define VI6_BRU_CTRL_CROP_MASK (0xf << 4)
++#define VI6_BRU_CTRL_AROP(rop) ((rop) << 0)
++#define VI6_BRU_CTRL_AROP_MASK (0xf << 0)
++
+ #define VI6_BRU_BLD(n) (0x2c14 + (n) * 8)
++#define VI6_BRU_BLD_CBES (1 << 31)
++#define VI6_BRU_BLD_CCMDX_DST_A (0 << 28)
++#define VI6_BRU_BLD_CCMDX_255_DST_A (1 << 28)
++#define VI6_BRU_BLD_CCMDX_SRC_A (2 << 28)
++#define VI6_BRU_BLD_CCMDX_255_SRC_A (3 << 28)
++#define VI6_BRU_BLD_CCMDX_COEFX (4 << 28)
++#define VI6_BRU_BLD_CCMDX_MASK (7 << 28)
++#define VI6_BRU_BLD_CCMDY_DST_A (0 << 24)
++#define VI6_BRU_BLD_CCMDY_255_DST_A (1 << 24)
++#define VI6_BRU_BLD_CCMDY_SRC_A (2 << 24)
++#define VI6_BRU_BLD_CCMDY_255_SRC_A (3 << 24)
++#define VI6_BRU_BLD_CCMDY_COEFY (4 << 24)
++#define VI6_BRU_BLD_CCMDY_MASK (7 << 24)
++#define VI6_BRU_BLD_CCMDY_SHIFT 24
++#define VI6_BRU_BLD_ABES (1 << 23)
++#define VI6_BRU_BLD_ACMDX_DST_A (0 << 20)
++#define VI6_BRU_BLD_ACMDX_255_DST_A (1 << 20)
++#define VI6_BRU_BLD_ACMDX_SRC_A (2 << 20)
++#define VI6_BRU_BLD_ACMDX_255_SRC_A (3 << 20)
++#define VI6_BRU_BLD_ACMDX_COEFX (4 << 20)
++#define VI6_BRU_BLD_ACMDX_MASK (7 << 20)
++#define VI6_BRU_BLD_ACMDY_DST_A (0 << 16)
++#define VI6_BRU_BLD_ACMDY_255_DST_A (1 << 16)
++#define VI6_BRU_BLD_ACMDY_SRC_A (2 << 16)
++#define VI6_BRU_BLD_ACMDY_255_SRC_A (3 << 16)
++#define VI6_BRU_BLD_ACMDY_COEFY (4 << 16)
++#define VI6_BRU_BLD_ACMDY_MASK (7 << 16)
++#define VI6_BRU_BLD_COEFX_MASK (0xff << 8)
++#define VI6_BRU_BLD_COEFX_SHIFT 8
++#define VI6_BRU_BLD_COEFY_MASK (0xff << 0)
++#define VI6_BRU_BLD_COEFY_SHIFT 0
++
+ #define VI6_BRU_ROP 0x2c30
++#define VI6_BRU_ROP_DSTSEL_BRUIN(n) ((n) << 20)
++#define VI6_BRU_ROP_DSTSEL_VRPF (4 << 20)
++#define VI6_BRU_ROP_DSTSEL_MASK (7 << 20)
++#define VI6_BRU_ROP_CROP(rop) ((rop) << 4)
++#define VI6_BRU_ROP_CROP_MASK (0xf << 4)
++#define VI6_BRU_ROP_AROP(rop) ((rop) << 0)
++#define VI6_BRU_ROP_AROP_MASK (0xf << 0)
+
+ /* -----------------------------------------------------------------------------
+ * HGO Control Registers
+diff --git a/drivers/media/platform/vsp1/vsp1_rpf.c b/drivers/media/platform/vsp1/vsp1_rpf.c
+index 42444568b9fd..c3d98642a4aa 100644
+--- a/drivers/media/platform/vsp1/vsp1_rpf.c
++++ b/drivers/media/platform/vsp1/vsp1_rpf.c
+@@ -96,8 +96,10 @@ static int rpf_s_stream(struct v4l2_subdev *subdev, int enable)
+ vsp1_rpf_write(rpf, VI6_RPF_INFMT, infmt);
+ vsp1_rpf_write(rpf, VI6_RPF_DSWAP, fmtinfo->swap);
+
+- /* Output location. Composing isn't supported yet. */
+- vsp1_rpf_write(rpf, VI6_RPF_LOC, 0);
++ /* Output location */
++ vsp1_rpf_write(rpf, VI6_RPF_LOC,
++ (rpf->location.left << VI6_RPF_LOC_HCOORD_SHIFT) |
++ (rpf->location.top << VI6_RPF_LOC_VCOORD_SHIFT));
+
+ /* Disable alpha, mask and color key. Set the alpha channel to a fixed
+ * value of 255.
+diff --git a/drivers/media/platform/vsp1/vsp1_rwpf.h b/drivers/media/platform/vsp1/vsp1_rwpf.h
+index 5c5ee81bbeae..b4fb65e58770 100644
+--- a/drivers/media/platform/vsp1/vsp1_rwpf.h
++++ b/drivers/media/platform/vsp1/vsp1_rwpf.h
+@@ -30,6 +30,10 @@ struct vsp1_rwpf {
+ unsigned int max_width;
+ unsigned int max_height;
+
++ struct {
++ unsigned int left;
++ unsigned int top;
++ } location;
+ struct v4l2_rect crop;
+
+ unsigned int offsets[2];
+diff --git a/drivers/media/platform/vsp1/vsp1_video.c b/drivers/media/platform/vsp1/vsp1_video.c
+index f0406ccc329b..2fc67b6161f1 100644
+--- a/drivers/media/platform/vsp1/vsp1_video.c
++++ b/drivers/media/platform/vsp1/vsp1_video.c
+@@ -28,6 +28,7 @@
+ #include <media/videobuf2-dma-contig.h>
+
+ #include "vsp1.h"
++#include "vsp1_bru.h"
+ #include "vsp1_entity.h"
+ #include "vsp1_rwpf.h"
+ #include "vsp1_video.h"
+@@ -280,6 +281,9 @@ static int vsp1_pipeline_validate_branch(struct vsp1_rwpf *input,
+ struct media_pad *pad;
+ bool uds_found = false;
+
++ input->location.left = 0;
++ input->location.top = 0;
++
+ pad = media_entity_remote_pad(&input->entity.pads[RWPF_PAD_SOURCE]);
+
+ while (1) {
+@@ -292,6 +296,17 @@ static int vsp1_pipeline_validate_branch(struct vsp1_rwpf *input,
+
+ entity = to_vsp1_entity(media_entity_to_v4l2_subdev(pad->entity));
+
++ /* A BRU is present in the pipeline, store the compose rectangle
++ * location in the input RPF for use when configuring the RPF.
++ */
++ if (entity->type == VSP1_ENTITY_BRU) {
++ struct vsp1_bru *bru = to_bru(&entity->subdev);
++ struct v4l2_rect *rect = &bru->compose[pad->index];
++
++ input->location.left = rect->left;
++ input->location.top = rect->top;
++ }
++
+ /* We've reached the WPF, we're done. */
+ if (entity->type == VSP1_ENTITY_WPF)
+ break;
+@@ -363,6 +378,8 @@ static int vsp1_pipeline_validate(struct vsp1_pipeline *pipe,
+ rwpf->video.pipe_index = 0;
+ } else if (e->type == VSP1_ENTITY_LIF) {
+ pipe->lif = e;
++ } else if (e->type == VSP1_ENTITY_BRU) {
++ pipe->bru = e;
+ }
+ }
+
+@@ -392,6 +409,7 @@ error:
+ pipe->num_video = 0;
+ pipe->num_inputs = 0;
+ pipe->output = NULL;
++ pipe->bru = NULL;
+ pipe->lif = NULL;
+ return ret;
+ }
+@@ -430,6 +448,7 @@ static void vsp1_pipeline_cleanup(struct vsp1_pipeline *pipe)
+ pipe->num_video = 0;
+ pipe->num_inputs = 0;
+ pipe->output = NULL;
++ pipe->bru = NULL;
+ pipe->lif = NULL;
+ }
+
+diff --git a/drivers/media/platform/vsp1/vsp1_video.h b/drivers/media/platform/vsp1/vsp1_video.h
+index 53e4b3745940..c04d48fa2999 100644
+--- a/drivers/media/platform/vsp1/vsp1_video.h
++++ b/drivers/media/platform/vsp1/vsp1_video.h
+@@ -75,6 +75,7 @@ struct vsp1_pipeline {
+ unsigned int num_inputs;
+ struct vsp1_rwpf *inputs[VPS1_MAX_RPF];
+ struct vsp1_rwpf *output;
++ struct vsp1_entity *bru;
+ struct vsp1_entity *lif;
+
+ struct list_head entities;
+diff --git a/drivers/media/platform/vsp1/vsp1_wpf.c b/drivers/media/platform/vsp1/vsp1_wpf.c
+index ef9f88ead319..1294340dcb36 100644
+--- a/drivers/media/platform/vsp1/vsp1_wpf.c
++++ b/drivers/media/platform/vsp1/vsp1_wpf.c
+@@ -58,13 +58,21 @@ static int wpf_s_stream(struct v4l2_subdev *subdev, int enable)
+ return 0;
+ }
+
+- /* Sources */
++ /* Sources. If the pipeline has a single input configure it as the
++ * master layer. Otherwise configure all inputs as sub-layers and
++ * select the virtual RPF as the master layer.
++ */
+ for (i = 0; i < pipe->num_inputs; ++i) {
+ struct vsp1_rwpf *input = pipe->inputs[i];
+
+- srcrpf |= VI6_WPF_SRCRPF_RPF_ACT_MST(input->entity.index);
++ srcrpf |= pipe->num_inputs == 1
++ ? VI6_WPF_SRCRPF_RPF_ACT_MST(input->entity.index)
++ : VI6_WPF_SRCRPF_RPF_ACT_SUB(input->entity.index);
+ }
+
++ if (pipe->num_inputs > 1)
++ srcrpf |= VI6_WPF_SRCRPF_VIRACT_MST;
++
+ vsp1_wpf_write(wpf, VI6_WPF_SRCRPF, srcrpf);
+
+ /* Destination stride. */
+--
+2.1.2
+
--- /dev/null
+From 18a5c404492e15b72d158c41a3ac397bbc894291 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 8 Apr 2014 13:40:13 -0300
+Subject: [media] v4l: vsp1: Add DT support
+
+Implement support for the VSP1 DT bindings in the VSP1 driver. The
+driver now first retrieves platform data either from the platform data
+pointer or by reading the device tree node, and then validates it
+regardless of the platform data source.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
+Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
+(cherry picked from commit 0b82fb95d9edf7bdfc6486c67a42dbf9b1e97765)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/media/platform/vsp1/vsp1_drv.c | 52 ++++++++++++++++++++++++++++------
+ 1 file changed, 44 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/media/platform/vsp1/vsp1_drv.c b/drivers/media/platform/vsp1/vsp1_drv.c
+index 28e1de3270e0..c69ee0657f75 100644
+--- a/drivers/media/platform/vsp1/vsp1_drv.c
++++ b/drivers/media/platform/vsp1/vsp1_drv.c
+@@ -16,6 +16,7 @@
+ #include <linux/device.h>
+ #include <linux/interrupt.h>
+ #include <linux/module.h>
++#include <linux/of.h>
+ #include <linux/platform_device.h>
+ #include <linux/videodev2.h>
+
+@@ -431,34 +432,59 @@ static const struct dev_pm_ops vsp1_pm_ops = {
+ * Platform Driver
+ */
+
+-static struct vsp1_platform_data *
+-vsp1_get_platform_data(struct platform_device *pdev)
++static int vsp1_validate_platform_data(struct platform_device *pdev,
++ struct vsp1_platform_data *pdata)
+ {
+- struct vsp1_platform_data *pdata = pdev->dev.platform_data;
+-
+ if (pdata == NULL) {
+ dev_err(&pdev->dev, "missing platform data\n");
+- return NULL;
++ return -EINVAL;
+ }
+
+ if (pdata->rpf_count <= 0 || pdata->rpf_count > VPS1_MAX_RPF) {
+ dev_err(&pdev->dev, "invalid number of RPF (%u)\n",
+ pdata->rpf_count);
+- return NULL;
++ return -EINVAL;
+ }
+
+ if (pdata->uds_count <= 0 || pdata->uds_count > VPS1_MAX_UDS) {
+ dev_err(&pdev->dev, "invalid number of UDS (%u)\n",
+ pdata->uds_count);
+- return NULL;
++ return -EINVAL;
+ }
+
+ if (pdata->wpf_count <= 0 || pdata->wpf_count > VPS1_MAX_WPF) {
+ dev_err(&pdev->dev, "invalid number of WPF (%u)\n",
+ pdata->wpf_count);
+- return NULL;
++ return -EINVAL;
+ }
+
++ return 0;
++}
++
++static struct vsp1_platform_data *
++vsp1_get_platform_data(struct platform_device *pdev)
++{
++ struct device_node *np = pdev->dev.of_node;
++ struct vsp1_platform_data *pdata;
++
++ if (!IS_ENABLED(CONFIG_OF) || np == NULL)
++ return pdev->dev.platform_data;
++
++ pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
++ if (pdata == NULL)
++ return NULL;
++
++ if (of_property_read_bool(np, "renesas,has-lif"))
++ pdata->features |= VSP1_HAS_LIF;
++ if (of_property_read_bool(np, "renesas,has-lut"))
++ pdata->features |= VSP1_HAS_LUT;
++ if (of_property_read_bool(np, "renesas,has-sru"))
++ pdata->features |= VSP1_HAS_SRU;
++
++ of_property_read_u32(np, "renesas,#rpf", &pdata->rpf_count);
++ of_property_read_u32(np, "renesas,#uds", &pdata->uds_count);
++ of_property_read_u32(np, "renesas,#wpf", &pdata->wpf_count);
++
+ return pdata;
+ }
+
+@@ -481,6 +507,10 @@ static int vsp1_probe(struct platform_device *pdev)
+ if (vsp1->pdata == NULL)
+ return -ENODEV;
+
++ ret = vsp1_validate_platform_data(pdev, vsp1->pdata);
++ if (ret < 0)
++ return ret;
++
+ /* I/O, IRQ and clock resources */
+ io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ vsp1->mmio = devm_ioremap_resource(&pdev->dev, io);
+@@ -527,6 +557,11 @@ static int vsp1_remove(struct platform_device *pdev)
+ return 0;
+ }
+
++static const struct of_device_id vsp1_of_match[] = {
++ { .compatible = "renesas,vsp1" },
++ { },
++};
++
+ static struct platform_driver vsp1_platform_driver = {
+ .probe = vsp1_probe,
+ .remove = vsp1_remove,
+@@ -534,6 +569,7 @@ static struct platform_driver vsp1_platform_driver = {
+ .owner = THIS_MODULE,
+ .name = "vsp1",
+ .pm = &vsp1_pm_ops,
++ .of_match_table = vsp1_of_match,
+ },
+ };
+
+--
+2.1.2
+
--- /dev/null
+From 2c9c3999ea911454aaa6b99613172a7860239d2e Mon Sep 17 00:00:00 2001
+From: Sascha Hauer <s.hauer@pengutronix.de>
+Date: Wed, 14 May 2014 09:37:34 +0200
+Subject: ASoC: ak4642: Add ALC controls
+
+ALC and ALC Zero crossing detection has been enabled unconditionally.
+Add controls for this.
+
+Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 370f83a156e42d6c6997c65dbceb4bb7118e915a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/codecs/ak4642.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/sound/soc/codecs/ak4642.c b/sound/soc/codecs/ak4642.c
+index 1f646c6e90c6..98f4b62a4148 100644
+--- a/sound/soc/codecs/ak4642.c
++++ b/sound/soc/codecs/ak4642.c
+@@ -148,6 +148,8 @@ static const struct snd_kcontrol_new ak4642_snd_controls[] = {
+
+ SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
+ 0, 0xFF, 1, out_tlv),
++ SOC_SINGLE("ALC Capture Switch", ALC_CTL1, 5, 1, 0),
++ SOC_SINGLE("ALC Capture ZC Switch", ALC_CTL1, 4, 1, 1),
+ };
+
+ static const struct snd_kcontrol_new ak4642_headphone_control =
+--
+2.1.2
+
--- /dev/null
+From c8a860998f7888a49200cc3c6b958667fd2a373d Mon Sep 17 00:00:00 2001
+From: Sascha Hauer <s.hauer@pengutronix.de>
+Date: Wed, 14 May 2014 09:37:35 +0200
+Subject: ASoC: ak4642: Add driver data and driver private struct
+
+Currently unused, this is done to let the driver distinguish between
+the different supported codec types in later patches.
+
+Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit d815c703cedbc783ae09ac65eef5c4aa18e06128)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/codecs/ak4642.c | 51 +++++++++++++++++++++++++++++++++++++----------
+ 1 file changed, 40 insertions(+), 11 deletions(-)
+
+diff --git a/sound/soc/codecs/ak4642.c b/sound/soc/codecs/ak4642.c
+index 98f4b62a4148..0a7f03f3d934 100644
+--- a/sound/soc/codecs/ak4642.c
++++ b/sound/soc/codecs/ak4642.c
+@@ -134,6 +134,14 @@
+ /* MD_CTL4 */
+ #define DACH (1 << 0)
+
++struct ak4642_drvdata {
++ const struct regmap_config *regmap_config;
++};
++
++struct ak4642_priv {
++ const struct ak4642_drvdata *drvdata;
++};
++
+ /*
+ * Playback Volume (table 39)
+ *
+@@ -515,30 +523,51 @@ static const struct regmap_config ak4648_regmap = {
+ .num_reg_defaults = ARRAY_SIZE(ak4648_reg),
+ };
+
++static const struct ak4642_drvdata ak4642_drvdata = {
++ .regmap_config = &ak4642_regmap,
++};
++
++static const struct ak4642_drvdata ak4643_drvdata = {
++ .regmap_config = &ak4642_regmap,
++};
++
++static const struct ak4642_drvdata ak4648_drvdata = {
++ .regmap_config = &ak4648_regmap,
++};
++
+ static struct of_device_id ak4642_of_match[];
+ static int ak4642_i2c_probe(struct i2c_client *i2c,
+ const struct i2c_device_id *id)
+ {
+ struct device_node *np = i2c->dev.of_node;
+- const struct regmap_config *regmap_config = NULL;
++ const struct ak4642_drvdata *drvdata = NULL;
+ struct regmap *regmap;
++ struct ak4642_priv *priv;
+
+ if (np) {
+ const struct of_device_id *of_id;
+
+ of_id = of_match_device(ak4642_of_match, &i2c->dev);
+ if (of_id)
+- regmap_config = of_id->data;
++ drvdata = of_id->data;
+ } else {
+- regmap_config = (const struct regmap_config *)id->driver_data;
++ drvdata = (const struct ak4642_drvdata *)id->driver_data;
+ }
+
+- if (!regmap_config) {
++ if (!drvdata) {
+ dev_err(&i2c->dev, "Unknown device type\n");
+ return -EINVAL;
+ }
+
+- regmap = devm_regmap_init_i2c(i2c, regmap_config);
++ priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL);
++ if (!priv)
++ return -ENOMEM;
++
++ priv->drvdata = drvdata;
++
++ i2c_set_clientdata(i2c, priv);
++
++ regmap = devm_regmap_init_i2c(i2c, drvdata->regmap_config);
+ if (IS_ERR(regmap))
+ return PTR_ERR(regmap);
+
+@@ -553,17 +582,17 @@ static int ak4642_i2c_remove(struct i2c_client *client)
+ }
+
+ static struct of_device_id ak4642_of_match[] = {
+- { .compatible = "asahi-kasei,ak4642", .data = &ak4642_regmap},
+- { .compatible = "asahi-kasei,ak4643", .data = &ak4642_regmap},
+- { .compatible = "asahi-kasei,ak4648", .data = &ak4648_regmap},
++ { .compatible = "asahi-kasei,ak4642", .data = &ak4642_drvdata},
++ { .compatible = "asahi-kasei,ak4643", .data = &ak4643_drvdata},
++ { .compatible = "asahi-kasei,ak4648", .data = &ak4648_drvdata},
+ {},
+ };
+ MODULE_DEVICE_TABLE(of, ak4642_of_match);
+
+ static const struct i2c_device_id ak4642_i2c_id[] = {
+- { "ak4642", (kernel_ulong_t)&ak4642_regmap },
+- { "ak4643", (kernel_ulong_t)&ak4642_regmap },
+- { "ak4648", (kernel_ulong_t)&ak4648_regmap },
++ { "ak4642", (kernel_ulong_t)&ak4642_drvdata },
++ { "ak4643", (kernel_ulong_t)&ak4643_drvdata },
++ { "ak4648", (kernel_ulong_t)&ak4648_drvdata },
+ { }
+ };
+ MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id);
+--
+2.1.2
+
--- /dev/null
+From b59cf288964616a0e8013172473d3a2cdda8958f Mon Sep 17 00:00:00 2001
+From: Sascha Hauer <s.hauer@pengutronix.de>
+Date: Wed, 14 May 2014 09:37:36 +0200
+Subject: ASoC: ak4642: Add support for extended sysclk frequencies of the
+ ak4648
+
+Additionally to the ak4642 pll frequencies the ak4648 also supports 13MHz,
+19.2MHz and 26MHz. This adds support for these frequencies.
+
+Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 5cd15e29a45a18b9a744af61a7d90f26f730eb97)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/codecs/ak4642.c | 20 ++++++++++++++++++++
+ 1 file changed, 20 insertions(+)
+
+diff --git a/sound/soc/codecs/ak4642.c b/sound/soc/codecs/ak4642.c
+index 0a7f03f3d934..86242f770c10 100644
+--- a/sound/soc/codecs/ak4642.c
++++ b/sound/soc/codecs/ak4642.c
+@@ -136,6 +136,7 @@
+
+ struct ak4642_drvdata {
+ const struct regmap_config *regmap_config;
++ int extended_frequencies;
+ };
+
+ struct ak4642_priv {
+@@ -297,7 +298,9 @@ static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
+ int clk_id, unsigned int freq, int dir)
+ {
+ struct snd_soc_codec *codec = codec_dai->codec;
++ struct ak4642_priv *priv = snd_soc_codec_get_drvdata(codec);
+ u8 pll;
++ int extended_freq = 0;
+
+ switch (freq) {
+ case 11289600:
+@@ -318,9 +321,25 @@ static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
+ case 27000000:
+ pll = PLL3 | PLL2 | PLL0;
+ break;
++ case 19200000:
++ pll = PLL3;
++ extended_freq = 1;
++ break;
++ case 13000000:
++ pll = PLL3 | PLL2 | PLL1;
++ extended_freq = 1;
++ break;
++ case 26000000:
++ pll = PLL3 | PLL2 | PLL1 | PLL0;
++ extended_freq = 1;
++ break;
+ default:
+ return -EINVAL;
+ }
++
++ if (extended_freq && !priv->drvdata->extended_frequencies)
++ return -EINVAL;
++
+ snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll);
+
+ return 0;
+@@ -533,6 +552,7 @@ static const struct ak4642_drvdata ak4643_drvdata = {
+
+ static const struct ak4642_drvdata ak4648_drvdata = {
+ .regmap_config = &ak4648_regmap,
++ .extended_frequencies = 1,
+ };
+
+ static struct of_device_id ak4642_of_match[];
+--
+2.1.2
+
--- /dev/null
+From c7869cde4cf2b48fedb4dfb563e86db32737200b Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 14 Apr 2014 20:33:12 +0200
+Subject: gpio: rcar: Add optional functional clock to bindings
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Cc: linux-gpio@vger.kernel.org
+Cc: devicetree@vger.kernel.org
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit 370a4516e401af82dcd89c34a99346c5869a879c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
+index f61cef74a212..941a26aa4322 100644
+--- a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
++++ b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
+@@ -21,6 +21,12 @@ Required Properties:
+ GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
+ - gpio-ranges: Range of pins managed by the GPIO controller.
+
++Optional properties:
++
++ - clocks: Must contain a reference to the functional clock. The property is
++ mandatory if the hardware implements a controllable functional clock for
++ the GPIO instance.
++
+ Please refer to gpio.txt in this directory for details of gpio-ranges property
+ and the common GPIO bindings used by client devices.
+
+--
+2.1.2
+
--- /dev/null
+From da03df0b06dc5315d4eac0afbe1a65d3a0d908af Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 14 Apr 2014 20:33:13 +0200
+Subject: gpio: rcar: Add minimal runtime PM support
+
+This is just enough to automatically enable the functional clock, if
+present. Clock management during suspend/resume is still to be added.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Cc: linux-gpio@vger.kernel.org
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit df0c6c80232f2ad442dcf79a3a420eb8ac624e42)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpio/gpio-rcar.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
+index 03c91482432c..bfcfeeefcf78 100644
+--- a/drivers/gpio/gpio-rcar.c
++++ b/drivers/gpio/gpio-rcar.c
+@@ -26,6 +26,7 @@
+ #include <linux/pinctrl/consumer.h>
+ #include <linux/platform_data/gpio-rcar.h>
+ #include <linux/platform_device.h>
++#include <linux/pm_runtime.h>
+ #include <linux/spinlock.h>
+ #include <linux/slab.h>
+
+@@ -377,6 +378,9 @@ static int gpio_rcar_probe(struct platform_device *pdev)
+
+ platform_set_drvdata(pdev, p);
+
++ pm_runtime_enable(dev);
++ pm_runtime_get_sync(dev);
++
+ io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+
+@@ -460,6 +464,8 @@ static int gpio_rcar_probe(struct platform_device *pdev)
+ err1:
+ irq_domain_remove(p->irq_domain);
+ err0:
++ pm_runtime_put(dev);
++ pm_runtime_disable(dev);
+ return ret;
+ }
+
+@@ -473,6 +479,8 @@ static int gpio_rcar_remove(struct platform_device *pdev)
+ return ret;
+
+ irq_domain_remove(p->irq_domain);
++ pm_runtime_put(&pdev->dev);
++ pm_runtime_disable(&pdev->dev);
+ return 0;
+ }
+
+--
+2.1.2
+
--- /dev/null
+From 0d3e65dc3dace2e12282c7b335ccaea1b104a2fb Mon Sep 17 00:00:00 2001
+From: Jingoo Han <jg1.han@samsung.com>
+Date: Tue, 29 Apr 2014 17:40:59 +0900
+Subject: gpio: rcar: remove unnecessary OOM messages
+
+The site-specific OOM messages are unnecessary, because they
+duplicate the MM subsystem generic OOM message.
+
+Signed-off-by: Jingoo Han <jg1.han@samsung.com>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit 41893360afb9d49181ce9714286de61ee50c48b0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpio/gpio-rcar.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
+index bfcfeeefcf78..0c9f803fc1ac 100644
+--- a/drivers/gpio/gpio-rcar.c
++++ b/drivers/gpio/gpio-rcar.c
+@@ -363,7 +363,6 @@ static int gpio_rcar_probe(struct platform_device *pdev)
+
+ p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL);
+ if (!p) {
+- dev_err(dev, "failed to allocate driver data\n");
+ ret = -ENOMEM;
+ goto err0;
+ }
+--
+2.1.2
+
--- /dev/null
+From 5826a55e01cfb9e434a7049d83e63fe9151bbe92 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa@sang-engineering.com>
+Date: Tue, 27 May 2014 14:06:28 +0200
+Subject: i2c: rcar: add compatibles for additional SoC
+
+Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 819a39510ed8e7f473309d071ede0fb02f0d0e79)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/i2c/i2c-rcar.txt | 3 +++
+ drivers/i2c/busses/i2c-rcar.c | 3 +++
+ 2 files changed, 6 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/i2c/i2c-rcar.txt b/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
+index dd8b2dd1edeb..16b3e07aa98f 100644
+--- a/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
++++ b/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
+@@ -7,6 +7,9 @@ Required properties:
+ "renesas,i2c-r8a7779"
+ "renesas,i2c-r8a7790"
+ "renesas,i2c-r8a7791"
++ "renesas,i2c-r8a7792"
++ "renesas,i2c-r8a7793"
++ "renesas,i2c-r8a7794"
+ - reg: physical base address of the controller and length of memory mapped
+ region.
+ - interrupts: interrupt specifier.
+diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
+index 06d47aafbb79..467eafa050a6 100644
+--- a/drivers/i2c/busses/i2c-rcar.c
++++ b/drivers/i2c/busses/i2c-rcar.c
+@@ -646,6 +646,9 @@ static const struct of_device_id rcar_i2c_dt_ids[] = {
+ { .compatible = "renesas,i2c-r8a7779", .data = (void *)I2C_RCAR_GEN1 },
+ { .compatible = "renesas,i2c-r8a7790", .data = (void *)I2C_RCAR_GEN2 },
+ { .compatible = "renesas,i2c-r8a7791", .data = (void *)I2C_RCAR_GEN2 },
++ { .compatible = "renesas,i2c-r8a7792", .data = (void *)I2C_RCAR_GEN2 },
++ { .compatible = "renesas,i2c-r8a7793", .data = (void *)I2C_RCAR_GEN2 },
++ { .compatible = "renesas,i2c-r8a7794", .data = (void *)I2C_RCAR_GEN2 },
+ {},
+ };
+ MODULE_DEVICE_TABLE(of, rcar_i2c_dt_ids);
+--
+2.1.2
+
--- /dev/null
+From 3771444f2e34a54f0e0553f354cde2c577a34802 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 28 May 2014 09:44:36 +0200
+Subject: i2c: rcar: not everything needs to be a function
+
+Very basic operations, just called once, can also go to the caller.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 1c176d534f81c350f67dd4dc6d0330a45c11c9a6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-rcar.c | 14 +++-----------
+ 1 file changed, 3 insertions(+), 11 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
+index 467eafa050a6..de4e6b81fa9b 100644
+--- a/drivers/i2c/busses/i2c-rcar.c
++++ b/drivers/i2c/busses/i2c-rcar.c
+@@ -312,18 +312,9 @@ scgd_find:
+ return 0;
+ }
+
+-static void rcar_i2c_clock_start(struct rcar_i2c_priv *priv)
+-{
+- rcar_i2c_write(priv, ICCCR, priv->icccr);
+-}
+-
+ /*
+ * status functions
+ */
+-static u32 rcar_i2c_status_get(struct rcar_i2c_priv *priv)
+-{
+- return rcar_i2c_read(priv, ICMSR);
+-}
+
+ #define rcar_i2c_status_clear(priv) rcar_i2c_status_bit_clear(priv, 0xffffffff)
+ static void rcar_i2c_status_bit_clear(struct rcar_i2c_priv *priv, u32 bit)
+@@ -480,7 +471,7 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
+ /*-------------- spin lock -----------------*/
+ spin_lock(&priv->lock);
+
+- msr = rcar_i2c_status_get(priv);
++ msr = rcar_i2c_read(priv, ICMSR);
+
+ /*
+ * Arbitration lost
+@@ -554,7 +545,8 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
+ spin_lock_irqsave(&priv->lock, flags);
+
+ rcar_i2c_init(priv);
+- rcar_i2c_clock_start(priv);
++ /* start clock */
++ rcar_i2c_write(priv, ICCCR, priv->icccr);
+
+ spin_unlock_irqrestore(&priv->lock, flags);
+ /*-------------- spin unlock -----------------*/
+--
+2.1.2
+
--- /dev/null
+From b541465e40de38fb7b55b878d2005792eed5e03e Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 28 May 2014 09:44:37 +0200
+Subject: i2c: rcar: no need to store irq number
+
+We use devm, so irq number is only needed during probe.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 93e953d3785fa6fc7fda4b64bd38d003f1dcb1d2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-rcar.c | 9 ++++-----
+ 1 file changed, 4 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
+index de4e6b81fa9b..5a3e8a12e8d5 100644
+--- a/drivers/i2c/busses/i2c-rcar.c
++++ b/drivers/i2c/busses/i2c-rcar.c
+@@ -116,7 +116,6 @@ struct rcar_i2c_priv {
+ wait_queue_head_t wait;
+
+ int pos;
+- int irq;
+ u32 icccr;
+ u32 flags;
+ enum rcar_i2c_type devtype;
+@@ -653,7 +652,7 @@ static int rcar_i2c_probe(struct platform_device *pdev)
+ struct resource *res;
+ struct device *dev = &pdev->dev;
+ u32 bus_speed;
+- int ret;
++ int irq, ret;
+
+ priv = devm_kzalloc(dev, sizeof(struct rcar_i2c_priv), GFP_KERNEL);
+ if (!priv) {
+@@ -687,7 +686,7 @@ static int rcar_i2c_probe(struct platform_device *pdev)
+ if (IS_ERR(priv->io))
+ return PTR_ERR(priv->io);
+
+- priv->irq = platform_get_irq(pdev, 0);
++ irq = platform_get_irq(pdev, 0);
+ init_waitqueue_head(&priv->wait);
+ spin_lock_init(&priv->lock);
+
+@@ -701,10 +700,10 @@ static int rcar_i2c_probe(struct platform_device *pdev)
+ i2c_set_adapdata(adap, priv);
+ strlcpy(adap->name, pdev->name, sizeof(adap->name));
+
+- ret = devm_request_irq(dev, priv->irq, rcar_i2c_irq, 0,
++ ret = devm_request_irq(dev, irq, rcar_i2c_irq, 0,
+ dev_name(dev), priv);
+ if (ret < 0) {
+- dev_err(dev, "cannot get irq %d\n", priv->irq);
++ dev_err(dev, "cannot get irq %d\n", irq);
+ return ret;
+ }
+
+--
+2.1.2
+
--- /dev/null
+From de5144eb1222e058544ac3c589d52d5a59a7dccf Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 28 May 2014 09:44:38 +0200
+Subject: i2c: rcar: refactor bus state machine
+
+Remove the seperate functions and use designated constants. As readable
+but less overhead.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 4f443a8a611d0cb3c40e95e0d90e9d7e4740eda6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-rcar.c | 37 ++++++++++---------------------------
+ 1 file changed, 10 insertions(+), 27 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
+index 5a3e8a12e8d5..eadaca0ef4be 100644
+--- a/drivers/i2c/busses/i2c-rcar.c
++++ b/drivers/i2c/busses/i2c-rcar.c
+@@ -79,11 +79,9 @@
+ #define MATE (1 << 0) /* address sent irq en */
+
+
+-enum {
+- RCAR_BUS_PHASE_ADDR,
+- RCAR_BUS_PHASE_DATA,
+- RCAR_BUS_PHASE_STOP,
+-};
++#define RCAR_BUS_PHASE_START (MDBS | MIE | ESG)
++#define RCAR_BUS_PHASE_DATA (MDBS | MIE)
++#define RCAR_BUS_PHASE_STOP (MDBS | MIE | FSB)
+
+ enum {
+ RCAR_IRQ_CLOSE,
+@@ -204,21 +202,6 @@ static int rcar_i2c_bus_barrier(struct rcar_i2c_priv *priv)
+ return -EBUSY;
+ }
+
+-static void rcar_i2c_bus_phase(struct rcar_i2c_priv *priv, int phase)
+-{
+- switch (phase) {
+- case RCAR_BUS_PHASE_ADDR:
+- rcar_i2c_write(priv, ICMCR, MDBS | MIE | ESG);
+- break;
+- case RCAR_BUS_PHASE_DATA:
+- rcar_i2c_write(priv, ICMCR, MDBS | MIE);
+- break;
+- case RCAR_BUS_PHASE_STOP:
+- rcar_i2c_write(priv, ICMCR, MDBS | MIE | FSB);
+- break;
+- }
+-}
+-
+ /*
+ * clock function
+ */
+@@ -328,7 +311,7 @@ static int rcar_i2c_recv(struct rcar_i2c_priv *priv)
+ {
+ rcar_i2c_set_addr(priv, 1);
+ rcar_i2c_status_clear(priv);
+- rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_ADDR);
++ rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
+ rcar_i2c_irq_mask(priv, RCAR_IRQ_OPEN_FOR_RECV);
+
+ return 0;
+@@ -347,7 +330,7 @@ static int rcar_i2c_send(struct rcar_i2c_priv *priv)
+
+ rcar_i2c_set_addr(priv, 0);
+ rcar_i2c_status_clear(priv);
+- rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_ADDR);
++ rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
+ rcar_i2c_irq_mask(priv, RCAR_IRQ_OPEN_FOR_SEND);
+
+ return 0;
+@@ -376,7 +359,7 @@ static int rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr)
+ * goto data phase.
+ */
+ if (msr & MAT)
+- rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_DATA);
++ rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);
+
+ if (priv->pos < msg->len) {
+ /*
+@@ -404,7 +387,7 @@ static int rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr)
+ * prepare stop condition here.
+ * ID_DONE will be set on STOP irq.
+ */
+- rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_STOP);
++ rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
+ else
+ /*
+ * If current msg is _NOT_ last msg,
+@@ -452,9 +435,9 @@ static int rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr)
+ * otherwise, go to DATA phase.
+ */
+ if (priv->pos + 1 >= msg->len)
+- rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_STOP);
++ rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
+ else
+- rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_DATA);
++ rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);
+
+ rcar_i2c_recv_restart(priv);
+
+@@ -502,7 +485,7 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
+ dev_dbg(dev, "Nack\n");
+
+ /* go to stop phase */
+- rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_STOP);
++ rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
+ rcar_i2c_irq_mask(priv, RCAR_IRQ_OPEN_FOR_STOP);
+ rcar_i2c_flags_set(priv, ID_NACK);
+ goto out;
+--
+2.1.2
+
--- /dev/null
+From 758e38d755885621b5112507904b90ba183410b4 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 28 May 2014 09:44:39 +0200
+Subject: i2c: rcar: refactor irq state machine
+
+Remove the seperate functions and use designated constants. As readable
+but less overhead. Actually, this is even more readable since the old
+function used a mix of "=" and "|=".
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit f2382249b27d1589a1ae495a1df84d890982a3e1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-rcar.c | 39 +++++++--------------------------------
+ 1 file changed, 7 insertions(+), 32 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
+index eadaca0ef4be..f2cbb8a7d0ba 100644
+--- a/drivers/i2c/busses/i2c-rcar.c
++++ b/drivers/i2c/busses/i2c-rcar.c
+@@ -83,12 +83,9 @@
+ #define RCAR_BUS_PHASE_DATA (MDBS | MIE)
+ #define RCAR_BUS_PHASE_STOP (MDBS | MIE | FSB)
+
+-enum {
+- RCAR_IRQ_CLOSE,
+- RCAR_IRQ_OPEN_FOR_SEND,
+- RCAR_IRQ_OPEN_FOR_RECV,
+- RCAR_IRQ_OPEN_FOR_STOP,
+-};
++#define RCAR_IRQ_SEND (MNRE | MALE | MSTE | MATE | MDEE)
++#define RCAR_IRQ_RECV (MNRE | MALE | MSTE | MATE | MDRE)
++#define RCAR_IRQ_STOP (MSTE)
+
+ /*
+ * flags
+@@ -158,28 +155,6 @@ static void rcar_i2c_init(struct rcar_i2c_priv *priv)
+ rcar_i2c_write(priv, ICMAR, 0);
+ }
+
+-static void rcar_i2c_irq_mask(struct rcar_i2c_priv *priv, int open)
+-{
+- u32 val = MNRE | MALE | MSTE | MATE; /* default */
+-
+- switch (open) {
+- case RCAR_IRQ_OPEN_FOR_SEND:
+- val |= MDEE; /* default + send */
+- break;
+- case RCAR_IRQ_OPEN_FOR_RECV:
+- val |= MDRE; /* default + read */
+- break;
+- case RCAR_IRQ_OPEN_FOR_STOP:
+- val = MSTE; /* stop irq only */
+- break;
+- case RCAR_IRQ_CLOSE:
+- default:
+- val = 0; /* all close */
+- break;
+- }
+- rcar_i2c_write(priv, ICMIER, val);
+-}
+-
+ static void rcar_i2c_set_addr(struct rcar_i2c_priv *priv, u32 recv)
+ {
+ rcar_i2c_write(priv, ICMAR, (priv->msg->addr << 1) | recv);
+@@ -312,7 +287,7 @@ static int rcar_i2c_recv(struct rcar_i2c_priv *priv)
+ rcar_i2c_set_addr(priv, 1);
+ rcar_i2c_status_clear(priv);
+ rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
+- rcar_i2c_irq_mask(priv, RCAR_IRQ_OPEN_FOR_RECV);
++ rcar_i2c_write(priv, ICMIER, RCAR_IRQ_RECV);
+
+ return 0;
+ }
+@@ -331,7 +306,7 @@ static int rcar_i2c_send(struct rcar_i2c_priv *priv)
+ rcar_i2c_set_addr(priv, 0);
+ rcar_i2c_status_clear(priv);
+ rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
+- rcar_i2c_irq_mask(priv, RCAR_IRQ_OPEN_FOR_SEND);
++ rcar_i2c_write(priv, ICMIER, RCAR_IRQ_SEND);
+
+ return 0;
+ }
+@@ -486,7 +461,7 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
+
+ /* go to stop phase */
+ rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
+- rcar_i2c_irq_mask(priv, RCAR_IRQ_OPEN_FOR_STOP);
++ rcar_i2c_write(priv, ICMIER, RCAR_IRQ_STOP);
+ rcar_i2c_flags_set(priv, ID_NACK);
+ goto out;
+ }
+@@ -501,7 +476,7 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
+
+ out:
+ if (rcar_i2c_flags_has(priv, ID_DONE)) {
+- rcar_i2c_irq_mask(priv, RCAR_IRQ_CLOSE);
++ rcar_i2c_write(priv, ICMIER, 0);
+ rcar_i2c_status_clear(priv);
+ wake_up(&priv->wait);
+ }
+--
+2.1.2
+
--- /dev/null
+From 32cac77a5363a46de87b4fe680bfc7f554305253 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 28 May 2014 09:44:40 +0200
+Subject: i2c: rcar: check bus free before first message
+
+We should always check if the bus is free, independently if it is a read
+or write. It should be done before the first message, though. After
+that, we ourselves keep the bus busy. Remove a 'ret' assignment which
+only silenced a build warning.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 3f7de22eb28244fc79bc744d9f51d018da343962)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-rcar.c | 16 +++++-----------
+ 1 file changed, 5 insertions(+), 11 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
+index f2cbb8a7d0ba..828b519146fc 100644
+--- a/drivers/i2c/busses/i2c-rcar.c
++++ b/drivers/i2c/busses/i2c-rcar.c
+@@ -294,15 +294,6 @@ static int rcar_i2c_recv(struct rcar_i2c_priv *priv)
+
+ static int rcar_i2c_send(struct rcar_i2c_priv *priv)
+ {
+- int ret;
+-
+- /*
+- * It should check bus status when send case
+- */
+- ret = rcar_i2c_bus_barrier(priv);
+- if (ret < 0)
+- return ret;
+-
+ rcar_i2c_set_addr(priv, 0);
+ rcar_i2c_status_clear(priv);
+ rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
+@@ -508,7 +499,10 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
+ spin_unlock_irqrestore(&priv->lock, flags);
+ /*-------------- spin unlock -----------------*/
+
+- ret = -EINVAL;
++ ret = rcar_i2c_bus_barrier(priv);
++ if (ret < 0)
++ goto out;
++
+ for (i = 0; i < num; i++) {
+ /* This HW can't send STOP after address phase */
+ if (msgs[i].len == 0) {
+@@ -569,7 +563,7 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
+
+ ret = i + 1; /* The number of transfer */
+ }
+-
++out:
+ pm_runtime_put(dev);
+
+ if (ret < 0 && ret != -ENXIO)
+--
+2.1.2
+
--- /dev/null
+From dbb68fcef20160b3af7a2b9df01742abdb492a64 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 28 May 2014 09:44:41 +0200
+Subject: i2c: rcar: refactor setting up msg
+
+Setting up a read or write message is similar enough to be done in one
+function. Also, move a helper function into the new function since it is
+only used here.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 386babf8e2f7dd483f88e5c0c4c761346b750185)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-rcar.c | 30 +++++-------------------------
+ 1 file changed, 5 insertions(+), 25 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
+index 828b519146fc..42005ccd3254 100644
+--- a/drivers/i2c/busses/i2c-rcar.c
++++ b/drivers/i2c/busses/i2c-rcar.c
+@@ -155,11 +155,6 @@ static void rcar_i2c_init(struct rcar_i2c_priv *priv)
+ rcar_i2c_write(priv, ICMAR, 0);
+ }
+
+-static void rcar_i2c_set_addr(struct rcar_i2c_priv *priv, u32 recv)
+-{
+- rcar_i2c_write(priv, ICMAR, (priv->msg->addr << 1) | recv);
+-}
+-
+ /*
+ * bus control functions
+ */
+@@ -279,25 +274,14 @@ static void rcar_i2c_status_bit_clear(struct rcar_i2c_priv *priv, u32 bit)
+ rcar_i2c_write(priv, ICMSR, ~bit);
+ }
+
+-/*
+- * recv/send functions
+- */
+-static int rcar_i2c_recv(struct rcar_i2c_priv *priv)
++static int rcar_i2c_prepare_msg(struct rcar_i2c_priv *priv)
+ {
+- rcar_i2c_set_addr(priv, 1);
+- rcar_i2c_status_clear(priv);
+- rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
+- rcar_i2c_write(priv, ICMIER, RCAR_IRQ_RECV);
+-
+- return 0;
+-}
++ int read = !!rcar_i2c_is_recv(priv);
+
+-static int rcar_i2c_send(struct rcar_i2c_priv *priv)
+-{
+- rcar_i2c_set_addr(priv, 0);
++ rcar_i2c_write(priv, ICMAR, (priv->msg->addr << 1) | read);
+ rcar_i2c_status_clear(priv);
+ rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
+- rcar_i2c_write(priv, ICMIER, RCAR_IRQ_SEND);
++ rcar_i2c_write(priv, ICMIER, read ? RCAR_IRQ_RECV : RCAR_IRQ_SEND);
+
+ return 0;
+ }
+@@ -520,11 +504,7 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
+ if (priv->msg == &msgs[num - 1])
+ rcar_i2c_flags_set(priv, ID_LAST_MSG);
+
+- /* start send/recv */
+- if (rcar_i2c_is_recv(priv))
+- ret = rcar_i2c_recv(priv);
+- else
+- ret = rcar_i2c_send(priv);
++ ret = rcar_i2c_prepare_msg(priv);
+
+ spin_unlock_irqrestore(&priv->lock, flags);
+ /*-------------- spin unlock -----------------*/
+--
+2.1.2
+
--- /dev/null
+From 84eb2cc33e9c05bfd8c26f3411345123a64d15d8 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 28 May 2014 09:44:42 +0200
+Subject: i2c: rcar: refactor status bit handling
+
+The old macros made it harder to see what was actually happening.
+Replace them with something more readable.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 3c95de674496e08d3b373f85af4aa59c23ddb8d6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-rcar.c | 20 +++++++-------------
+ 1 file changed, 7 insertions(+), 13 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
+index 42005ccd3254..07256a6b56fa 100644
+--- a/drivers/i2c/busses/i2c-rcar.c
++++ b/drivers/i2c/busses/i2c-rcar.c
+@@ -87,6 +87,9 @@
+ #define RCAR_IRQ_RECV (MNRE | MALE | MSTE | MATE | MDRE)
+ #define RCAR_IRQ_STOP (MSTE)
+
++#define RCAR_IRQ_ACK_SEND (~(MAT | MDE))
++#define RCAR_IRQ_ACK_RECV (~(MAT | MDR))
++
+ /*
+ * flags
+ */
+@@ -268,27 +271,18 @@ scgd_find:
+ * status functions
+ */
+
+-#define rcar_i2c_status_clear(priv) rcar_i2c_status_bit_clear(priv, 0xffffffff)
+-static void rcar_i2c_status_bit_clear(struct rcar_i2c_priv *priv, u32 bit)
+-{
+- rcar_i2c_write(priv, ICMSR, ~bit);
+-}
+-
+ static int rcar_i2c_prepare_msg(struct rcar_i2c_priv *priv)
+ {
+ int read = !!rcar_i2c_is_recv(priv);
+
+ rcar_i2c_write(priv, ICMAR, (priv->msg->addr << 1) | read);
+- rcar_i2c_status_clear(priv);
++ rcar_i2c_write(priv, ICMSR, 0);
+ rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
+ rcar_i2c_write(priv, ICMIER, read ? RCAR_IRQ_RECV : RCAR_IRQ_SEND);
+
+ return 0;
+ }
+
+-#define rcar_i2c_send_restart(priv) rcar_i2c_status_bit_clear(priv, (MAT | MDE))
+-#define rcar_i2c_recv_restart(priv) rcar_i2c_status_bit_clear(priv, (MAT | MDR))
+-
+ /*
+ * interrupt functions
+ */
+@@ -348,7 +342,7 @@ static int rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr)
+ return ID_DONE;
+ }
+
+- rcar_i2c_send_restart(priv);
++ rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_SEND);
+
+ return 0;
+ }
+@@ -389,7 +383,7 @@ static int rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr)
+ else
+ rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);
+
+- rcar_i2c_recv_restart(priv);
++ rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_RECV);
+
+ return 0;
+ }
+@@ -452,7 +446,7 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
+ out:
+ if (rcar_i2c_flags_has(priv, ID_DONE)) {
+ rcar_i2c_write(priv, ICMIER, 0);
+- rcar_i2c_status_clear(priv);
++ rcar_i2c_write(priv, ICMSR, 0);
+ wake_up(&priv->wait);
+ }
+
+--
+2.1.2
+
--- /dev/null
+From 03f6eebe8b33fdcc4af861372e4b801e612e9391 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 28 May 2014 09:44:43 +0200
+Subject: i2c: rcar: remove spinlock
+
+The i2c core has per-adapter locks, so no need to protect again.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 150b8be3cda54412ad7b54f5392b513b25c0aaa7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-rcar.c | 22 ----------------------
+ 1 file changed, 22 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
+index 07256a6b56fa..e16784124a41 100644
+--- a/drivers/i2c/busses/i2c-rcar.c
++++ b/drivers/i2c/busses/i2c-rcar.c
+@@ -36,7 +36,6 @@
+ #include <linux/platform_device.h>
+ #include <linux/pm_runtime.h>
+ #include <linux/slab.h>
+-#include <linux/spinlock.h>
+
+ /* register offsets */
+ #define ICSCR 0x00 /* slave ctrl */
+@@ -110,7 +109,6 @@ struct rcar_i2c_priv {
+ struct i2c_msg *msg;
+ struct clk *clk;
+
+- spinlock_t lock;
+ wait_queue_head_t wait;
+
+ int pos;
+@@ -394,9 +392,6 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
+ struct device *dev = rcar_i2c_priv_to_dev(priv);
+ u32 msr;
+
+- /*-------------- spin lock -----------------*/
+- spin_lock(&priv->lock);
+-
+ msr = rcar_i2c_read(priv, ICMSR);
+
+ /*
+@@ -450,9 +445,6 @@ out:
+ wake_up(&priv->wait);
+ }
+
+- spin_unlock(&priv->lock);
+- /*-------------- spin unlock -----------------*/
+-
+ return IRQ_HANDLED;
+ }
+
+@@ -462,21 +454,14 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
+ {
+ struct rcar_i2c_priv *priv = i2c_get_adapdata(adap);
+ struct device *dev = rcar_i2c_priv_to_dev(priv);
+- unsigned long flags;
+ int i, ret, timeout;
+
+ pm_runtime_get_sync(dev);
+
+- /*-------------- spin lock -----------------*/
+- spin_lock_irqsave(&priv->lock, flags);
+-
+ rcar_i2c_init(priv);
+ /* start clock */
+ rcar_i2c_write(priv, ICCCR, priv->icccr);
+
+- spin_unlock_irqrestore(&priv->lock, flags);
+- /*-------------- spin unlock -----------------*/
+-
+ ret = rcar_i2c_bus_barrier(priv);
+ if (ret < 0)
+ goto out;
+@@ -488,9 +473,6 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
+ break;
+ }
+
+- /*-------------- spin lock -----------------*/
+- spin_lock_irqsave(&priv->lock, flags);
+-
+ /* init each data */
+ priv->msg = &msgs[i];
+ priv->pos = 0;
+@@ -500,9 +482,6 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
+
+ ret = rcar_i2c_prepare_msg(priv);
+
+- spin_unlock_irqrestore(&priv->lock, flags);
+- /*-------------- spin unlock -----------------*/
+-
+ if (ret < 0)
+ break;
+
+@@ -614,7 +593,6 @@ static int rcar_i2c_probe(struct platform_device *pdev)
+
+ irq = platform_get_irq(pdev, 0);
+ init_waitqueue_head(&priv->wait);
+- spin_lock_init(&priv->lock);
+
+ adap = &priv->adap;
+ adap->nr = pdev->id;
+--
+2.1.2
+
--- /dev/null
+From 350bf0e9833a06ef36a1c7e8593ca1446b4f4af8 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 28 May 2014 09:44:44 +0200
+Subject: i2c: rcar: reuse status bits as enable bits
+
+Status register and enable register are identical regarding their
+layout. Use the bit definitions for both.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 3e3aabac443e25712a3788cf88cc188e13ca8b0e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-rcar.c | 17 ++++-------------
+ 1 file changed, 4 insertions(+), 13 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
+index e16784124a41..4c46d1b1b61d 100644
+--- a/drivers/i2c/busses/i2c-rcar.c
++++ b/drivers/i2c/busses/i2c-rcar.c
+@@ -59,7 +59,7 @@
+ #define FSB (1 << 1) /* force stop bit */
+ #define ESG (1 << 0) /* en startbit gen */
+
+-/* ICMSR */
++/* ICMSR (also for ICMIE) */
+ #define MNR (1 << 6) /* nack received */
+ #define MAL (1 << 5) /* arbitration lost */
+ #define MST (1 << 4) /* sent a stop */
+@@ -68,23 +68,14 @@
+ #define MDR (1 << 1)
+ #define MAT (1 << 0) /* slave addr xfer done */
+
+-/* ICMIE */
+-#define MNRE (1 << 6) /* nack irq en */
+-#define MALE (1 << 5) /* arblos irq en */
+-#define MSTE (1 << 4) /* stop irq en */
+-#define MDEE (1 << 3)
+-#define MDTE (1 << 2)
+-#define MDRE (1 << 1)
+-#define MATE (1 << 0) /* address sent irq en */
+-
+
+ #define RCAR_BUS_PHASE_START (MDBS | MIE | ESG)
+ #define RCAR_BUS_PHASE_DATA (MDBS | MIE)
+ #define RCAR_BUS_PHASE_STOP (MDBS | MIE | FSB)
+
+-#define RCAR_IRQ_SEND (MNRE | MALE | MSTE | MATE | MDEE)
+-#define RCAR_IRQ_RECV (MNRE | MALE | MSTE | MATE | MDRE)
+-#define RCAR_IRQ_STOP (MSTE)
++#define RCAR_IRQ_SEND (MNR | MAL | MST | MAT | MDE)
++#define RCAR_IRQ_RECV (MNR | MAL | MST | MAT | MDR)
++#define RCAR_IRQ_STOP (MST)
+
+ #define RCAR_IRQ_ACK_SEND (~(MAT | MDE))
+ #define RCAR_IRQ_ACK_RECV (~(MAT | MDR))
+--
+2.1.2
+
--- /dev/null
+From 1e079a850441ccc90d7680bb26a4e0e53351a4b8 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 28 May 2014 09:44:45 +0200
+Subject: i2c: rcar: janitorial cleanup after refactoring
+
+Remove some obvious comments, remove some superfluous debug output (the
+error code carries the same information), some white space fixing...
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 51371cdc86403d9f643efe3d4a4febd11f084c74)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-rcar.c | 50 +++++--------------------------------------
+ 1 file changed, 5 insertions(+), 45 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
+index 4c46d1b1b61d..27b84d734a60 100644
+--- a/drivers/i2c/busses/i2c-rcar.c
++++ b/drivers/i2c/busses/i2c-rcar.c
+@@ -80,9 +80,6 @@
+ #define RCAR_IRQ_ACK_SEND (~(MAT | MDE))
+ #define RCAR_IRQ_ACK_RECV (~(MAT | MDR))
+
+-/*
+- * flags
+- */
+ #define ID_LAST_MSG (1 << 0)
+ #define ID_IOERROR (1 << 1)
+ #define ID_DONE (1 << 2)
+@@ -105,7 +102,7 @@ struct rcar_i2c_priv {
+ int pos;
+ u32 icccr;
+ u32 flags;
+- enum rcar_i2c_type devtype;
++ enum rcar_i2c_type devtype;
+ };
+
+ #define rcar_i2c_priv_to_dev(p) ((p)->adap.dev.parent)
+@@ -116,9 +113,7 @@ struct rcar_i2c_priv {
+
+ #define LOOP_TIMEOUT 1024
+
+-/*
+- * basic functions
+- */
++
+ static void rcar_i2c_write(struct rcar_i2c_priv *priv, int reg, u32 val)
+ {
+ writel(val, priv->io + reg);
+@@ -147,9 +142,6 @@ static void rcar_i2c_init(struct rcar_i2c_priv *priv)
+ rcar_i2c_write(priv, ICMAR, 0);
+ }
+
+-/*
+- * bus control functions
+- */
+ static int rcar_i2c_bus_barrier(struct rcar_i2c_priv *priv)
+ {
+ int i;
+@@ -164,9 +156,6 @@ static int rcar_i2c_bus_barrier(struct rcar_i2c_priv *priv)
+ return -EBUSY;
+ }
+
+-/*
+- * clock function
+- */
+ static int rcar_i2c_clock_calculate(struct rcar_i2c_priv *priv,
+ u32 bus_speed,
+ struct device *dev)
+@@ -256,10 +245,6 @@ scgd_find:
+ return 0;
+ }
+
+-/*
+- * status functions
+- */
+-
+ static int rcar_i2c_prepare_msg(struct rcar_i2c_priv *priv)
+ {
+ int read = !!rcar_i2c_is_recv(priv);
+@@ -380,40 +365,24 @@ static int rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr)
+ static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
+ {
+ struct rcar_i2c_priv *priv = ptr;
+- struct device *dev = rcar_i2c_priv_to_dev(priv);
+ u32 msr;
+
+ msr = rcar_i2c_read(priv, ICMSR);
+
+- /*
+- * Arbitration lost
+- */
++ /* Arbitration lost */
+ if (msr & MAL) {
+- /*
+- * CAUTION
+- *
+- * When arbitration lost, device become _slave_ mode.
+- */
+- dev_dbg(dev, "Arbitration Lost\n");
+ rcar_i2c_flags_set(priv, (ID_DONE | ID_ARBLOST));
+ goto out;
+ }
+
+- /*
+- * Stop
+- */
++ /* Stop */
+ if (msr & MST) {
+- dev_dbg(dev, "Stop\n");
+ rcar_i2c_flags_set(priv, ID_DONE);
+ goto out;
+ }
+
+- /*
+- * Nack
+- */
++ /* Nack */
+ if (msr & MNR) {
+- dev_dbg(dev, "Nack\n");
+-
+ /* go to stop phase */
+ rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
+ rcar_i2c_write(priv, ICMIER, RCAR_IRQ_STOP);
+@@ -421,9 +390,6 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
+ goto out;
+ }
+
+- /*
+- * recv/send
+- */
+ if (rcar_i2c_is_recv(priv))
+ rcar_i2c_flags_set(priv, rcar_i2c_irq_recv(priv, msr));
+ else
+@@ -476,9 +442,6 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
+ if (ret < 0)
+ break;
+
+- /*
+- * wait result
+- */
+ timeout = wait_event_timeout(priv->wait,
+ rcar_i2c_flags_has(priv, ID_DONE),
+ 5 * HZ);
+@@ -487,9 +450,6 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
+ break;
+ }
+
+- /*
+- * error handling
+- */
+ if (rcar_i2c_flags_has(priv, ID_NACK)) {
+ ret = -ENXIO;
+ break;
+--
+2.1.2
+
--- /dev/null
+From 383ee8f637390ed777bd41d2f8909c24cd43d89a Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 28 May 2014 09:44:46 +0200
+Subject: i2c: rcar: update copyright and license information
+
+Make clear that the driver is GPL v2 only. Remove FSF address. Remove
+filename in comment. Update copyright information.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 3d99beabf17506b9d48461d1677a61a430000ad7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-rcar.c | 14 ++++++--------
+ 1 file changed, 6 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
+index 27b84d734a60..71e88d055500 100644
+--- a/drivers/i2c/busses/i2c-rcar.c
++++ b/drivers/i2c/busses/i2c-rcar.c
+@@ -1,7 +1,9 @@
+ /*
+- * drivers/i2c/busses/i2c-rcar.c
++ * Driver for the Renesas RCar I2C unit
+ *
+- * Copyright (C) 2012 Renesas Solutions Corp.
++ * Copyright (C) 2014 Wolfram Sang <wsa@sang-engineering.com>
++ *
++ * Copyright (C) 2012-14 Renesas Solutions Corp.
+ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+ *
+ * This file is based on the drivers/i2c/busses/i2c-sh7760.c
+@@ -12,16 +14,12 @@
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License
++ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+ #include <linux/clk.h>
+ #include <linux/delay.h>
+@@ -608,6 +606,6 @@ static struct platform_driver rcar_i2c_driver = {
+
+ module_platform_driver(rcar_i2c_driver);
+
+-MODULE_LICENSE("GPL");
++MODULE_LICENSE("GPL v2");
+ MODULE_DESCRIPTION("Renesas R-Car I2C bus driver");
+ MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
+--
+2.1.2
+
--- /dev/null
+From 12d55317a2913a0a69065cca3de3b9b867338d1b Mon Sep 17 00:00:00 2001
+From: Jingoo Han <jg1.han@samsung.com>
+Date: Tue, 13 May 2014 10:51:58 +0900
+Subject: i2c: remove unnecessary OOM messages
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The site-specific OOM messages are unnecessary, because they
+duplicate the MM subsystem generic OOM message. For example,
+k.alloc and v.alloc failures use dump_stack().
+
+Signed-off-by: Jingoo Han <jg1.han@samsung.com>
+Acked-by: Guenter Roeck <linux@roeck-us.net>
+Reviewed-by: Jean Delvare <jdelvare@suse.de>
+Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
+Acked-by: Felipe Balbi <balbi@ti.com>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 46797a2adbf0cdc3be17707dc64e872eeed86a8a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+Conflicts:
+ drivers/i2c/busses/i2c-efm32.c
+---
+ drivers/i2c/busses/i2c-bcm2835.c | 4 +---
+ drivers/i2c/busses/i2c-diolan-u2c.c | 1 -
+ drivers/i2c/busses/i2c-eg20t.c | 4 +---
+ drivers/i2c/busses/i2c-exynos5.c | 4 +---
+ drivers/i2c/busses/i2c-imx.c | 4 +---
+ drivers/i2c/busses/i2c-omap.c | 4 +---
+ drivers/i2c/busses/i2c-rcar.c | 4 +---
+ drivers/i2c/busses/i2c-s3c2410.c | 8 ++------
+ drivers/i2c/busses/i2c-simtec.c | 4 +---
+ drivers/i2c/busses/i2c-sirf.c | 1 -
+ drivers/i2c/busses/i2c-stu300.c | 4 +---
+ drivers/i2c/busses/i2c-tegra.c | 4 +---
+ drivers/i2c/busses/i2c-wmt.c | 4 +---
+ drivers/i2c/busses/scx200_acb.c | 4 +---
+ 14 files changed, 13 insertions(+), 41 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-bcm2835.c b/drivers/i2c/busses/i2c-bcm2835.c
+index 77df97b932af..9d7d1cdf6abe 100644
+--- a/drivers/i2c/busses/i2c-bcm2835.c
++++ b/drivers/i2c/busses/i2c-bcm2835.c
+@@ -225,10 +225,8 @@ static int bcm2835_i2c_probe(struct platform_device *pdev)
+ struct i2c_adapter *adap;
+
+ i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
+- if (!i2c_dev) {
+- dev_err(&pdev->dev, "Cannot allocate i2c_dev\n");
++ if (!i2c_dev)
+ return -ENOMEM;
+- }
+ platform_set_drvdata(pdev, i2c_dev);
+ i2c_dev->dev = &pdev->dev;
+ init_completion(&i2c_dev->completion);
+diff --git a/drivers/i2c/busses/i2c-diolan-u2c.c b/drivers/i2c/busses/i2c-diolan-u2c.c
+index 721f7ebf9a3b..b19a310bf9b3 100644
+--- a/drivers/i2c/busses/i2c-diolan-u2c.c
++++ b/drivers/i2c/busses/i2c-diolan-u2c.c
+@@ -455,7 +455,6 @@ static int diolan_u2c_probe(struct usb_interface *interface,
+ /* allocate memory for our device state and initialize it */
+ dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+ if (dev == NULL) {
+- dev_err(&interface->dev, "no memory for device state\n");
+ ret = -ENOMEM;
+ goto error;
+ }
+diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
+index e08e458bab02..26ca8c7e133d 100644
+--- a/drivers/i2c/busses/i2c-eg20t.c
++++ b/drivers/i2c/busses/i2c-eg20t.c
+@@ -751,10 +751,8 @@ static int pch_i2c_probe(struct pci_dev *pdev,
+ pch_pci_dbg(pdev, "Entered.\n");
+
+ adap_info = kzalloc((sizeof(struct adapter_info)), GFP_KERNEL);
+- if (adap_info == NULL) {
+- pch_pci_err(pdev, "Memory allocation FAILED\n");
++ if (adap_info == NULL)
+ return -ENOMEM;
+- }
+
+ ret = pci_enable_device(pdev);
+ if (ret) {
+diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c
+index 9fd711c03dd2..6fcc0b288fc4 100644
+--- a/drivers/i2c/busses/i2c-exynos5.c
++++ b/drivers/i2c/busses/i2c-exynos5.c
+@@ -621,10 +621,8 @@ static int exynos5_i2c_probe(struct platform_device *pdev)
+ int ret;
+
+ i2c = devm_kzalloc(&pdev->dev, sizeof(struct exynos5_i2c), GFP_KERNEL);
+- if (!i2c) {
+- dev_err(&pdev->dev, "no memory for state\n");
++ if (!i2c)
+ return -ENOMEM;
+- }
+
+ if (of_property_read_u32(np, "clock-frequency", &op_clock)) {
+ i2c->speed_mode = HSI2C_FAST_SPD;
+diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
+index db895fb22e65..584e002fa252 100644
+--- a/drivers/i2c/busses/i2c-imx.c
++++ b/drivers/i2c/busses/i2c-imx.c
+@@ -617,10 +617,8 @@ static int i2c_imx_probe(struct platform_device *pdev)
+
+ i2c_imx = devm_kzalloc(&pdev->dev, sizeof(struct imx_i2c_struct),
+ GFP_KERNEL);
+- if (!i2c_imx) {
+- dev_err(&pdev->dev, "can't allocate interface\n");
++ if (!i2c_imx)
+ return -ENOMEM;
+- }
+
+ if (of_id)
+ i2c_imx->hwdata = of_id->data;
+diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
+index 90dcc2eaac5f..fe9ee696ac49 100644
+--- a/drivers/i2c/busses/i2c-omap.c
++++ b/drivers/i2c/busses/i2c-omap.c
+@@ -1114,10 +1114,8 @@ omap_i2c_probe(struct platform_device *pdev)
+ }
+
+ dev = devm_kzalloc(&pdev->dev, sizeof(struct omap_i2c_dev), GFP_KERNEL);
+- if (!dev) {
+- dev_err(&pdev->dev, "Menory allocation failed\n");
++ if (!dev)
+ return -ENOMEM;
+- }
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ dev->base = devm_ioremap_resource(&pdev->dev, mem);
+diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
+index 71e88d055500..899405923678 100644
+--- a/drivers/i2c/busses/i2c-rcar.c
++++ b/drivers/i2c/busses/i2c-rcar.c
+@@ -509,10 +509,8 @@ static int rcar_i2c_probe(struct platform_device *pdev)
+ int irq, ret;
+
+ priv = devm_kzalloc(dev, sizeof(struct rcar_i2c_priv), GFP_KERNEL);
+- if (!priv) {
+- dev_err(dev, "no mem for private data\n");
++ if (!priv)
+ return -ENOMEM;
+- }
+
+ priv->clk = devm_clk_get(dev, NULL);
+ if (IS_ERR(priv->clk)) {
+diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
+index 93ec37649346..5e74249dbd13 100644
+--- a/drivers/i2c/busses/i2c-s3c2410.c
++++ b/drivers/i2c/busses/i2c-s3c2410.c
+@@ -1085,16 +1085,12 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev)
+ }
+
+ i2c = devm_kzalloc(&pdev->dev, sizeof(struct s3c24xx_i2c), GFP_KERNEL);
+- if (!i2c) {
+- dev_err(&pdev->dev, "no memory for state\n");
++ if (!i2c)
+ return -ENOMEM;
+- }
+
+ i2c->pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+- if (!i2c->pdata) {
+- dev_err(&pdev->dev, "no memory for platform data\n");
++ if (!i2c->pdata)
+ return -ENOMEM;
+- }
+
+ i2c->quirks = s3c24xx_get_device_quirks(pdev);
+ if (pdata)
+diff --git a/drivers/i2c/busses/i2c-simtec.c b/drivers/i2c/busses/i2c-simtec.c
+index 294c80f21d65..964e5c6f84ab 100644
+--- a/drivers/i2c/busses/i2c-simtec.c
++++ b/drivers/i2c/busses/i2c-simtec.c
+@@ -77,10 +77,8 @@ static int simtec_i2c_probe(struct platform_device *dev)
+ int ret;
+
+ pd = kzalloc(sizeof(struct simtec_i2c_data), GFP_KERNEL);
+- if (pd == NULL) {
+- dev_err(&dev->dev, "cannot allocate private data\n");
++ if (pd == NULL)
+ return -ENOMEM;
+- }
+
+ platform_set_drvdata(dev, pd);
+
+diff --git a/drivers/i2c/busses/i2c-sirf.c b/drivers/i2c/busses/i2c-sirf.c
+index 6784f7f527a4..02556c0ff27a 100644
+--- a/drivers/i2c/busses/i2c-sirf.c
++++ b/drivers/i2c/busses/i2c-sirf.c
+@@ -307,7 +307,6 @@ static int i2c_sirfsoc_probe(struct platform_device *pdev)
+
+ siic = devm_kzalloc(&pdev->dev, sizeof(*siic), GFP_KERNEL);
+ if (!siic) {
+- dev_err(&pdev->dev, "Can't allocate driver data\n");
+ err = -ENOMEM;
+ goto out;
+ }
+diff --git a/drivers/i2c/busses/i2c-stu300.c b/drivers/i2c/busses/i2c-stu300.c
+index 5b80ef310841..dc57a16c0e73 100644
+--- a/drivers/i2c/busses/i2c-stu300.c
++++ b/drivers/i2c/busses/i2c-stu300.c
+@@ -868,10 +868,8 @@ static int stu300_probe(struct platform_device *pdev)
+ int ret = 0;
+
+ dev = devm_kzalloc(&pdev->dev, sizeof(struct stu300_dev), GFP_KERNEL);
+- if (!dev) {
+- dev_err(&pdev->dev, "could not allocate device struct\n");
++ if (!dev)
+ return -ENOMEM;
+- }
+
+ bus_nr = pdev->id;
+ dev->clk = devm_clk_get(&pdev->dev, NULL);
+diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
+index 9704537aee3c..8f6f1e4141c1 100644
+--- a/drivers/i2c/busses/i2c-tegra.c
++++ b/drivers/i2c/busses/i2c-tegra.c
+@@ -732,10 +732,8 @@ static int tegra_i2c_probe(struct platform_device *pdev)
+ }
+
+ i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
+- if (!i2c_dev) {
+- dev_err(&pdev->dev, "Could not allocate struct tegra_i2c_dev");
++ if (!i2c_dev)
+ return -ENOMEM;
+- }
+
+ i2c_dev->base = base;
+ i2c_dev->div_clk = div_clk;
+diff --git a/drivers/i2c/busses/i2c-wmt.c b/drivers/i2c/busses/i2c-wmt.c
+index 2c8a3e4f9008..889a212b6c3d 100644
+--- a/drivers/i2c/busses/i2c-wmt.c
++++ b/drivers/i2c/busses/i2c-wmt.c
+@@ -379,10 +379,8 @@ static int wmt_i2c_probe(struct platform_device *pdev)
+ u32 clk_rate;
+
+ i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
+- if (!i2c_dev) {
+- dev_err(&pdev->dev, "device memory allocation failed\n");
++ if (!i2c_dev)
+ return -ENOMEM;
+- }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ i2c_dev->base = devm_ioremap_resource(&pdev->dev, res);
+diff --git a/drivers/i2c/busses/scx200_acb.c b/drivers/i2c/busses/scx200_acb.c
+index 2d1d2c5653fb..99d6bb3f9d3f 100644
+--- a/drivers/i2c/busses/scx200_acb.c
++++ b/drivers/i2c/busses/scx200_acb.c
+@@ -431,10 +431,8 @@ static struct scx200_acb_iface *scx200_create_iface(const char *text,
+ struct i2c_adapter *adapter;
+
+ iface = kzalloc(sizeof(*iface), GFP_KERNEL);
+- if (!iface) {
+- pr_err("can't allocate memory\n");
++ if (!iface)
+ return NULL;
+- }
+
+ adapter = &iface->adapter;
+ i2c_set_adapdata(adapter, iface);
+--
+2.1.2
+
--- /dev/null
+From 70db599459987bfe47bd1f3ec068cf2784480069 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Fri, 2 May 2014 21:15:07 +0200
+Subject: i2c: sh_mobile: replace magic hex values with constants
+
+No functional change, binaries are identical.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit a78f6a4140f95cbedc0b28c4c883e8aa9ba044f1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 11 ++++++-----
+ 1 file changed, 6 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index 1d79585ba4b3..d91625eea6bb 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -316,7 +316,7 @@ static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
+
+ switch (op) {
+ case OP_START: /* issue start and trigger DTE interrupt */
+- iic_wr(pd, ICCR, 0x94);
++ iic_wr(pd, ICCR, ICCR_ICE | ICCR_TRS | ICCR_BBSY);
+ break;
+ case OP_TX_FIRST: /* disable DTE interrupt and write data */
+ iic_wr(pd, ICIC, ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
+@@ -327,10 +327,11 @@ static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
+ break;
+ case OP_TX_STOP: /* write data and issue a stop afterwards */
+ iic_wr(pd, ICDR, data);
+- iic_wr(pd, ICCR, pd->send_stop ? 0x90 : 0x94);
++ iic_wr(pd, ICCR, pd->send_stop ? ICCR_ICE | ICCR_TRS
++ : ICCR_ICE | ICCR_TRS | ICCR_BBSY);
+ break;
+ case OP_TX_TO_RX: /* select read mode */
+- iic_wr(pd, ICCR, 0x81);
++ iic_wr(pd, ICCR, ICCR_ICE | ICCR_SCP);
+ break;
+ case OP_RX: /* just read data */
+ ret = iic_rd(pd, ICDR);
+@@ -338,13 +339,13 @@ static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
+ case OP_RX_STOP: /* enable DTE interrupt, issue stop */
+ iic_wr(pd, ICIC,
+ ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
+- iic_wr(pd, ICCR, 0xc0);
++ iic_wr(pd, ICCR, ICCR_ICE | ICCR_RACK);
+ break;
+ case OP_RX_STOP_DATA: /* enable DTE interrupt, read data, issue stop */
+ iic_wr(pd, ICIC,
+ ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
+ ret = iic_rd(pd, ICDR);
+- iic_wr(pd, ICCR, 0xc0);
++ iic_wr(pd, ICCR, ICCR_ICE | ICCR_RACK);
+ break;
+ }
+
+--
+2.1.2
+
--- /dev/null
+From 079cd4bac08c29dd3313b61ee009775d72b9b4a7 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Fri, 2 May 2014 21:15:08 +0200
+Subject: i2c: sh_mobile: improve error handling
+
+Use standard i2c error codes for i2c failures. Also, don't print
+something on timeout since it happens regularly with i2c. Simplify some,
+logic, too.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 5a72b25e7896e6358b62b590ce5b3a457516ae40)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 25 +++++++++----------------
+ 1 file changed, 9 insertions(+), 16 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index d91625eea6bb..d2fa222df3d1 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -480,7 +480,7 @@ static int start_ch(struct sh_mobile_i2c_data *pd, struct i2c_msg *usr_msg,
+ {
+ if (usr_msg->len == 0 && (usr_msg->flags & I2C_M_RD)) {
+ dev_err(pd->dev, "Unsupported zero length i2c read\n");
+- return -EIO;
++ return -EOPNOTSUPP;
+ }
+
+ if (do_init) {
+@@ -515,17 +515,12 @@ static int poll_dte(struct sh_mobile_i2c_data *pd)
+ break;
+
+ if (val & ICSR_TACK)
+- return -EIO;
++ return -ENXIO;
+
+ udelay(10);
+ }
+
+- if (!i) {
+- dev_warn(pd->dev, "Timeout polling for DTE!\n");
+- return -ETIMEDOUT;
+- }
+-
+- return 0;
++ return i ? 0 : -ETIMEDOUT;
+ }
+
+ static int poll_busy(struct sh_mobile_i2c_data *pd)
+@@ -543,20 +538,18 @@ static int poll_busy(struct sh_mobile_i2c_data *pd)
+ */
+ if (!(val & ICSR_BUSY)) {
+ /* handle missing acknowledge and arbitration lost */
+- if ((val | pd->sr) & (ICSR_TACK | ICSR_AL))
+- return -EIO;
++ val |= pd->sr;
++ if (val & ICSR_TACK)
++ return -ENXIO;
++ if (val & ICSR_AL)
++ return -EAGAIN;
+ break;
+ }
+
+ udelay(10);
+ }
+
+- if (!i) {
+- dev_err(pd->dev, "Polling timed out\n");
+- return -ETIMEDOUT;
+- }
+-
+- return 0;
++ return i ? 0 : -ETIMEDOUT;
+ }
+
+ static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
+--
+2.1.2
+
--- /dev/null
+From c8e6f24b09e33ed1ced8d89a589f8805f1c25cd0 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Fri, 2 May 2014 21:15:09 +0200
+Subject: i2c: sh_mobile: honor DT bus speed settings
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 88c289ec28dfb0f383dcdbadd2c759f910585815)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index d2fa222df3d1..2e481abd50ce 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -657,6 +657,7 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
+ struct resource *res;
+ int size;
+ int ret;
++ u32 bus_speed;
+
+ pd = kzalloc(sizeof(struct sh_mobile_i2c_data), GFP_KERNEL);
+ if (pd == NULL) {
+@@ -697,7 +698,9 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
+ }
+
+ /* Use platform data bus speed or STANDARD_MODE */
+- pd->bus_speed = STANDARD_MODE;
++ ret = of_property_read_u32(dev->dev.of_node, "clock-frequency", &bus_speed);
++ pd->bus_speed = ret ? STANDARD_MODE : bus_speed;
++
+ if (pdata && pdata->bus_speed)
+ pd->bus_speed = pdata->bus_speed;
+ pd->clks_per_count = 1;
+--
+2.1.2
+
--- /dev/null
+From 2d9c1f1e6ce1667912039da7a31e4d9101c00e3d Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Fri, 2 May 2014 21:15:11 +0200
+Subject: i2c: sh_mobile: devm conversion, low hanging fruits
+
+Convert the easy parts to devm. irqs will be converted in a seperate
+patch to keep diffs readable.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 4fd31c2eb7bf19927524bca1c5c17e6bb0f4f6eb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 41 ++++++++++----------------------------
+ 1 file changed, 10 insertions(+), 31 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index 2e481abd50ce..c47d11493b97 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -655,45 +655,33 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
+ struct sh_mobile_i2c_data *pd;
+ struct i2c_adapter *adap;
+ struct resource *res;
+- int size;
+ int ret;
+ u32 bus_speed;
+
+- pd = kzalloc(sizeof(struct sh_mobile_i2c_data), GFP_KERNEL);
+- if (pd == NULL) {
+- dev_err(&dev->dev, "cannot allocate private data\n");
++ pd = devm_kzalloc(&dev->dev, sizeof(struct sh_mobile_i2c_data), GFP_KERNEL);
++ if (!pd)
+ return -ENOMEM;
+- }
+
+- pd->clk = clk_get(&dev->dev, NULL);
++ pd->clk = devm_clk_get(&dev->dev, NULL);
+ if (IS_ERR(pd->clk)) {
+ dev_err(&dev->dev, "cannot get clock\n");
+- ret = PTR_ERR(pd->clk);
+- goto err;
++ return PTR_ERR(pd->clk);
+ }
+
+ ret = sh_mobile_i2c_hook_irqs(dev, 1);
+ if (ret) {
+ dev_err(&dev->dev, "cannot request IRQ\n");
+- goto err_clk;
++ return ret;
+ }
+
+ pd->dev = &dev->dev;
+ platform_set_drvdata(dev, pd);
+
+ res = platform_get_resource(dev, IORESOURCE_MEM, 0);
+- if (res == NULL) {
+- dev_err(&dev->dev, "cannot find IO resource\n");
+- ret = -ENOENT;
+- goto err_irq;
+- }
+
+- size = resource_size(res);
+-
+- pd->reg = ioremap(res->start, size);
+- if (pd->reg == NULL) {
+- dev_err(&dev->dev, "cannot map IO\n");
+- ret = -ENXIO;
++ pd->reg = devm_ioremap_resource(&dev->dev, res);
++ if (IS_ERR(pd->reg)) {
++ ret = PTR_ERR(pd->reg);
+ goto err_irq;
+ }
+
+@@ -710,7 +698,7 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
+ /* The IIC blocks on SH-Mobile ARM processors
+ * come with two new bits in ICIC.
+ */
+- if (size > 0x17)
++ if (resource_size(res) > 0x17)
+ pd->flags |= IIC_FLAG_HAS_ICIC67;
+
+ sh_mobile_i2c_init(pd);
+@@ -747,7 +735,7 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
+ ret = i2c_add_numbered_adapter(adap);
+ if (ret < 0) {
+ dev_err(&dev->dev, "cannot add numbered adapter\n");
+- goto err_all;
++ goto err_irq;
+ }
+
+ dev_info(&dev->dev,
+@@ -756,14 +744,8 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
+
+ return 0;
+
+- err_all:
+- iounmap(pd->reg);
+ err_irq:
+ sh_mobile_i2c_hook_irqs(dev, 0);
+- err_clk:
+- clk_put(pd->clk);
+- err:
+- kfree(pd);
+ return ret;
+ }
+
+@@ -772,11 +754,8 @@ static int sh_mobile_i2c_remove(struct platform_device *dev)
+ struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
+
+ i2c_del_adapter(&pd->adap);
+- iounmap(pd->reg);
+ sh_mobile_i2c_hook_irqs(dev, 0);
+- clk_put(pd->clk);
+ pm_runtime_disable(&dev->dev);
+- kfree(pd);
+ return 0;
+ }
+
+--
+2.1.2
+
--- /dev/null
+From 67f3964754c2643860c3bdd8d3eeebe90b5f45cb Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Fri, 2 May 2014 21:15:12 +0200
+Subject: i2c: sh_mobile: devm conversion, irq setup
+
+This is what devm was made for. No rollback mechanism needed, remove the
+hook parameter from the irq setup function and simplify it. While we are
+here change some variables to proper types.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 7fe8a9993337e4d1957737b4468fc574af8fb957)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 56 ++++++++++----------------------------
+ 1 file changed, 15 insertions(+), 41 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index c47d11493b97..ddc9970fd724 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -611,42 +611,25 @@ static struct i2c_algorithm sh_mobile_i2c_algorithm = {
+ .master_xfer = sh_mobile_i2c_xfer,
+ };
+
+-static int sh_mobile_i2c_hook_irqs(struct platform_device *dev, int hook)
++static int sh_mobile_i2c_hook_irqs(struct platform_device *dev)
+ {
+ struct resource *res;
+- int ret = -ENXIO;
+- int n, k = 0;
++ resource_size_t n;
++ int k = 0, ret;
+
+ while ((res = platform_get_resource(dev, IORESOURCE_IRQ, k))) {
+- for (n = res->start; hook && n <= res->end; n++) {
+- if (request_irq(n, sh_mobile_i2c_isr, 0,
+- dev_name(&dev->dev), dev)) {
+- for (n--; n >= res->start; n--)
+- free_irq(n, dev);
+-
+- goto rollback;
++ for (n = res->start; n <= res->end; n++) {
++ ret = devm_request_irq(&dev->dev, n, sh_mobile_i2c_isr,
++ 0, dev_name(&dev->dev), dev);
++ if (ret) {
++ dev_err(&dev->dev, "cannot request IRQ %pa\n", &n);
++ return ret;
+ }
+ }
+ k++;
+ }
+
+- if (hook)
+- return k > 0 ? 0 : -ENOENT;
+-
+- ret = 0;
+-
+- rollback:
+- k--;
+-
+- while (k >= 0) {
+- res = platform_get_resource(dev, IORESOURCE_IRQ, k);
+- for (n = res->start; n <= res->end; n++)
+- free_irq(n, dev);
+-
+- k--;
+- }
+-
+- return ret;
++ return k > 0 ? 0 : -ENOENT;
+ }
+
+ static int sh_mobile_i2c_probe(struct platform_device *dev)
+@@ -668,11 +651,9 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
+ return PTR_ERR(pd->clk);
+ }
+
+- ret = sh_mobile_i2c_hook_irqs(dev, 1);
+- if (ret) {
+- dev_err(&dev->dev, "cannot request IRQ\n");
++ ret = sh_mobile_i2c_hook_irqs(dev);
++ if (ret)
+ return ret;
+- }
+
+ pd->dev = &dev->dev;
+ platform_set_drvdata(dev, pd);
+@@ -680,10 +661,8 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
+ res = platform_get_resource(dev, IORESOURCE_MEM, 0);
+
+ pd->reg = devm_ioremap_resource(&dev->dev, res);
+- if (IS_ERR(pd->reg)) {
+- ret = PTR_ERR(pd->reg);
+- goto err_irq;
+- }
++ if (IS_ERR(pd->reg))
++ return PTR_ERR(pd->reg);
+
+ /* Use platform data bus speed or STANDARD_MODE */
+ ret = of_property_read_u32(dev->dev.of_node, "clock-frequency", &bus_speed);
+@@ -735,7 +714,7 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
+ ret = i2c_add_numbered_adapter(adap);
+ if (ret < 0) {
+ dev_err(&dev->dev, "cannot add numbered adapter\n");
+- goto err_irq;
++ return ret;
+ }
+
+ dev_info(&dev->dev,
+@@ -743,10 +722,6 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
+ adap->nr, pd->bus_speed, pd->iccl, pd->icch);
+
+ return 0;
+-
+- err_irq:
+- sh_mobile_i2c_hook_irqs(dev, 0);
+- return ret;
+ }
+
+ static int sh_mobile_i2c_remove(struct platform_device *dev)
+@@ -754,7 +729,6 @@ static int sh_mobile_i2c_remove(struct platform_device *dev)
+ struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
+
+ i2c_del_adapter(&pd->adap);
+- sh_mobile_i2c_hook_irqs(dev, 0);
+ pm_runtime_disable(&dev->dev);
+ return 0;
+ }
+--
+2.1.2
+
--- /dev/null
+From fa21ef27cc94ba526658aee4c06fe1487eb1f435 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Fri, 2 May 2014 21:15:13 +0200
+Subject: i2c: sh_mobile: remove superfluous offset parameter
+
+Following the KISS principle, remove unneeded stuff.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit ed4121e129ae46615ab570318b5b8f31494ced98)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 15 ++++++---------
+ 1 file changed, 6 insertions(+), 9 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index ddc9970fd724..9a5b693454e1 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -194,7 +194,7 @@ static void iic_set_clr(struct sh_mobile_i2c_data *pd, int offs,
+ iic_wr(pd, offs, (iic_rd(pd, offs) | set) & ~clr);
+ }
+
+-static u32 sh_mobile_i2c_iccl(unsigned long count_khz, u32 tLOW, u32 tf, int offset)
++static u32 sh_mobile_i2c_iccl(unsigned long count_khz, u32 tLOW, u32 tf)
+ {
+ /*
+ * Conditional expression:
+@@ -206,10 +206,10 @@ static u32 sh_mobile_i2c_iccl(unsigned long count_khz, u32 tLOW, u32 tf, int off
+ * account the fall time of SCL signal (tf). Default tf value
+ * should be 0.3 us, for safety.
+ */
+- return (((count_khz * (tLOW + tf)) + 5000) / 10000) + offset;
++ return (((count_khz * (tLOW + tf)) + 5000) / 10000);
+ }
+
+-static u32 sh_mobile_i2c_icch(unsigned long count_khz, u32 tHIGH, u32 tf, int offset)
++static u32 sh_mobile_i2c_icch(unsigned long count_khz, u32 tHIGH, u32 tf)
+ {
+ /*
+ * Conditional expression:
+@@ -225,14 +225,13 @@ static u32 sh_mobile_i2c_icch(unsigned long count_khz, u32 tHIGH, u32 tf, int of
+ * to take into account the fall time of SDA signal (tf) at START
+ * condition, in order to meet both tHIGH and tHD;STA specs.
+ */
+- return (((count_khz * (tHIGH + tf)) + 5000) / 10000) + offset;
++ return (((count_khz * (tHIGH + tf)) + 5000) / 10000);
+ }
+
+ static void sh_mobile_i2c_init(struct sh_mobile_i2c_data *pd)
+ {
+ unsigned long i2c_clk_khz;
+ u32 tHIGH, tLOW, tf;
+- int offset;
+
+ /* Get clock rate after clock is enabled */
+ clk_prepare_enable(pd->clk);
+@@ -243,26 +242,24 @@ static void sh_mobile_i2c_init(struct sh_mobile_i2c_data *pd)
+ tLOW = 47; /* tLOW = 4.7 us */
+ tHIGH = 40; /* tHD;STA = tHIGH = 4.0 us */
+ tf = 3; /* tf = 0.3 us */
+- offset = 0; /* No offset */
+ } else if (pd->bus_speed == FAST_MODE) {
+ tLOW = 13; /* tLOW = 1.3 us */
+ tHIGH = 6; /* tHD;STA = tHIGH = 0.6 us */
+ tf = 3; /* tf = 0.3 us */
+- offset = 0; /* No offset */
+ } else {
+ dev_err(pd->dev, "unrecognized bus speed %lu Hz\n",
+ pd->bus_speed);
+ goto out;
+ }
+
+- pd->iccl = sh_mobile_i2c_iccl(i2c_clk_khz, tLOW, tf, offset);
++ pd->iccl = sh_mobile_i2c_iccl(i2c_clk_khz, tLOW, tf);
+ /* one more bit of ICCL in ICIC */
+ if ((pd->iccl > 0xff) && (pd->flags & IIC_FLAG_HAS_ICIC67))
+ pd->icic |= ICIC_ICCLB8;
+ else
+ pd->icic &= ~ICIC_ICCLB8;
+
+- pd->icch = sh_mobile_i2c_icch(i2c_clk_khz, tHIGH, tf, offset);
++ pd->icch = sh_mobile_i2c_icch(i2c_clk_khz, tHIGH, tf);
+ /* one more bit of ICCH in ICIC */
+ if ((pd->icch > 0xff) && (pd->flags & IIC_FLAG_HAS_ICIC67))
+ pd->icic |= ICIC_ICCHB8;
+--
+2.1.2
+
--- /dev/null
+From 954abf2a084b2ee36c36723a847afea28b557c90 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Fri, 2 May 2014 21:15:14 +0200
+Subject: i2c: sh_mobile: bail out on errors when initializing
+
+sh_mobile_i2c_init() could detect wrong settings, but didn't bail out,
+so it would continue unconfigured. Fix this.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 6ed7053c2255c34886297b995c6a18607b36d668)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 12 +++++++-----
+ 1 file changed, 7 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index 9a5b693454e1..9f02013eaeeb 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -228,7 +228,7 @@ static u32 sh_mobile_i2c_icch(unsigned long count_khz, u32 tHIGH, u32 tf)
+ return (((count_khz * (tHIGH + tf)) + 5000) / 10000);
+ }
+
+-static void sh_mobile_i2c_init(struct sh_mobile_i2c_data *pd)
++static int sh_mobile_i2c_init(struct sh_mobile_i2c_data *pd)
+ {
+ unsigned long i2c_clk_khz;
+ u32 tHIGH, tLOW, tf;
+@@ -236,6 +236,7 @@ static void sh_mobile_i2c_init(struct sh_mobile_i2c_data *pd)
+ /* Get clock rate after clock is enabled */
+ clk_prepare_enable(pd->clk);
+ i2c_clk_khz = clk_get_rate(pd->clk) / 1000;
++ clk_disable_unprepare(pd->clk);
+ i2c_clk_khz /= pd->clks_per_count;
+
+ if (pd->bus_speed == STANDARD_MODE) {
+@@ -249,7 +250,7 @@ static void sh_mobile_i2c_init(struct sh_mobile_i2c_data *pd)
+ } else {
+ dev_err(pd->dev, "unrecognized bus speed %lu Hz\n",
+ pd->bus_speed);
+- goto out;
++ return -EINVAL;
+ }
+
+ pd->iccl = sh_mobile_i2c_iccl(i2c_clk_khz, tLOW, tf);
+@@ -266,8 +267,7 @@ static void sh_mobile_i2c_init(struct sh_mobile_i2c_data *pd)
+ else
+ pd->icic &= ~ICIC_ICCHB8;
+
+-out:
+- clk_disable_unprepare(pd->clk);
++ return 0;
+ }
+
+ static void activate_ch(struct sh_mobile_i2c_data *pd)
+@@ -677,7 +677,9 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
+ if (resource_size(res) > 0x17)
+ pd->flags |= IIC_FLAG_HAS_ICIC67;
+
+- sh_mobile_i2c_init(pd);
++ ret = sh_mobile_i2c_init(pd);
++ if (ret)
++ return ret;
+
+ /* Enable Runtime PM for this device.
+ *
+--
+2.1.2
+
--- /dev/null
+From 4230dfe425428acfa51782df22d102c04840366c Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Fri, 2 May 2014 21:15:15 +0200
+Subject: i2c: sh_mobile: check timing parameters for valid range
+
+Due to misconfiguration, it can happen that the calculated timing
+parameters are out of range. Bail out if that happens. We can also
+simplify some logic later because of the verified value. Also, make the
+printouts of the values more precise by adding the hex-prefixes.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 7663ebefca8079ef0fd2fff1047d3d10af654c78)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 17 +++++++++++++----
+ 1 file changed, 13 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index 9f02013eaeeb..b1d399e3e5fc 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -232,6 +232,7 @@ static int sh_mobile_i2c_init(struct sh_mobile_i2c_data *pd)
+ {
+ unsigned long i2c_clk_khz;
+ u32 tHIGH, tLOW, tf;
++ uint16_t max_val;
+
+ /* Get clock rate after clock is enabled */
+ clk_prepare_enable(pd->clk);
+@@ -254,15 +255,23 @@ static int sh_mobile_i2c_init(struct sh_mobile_i2c_data *pd)
+ }
+
+ pd->iccl = sh_mobile_i2c_iccl(i2c_clk_khz, tLOW, tf);
++ pd->icch = sh_mobile_i2c_icch(i2c_clk_khz, tHIGH, tf);
++
++ max_val = pd->flags & IIC_FLAG_HAS_ICIC67 ? 0x1ff : 0xff;
++ if (pd->iccl > max_val || pd->icch > max_val) {
++ dev_err(pd->dev, "timing values out of range: L/H=0x%x/0x%x\n",
++ pd->iccl, pd->icch);
++ return -EINVAL;
++ }
++
+ /* one more bit of ICCL in ICIC */
+- if ((pd->iccl > 0xff) && (pd->flags & IIC_FLAG_HAS_ICIC67))
++ if (pd->iccl & 0x100)
+ pd->icic |= ICIC_ICCLB8;
+ else
+ pd->icic &= ~ICIC_ICCLB8;
+
+- pd->icch = sh_mobile_i2c_icch(i2c_clk_khz, tHIGH, tf);
+ /* one more bit of ICCH in ICIC */
+- if ((pd->icch > 0xff) && (pd->flags & IIC_FLAG_HAS_ICIC67))
++ if (pd->icch & 0x100)
+ pd->icic |= ICIC_ICCHB8;
+ else
+ pd->icic &= ~ICIC_ICCHB8;
+@@ -717,7 +726,7 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
+ }
+
+ dev_info(&dev->dev,
+- "I2C adapter %d with bus speed %lu Hz (L/H=%x/%x)\n",
++ "I2C adapter %d with bus speed %lu Hz (L/H=0x%x/0x%x)\n",
+ adap->nr, pd->bus_speed, pd->iccl, pd->icch);
+
+ return 0;
+--
+2.1.2
+
--- /dev/null
+From c9510d27e229e82bc00747637f023a3805013dfc Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Fri, 2 May 2014 21:15:16 +0200
+Subject: i2c: sh_mobile: fix clock calculation for newer SoCs
+
+Newer SoCs have so fast input clocks that the ICCL/H registers only
+count every second clock to have a meaningful 9-bit range. The driver
+was already prepared for that happening, but didn't use it so far.
+Add the proper DT configuration for SoCs that need it.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 67240dfcb8dcf756cc00fb37f5cb7e3ee2fa6190)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 48 ++++++++++++++++++++++++++++++--------
+ 1 file changed, 38 insertions(+), 10 deletions(-)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index b1d399e3e5fc..c29be2bba6ea 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -32,6 +32,7 @@
+ #include <linux/clk.h>
+ #include <linux/io.h>
+ #include <linux/slab.h>
++#include <linux/of_device.h>
+ #include <linux/i2c/i2c-sh_mobile.h>
+
+ /* Transmit operation: */
+@@ -139,6 +140,10 @@ struct sh_mobile_i2c_data {
+ bool send_stop;
+ };
+
++struct sh_mobile_dt_config {
++ int clks_per_count;
++};
++
+ #define IIC_FLAG_HAS_ICIC67 (1 << 0)
+
+ #define STANDARD_MODE 100000
+@@ -617,6 +622,22 @@ static struct i2c_algorithm sh_mobile_i2c_algorithm = {
+ .master_xfer = sh_mobile_i2c_xfer,
+ };
+
++static const struct sh_mobile_dt_config default_dt_config = {
++ .clks_per_count = 1,
++};
++
++static const struct sh_mobile_dt_config rcar_gen2_dt_config = {
++ .clks_per_count = 2,
++};
++
++static const struct of_device_id sh_mobile_i2c_dt_ids[] = {
++ { .compatible = "renesas,rmobile-iic", .data = &default_dt_config },
++ { .compatible = "renesas,iic-r8a7790", .data = &rcar_gen2_dt_config },
++ { .compatible = "renesas,iic-r8a7791", .data = &rcar_gen2_dt_config },
++ {},
++};
++MODULE_DEVICE_TABLE(of, sh_mobile_i2c_dt_ids);
++
+ static int sh_mobile_i2c_hook_irqs(struct platform_device *dev)
+ {
+ struct resource *res;
+@@ -674,11 +695,24 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
+ ret = of_property_read_u32(dev->dev.of_node, "clock-frequency", &bus_speed);
+ pd->bus_speed = ret ? STANDARD_MODE : bus_speed;
+
+- if (pdata && pdata->bus_speed)
+- pd->bus_speed = pdata->bus_speed;
+ pd->clks_per_count = 1;
+- if (pdata && pdata->clks_per_count)
+- pd->clks_per_count = pdata->clks_per_count;
++
++ if (dev->dev.of_node) {
++ const struct of_device_id *match;
++
++ match = of_match_device(sh_mobile_i2c_dt_ids, &dev->dev);
++ if (match) {
++ const struct sh_mobile_dt_config *config;
++
++ config = match->data;
++ pd->clks_per_count = config->clks_per_count;
++ }
++ } else {
++ if (pdata && pdata->bus_speed)
++ pd->bus_speed = pdata->bus_speed;
++ if (pdata && pdata->clks_per_count)
++ pd->clks_per_count = pdata->clks_per_count;
++ }
+
+ /* The IIC blocks on SH-Mobile ARM processors
+ * come with two new bits in ICIC.
+@@ -758,12 +792,6 @@ static const struct dev_pm_ops sh_mobile_i2c_dev_pm_ops = {
+ .runtime_resume = sh_mobile_i2c_runtime_nop,
+ };
+
+-static const struct of_device_id sh_mobile_i2c_dt_ids[] = {
+- { .compatible = "renesas,rmobile-iic", },
+- {},
+-};
+-MODULE_DEVICE_TABLE(of, sh_mobile_i2c_dt_ids);
+-
+ static struct platform_driver sh_mobile_i2c_driver = {
+ .driver = {
+ .name = "i2c-sh_mobile",
+--
+2.1.2
+
--- /dev/null
+From 5665f0c871b8d33d5d426c00ec8324216d11b1c4 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa@sang-engineering.com>
+Date: Tue, 27 May 2014 14:06:28 +0200
+Subject: i2c: sh_mobile: add compatibles for additional SoC
+
+Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+(cherry picked from commit 90104d06372e41b2a844950f6648322b09f9b8b9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/i2c/busses/i2c-sh_mobile.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
+index c29be2bba6ea..8b5e79cb4468 100644
+--- a/drivers/i2c/busses/i2c-sh_mobile.c
++++ b/drivers/i2c/busses/i2c-sh_mobile.c
+@@ -634,6 +634,9 @@ static const struct of_device_id sh_mobile_i2c_dt_ids[] = {
+ { .compatible = "renesas,rmobile-iic", .data = &default_dt_config },
+ { .compatible = "renesas,iic-r8a7790", .data = &rcar_gen2_dt_config },
+ { .compatible = "renesas,iic-r8a7791", .data = &rcar_gen2_dt_config },
++ { .compatible = "renesas,iic-r8a7792", .data = &rcar_gen2_dt_config },
++ { .compatible = "renesas,iic-r8a7793", .data = &rcar_gen2_dt_config },
++ { .compatible = "renesas,iic-r8a7794", .data = &rcar_gen2_dt_config },
+ {},
+ };
+ MODULE_DEVICE_TABLE(of, sh_mobile_i2c_dt_ids);
+--
+2.1.2
+
--- /dev/null
+From 1c36600d9721647a1441bd755be29eb00cc324cf Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Antoine=20T=C3=A9nart?= <antoine.tenart@free-electrons.com>
+Date: Thu, 10 Apr 2014 15:07:50 +0200
+Subject: pinctrl: allows not to define the get_group_pins operation
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+When using a group only pinctrl driver, which does not have any
+information on the pins it is useless to define a get_group_pins
+always returning an empty list of pins.
+
+When not using get_group_pin[1], a driver must implement it so
+pins = NULL and num_pins = 0. This patch makes it the default
+behaviour if not defined in the pinctrl driver when used in
+pinmux enable and disable funtions and in pinctrl_groups_show.
+
+It also adds a check in pinctrl_get_group_pins and return -EINVAL if
+not defined. This function is called in the gpiolib when adding when
+pingroup range. It cannot be used if no group is defined, so this seams
+reasonable.
+
+[1] get_group_pin(struct pinctrl_dev *pctldev,
+ unsigned selector,
+ const unsigned **pins,
+ unsigned *num_pins);
+
+Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit e5b3b2d9ed202697a937c282f9c4d93b1e3e0848)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/core.c | 17 ++++++++++-------
+ drivers/pinctrl/pinmux.c | 23 +++++++++++++----------
+ 2 files changed, 23 insertions(+), 17 deletions(-)
+
+diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c
+index c0fe6091566a..e09474ecde23 100644
+--- a/drivers/pinctrl/core.c
++++ b/drivers/pinctrl/core.c
+@@ -468,6 +468,9 @@ int pinctrl_get_group_pins(struct pinctrl_dev *pctldev, const char *pin_group,
+ const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
+ int gs;
+
++ if (!pctlops->get_group_pins)
++ return -EINVAL;
++
+ gs = pinctrl_get_group_selector(pctldev, pin_group);
+ if (gs < 0)
+ return gs;
+@@ -1362,15 +1365,16 @@ static int pinctrl_groups_show(struct seq_file *s, void *what)
+
+ seq_puts(s, "registered pin groups:\n");
+ while (selector < ngroups) {
+- const unsigned *pins;
+- unsigned num_pins;
++ const unsigned *pins = NULL;
++ unsigned num_pins = 0;
+ const char *gname = ops->get_group_name(pctldev, selector);
+ const char *pname;
+- int ret;
++ int ret = 0;
+ int i;
+
+- ret = ops->get_group_pins(pctldev, selector,
+- &pins, &num_pins);
++ if (ops->get_group_pins)
++ ret = ops->get_group_pins(pctldev, selector,
++ &pins, &num_pins);
+ if (ret)
+ seq_printf(s, "%s [ERROR GETTING PINS]\n",
+ gname);
+@@ -1694,8 +1698,7 @@ static int pinctrl_check_ops(struct pinctrl_dev *pctldev)
+
+ if (!ops ||
+ !ops->get_groups_count ||
+- !ops->get_group_name ||
+- !ops->get_group_pins)
++ !ops->get_group_name)
+ return -EINVAL;
+
+ if (ops->dt_node_to_map && !ops->dt_free_map)
+diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c
+index 9248ce4efed4..051e8592990e 100644
+--- a/drivers/pinctrl/pinmux.c
++++ b/drivers/pinctrl/pinmux.c
+@@ -391,14 +391,16 @@ int pinmux_enable_setting(struct pinctrl_setting const *setting)
+ struct pinctrl_dev *pctldev = setting->pctldev;
+ const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
+ const struct pinmux_ops *ops = pctldev->desc->pmxops;
+- int ret;
+- const unsigned *pins;
+- unsigned num_pins;
++ int ret = 0;
++ const unsigned *pins = NULL;
++ unsigned num_pins = 0;
+ int i;
+ struct pin_desc *desc;
+
+- ret = pctlops->get_group_pins(pctldev, setting->data.mux.group,
+- &pins, &num_pins);
++ if (pctlops->get_group_pins)
++ ret = pctlops->get_group_pins(pctldev, setting->data.mux.group,
++ &pins, &num_pins);
++
+ if (ret) {
+ const char *gname;
+
+@@ -470,14 +472,15 @@ void pinmux_disable_setting(struct pinctrl_setting const *setting)
+ struct pinctrl_dev *pctldev = setting->pctldev;
+ const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
+ const struct pinmux_ops *ops = pctldev->desc->pmxops;
+- int ret;
+- const unsigned *pins;
+- unsigned num_pins;
++ int ret = 0;
++ const unsigned *pins = NULL;
++ unsigned num_pins = 0;
+ int i;
+ struct pin_desc *desc;
+
+- ret = pctlops->get_group_pins(pctldev, setting->data.mux.group,
+- &pins, &num_pins);
++ if (pctlops->get_group_pins)
++ ret = pctlops->get_group_pins(pctldev, setting->data.mux.group,
++ &pins, &num_pins);
+ if (ret) {
+ const char *gname;
+
+--
+2.1.2
+
--- /dev/null
+From 93e56fdd436255a86c3e850f097172ca3c60a6a7 Mon Sep 17 00:00:00 2001
+From: Benoit Taine <benoit.taine@lip6.fr>
+Date: Mon, 26 May 2014 17:21:27 +0200
+Subject: pinctrl: pinconf-generic: Use kmemdup instead of kmalloc + memcpy
+
+This issue was reported by coccicheck using the semantic patch
+at scripts/coccinelle/api/memdup.cocci
+
+Signed-off-by: Benoit Taine <benoit.taine@lip6.fr>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit db388dfb90368638ad238c27b045b6c9bf1f6c17)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/pinconf-generic.c | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/drivers/pinctrl/pinconf-generic.c b/drivers/pinctrl/pinconf-generic.c
+index 3d9a999fb699..2457ca961f1c 100644
+--- a/drivers/pinctrl/pinconf-generic.c
++++ b/drivers/pinctrl/pinconf-generic.c
+@@ -228,13 +228,12 @@ int pinconf_generic_parse_dt_config(struct device_node *np,
+ * Now limit the number of configs to the real number of
+ * found properties.
+ */
+- *configs = kzalloc(ncfg * sizeof(unsigned long), GFP_KERNEL);
++ *configs = kmemdup(cfg, ncfg * sizeof(unsigned long), GFP_KERNEL);
+ if (!*configs) {
+ ret = -ENOMEM;
+ goto out;
+ }
+
+- memcpy(*configs, cfg, ncfg * sizeof(unsigned long));
+ *nconfigs = ncfg;
+
+ out:
+--
+2.1.2
+
--- /dev/null
+From 2b666aaefc2ce2a5e40003a73009bf51ffb930c8 Mon Sep 17 00:00:00 2001
+From: "Ivan T. Ivanov" <iivanov@mm-sol.com>
+Date: Tue, 27 May 2014 09:27:36 +0300
+Subject: pinctrl: Enable "power-source" to be extracted from DT files
+
+Add "power-source" property to generic options used for DT parsing files.
+This enables drivers, which use generic pin configurations, to get the
+value passed to this property.
+
+Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit ca6c55189a631f3380ff0a28f90d920a84e60d7b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt | 1 +
+ drivers/pinctrl/pinconf-generic.c | 1 +
+ 2 files changed, 2 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
+index 4414163e76d2..fa40a177164c 100644
+--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
++++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
+@@ -156,6 +156,7 @@ input-disable - disable input on pin (no effect on output)
+ input-schmitt-enable - enable schmitt-trigger mode
+ input-schmitt-disable - disable schmitt-trigger mode
+ input-debounce - debounce mode with debound time X
++power-source - select between different power supplies
+ low-power-enable - enable low power mode
+ low-power-disable - disable low power mode
+ output-low - set the pin to output mode with low level
+diff --git a/drivers/pinctrl/pinconf-generic.c b/drivers/pinctrl/pinconf-generic.c
+index 2457ca961f1c..29ff77f90fcb 100644
+--- a/drivers/pinctrl/pinconf-generic.c
++++ b/drivers/pinctrl/pinconf-generic.c
+@@ -166,6 +166,7 @@ static struct pinconf_generic_dt_params dt_params[] = {
+ { "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 },
+ { "input-schmitt-disable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 0 },
+ { "input-debounce", PIN_CONFIG_INPUT_DEBOUNCE, 0 },
++ { "power-source", PIN_CONFIG_POWER_SOURCE, 0 },
+ { "low-power-enable", PIN_CONFIG_LOW_POWER_MODE, 1 },
+ { "low-power-disable", PIN_CONFIG_LOW_POWER_MODE, 0 },
+ { "output-low", PIN_CONFIG_OUTPUT, 0, },
+--
+2.1.2
+
--- /dev/null
+From 401124dbadc2e7ceab77f62f2f7fb77ce52da0cb Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 14 Apr 2014 19:02:55 +0200
+Subject: thermal: rcar: Use pm_runtime_put() i.s.o. pm_runtime_put_sync()
+
+There's no need for this to be synchronous
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Zhang Rui <rui.zhang@intel.com>
+(cherry picked from commit 09be511cdab813c2971c9f9af0cb40f6583cf80d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/thermal/rcar_thermal.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/thermal/rcar_thermal.c b/drivers/thermal/rcar_thermal.c
+index 5a37940b02c9..a8ed0e0265ae 100644
+--- a/drivers/thermal/rcar_thermal.c
++++ b/drivers/thermal/rcar_thermal.c
+@@ -470,7 +470,7 @@ error_unregister:
+ rcar_thermal_irq_disable(priv);
+ }
+
+- pm_runtime_put_sync(dev);
++ pm_runtime_put(dev);
+ pm_runtime_disable(dev);
+
+ return ret;
+@@ -488,7 +488,7 @@ static int rcar_thermal_remove(struct platform_device *pdev)
+ rcar_thermal_irq_disable(priv);
+ }
+
+- pm_runtime_put_sync(dev);
++ pm_runtime_put(dev);
+ pm_runtime_disable(dev);
+
+ return 0;
+--
+2.1.2
+
--- /dev/null
+From af1ca0e6267d457c67852835dfd589e5c4470970 Mon Sep 17 00:00:00 2001
+From: Jingoo Han <jg1.han@samsung.com>
+Date: Wed, 7 May 2014 15:03:25 +0900
+Subject: thermal: rcar: remove unnecessary OOM messages
+
+The site-specific OOM messages are unnecessary, because they
+duplicate the MM subsystem generic OOM message.
+
+Signed-off-by: Jingoo Han <jg1.han@samsung.com>
+Acked-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Zhang Rui <rui.zhang@intel.com>
+(cherry picked from commit b0a60d88d60b92c769ec589796403937f6e5243e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/thermal/rcar_thermal.c | 5 +----
+ 1 file changed, 1 insertion(+), 4 deletions(-)
+
+diff --git a/drivers/thermal/rcar_thermal.c b/drivers/thermal/rcar_thermal.c
+index a8ed0e0265ae..8803e693fe68 100644
+--- a/drivers/thermal/rcar_thermal.c
++++ b/drivers/thermal/rcar_thermal.c
+@@ -374,10 +374,8 @@ static int rcar_thermal_probe(struct platform_device *pdev)
+ int idle = IDLE_INTERVAL;
+
+ common = devm_kzalloc(dev, sizeof(*common), GFP_KERNEL);
+- if (!common) {
+- dev_err(dev, "Could not allocate common\n");
++ if (!common)
+ return -ENOMEM;
+- }
+
+ INIT_LIST_HEAD(&common->head);
+ spin_lock_init(&common->lock);
+@@ -423,7 +421,6 @@ static int rcar_thermal_probe(struct platform_device *pdev)
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv) {
+- dev_err(dev, "Could not allocate priv\n");
+ ret = -ENOMEM;
+ goto error_unregister;
+ }
+--
+2.1.2
+
--- /dev/null
+From bf3a6f4fffd0a9baef158a7ad61ae9875a29937e Mon Sep 17 00:00:00 2001
+From: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
+Date: Wed, 7 May 2014 17:17:44 +0200
+Subject: ata: use CONFIG_PM_SLEEP instead of CONFIG_PM where applicable in
+ host drivers
+
+This patch fixes host drivers to use CONFIG_PM_SLEEP instead of CONFIG_PM
+where applicable. Benefits of this change:
+
+* unused code is not being compiled in for CONFIG_PM=y, CONFIG_PM_SLEEP=n
+ and CONFIG_PM_RUNTIME=y configurations
+
+* easier transition to use struct dev_pm_ops and SIMPLE_DEV_PM_OPS() in
+ the future
+
+* more consistent code (there are host drivers which are using the correct
+ CONFIG_PM_SLEEP checks already)
+
+The patch leaves the core libata code and ->port_[suspend,resume] support
+in sata_[inic162x,nv,sil24].c alone for now.
+
+Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
+Signed-off-by: Tejun Heo <tj@kernel.org>
+(cherry picked from commit 58eb8cd565af4a104395e3c10443951c1f73dafe)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/ata/acard-ahci.c | 6 +++---
+ drivers/ata/ata_generic.c | 2 +-
+ drivers/ata/ata_piix.c | 4 ++--
+ drivers/ata/pata_acpi.c | 2 +-
+ drivers/ata/pata_ali.c | 4 ++--
+ drivers/ata/pata_amd.c | 4 ++--
+ drivers/ata/pata_artop.c | 4 ++--
+ drivers/ata/pata_atiixp.c | 2 +-
+ drivers/ata/pata_atp867x.c | 4 ++--
+ drivers/ata/pata_bf54x.c | 2 +-
+ drivers/ata/pata_cmd640.c | 4 ++--
+ drivers/ata/pata_cmd64x.c | 4 ++--
+ drivers/ata/pata_cs5520.c | 6 +++---
+ drivers/ata/pata_cs5530.c | 6 +++---
+ drivers/ata/pata_cs5535.c | 2 +-
+ drivers/ata/pata_cs5536.c | 2 +-
+ drivers/ata/pata_cypress.c | 2 +-
+ drivers/ata/pata_efar.c | 2 +-
+ drivers/ata/pata_hpt366.c | 4 ++--
+ drivers/ata/pata_hpt3x3.c | 4 ++--
+ drivers/ata/pata_imx.c | 4 ++--
+ drivers/ata/pata_it8213.c | 2 +-
+ drivers/ata/pata_it821x.c | 4 ++--
+ drivers/ata/pata_jmicron.c | 2 +-
+ drivers/ata/pata_macio.c | 22 ++++++++--------------
+ drivers/ata/pata_marvell.c | 2 +-
+ drivers/ata/pata_mpc52xx.c | 8 ++------
+ drivers/ata/pata_mpiix.c | 2 +-
+ drivers/ata/pata_netcell.c | 2 +-
+ drivers/ata/pata_ninja32.c | 5 ++---
+ drivers/ata/pata_ns87410.c | 2 +-
+ drivers/ata/pata_ns87415.c | 4 ++--
+ drivers/ata/pata_oldpiix.c | 2 +-
+ drivers/ata/pata_opti.c | 2 +-
+ drivers/ata/pata_optidma.c | 2 +-
+ drivers/ata/pata_pdc2027x.c | 6 +++---
+ drivers/ata/pata_pdc202xx_old.c | 2 +-
+ drivers/ata/pata_piccolo.c | 2 +-
+ drivers/ata/pata_radisys.c | 2 +-
+ drivers/ata/pata_rdc.c | 2 +-
+ drivers/ata/pata_rz1000.c | 4 ++--
+ drivers/ata/pata_samsung_cf.c | 4 ++--
+ drivers/ata/pata_sc1200.c | 2 +-
+ drivers/ata/pata_scc.c | 2 +-
+ drivers/ata/pata_sch.c | 2 +-
+ drivers/ata/pata_serverworks.c | 4 ++--
+ drivers/ata/pata_sil680.c | 4 ++--
+ drivers/ata/pata_sis.c | 4 ++--
+ drivers/ata/pata_sl82c105.c | 4 ++--
+ drivers/ata/pata_triflex.c | 4 ++--
+ drivers/ata/pata_via.c | 4 ++--
+ drivers/ata/sata_fsl.c | 4 ++--
+ drivers/ata/sata_inic162x.c | 4 ++--
+ drivers/ata/sata_mv.c | 8 ++++----
+ drivers/ata/sata_nv.c | 6 +++---
+ drivers/ata/sata_rcar.c | 4 ++--
+ drivers/ata/sata_sil.c | 6 +++---
+ drivers/ata/sata_sil24.c | 10 +++++++---
+ drivers/ata/sata_sis.c | 2 +-
+ drivers/ata/sata_via.c | 2 +-
+ 60 files changed, 113 insertions(+), 120 deletions(-)
+
+--- a/drivers/ata/acard-ahci.c
++++ b/drivers/ata/acard-ahci.c
+@@ -78,7 +78,7 @@ static bool acard_ahci_qc_fill_rtf(struc
+ static int acard_ahci_port_start(struct ata_port *ap);
+ static int acard_ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int acard_ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg);
+ static int acard_ahci_pci_device_resume(struct pci_dev *pdev);
+ #endif
+@@ -119,13 +119,13 @@ static struct pci_driver acard_ahci_pci_
+ .id_table = acard_ahci_pci_tbl,
+ .probe = acard_ahci_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = acard_ahci_pci_device_suspend,
+ .resume = acard_ahci_pci_device_resume,
+ #endif
+ };
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int acard_ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+--- a/drivers/ata/ata_generic.c
++++ b/drivers/ata/ata_generic.c
+@@ -242,7 +242,7 @@ static struct pci_driver ata_generic_pci
+ .id_table = ata_generic,
+ .probe = ata_generic_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/ata_piix.c
++++ b/drivers/ata/ata_piix.c
+@@ -838,7 +838,7 @@ static bool piix_irq_check(struct ata_po
+ return ap->ops->bmdma_status(ap) & ATA_DMA_INTR;
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int piix_broken_suspend(void)
+ {
+ static const struct dmi_system_id sysids[] = {
+@@ -1775,7 +1775,7 @@ static struct pci_driver piix_pci_driver
+ .id_table = piix_pci_tbl,
+ .probe = piix_init_one,
+ .remove = piix_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = piix_pci_device_suspend,
+ .resume = piix_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_acpi.c
++++ b/drivers/ata/pata_acpi.c
+@@ -266,7 +266,7 @@ static struct pci_driver pacpi_pci_drive
+ .id_table = pacpi_pci_tbl,
+ .probe = pacpi_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_ali.c
++++ b/drivers/ata/pata_ali.c
+@@ -589,7 +589,7 @@ static int ali_init_one(struct pci_dev *
+ return ata_pci_bmdma_init_one(pdev, ppi, &ali_sht, NULL, 0);
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int ali_reinit_one(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+@@ -616,7 +616,7 @@ static struct pci_driver ali_pci_driver
+ .id_table = ali,
+ .probe = ali_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ali_reinit_one,
+ #endif
+--- a/drivers/ata/pata_amd.c
++++ b/drivers/ata/pata_amd.c
+@@ -575,7 +575,7 @@ static int amd_init_one(struct pci_dev *
+ return ata_pci_bmdma_init_one(pdev, ppi, &amd_sht, hpriv, 0);
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int amd_reinit_one(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+@@ -626,7 +626,7 @@ static struct pci_driver amd_pci_driver
+ .id_table = amd,
+ .probe = amd_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = amd_reinit_one,
+ #endif
+--- a/drivers/ata/pata_artop.c
++++ b/drivers/ata/pata_artop.c
+@@ -423,7 +423,7 @@ static const struct pci_device_id artop_
+ { } /* terminate list */
+ };
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int atp8xx_reinit_one(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+@@ -445,7 +445,7 @@ static struct pci_driver artop_pci_drive
+ .id_table = artop_pci_tbl,
+ .probe = artop_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = atp8xx_reinit_one,
+ #endif
+--- a/drivers/ata/pata_atiixp.c
++++ b/drivers/ata/pata_atiixp.c
+@@ -299,7 +299,7 @@ static struct pci_driver atiixp_pci_driv
+ .id_table = atiixp,
+ .probe = atiixp_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .resume = ata_pci_device_resume,
+ .suspend = ata_pci_device_suspend,
+ #endif
+--- a/drivers/ata/pata_atp867x.c
++++ b/drivers/ata/pata_atp867x.c
+@@ -531,7 +531,7 @@ err_out:
+ return rc;
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int atp867x_reinit_one(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+@@ -559,7 +559,7 @@ static struct pci_driver atp867x_driver
+ .id_table = atp867x_pci_tbl,
+ .probe = atp867x_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = atp867x_reinit_one,
+ #endif
+--- a/drivers/ata/pata_bf54x.c
++++ b/drivers/ata/pata_bf54x.c
+@@ -1619,7 +1619,7 @@ static int bfin_atapi_remove(struct plat
+ return 0;
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int bfin_atapi_suspend(struct platform_device *pdev, pm_message_t state)
+ {
+ struct ata_host *host = platform_get_drvdata(pdev);
+--- a/drivers/ata/pata_cmd640.c
++++ b/drivers/ata/pata_cmd640.c
+@@ -232,7 +232,7 @@ static int cmd640_init_one(struct pci_de
+ return ata_pci_sff_init_one(pdev, ppi, &cmd640_sht, NULL, 0);
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int cmd640_reinit_one(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+@@ -257,7 +257,7 @@ static struct pci_driver cmd640_pci_driv
+ .id_table = cmd640,
+ .probe = cmd640_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = cmd640_reinit_one,
+ #endif
+--- a/drivers/ata/pata_cmd64x.c
++++ b/drivers/ata/pata_cmd64x.c
+@@ -488,7 +488,7 @@ static int cmd64x_init_one(struct pci_de
+ return ata_pci_bmdma_init_one(pdev, ppi, &cmd64x_sht, NULL, 0);
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int cmd64x_reinit_one(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+@@ -519,7 +519,7 @@ static struct pci_driver cmd64x_pci_driv
+ .id_table = cmd64x,
+ .probe = cmd64x_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = cmd64x_reinit_one,
+ #endif
+--- a/drivers/ata/pata_cs5520.c
++++ b/drivers/ata/pata_cs5520.c
+@@ -230,7 +230,7 @@ static int cs5520_init_one(struct pci_de
+ return ata_host_register(host, &cs5520_sht);
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ /**
+ * cs5520_reinit_one - device resume
+ * @pdev: PCI device
+@@ -279,7 +279,7 @@ static int cs5520_pci_device_suspend(str
+ pci_save_state(pdev);
+ return 0;
+ }
+-#endif /* CONFIG_PM */
++#endif /* CONFIG_PM_SLEEP */
+
+ /* For now keep DMA off. We can set it for all but A rev CS5510 once the
+ core ATA code can handle it */
+@@ -296,7 +296,7 @@ static struct pci_driver cs5520_pci_driv
+ .id_table = pata_cs5520,
+ .probe = cs5520_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = cs5520_pci_device_suspend,
+ .resume = cs5520_reinit_one,
+ #endif
+--- a/drivers/ata/pata_cs5530.c
++++ b/drivers/ata/pata_cs5530.c
+@@ -327,7 +327,7 @@ static int cs5530_init_one(struct pci_de
+ return ata_pci_bmdma_init_one(pdev, ppi, &cs5530_sht, NULL, 0);
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int cs5530_reinit_one(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+@@ -344,7 +344,7 @@ static int cs5530_reinit_one(struct pci_
+ ata_host_resume(host);
+ return 0;
+ }
+-#endif /* CONFIG_PM */
++#endif /* CONFIG_PM_SLEEP */
+
+ static const struct pci_device_id cs5530[] = {
+ { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5530_IDE), },
+@@ -357,7 +357,7 @@ static struct pci_driver cs5530_pci_driv
+ .id_table = cs5530,
+ .probe = cs5530_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = cs5530_reinit_one,
+ #endif
+--- a/drivers/ata/pata_cs5535.c
++++ b/drivers/ata/pata_cs5535.c
+@@ -201,7 +201,7 @@ static struct pci_driver cs5535_pci_driv
+ .id_table = cs5535,
+ .probe = cs5535_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_cs5536.c
++++ b/drivers/ata/pata_cs5536.c
+@@ -298,7 +298,7 @@ static struct pci_driver cs5536_pci_driv
+ .id_table = cs5536,
+ .probe = cs5536_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_cypress.c
++++ b/drivers/ata/pata_cypress.c
+@@ -152,7 +152,7 @@ static struct pci_driver cy82c693_pci_dr
+ .id_table = cy82c693,
+ .probe = cy82c693_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_efar.c
++++ b/drivers/ata/pata_efar.c
+@@ -289,7 +289,7 @@ static struct pci_driver efar_pci_driver
+ .id_table = efar_pci_tbl,
+ .probe = efar_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_hpt366.c
++++ b/drivers/ata/pata_hpt366.c
+@@ -387,7 +387,7 @@ static int hpt36x_init_one(struct pci_de
+ return ata_pci_bmdma_init_one(dev, ppi, &hpt36x_sht, hpriv, 0);
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int hpt36x_reinit_one(struct pci_dev *dev)
+ {
+ struct ata_host *host = pci_get_drvdata(dev);
+@@ -412,7 +412,7 @@ static struct pci_driver hpt36x_pci_driv
+ .id_table = hpt36x,
+ .probe = hpt36x_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = hpt36x_reinit_one,
+ #endif
+--- a/drivers/ata/pata_hpt3x3.c
++++ b/drivers/ata/pata_hpt3x3.c
+@@ -250,7 +250,7 @@ static int hpt3x3_init_one(struct pci_de
+ IRQF_SHARED, &hpt3x3_sht);
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int hpt3x3_reinit_one(struct pci_dev *dev)
+ {
+ struct ata_host *host = pci_get_drvdata(dev);
+@@ -278,7 +278,7 @@ static struct pci_driver hpt3x3_pci_driv
+ .id_table = hpt3x3,
+ .probe = hpt3x3_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = hpt3x3_reinit_one,
+ #endif
+--- a/drivers/ata/pata_imx.c
++++ b/drivers/ata/pata_imx.c
+@@ -191,7 +191,7 @@ static int pata_imx_remove(struct platfo
+ return 0;
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int pata_imx_suspend(struct device *dev)
+ {
+ struct ata_host *host = dev_get_drvdata(dev);
+@@ -250,7 +250,7 @@ static struct platform_driver pata_imx_d
+ .name = DRV_NAME,
+ .of_match_table = imx_pata_dt_ids,
+ .owner = THIS_MODULE,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .pm = &pata_imx_pm_ops,
+ #endif
+ },
+--- a/drivers/ata/pata_it8213.c
++++ b/drivers/ata/pata_it8213.c
+@@ -284,7 +284,7 @@ static struct pci_driver it8213_pci_driv
+ .id_table = it8213_pci_tbl,
+ .probe = it8213_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_it821x.c
++++ b/drivers/ata/pata_it821x.c
+@@ -936,7 +936,7 @@ static int it821x_init_one(struct pci_de
+ return ata_pci_bmdma_init_one(pdev, ppi, &it821x_sht, NULL, 0);
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int it821x_reinit_one(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+@@ -966,7 +966,7 @@ static struct pci_driver it821x_pci_driv
+ .id_table = it821x,
+ .probe = it821x_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = it821x_reinit_one,
+ #endif
+--- a/drivers/ata/pata_jmicron.c
++++ b/drivers/ata/pata_jmicron.c
+@@ -158,7 +158,7 @@ static struct pci_driver jmicron_pci_dri
+ .id_table = jmicron_pci_tbl,
+ .probe = jmicron_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_macio.c
++++ b/drivers/ata/pata_macio.c
+@@ -845,8 +845,7 @@ static int pata_macio_slave_config(struc
+ return 0;
+ }
+
+-#ifdef CONFIG_PM
+-
++#ifdef CONFIG_PM_SLEEP
+ static int pata_macio_do_suspend(struct pata_macio_priv *priv, pm_message_t mesg)
+ {
+ int rc;
+@@ -907,8 +906,7 @@ static int pata_macio_do_resume(struct p
+
+ return 0;
+ }
+-
+-#endif /* CONFIG_PM */
++#endif /* CONFIG_PM_SLEEP */
+
+ static struct scsi_host_template pata_macio_sht = {
+ ATA_BASE_SHT(DRV_NAME),
+@@ -1208,8 +1206,7 @@ static int pata_macio_detach(struct maci
+ return 0;
+ }
+
+-#ifdef CONFIG_PM
+-
++#ifdef CONFIG_PM_SLEEP
+ static int pata_macio_suspend(struct macio_dev *mdev, pm_message_t mesg)
+ {
+ struct ata_host *host = macio_get_drvdata(mdev);
+@@ -1223,8 +1220,7 @@ static int pata_macio_resume(struct maci
+
+ return pata_macio_do_resume(host->private_data);
+ }
+-
+-#endif /* CONFIG_PM */
++#endif /* CONFIG_PM_SLEEP */
+
+ #ifdef CONFIG_PMAC_MEDIABAY
+ static void pata_macio_mb_event(struct macio_dev* mdev, int mb_state)
+@@ -1316,8 +1312,7 @@ static void pata_macio_pci_detach(struct
+ ata_host_detach(host);
+ }
+
+-#ifdef CONFIG_PM
+-
++#ifdef CONFIG_PM_SLEEP
+ static int pata_macio_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+@@ -1331,8 +1326,7 @@ static int pata_macio_pci_resume(struct
+
+ return pata_macio_do_resume(host->private_data);
+ }
+-
+-#endif /* CONFIG_PM */
++#endif /* CONFIG_PM_SLEEP */
+
+ static struct of_device_id pata_macio_match[] =
+ {
+@@ -1360,7 +1354,7 @@ static struct macio_driver pata_macio_dr
+ },
+ .probe = pata_macio_attach,
+ .remove = pata_macio_detach,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = pata_macio_suspend,
+ .resume = pata_macio_resume,
+ #endif
+@@ -1383,7 +1377,7 @@ static struct pci_driver pata_macio_pci_
+ .id_table = pata_macio_pci_match,
+ .probe = pata_macio_pci_attach,
+ .remove = pata_macio_pci_detach,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = pata_macio_pci_suspend,
+ .resume = pata_macio_pci_resume,
+ #endif
+--- a/drivers/ata/pata_marvell.c
++++ b/drivers/ata/pata_marvell.c
+@@ -172,7 +172,7 @@ static struct pci_driver marvell_pci_dri
+ .id_table = marvell_pci_tbl,
+ .probe = marvell_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_mpc52xx.c
++++ b/drivers/ata/pata_mpc52xx.c
+@@ -819,9 +819,7 @@ mpc52xx_ata_remove(struct platform_devic
+ return 0;
+ }
+
+-
+-#ifdef CONFIG_PM
+-
++#ifdef CONFIG_PM_SLEEP
+ static int
+ mpc52xx_ata_suspend(struct platform_device *op, pm_message_t state)
+ {
+@@ -847,10 +845,8 @@ mpc52xx_ata_resume(struct platform_devic
+
+ return 0;
+ }
+-
+ #endif
+
+-
+ static struct of_device_id mpc52xx_ata_of_match[] = {
+ { .compatible = "fsl,mpc5200-ata", },
+ { .compatible = "mpc5200-ata", },
+@@ -861,7 +857,7 @@ static struct of_device_id mpc52xx_ata_o
+ static struct platform_driver mpc52xx_ata_of_platform_driver = {
+ .probe = mpc52xx_ata_probe,
+ .remove = mpc52xx_ata_remove,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = mpc52xx_ata_suspend,
+ .resume = mpc52xx_ata_resume,
+ #endif
+--- a/drivers/ata/pata_mpiix.c
++++ b/drivers/ata/pata_mpiix.c
+@@ -224,7 +224,7 @@ static struct pci_driver mpiix_pci_drive
+ .id_table = mpiix,
+ .probe = mpiix_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_netcell.c
++++ b/drivers/ata/pata_netcell.c
+@@ -93,7 +93,7 @@ static struct pci_driver netcell_pci_dri
+ .id_table = netcell_pci_tbl,
+ .probe = netcell_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_ninja32.c
++++ b/drivers/ata/pata_ninja32.c
+@@ -153,8 +153,7 @@ static int ninja32_init_one(struct pci_d
+ IRQF_SHARED, &ninja32_sht);
+ }
+
+-#ifdef CONFIG_PM
+-
++#ifdef CONFIG_PM_SLEEP
+ static int ninja32_reinit_one(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+@@ -184,7 +183,7 @@ static struct pci_driver ninja32_pci_dri
+ .id_table = ninja32,
+ .probe = ninja32_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ninja32_reinit_one,
+ #endif
+--- a/drivers/ata/pata_ns87410.c
++++ b/drivers/ata/pata_ns87410.c
+@@ -162,7 +162,7 @@ static struct pci_driver ns87410_pci_dri
+ .id_table = ns87410,
+ .probe = ns87410_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_ns87415.c
++++ b/drivers/ata/pata_ns87415.c
+@@ -386,7 +386,7 @@ static const struct pci_device_id ns8741
+ { } /* terminate list */
+ };
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int ns87415_reinit_one(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+@@ -408,7 +408,7 @@ static struct pci_driver ns87415_pci_dri
+ .id_table = ns87415_pci_tbl,
+ .probe = ns87415_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ns87415_reinit_one,
+ #endif
+--- a/drivers/ata/pata_oldpiix.c
++++ b/drivers/ata/pata_oldpiix.c
+@@ -259,7 +259,7 @@ static struct pci_driver oldpiix_pci_dri
+ .id_table = oldpiix_pci_tbl,
+ .probe = oldpiix_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_opti.c
++++ b/drivers/ata/pata_opti.c
+@@ -185,7 +185,7 @@ static struct pci_driver opti_pci_driver
+ .id_table = opti,
+ .probe = opti_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_optidma.c
++++ b/drivers/ata/pata_optidma.c
+@@ -441,7 +441,7 @@ static struct pci_driver optidma_pci_dri
+ .id_table = optidma,
+ .probe = optidma_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_pdc2027x.c
++++ b/drivers/ata/pata_pdc2027x.c
+@@ -63,7 +63,7 @@ enum {
+ };
+
+ static int pdc2027x_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int pdc2027x_reinit_one(struct pci_dev *pdev);
+ #endif
+ static int pdc2027x_prereset(struct ata_link *link, unsigned long deadline);
+@@ -129,7 +129,7 @@ static struct pci_driver pdc2027x_pci_dr
+ .id_table = pdc2027x_pci_tbl,
+ .probe = pdc2027x_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = pdc2027x_reinit_one,
+ #endif
+@@ -762,7 +762,7 @@ static int pdc2027x_init_one(struct pci_
+ IRQF_SHARED, &pdc2027x_sht);
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int pdc2027x_reinit_one(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+--- a/drivers/ata/pata_pdc202xx_old.c
++++ b/drivers/ata/pata_pdc202xx_old.c
+@@ -378,7 +378,7 @@ static struct pci_driver pdc202xx_pci_dr
+ .id_table = pdc202xx,
+ .probe = pdc202xx_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_piccolo.c
++++ b/drivers/ata/pata_piccolo.c
+@@ -111,7 +111,7 @@ static struct pci_driver ata_tosh_pci_dr
+ .id_table = ata_tosh,
+ .probe = ata_tosh_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_radisys.c
++++ b/drivers/ata/pata_radisys.c
+@@ -238,7 +238,7 @@ static struct pci_driver radisys_pci_dri
+ .id_table = radisys_pci_tbl,
+ .probe = radisys_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_rdc.c
++++ b/drivers/ata/pata_rdc.c
+@@ -383,7 +383,7 @@ static struct pci_driver rdc_pci_driver
+ .id_table = rdc_pci_tbl,
+ .probe = rdc_init_one,
+ .remove = rdc_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_rz1000.c
++++ b/drivers/ata/pata_rz1000.c
+@@ -102,7 +102,7 @@ static int rz1000_init_one (struct pci_d
+ return -ENODEV;
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int rz1000_reinit_one(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+@@ -134,7 +134,7 @@ static struct pci_driver rz1000_pci_driv
+ .id_table = pata_rz1000,
+ .probe = rz1000_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = rz1000_reinit_one,
+ #endif
+--- a/drivers/ata/pata_samsung_cf.c
++++ b/drivers/ata/pata_samsung_cf.c
+@@ -615,7 +615,7 @@ static int __exit pata_s3c_remove(struct
+ return 0;
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int pata_s3c_suspend(struct device *dev)
+ {
+ struct platform_device *pdev = to_platform_device(dev);
+@@ -666,7 +666,7 @@ static struct platform_driver pata_s3c_d
+ .driver = {
+ .name = DRV_NAME,
+ .owner = THIS_MODULE,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .pm = &pata_s3c_pm_ops,
+ #endif
+ },
+--- a/drivers/ata/pata_sc1200.c
++++ b/drivers/ata/pata_sc1200.c
+@@ -255,7 +255,7 @@ static struct pci_driver sc1200_pci_driv
+ .id_table = sc1200,
+ .probe = sc1200_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_scc.c
++++ b/drivers/ata/pata_scc.c
+@@ -1096,7 +1096,7 @@ static struct pci_driver scc_pci_driver
+ .id_table = scc_pci_tbl,
+ .probe = scc_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_sch.c
++++ b/drivers/ata/pata_sch.c
+@@ -65,7 +65,7 @@ static struct pci_driver sch_pci_driver
+ .id_table = sch_pci_tbl,
+ .probe = sch_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_serverworks.c
++++ b/drivers/ata/pata_serverworks.c
+@@ -437,7 +437,7 @@ static int serverworks_init_one(struct p
+ return ata_pci_bmdma_init_one(pdev, ppi, &serverworks_sht, NULL, 0);
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int serverworks_reinit_one(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+@@ -469,7 +469,7 @@ static struct pci_driver serverworks_pci
+ .id_table = serverworks,
+ .probe = serverworks_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = serverworks_reinit_one,
+ #endif
+--- a/drivers/ata/pata_sil680.c
++++ b/drivers/ata/pata_sil680.c
+@@ -404,7 +404,7 @@ use_ioports:
+ return ata_pci_bmdma_init_one(pdev, ppi, &sil680_sht, NULL, 0);
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int sil680_reinit_one(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+@@ -430,7 +430,7 @@ static struct pci_driver sil680_pci_driv
+ .id_table = sil680,
+ .probe = sil680_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = sil680_reinit_one,
+ #endif
+--- a/drivers/ata/pata_sis.c
++++ b/drivers/ata/pata_sis.c
+@@ -870,7 +870,7 @@ static int sis_init_one (struct pci_dev
+ return ata_pci_bmdma_init_one(pdev, ppi, &sis_sht, chipset, 0);
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int sis_reinit_one(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+@@ -900,7 +900,7 @@ static struct pci_driver sis_pci_driver
+ .id_table = sis_pci_tbl,
+ .probe = sis_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = sis_reinit_one,
+ #endif
+--- a/drivers/ata/pata_sl82c105.c
++++ b/drivers/ata/pata_sl82c105.c
+@@ -338,7 +338,7 @@ static int sl82c105_init_one(struct pci_
+ return ata_pci_bmdma_init_one(dev, ppi, &sl82c105_sht, NULL, 0);
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int sl82c105_reinit_one(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+@@ -366,7 +366,7 @@ static struct pci_driver sl82c105_pci_dr
+ .id_table = sl82c105,
+ .probe = sl82c105_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = sl82c105_reinit_one,
+ #endif
+--- a/drivers/ata/pata_triflex.c
++++ b/drivers/ata/pata_triflex.c
+@@ -208,7 +208,7 @@ static const struct pci_device_id trifle
+ { },
+ };
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int triflex_ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+@@ -234,7 +234,7 @@ static struct pci_driver triflex_pci_dri
+ .id_table = triflex,
+ .probe = triflex_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = triflex_ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/pata_via.c
++++ b/drivers/ata/pata_via.c
+@@ -660,7 +660,7 @@ static int via_init_one(struct pci_dev *
+ return ata_pci_bmdma_init_one(pdev, ppi, &via_sht, (void *)config, 0);
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ /**
+ * via_reinit_one - reinit after resume
+ * @pdev; PCI device
+@@ -705,7 +705,7 @@ static struct pci_driver via_pci_driver
+ .id_table = via,
+ .probe = via_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = via_reinit_one,
+ #endif
+--- a/drivers/ata/sata_fsl.c
++++ b/drivers/ata/sata_fsl.c
+@@ -1588,7 +1588,7 @@ static int sata_fsl_remove(struct platfo
+ return 0;
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int sata_fsl_suspend(struct platform_device *op, pm_message_t state)
+ {
+ struct ata_host *host = platform_get_drvdata(op);
+@@ -1644,7 +1644,7 @@ static struct platform_driver fsl_sata_d
+ },
+ .probe = sata_fsl_probe,
+ .remove = sata_fsl_remove,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = sata_fsl_suspend,
+ .resume = sata_fsl_resume,
+ #endif
+--- a/drivers/ata/sata_inic162x.c
++++ b/drivers/ata/sata_inic162x.c
+@@ -785,7 +785,7 @@ static int init_controller(void __iomem
+ return 0;
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int inic_pci_device_resume(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+@@ -898,7 +898,7 @@ static const struct pci_device_id inic_p
+ static struct pci_driver inic_pci_driver = {
+ .name = DRV_NAME,
+ .id_table = inic_pci_tbl,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = inic_pci_device_resume,
+ #endif
+--- a/drivers/ata/sata_mv.c
++++ b/drivers/ata/sata_mv.c
+@@ -4222,7 +4222,7 @@ static int mv_platform_remove(struct pla
+ return 0;
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int mv_platform_suspend(struct platform_device *pdev, pm_message_t state)
+ {
+ struct ata_host *host = platform_get_drvdata(pdev);
+@@ -4289,7 +4289,7 @@ static struct platform_driver mv_platfor
+ #ifdef CONFIG_PCI
+ static int mv_pci_init_one(struct pci_dev *pdev,
+ const struct pci_device_id *ent);
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int mv_pci_device_resume(struct pci_dev *pdev);
+ #endif
+
+@@ -4299,7 +4299,7 @@ static struct pci_driver mv_pci_driver =
+ .id_table = mv_pci_tbl,
+ .probe = mv_pci_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = mv_pci_device_resume,
+ #endif
+@@ -4457,7 +4457,7 @@ static int mv_pci_init_one(struct pci_de
+ IS_GEN_I(hpriv) ? &mv5_sht : &mv6_sht);
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int mv_pci_device_resume(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+--- a/drivers/ata/sata_nv.c
++++ b/drivers/ata/sata_nv.c
+@@ -296,7 +296,7 @@ struct nv_swncq_port_priv {
+ #define NV_ADMA_CHECK_INTR(GCTL, PORT) ((GCTL) & (1 << (19 + (12 * (PORT)))))
+
+ static int nv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int nv_pci_device_resume(struct pci_dev *pdev);
+ #endif
+ static void nv_ck804_host_stop(struct ata_host *host);
+@@ -380,7 +380,7 @@ static struct pci_driver nv_pci_driver =
+ .name = DRV_NAME,
+ .id_table = nv_pci_tbl,
+ .probe = nv_init_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = nv_pci_device_resume,
+ #endif
+@@ -2432,7 +2432,7 @@ static int nv_init_one(struct pci_dev *p
+ return ata_pci_sff_activate_host(host, ipriv->irq_handler, ipriv->sht);
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int nv_pci_device_resume(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+--- a/drivers/ata/sata_rcar.c
++++ b/drivers/ata/sata_rcar.c
+@@ -937,7 +937,7 @@ static int sata_rcar_remove(struct platf
+ return 0;
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int sata_rcar_suspend(struct device *dev)
+ {
+ struct ata_host *host = dev_get_drvdata(dev);
+@@ -991,7 +991,7 @@ static struct platform_driver sata_rcar_
+ .name = DRV_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = sata_rcar_match,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .pm = &sata_rcar_pm_ops,
+ #endif
+ },
+--- a/drivers/ata/sata_sil.c
++++ b/drivers/ata/sata_sil.c
+@@ -113,7 +113,7 @@ enum {
+ };
+
+ static int sil_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int sil_pci_device_resume(struct pci_dev *pdev);
+ #endif
+ static void sil_dev_config(struct ata_device *dev);
+@@ -167,7 +167,7 @@ static struct pci_driver sil_pci_driver
+ .id_table = sil_pci_tbl,
+ .probe = sil_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = sil_pci_device_resume,
+ #endif
+@@ -803,7 +803,7 @@ static int sil_init_one(struct pci_dev *
+ &sil_sht);
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int sil_pci_device_resume(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+--- a/drivers/ata/sata_sil24.c
++++ b/drivers/ata/sata_sil24.c
+@@ -353,8 +353,10 @@ static void sil24_error_handler(struct a
+ static void sil24_post_internal_cmd(struct ata_queued_cmd *qc);
+ static int sil24_port_start(struct ata_port *ap);
+ static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int sil24_pci_device_resume(struct pci_dev *pdev);
++#endif
++#ifdef CONFIG_PM
+ static int sil24_port_resume(struct ata_port *ap);
+ #endif
+
+@@ -375,7 +377,7 @@ static struct pci_driver sil24_pci_drive
+ .id_table = sil24_pci_tbl,
+ .probe = sil24_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = sil24_pci_device_resume,
+ #endif
+@@ -1350,7 +1352,7 @@ static int sil24_init_one(struct pci_dev
+ &sil24_sht);
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int sil24_pci_device_resume(struct pci_dev *pdev)
+ {
+ struct ata_host *host = pci_get_drvdata(pdev);
+@@ -1370,7 +1372,9 @@ static int sil24_pci_device_resume(struc
+
+ return 0;
+ }
++#endif
+
++#ifdef CONFIG_PM
+ static int sil24_port_resume(struct ata_port *ap)
+ {
+ sil24_config_pmp(ap, ap->nr_pmp_links);
+--- a/drivers/ata/sata_sis.c
++++ b/drivers/ata/sata_sis.c
+@@ -83,7 +83,7 @@ static struct pci_driver sis_pci_driver
+ .id_table = sis_pci_tbl,
+ .probe = sis_init_one,
+ .remove = ata_pci_remove_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
+--- a/drivers/ata/sata_via.c
++++ b/drivers/ata/sata_via.c
+@@ -104,7 +104,7 @@ static struct pci_driver svia_pci_driver
+ .name = DRV_NAME,
+ .id_table = svia_pci_tbl,
+ .probe = svia_init_one,
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ .suspend = ata_pci_device_suspend,
+ .resume = ata_pci_device_resume,
+ #endif
--- /dev/null
+From 1c2fed7587443a8ecc5a766b59ffb3afda2d222f Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 17 Feb 2014 11:27:49 +0100
+Subject: clocksource: sh_cmt: Use request_irq() instead of setup_irq()
+
+The driver claims it needs to register an interrupt handler too early
+for request_irq(). This might have been true in the past, but the only
+meaningful difference between request_irq() and setup_irq() today is an
+additional kzalloc() call in request_irq(). As the driver calls
+kmalloc() itself we know that the slab allocator is available, we can
+thus switch to request_irq().
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit dc2eadece70089430f12e4ed6bb1a4421cf3d6f4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 10 +++-------
+ 1 file changed, 3 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index 0b1836a6c539..a3103b871260 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -728,12 +728,6 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
+ goto err1;
+ }
+
+- /* request irq using setup_irq() (too early for request_irq()) */
+- p->irqaction.name = dev_name(&p->pdev->dev);
+- p->irqaction.handler = sh_cmt_interrupt;
+- p->irqaction.dev_id = p;
+- p->irqaction.flags = IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING;
+-
+ /* get hold of clock */
+ p->clk = clk_get(&p->pdev->dev, "cmt_fck");
+ if (IS_ERR(p->clk)) {
+@@ -786,7 +780,9 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
+ }
+ p->cs_enabled = false;
+
+- ret = setup_irq(irq, &p->irqaction);
++ ret = request_irq(irq, sh_cmt_interrupt,
++ IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
++ dev_name(&p->pdev->dev), p);
+ if (ret) {
+ dev_err(&p->pdev->dev, "failed to request irq %d\n", irq);
+ goto err4;
+--
+2.1.2
+
--- /dev/null
+From d7af17ec3e771707b65ec1ad8e139daa65400878 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 27 Jan 2014 15:29:19 +0100
+Subject: clocksource: sh_cmt: Split channel fields from sh_cmt_priv
+
+Create a new sh_cmt_channel structure to hold the channel-specific
+field in preparation for multiple channels per device support.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 7269f9333292586f2378c5321b40a8d3779c4653)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 385 ++++++++++++++++++++++---------------------
+ 1 file changed, 199 insertions(+), 186 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index a3103b871260..351b3ca3ccc4 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -35,15 +35,10 @@
+ #include <linux/pm_domain.h>
+ #include <linux/pm_runtime.h>
+
+-struct sh_cmt_priv {
+- void __iomem *mapbase;
+- void __iomem *mapbase_str;
+- struct clk *clk;
+- unsigned long width; /* 16 or 32 bit version of hardware block */
+- unsigned long overflow_bit;
+- unsigned long clear_bits;
+- struct irqaction irqaction;
+- struct platform_device *pdev;
++struct sh_cmt_priv;
++
++struct sh_cmt_channel {
++ struct sh_cmt_priv *cmt;
+
+ unsigned long flags;
+ unsigned long match_value;
+@@ -55,6 +50,20 @@ struct sh_cmt_priv {
+ struct clocksource cs;
+ unsigned long total_cycles;
+ bool cs_enabled;
++};
++
++struct sh_cmt_priv {
++ struct platform_device *pdev;
++
++ void __iomem *mapbase;
++ void __iomem *mapbase_str;
++ struct clk *clk;
++
++ struct sh_cmt_channel channel;
++
++ unsigned long width; /* 16 or 32 bit version of hardware block */
++ unsigned long overflow_bit;
++ unsigned long clear_bits;
+
+ /* callbacks for CMSTR and CMCSR access */
+ unsigned long (*read_control)(void __iomem *base, unsigned long offs);
+@@ -114,60 +123,60 @@ static void sh_cmt_write32(void __iomem *base, unsigned long offs,
+ #define CMCNT 1 /* channel register */
+ #define CMCOR 2 /* channel register */
+
+-static inline unsigned long sh_cmt_read_cmstr(struct sh_cmt_priv *p)
++static inline unsigned long sh_cmt_read_cmstr(struct sh_cmt_channel *ch)
+ {
+- return p->read_control(p->mapbase_str, 0);
++ return ch->cmt->read_control(ch->cmt->mapbase_str, 0);
+ }
+
+-static inline unsigned long sh_cmt_read_cmcsr(struct sh_cmt_priv *p)
++static inline unsigned long sh_cmt_read_cmcsr(struct sh_cmt_channel *ch)
+ {
+- return p->read_control(p->mapbase, CMCSR);
++ return ch->cmt->read_control(ch->cmt->mapbase, CMCSR);
+ }
+
+-static inline unsigned long sh_cmt_read_cmcnt(struct sh_cmt_priv *p)
++static inline unsigned long sh_cmt_read_cmcnt(struct sh_cmt_channel *ch)
+ {
+- return p->read_count(p->mapbase, CMCNT);
++ return ch->cmt->read_count(ch->cmt->mapbase, CMCNT);
+ }
+
+-static inline void sh_cmt_write_cmstr(struct sh_cmt_priv *p,
++static inline void sh_cmt_write_cmstr(struct sh_cmt_channel *ch,
+ unsigned long value)
+ {
+- p->write_control(p->mapbase_str, 0, value);
++ ch->cmt->write_control(ch->cmt->mapbase_str, 0, value);
+ }
+
+-static inline void sh_cmt_write_cmcsr(struct sh_cmt_priv *p,
++static inline void sh_cmt_write_cmcsr(struct sh_cmt_channel *ch,
+ unsigned long value)
+ {
+- p->write_control(p->mapbase, CMCSR, value);
++ ch->cmt->write_control(ch->cmt->mapbase, CMCSR, value);
+ }
+
+-static inline void sh_cmt_write_cmcnt(struct sh_cmt_priv *p,
++static inline void sh_cmt_write_cmcnt(struct sh_cmt_channel *ch,
+ unsigned long value)
+ {
+- p->write_count(p->mapbase, CMCNT, value);
++ ch->cmt->write_count(ch->cmt->mapbase, CMCNT, value);
+ }
+
+-static inline void sh_cmt_write_cmcor(struct sh_cmt_priv *p,
++static inline void sh_cmt_write_cmcor(struct sh_cmt_channel *ch,
+ unsigned long value)
+ {
+- p->write_count(p->mapbase, CMCOR, value);
++ ch->cmt->write_count(ch->cmt->mapbase, CMCOR, value);
+ }
+
+-static unsigned long sh_cmt_get_counter(struct sh_cmt_priv *p,
++static unsigned long sh_cmt_get_counter(struct sh_cmt_channel *ch,
+ int *has_wrapped)
+ {
+ unsigned long v1, v2, v3;
+ int o1, o2;
+
+- o1 = sh_cmt_read_cmcsr(p) & p->overflow_bit;
++ o1 = sh_cmt_read_cmcsr(ch) & ch->cmt->overflow_bit;
+
+ /* Make sure the timer value is stable. Stolen from acpi_pm.c */
+ do {
+ o2 = o1;
+- v1 = sh_cmt_read_cmcnt(p);
+- v2 = sh_cmt_read_cmcnt(p);
+- v3 = sh_cmt_read_cmcnt(p);
+- o1 = sh_cmt_read_cmcsr(p) & p->overflow_bit;
++ v1 = sh_cmt_read_cmcnt(ch);
++ v2 = sh_cmt_read_cmcnt(ch);
++ v3 = sh_cmt_read_cmcnt(ch);
++ o1 = sh_cmt_read_cmcsr(ch) & ch->cmt->overflow_bit;
+ } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
+ || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
+
+@@ -177,52 +186,52 @@ static unsigned long sh_cmt_get_counter(struct sh_cmt_priv *p,
+
+ static DEFINE_RAW_SPINLOCK(sh_cmt_lock);
+
+-static void sh_cmt_start_stop_ch(struct sh_cmt_priv *p, int start)
++static void sh_cmt_start_stop_ch(struct sh_cmt_channel *ch, int start)
+ {
+- struct sh_timer_config *cfg = p->pdev->dev.platform_data;
++ struct sh_timer_config *cfg = ch->cmt->pdev->dev.platform_data;
+ unsigned long flags, value;
+
+ /* start stop register shared by multiple timer channels */
+ raw_spin_lock_irqsave(&sh_cmt_lock, flags);
+- value = sh_cmt_read_cmstr(p);
++ value = sh_cmt_read_cmstr(ch);
+
+ if (start)
+ value |= 1 << cfg->timer_bit;
+ else
+ value &= ~(1 << cfg->timer_bit);
+
+- sh_cmt_write_cmstr(p, value);
++ sh_cmt_write_cmstr(ch, value);
+ raw_spin_unlock_irqrestore(&sh_cmt_lock, flags);
+ }
+
+-static int sh_cmt_enable(struct sh_cmt_priv *p, unsigned long *rate)
++static int sh_cmt_enable(struct sh_cmt_channel *ch, unsigned long *rate)
+ {
+ int k, ret;
+
+- pm_runtime_get_sync(&p->pdev->dev);
+- dev_pm_syscore_device(&p->pdev->dev, true);
++ pm_runtime_get_sync(&ch->cmt->pdev->dev);
++ dev_pm_syscore_device(&ch->cmt->pdev->dev, true);
+
+ /* enable clock */
+- ret = clk_enable(p->clk);
++ ret = clk_enable(ch->cmt->clk);
+ if (ret) {
+- dev_err(&p->pdev->dev, "cannot enable clock\n");
++ dev_err(&ch->cmt->pdev->dev, "cannot enable clock\n");
+ goto err0;
+ }
+
+ /* make sure channel is disabled */
+- sh_cmt_start_stop_ch(p, 0);
++ sh_cmt_start_stop_ch(ch, 0);
+
+ /* configure channel, periodic mode and maximum timeout */
+- if (p->width == 16) {
+- *rate = clk_get_rate(p->clk) / 512;
+- sh_cmt_write_cmcsr(p, 0x43);
++ if (ch->cmt->width == 16) {
++ *rate = clk_get_rate(ch->cmt->clk) / 512;
++ sh_cmt_write_cmcsr(ch, 0x43);
+ } else {
+- *rate = clk_get_rate(p->clk) / 8;
+- sh_cmt_write_cmcsr(p, 0x01a4);
++ *rate = clk_get_rate(ch->cmt->clk) / 8;
++ sh_cmt_write_cmcsr(ch, 0x01a4);
+ }
+
+- sh_cmt_write_cmcor(p, 0xffffffff);
+- sh_cmt_write_cmcnt(p, 0);
++ sh_cmt_write_cmcor(ch, 0xffffffff);
++ sh_cmt_write_cmcnt(ch, 0);
+
+ /*
+ * According to the sh73a0 user's manual, as CMCNT can be operated
+@@ -236,41 +245,41 @@ static int sh_cmt_enable(struct sh_cmt_priv *p, unsigned long *rate)
+ * take RCLKx2 at maximum.
+ */
+ for (k = 0; k < 100; k++) {
+- if (!sh_cmt_read_cmcnt(p))
++ if (!sh_cmt_read_cmcnt(ch))
+ break;
+ udelay(1);
+ }
+
+- if (sh_cmt_read_cmcnt(p)) {
+- dev_err(&p->pdev->dev, "cannot clear CMCNT\n");
++ if (sh_cmt_read_cmcnt(ch)) {
++ dev_err(&ch->cmt->pdev->dev, "cannot clear CMCNT\n");
+ ret = -ETIMEDOUT;
+ goto err1;
+ }
+
+ /* enable channel */
+- sh_cmt_start_stop_ch(p, 1);
++ sh_cmt_start_stop_ch(ch, 1);
+ return 0;
+ err1:
+ /* stop clock */
+- clk_disable(p->clk);
++ clk_disable(ch->cmt->clk);
+
+ err0:
+ return ret;
+ }
+
+-static void sh_cmt_disable(struct sh_cmt_priv *p)
++static void sh_cmt_disable(struct sh_cmt_channel *ch)
+ {
+ /* disable channel */
+- sh_cmt_start_stop_ch(p, 0);
++ sh_cmt_start_stop_ch(ch, 0);
+
+ /* disable interrupts in CMT block */
+- sh_cmt_write_cmcsr(p, 0);
++ sh_cmt_write_cmcsr(ch, 0);
+
+ /* stop clock */
+- clk_disable(p->clk);
++ clk_disable(ch->cmt->clk);
+
+- dev_pm_syscore_device(&p->pdev->dev, false);
+- pm_runtime_put(&p->pdev->dev);
++ dev_pm_syscore_device(&ch->cmt->pdev->dev, false);
++ pm_runtime_put(&ch->cmt->pdev->dev);
+ }
+
+ /* private flags */
+@@ -280,24 +289,24 @@ static void sh_cmt_disable(struct sh_cmt_priv *p)
+ #define FLAG_SKIPEVENT (1 << 3)
+ #define FLAG_IRQCONTEXT (1 << 4)
+
+-static void sh_cmt_clock_event_program_verify(struct sh_cmt_priv *p,
++static void sh_cmt_clock_event_program_verify(struct sh_cmt_channel *ch,
+ int absolute)
+ {
+ unsigned long new_match;
+- unsigned long value = p->next_match_value;
++ unsigned long value = ch->next_match_value;
+ unsigned long delay = 0;
+ unsigned long now = 0;
+ int has_wrapped;
+
+- now = sh_cmt_get_counter(p, &has_wrapped);
+- p->flags |= FLAG_REPROGRAM; /* force reprogram */
++ now = sh_cmt_get_counter(ch, &has_wrapped);
++ ch->flags |= FLAG_REPROGRAM; /* force reprogram */
+
+ if (has_wrapped) {
+ /* we're competing with the interrupt handler.
+ * -> let the interrupt handler reprogram the timer.
+ * -> interrupt number two handles the event.
+ */
+- p->flags |= FLAG_SKIPEVENT;
++ ch->flags |= FLAG_SKIPEVENT;
+ return;
+ }
+
+@@ -309,20 +318,20 @@ static void sh_cmt_clock_event_program_verify(struct sh_cmt_priv *p,
+ * but don't save the new match value yet.
+ */
+ new_match = now + value + delay;
+- if (new_match > p->max_match_value)
+- new_match = p->max_match_value;
++ if (new_match > ch->max_match_value)
++ new_match = ch->max_match_value;
+
+- sh_cmt_write_cmcor(p, new_match);
++ sh_cmt_write_cmcor(ch, new_match);
+
+- now = sh_cmt_get_counter(p, &has_wrapped);
+- if (has_wrapped && (new_match > p->match_value)) {
++ now = sh_cmt_get_counter(ch, &has_wrapped);
++ if (has_wrapped && (new_match > ch->match_value)) {
+ /* we are changing to a greater match value,
+ * so this wrap must be caused by the counter
+ * matching the old value.
+ * -> first interrupt reprograms the timer.
+ * -> interrupt number two handles the event.
+ */
+- p->flags |= FLAG_SKIPEVENT;
++ ch->flags |= FLAG_SKIPEVENT;
+ break;
+ }
+
+@@ -333,7 +342,7 @@ static void sh_cmt_clock_event_program_verify(struct sh_cmt_priv *p,
+ * -> save programmed match value.
+ * -> let isr handle the event.
+ */
+- p->match_value = new_match;
++ ch->match_value = new_match;
+ break;
+ }
+
+@@ -344,7 +353,7 @@ static void sh_cmt_clock_event_program_verify(struct sh_cmt_priv *p,
+ * -> save programmed match value.
+ * -> let isr handle the event.
+ */
+- p->match_value = new_match;
++ ch->match_value = new_match;
+ break;
+ }
+
+@@ -360,138 +369,138 @@ static void sh_cmt_clock_event_program_verify(struct sh_cmt_priv *p,
+ delay = 1;
+
+ if (!delay)
+- dev_warn(&p->pdev->dev, "too long delay\n");
++ dev_warn(&ch->cmt->pdev->dev, "too long delay\n");
+
+ } while (delay);
+ }
+
+-static void __sh_cmt_set_next(struct sh_cmt_priv *p, unsigned long delta)
++static void __sh_cmt_set_next(struct sh_cmt_channel *ch, unsigned long delta)
+ {
+- if (delta > p->max_match_value)
+- dev_warn(&p->pdev->dev, "delta out of range\n");
++ if (delta > ch->max_match_value)
++ dev_warn(&ch->cmt->pdev->dev, "delta out of range\n");
+
+- p->next_match_value = delta;
+- sh_cmt_clock_event_program_verify(p, 0);
++ ch->next_match_value = delta;
++ sh_cmt_clock_event_program_verify(ch, 0);
+ }
+
+-static void sh_cmt_set_next(struct sh_cmt_priv *p, unsigned long delta)
++static void sh_cmt_set_next(struct sh_cmt_channel *ch, unsigned long delta)
+ {
+ unsigned long flags;
+
+- raw_spin_lock_irqsave(&p->lock, flags);
+- __sh_cmt_set_next(p, delta);
+- raw_spin_unlock_irqrestore(&p->lock, flags);
++ raw_spin_lock_irqsave(&ch->lock, flags);
++ __sh_cmt_set_next(ch, delta);
++ raw_spin_unlock_irqrestore(&ch->lock, flags);
+ }
+
+ static irqreturn_t sh_cmt_interrupt(int irq, void *dev_id)
+ {
+- struct sh_cmt_priv *p = dev_id;
++ struct sh_cmt_channel *ch = dev_id;
+
+ /* clear flags */
+- sh_cmt_write_cmcsr(p, sh_cmt_read_cmcsr(p) & p->clear_bits);
++ sh_cmt_write_cmcsr(ch, sh_cmt_read_cmcsr(ch) & ch->cmt->clear_bits);
+
+ /* update clock source counter to begin with if enabled
+ * the wrap flag should be cleared by the timer specific
+ * isr before we end up here.
+ */
+- if (p->flags & FLAG_CLOCKSOURCE)
+- p->total_cycles += p->match_value + 1;
++ if (ch->flags & FLAG_CLOCKSOURCE)
++ ch->total_cycles += ch->match_value + 1;
+
+- if (!(p->flags & FLAG_REPROGRAM))
+- p->next_match_value = p->max_match_value;
++ if (!(ch->flags & FLAG_REPROGRAM))
++ ch->next_match_value = ch->max_match_value;
+
+- p->flags |= FLAG_IRQCONTEXT;
++ ch->flags |= FLAG_IRQCONTEXT;
+
+- if (p->flags & FLAG_CLOCKEVENT) {
+- if (!(p->flags & FLAG_SKIPEVENT)) {
+- if (p->ced.mode == CLOCK_EVT_MODE_ONESHOT) {
+- p->next_match_value = p->max_match_value;
+- p->flags |= FLAG_REPROGRAM;
++ if (ch->flags & FLAG_CLOCKEVENT) {
++ if (!(ch->flags & FLAG_SKIPEVENT)) {
++ if (ch->ced.mode == CLOCK_EVT_MODE_ONESHOT) {
++ ch->next_match_value = ch->max_match_value;
++ ch->flags |= FLAG_REPROGRAM;
+ }
+
+- p->ced.event_handler(&p->ced);
++ ch->ced.event_handler(&ch->ced);
+ }
+ }
+
+- p->flags &= ~FLAG_SKIPEVENT;
++ ch->flags &= ~FLAG_SKIPEVENT;
+
+- if (p->flags & FLAG_REPROGRAM) {
+- p->flags &= ~FLAG_REPROGRAM;
+- sh_cmt_clock_event_program_verify(p, 1);
++ if (ch->flags & FLAG_REPROGRAM) {
++ ch->flags &= ~FLAG_REPROGRAM;
++ sh_cmt_clock_event_program_verify(ch, 1);
+
+- if (p->flags & FLAG_CLOCKEVENT)
+- if ((p->ced.mode == CLOCK_EVT_MODE_SHUTDOWN)
+- || (p->match_value == p->next_match_value))
+- p->flags &= ~FLAG_REPROGRAM;
++ if (ch->flags & FLAG_CLOCKEVENT)
++ if ((ch->ced.mode == CLOCK_EVT_MODE_SHUTDOWN)
++ || (ch->match_value == ch->next_match_value))
++ ch->flags &= ~FLAG_REPROGRAM;
+ }
+
+- p->flags &= ~FLAG_IRQCONTEXT;
++ ch->flags &= ~FLAG_IRQCONTEXT;
+
+ return IRQ_HANDLED;
+ }
+
+-static int sh_cmt_start(struct sh_cmt_priv *p, unsigned long flag)
++static int sh_cmt_start(struct sh_cmt_channel *ch, unsigned long flag)
+ {
+ int ret = 0;
+ unsigned long flags;
+
+- raw_spin_lock_irqsave(&p->lock, flags);
++ raw_spin_lock_irqsave(&ch->lock, flags);
+
+- if (!(p->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE)))
+- ret = sh_cmt_enable(p, &p->rate);
++ if (!(ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE)))
++ ret = sh_cmt_enable(ch, &ch->rate);
+
+ if (ret)
+ goto out;
+- p->flags |= flag;
++ ch->flags |= flag;
+
+ /* setup timeout if no clockevent */
+- if ((flag == FLAG_CLOCKSOURCE) && (!(p->flags & FLAG_CLOCKEVENT)))
+- __sh_cmt_set_next(p, p->max_match_value);
++ if ((flag == FLAG_CLOCKSOURCE) && (!(ch->flags & FLAG_CLOCKEVENT)))
++ __sh_cmt_set_next(ch, ch->max_match_value);
+ out:
+- raw_spin_unlock_irqrestore(&p->lock, flags);
++ raw_spin_unlock_irqrestore(&ch->lock, flags);
+
+ return ret;
+ }
+
+-static void sh_cmt_stop(struct sh_cmt_priv *p, unsigned long flag)
++static void sh_cmt_stop(struct sh_cmt_channel *ch, unsigned long flag)
+ {
+ unsigned long flags;
+ unsigned long f;
+
+- raw_spin_lock_irqsave(&p->lock, flags);
++ raw_spin_lock_irqsave(&ch->lock, flags);
+
+- f = p->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE);
+- p->flags &= ~flag;
++ f = ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE);
++ ch->flags &= ~flag;
+
+- if (f && !(p->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE)))
+- sh_cmt_disable(p);
++ if (f && !(ch->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE)))
++ sh_cmt_disable(ch);
+
+ /* adjust the timeout to maximum if only clocksource left */
+- if ((flag == FLAG_CLOCKEVENT) && (p->flags & FLAG_CLOCKSOURCE))
+- __sh_cmt_set_next(p, p->max_match_value);
++ if ((flag == FLAG_CLOCKEVENT) && (ch->flags & FLAG_CLOCKSOURCE))
++ __sh_cmt_set_next(ch, ch->max_match_value);
+
+- raw_spin_unlock_irqrestore(&p->lock, flags);
++ raw_spin_unlock_irqrestore(&ch->lock, flags);
+ }
+
+-static struct sh_cmt_priv *cs_to_sh_cmt(struct clocksource *cs)
++static struct sh_cmt_channel *cs_to_sh_cmt(struct clocksource *cs)
+ {
+- return container_of(cs, struct sh_cmt_priv, cs);
++ return container_of(cs, struct sh_cmt_channel, cs);
+ }
+
+ static cycle_t sh_cmt_clocksource_read(struct clocksource *cs)
+ {
+- struct sh_cmt_priv *p = cs_to_sh_cmt(cs);
++ struct sh_cmt_channel *ch = cs_to_sh_cmt(cs);
+ unsigned long flags, raw;
+ unsigned long value;
+ int has_wrapped;
+
+- raw_spin_lock_irqsave(&p->lock, flags);
+- value = p->total_cycles;
+- raw = sh_cmt_get_counter(p, &has_wrapped);
++ raw_spin_lock_irqsave(&ch->lock, flags);
++ value = ch->total_cycles;
++ raw = sh_cmt_get_counter(ch, &has_wrapped);
+
+ if (unlikely(has_wrapped))
+- raw += p->match_value + 1;
+- raw_spin_unlock_irqrestore(&p->lock, flags);
++ raw += ch->match_value + 1;
++ raw_spin_unlock_irqrestore(&ch->lock, flags);
+
+ return value + raw;
+ }
+@@ -499,50 +508,50 @@ static cycle_t sh_cmt_clocksource_read(struct clocksource *cs)
+ static int sh_cmt_clocksource_enable(struct clocksource *cs)
+ {
+ int ret;
+- struct sh_cmt_priv *p = cs_to_sh_cmt(cs);
++ struct sh_cmt_channel *ch = cs_to_sh_cmt(cs);
+
+- WARN_ON(p->cs_enabled);
++ WARN_ON(ch->cs_enabled);
+
+- p->total_cycles = 0;
++ ch->total_cycles = 0;
+
+- ret = sh_cmt_start(p, FLAG_CLOCKSOURCE);
++ ret = sh_cmt_start(ch, FLAG_CLOCKSOURCE);
+ if (!ret) {
+- __clocksource_updatefreq_hz(cs, p->rate);
+- p->cs_enabled = true;
++ __clocksource_updatefreq_hz(cs, ch->rate);
++ ch->cs_enabled = true;
+ }
+ return ret;
+ }
+
+ static void sh_cmt_clocksource_disable(struct clocksource *cs)
+ {
+- struct sh_cmt_priv *p = cs_to_sh_cmt(cs);
++ struct sh_cmt_channel *ch = cs_to_sh_cmt(cs);
+
+- WARN_ON(!p->cs_enabled);
++ WARN_ON(!ch->cs_enabled);
+
+- sh_cmt_stop(p, FLAG_CLOCKSOURCE);
+- p->cs_enabled = false;
++ sh_cmt_stop(ch, FLAG_CLOCKSOURCE);
++ ch->cs_enabled = false;
+ }
+
+ static void sh_cmt_clocksource_suspend(struct clocksource *cs)
+ {
+- struct sh_cmt_priv *p = cs_to_sh_cmt(cs);
++ struct sh_cmt_channel *ch = cs_to_sh_cmt(cs);
+
+- sh_cmt_stop(p, FLAG_CLOCKSOURCE);
+- pm_genpd_syscore_poweroff(&p->pdev->dev);
++ sh_cmt_stop(ch, FLAG_CLOCKSOURCE);
++ pm_genpd_syscore_poweroff(&ch->cmt->pdev->dev);
+ }
+
+ static void sh_cmt_clocksource_resume(struct clocksource *cs)
+ {
+- struct sh_cmt_priv *p = cs_to_sh_cmt(cs);
++ struct sh_cmt_channel *ch = cs_to_sh_cmt(cs);
+
+- pm_genpd_syscore_poweron(&p->pdev->dev);
+- sh_cmt_start(p, FLAG_CLOCKSOURCE);
++ pm_genpd_syscore_poweron(&ch->cmt->pdev->dev);
++ sh_cmt_start(ch, FLAG_CLOCKSOURCE);
+ }
+
+-static int sh_cmt_register_clocksource(struct sh_cmt_priv *p,
++static int sh_cmt_register_clocksource(struct sh_cmt_channel *ch,
+ char *name, unsigned long rating)
+ {
+- struct clocksource *cs = &p->cs;
++ struct clocksource *cs = &ch->cs;
+
+ cs->name = name;
+ cs->rating = rating;
+@@ -554,47 +563,47 @@ static int sh_cmt_register_clocksource(struct sh_cmt_priv *p,
+ cs->mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8);
+ cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
+
+- dev_info(&p->pdev->dev, "used as clock source\n");
++ dev_info(&ch->cmt->pdev->dev, "used as clock source\n");
+
+ /* Register with dummy 1 Hz value, gets updated in ->enable() */
+ clocksource_register_hz(cs, 1);
+ return 0;
+ }
+
+-static struct sh_cmt_priv *ced_to_sh_cmt(struct clock_event_device *ced)
++static struct sh_cmt_channel *ced_to_sh_cmt(struct clock_event_device *ced)
+ {
+- return container_of(ced, struct sh_cmt_priv, ced);
++ return container_of(ced, struct sh_cmt_channel, ced);
+ }
+
+-static void sh_cmt_clock_event_start(struct sh_cmt_priv *p, int periodic)
++static void sh_cmt_clock_event_start(struct sh_cmt_channel *ch, int periodic)
+ {
+- struct clock_event_device *ced = &p->ced;
++ struct clock_event_device *ced = &ch->ced;
+
+- sh_cmt_start(p, FLAG_CLOCKEVENT);
++ sh_cmt_start(ch, FLAG_CLOCKEVENT);
+
+ /* TODO: calculate good shift from rate and counter bit width */
+
+ ced->shift = 32;
+- ced->mult = div_sc(p->rate, NSEC_PER_SEC, ced->shift);
+- ced->max_delta_ns = clockevent_delta2ns(p->max_match_value, ced);
++ ced->mult = div_sc(ch->rate, NSEC_PER_SEC, ced->shift);
++ ced->max_delta_ns = clockevent_delta2ns(ch->max_match_value, ced);
+ ced->min_delta_ns = clockevent_delta2ns(0x1f, ced);
+
+ if (periodic)
+- sh_cmt_set_next(p, ((p->rate + HZ/2) / HZ) - 1);
++ sh_cmt_set_next(ch, ((ch->rate + HZ/2) / HZ) - 1);
+ else
+- sh_cmt_set_next(p, p->max_match_value);
++ sh_cmt_set_next(ch, ch->max_match_value);
+ }
+
+ static void sh_cmt_clock_event_mode(enum clock_event_mode mode,
+ struct clock_event_device *ced)
+ {
+- struct sh_cmt_priv *p = ced_to_sh_cmt(ced);
++ struct sh_cmt_channel *ch = ced_to_sh_cmt(ced);
+
+ /* deal with old setting first */
+ switch (ced->mode) {
+ case CLOCK_EVT_MODE_PERIODIC:
+ case CLOCK_EVT_MODE_ONESHOT:
+- sh_cmt_stop(p, FLAG_CLOCKEVENT);
++ sh_cmt_stop(ch, FLAG_CLOCKEVENT);
+ break;
+ default:
+ break;
+@@ -602,16 +611,18 @@ static void sh_cmt_clock_event_mode(enum clock_event_mode mode,
+
+ switch (mode) {
+ case CLOCK_EVT_MODE_PERIODIC:
+- dev_info(&p->pdev->dev, "used for periodic clock events\n");
+- sh_cmt_clock_event_start(p, 1);
++ dev_info(&ch->cmt->pdev->dev,
++ "used for periodic clock events\n");
++ sh_cmt_clock_event_start(ch, 1);
+ break;
+ case CLOCK_EVT_MODE_ONESHOT:
+- dev_info(&p->pdev->dev, "used for oneshot clock events\n");
+- sh_cmt_clock_event_start(p, 0);
++ dev_info(&ch->cmt->pdev->dev,
++ "used for oneshot clock events\n");
++ sh_cmt_clock_event_start(ch, 0);
+ break;
+ case CLOCK_EVT_MODE_SHUTDOWN:
+ case CLOCK_EVT_MODE_UNUSED:
+- sh_cmt_stop(p, FLAG_CLOCKEVENT);
++ sh_cmt_stop(ch, FLAG_CLOCKEVENT);
+ break;
+ default:
+ break;
+@@ -621,37 +632,37 @@ static void sh_cmt_clock_event_mode(enum clock_event_mode mode,
+ static int sh_cmt_clock_event_next(unsigned long delta,
+ struct clock_event_device *ced)
+ {
+- struct sh_cmt_priv *p = ced_to_sh_cmt(ced);
++ struct sh_cmt_channel *ch = ced_to_sh_cmt(ced);
+
+ BUG_ON(ced->mode != CLOCK_EVT_MODE_ONESHOT);
+- if (likely(p->flags & FLAG_IRQCONTEXT))
+- p->next_match_value = delta - 1;
++ if (likely(ch->flags & FLAG_IRQCONTEXT))
++ ch->next_match_value = delta - 1;
+ else
+- sh_cmt_set_next(p, delta - 1);
++ sh_cmt_set_next(ch, delta - 1);
+
+ return 0;
+ }
+
+ static void sh_cmt_clock_event_suspend(struct clock_event_device *ced)
+ {
+- struct sh_cmt_priv *p = ced_to_sh_cmt(ced);
++ struct sh_cmt_channel *ch = ced_to_sh_cmt(ced);
+
+- pm_genpd_syscore_poweroff(&p->pdev->dev);
+- clk_unprepare(p->clk);
++ pm_genpd_syscore_poweroff(&ch->cmt->pdev->dev);
++ clk_unprepare(ch->cmt->clk);
+ }
+
+ static void sh_cmt_clock_event_resume(struct clock_event_device *ced)
+ {
+- struct sh_cmt_priv *p = ced_to_sh_cmt(ced);
++ struct sh_cmt_channel *ch = ced_to_sh_cmt(ced);
+
+- clk_prepare(p->clk);
+- pm_genpd_syscore_poweron(&p->pdev->dev);
++ clk_prepare(ch->cmt->clk);
++ pm_genpd_syscore_poweron(&ch->cmt->pdev->dev);
+ }
+
+-static void sh_cmt_register_clockevent(struct sh_cmt_priv *p,
++static void sh_cmt_register_clockevent(struct sh_cmt_channel *ch,
+ char *name, unsigned long rating)
+ {
+- struct clock_event_device *ced = &p->ced;
++ struct clock_event_device *ced = &ch->ced;
+
+ memset(ced, 0, sizeof(*ced));
+
+@@ -665,19 +676,19 @@ static void sh_cmt_register_clockevent(struct sh_cmt_priv *p,
+ ced->suspend = sh_cmt_clock_event_suspend;
+ ced->resume = sh_cmt_clock_event_resume;
+
+- dev_info(&p->pdev->dev, "used for clock events\n");
++ dev_info(&ch->cmt->pdev->dev, "used for clock events\n");
+ clockevents_register_device(ced);
+ }
+
+-static int sh_cmt_register(struct sh_cmt_priv *p, char *name,
++static int sh_cmt_register(struct sh_cmt_channel *ch, char *name,
+ unsigned long clockevent_rating,
+ unsigned long clocksource_rating)
+ {
+ if (clockevent_rating)
+- sh_cmt_register_clockevent(p, name, clockevent_rating);
++ sh_cmt_register_clockevent(ch, name, clockevent_rating);
+
+ if (clocksource_rating)
+- sh_cmt_register_clocksource(p, name, clocksource_rating);
++ sh_cmt_register_clocksource(ch, name, clocksource_rating);
+
+ return 0;
+ }
+@@ -685,6 +696,7 @@ static int sh_cmt_register(struct sh_cmt_priv *p, char *name,
+ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
+ {
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
++ struct sh_cmt_channel *ch = &p->channel;
+ struct resource *res, *res2;
+ int irq, ret;
+ ret = -ENXIO;
+@@ -763,26 +775,27 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
+ p->clear_bits = ~0xc000;
+ }
+
+- if (p->width == (sizeof(p->max_match_value) * 8))
+- p->max_match_value = ~0;
++ if (p->width == (sizeof(ch->max_match_value) * 8))
++ ch->max_match_value = ~0;
+ else
+- p->max_match_value = (1 << p->width) - 1;
++ ch->max_match_value = (1 << p->width) - 1;
+
+- p->match_value = p->max_match_value;
+- raw_spin_lock_init(&p->lock);
++ ch->cmt = p;
++ ch->match_value = ch->max_match_value;
++ raw_spin_lock_init(&ch->lock);
+
+- ret = sh_cmt_register(p, (char *)dev_name(&p->pdev->dev),
++ ret = sh_cmt_register(ch, (char *)dev_name(&p->pdev->dev),
+ cfg->clockevent_rating,
+ cfg->clocksource_rating);
+ if (ret) {
+ dev_err(&p->pdev->dev, "registration failed\n");
+ goto err4;
+ }
+- p->cs_enabled = false;
++ ch->cs_enabled = false;
+
+ ret = request_irq(irq, sh_cmt_interrupt,
+ IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
+- dev_name(&p->pdev->dev), p);
++ dev_name(&p->pdev->dev), ch);
+ if (ret) {
+ dev_err(&p->pdev->dev, "failed to request irq %d\n", irq);
+ goto err4;
+--
+2.1.2
+
--- /dev/null
+From 3ac275b43684d7039c9074cd9688e857d57229a5 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 27 Jan 2014 22:04:17 +0100
+Subject: clocksource: sh_cmt: Rename struct sh_cmt_priv to sh_cmt_device
+
+Channel data is private as well, rename priv to device to make the
+distrinction between the core device and the channels clearer.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 2653caf4381f9adeec8c18dfec21ec3c855d801c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 116 +++++++++++++++++++++----------------------
+ 1 file changed, 58 insertions(+), 58 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index 351b3ca3ccc4..604199a22265 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -35,10 +35,10 @@
+ #include <linux/pm_domain.h>
+ #include <linux/pm_runtime.h>
+
+-struct sh_cmt_priv;
++struct sh_cmt_device;
+
+ struct sh_cmt_channel {
+- struct sh_cmt_priv *cmt;
++ struct sh_cmt_device *cmt;
+
+ unsigned long flags;
+ unsigned long match_value;
+@@ -52,7 +52,7 @@ struct sh_cmt_channel {
+ bool cs_enabled;
+ };
+
+-struct sh_cmt_priv {
++struct sh_cmt_device {
+ struct platform_device *pdev;
+
+ void __iomem *mapbase;
+@@ -693,132 +693,132 @@ static int sh_cmt_register(struct sh_cmt_channel *ch, char *name,
+ return 0;
+ }
+
+-static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
++static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
+ {
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
+- struct sh_cmt_channel *ch = &p->channel;
++ struct sh_cmt_channel *ch = &cmt->channel;
+ struct resource *res, *res2;
+ int irq, ret;
+ ret = -ENXIO;
+
+- memset(p, 0, sizeof(*p));
+- p->pdev = pdev;
++ memset(cmt, 0, sizeof(*cmt));
++ cmt->pdev = pdev;
+
+ if (!cfg) {
+- dev_err(&p->pdev->dev, "missing platform data\n");
++ dev_err(&cmt->pdev->dev, "missing platform data\n");
+ goto err0;
+ }
+
+- res = platform_get_resource(p->pdev, IORESOURCE_MEM, 0);
++ res = platform_get_resource(cmt->pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+- dev_err(&p->pdev->dev, "failed to get I/O memory\n");
++ dev_err(&cmt->pdev->dev, "failed to get I/O memory\n");
+ goto err0;
+ }
+
+ /* optional resource for the shared timer start/stop register */
+- res2 = platform_get_resource(p->pdev, IORESOURCE_MEM, 1);
++ res2 = platform_get_resource(cmt->pdev, IORESOURCE_MEM, 1);
+
+- irq = platform_get_irq(p->pdev, 0);
++ irq = platform_get_irq(cmt->pdev, 0);
+ if (irq < 0) {
+- dev_err(&p->pdev->dev, "failed to get irq\n");
++ dev_err(&cmt->pdev->dev, "failed to get irq\n");
+ goto err0;
+ }
+
+ /* map memory, let mapbase point to our channel */
+- p->mapbase = ioremap_nocache(res->start, resource_size(res));
+- if (p->mapbase == NULL) {
+- dev_err(&p->pdev->dev, "failed to remap I/O memory\n");
++ cmt->mapbase = ioremap_nocache(res->start, resource_size(res));
++ if (cmt->mapbase == NULL) {
++ dev_err(&cmt->pdev->dev, "failed to remap I/O memory\n");
+ goto err0;
+ }
+
+ /* map second resource for CMSTR */
+- p->mapbase_str = ioremap_nocache(res2 ? res2->start :
+- res->start - cfg->channel_offset,
+- res2 ? resource_size(res2) : 2);
+- if (p->mapbase_str == NULL) {
+- dev_err(&p->pdev->dev, "failed to remap I/O second memory\n");
++ cmt->mapbase_str = ioremap_nocache(res2 ? res2->start :
++ res->start - cfg->channel_offset,
++ res2 ? resource_size(res2) : 2);
++ if (cmt->mapbase_str == NULL) {
++ dev_err(&cmt->pdev->dev, "failed to remap I/O second memory\n");
+ goto err1;
+ }
+
+ /* get hold of clock */
+- p->clk = clk_get(&p->pdev->dev, "cmt_fck");
+- if (IS_ERR(p->clk)) {
+- dev_err(&p->pdev->dev, "cannot get clock\n");
+- ret = PTR_ERR(p->clk);
++ cmt->clk = clk_get(&cmt->pdev->dev, "cmt_fck");
++ if (IS_ERR(cmt->clk)) {
++ dev_err(&cmt->pdev->dev, "cannot get clock\n");
++ ret = PTR_ERR(cmt->clk);
+ goto err2;
+ }
+
+- ret = clk_prepare(p->clk);
++ ret = clk_prepare(cmt->clk);
+ if (ret < 0)
+ goto err3;
+
+ if (res2 && (resource_size(res2) == 4)) {
+ /* assume both CMSTR and CMCSR to be 32-bit */
+- p->read_control = sh_cmt_read32;
+- p->write_control = sh_cmt_write32;
++ cmt->read_control = sh_cmt_read32;
++ cmt->write_control = sh_cmt_write32;
+ } else {
+- p->read_control = sh_cmt_read16;
+- p->write_control = sh_cmt_write16;
++ cmt->read_control = sh_cmt_read16;
++ cmt->write_control = sh_cmt_write16;
+ }
+
+ if (resource_size(res) == 6) {
+- p->width = 16;
+- p->read_count = sh_cmt_read16;
+- p->write_count = sh_cmt_write16;
+- p->overflow_bit = 0x80;
+- p->clear_bits = ~0x80;
++ cmt->width = 16;
++ cmt->read_count = sh_cmt_read16;
++ cmt->write_count = sh_cmt_write16;
++ cmt->overflow_bit = 0x80;
++ cmt->clear_bits = ~0x80;
+ } else {
+- p->width = 32;
+- p->read_count = sh_cmt_read32;
+- p->write_count = sh_cmt_write32;
+- p->overflow_bit = 0x8000;
+- p->clear_bits = ~0xc000;
++ cmt->width = 32;
++ cmt->read_count = sh_cmt_read32;
++ cmt->write_count = sh_cmt_write32;
++ cmt->overflow_bit = 0x8000;
++ cmt->clear_bits = ~0xc000;
+ }
+
+- if (p->width == (sizeof(ch->max_match_value) * 8))
++ if (cmt->width == (sizeof(ch->max_match_value) * 8))
+ ch->max_match_value = ~0;
+ else
+- ch->max_match_value = (1 << p->width) - 1;
++ ch->max_match_value = (1 << cmt->width) - 1;
+
+- ch->cmt = p;
++ ch->cmt = cmt;
+ ch->match_value = ch->max_match_value;
+ raw_spin_lock_init(&ch->lock);
+
+- ret = sh_cmt_register(ch, (char *)dev_name(&p->pdev->dev),
++ ret = sh_cmt_register(ch, (char *)dev_name(&cmt->pdev->dev),
+ cfg->clockevent_rating,
+ cfg->clocksource_rating);
+ if (ret) {
+- dev_err(&p->pdev->dev, "registration failed\n");
++ dev_err(&cmt->pdev->dev, "registration failed\n");
+ goto err4;
+ }
+ ch->cs_enabled = false;
+
+ ret = request_irq(irq, sh_cmt_interrupt,
+ IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
+- dev_name(&p->pdev->dev), ch);
++ dev_name(&cmt->pdev->dev), ch);
+ if (ret) {
+- dev_err(&p->pdev->dev, "failed to request irq %d\n", irq);
++ dev_err(&cmt->pdev->dev, "failed to request irq %d\n", irq);
+ goto err4;
+ }
+
+- platform_set_drvdata(pdev, p);
++ platform_set_drvdata(pdev, cmt);
+
+ return 0;
+ err4:
+- clk_unprepare(p->clk);
++ clk_unprepare(cmt->clk);
+ err3:
+- clk_put(p->clk);
++ clk_put(cmt->clk);
+ err2:
+- iounmap(p->mapbase_str);
++ iounmap(cmt->mapbase_str);
+ err1:
+- iounmap(p->mapbase);
++ iounmap(cmt->mapbase);
+ err0:
+ return ret;
+ }
+
+ static int sh_cmt_probe(struct platform_device *pdev)
+ {
+- struct sh_cmt_priv *p = platform_get_drvdata(pdev);
++ struct sh_cmt_device *cmt = platform_get_drvdata(pdev);
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
+ int ret;
+
+@@ -827,20 +827,20 @@ static int sh_cmt_probe(struct platform_device *pdev)
+ pm_runtime_enable(&pdev->dev);
+ }
+
+- if (p) {
++ if (cmt) {
+ dev_info(&pdev->dev, "kept as earlytimer\n");
+ goto out;
+ }
+
+- p = kmalloc(sizeof(*p), GFP_KERNEL);
+- if (p == NULL) {
++ cmt = kmalloc(sizeof(*cmt), GFP_KERNEL);
++ if (cmt == NULL) {
+ dev_err(&pdev->dev, "failed to allocate driver data\n");
+ return -ENOMEM;
+ }
+
+- ret = sh_cmt_setup(p, pdev);
++ ret = sh_cmt_setup(cmt, pdev);
+ if (ret) {
+- kfree(p);
++ kfree(cmt);
+ pm_runtime_idle(&pdev->dev);
+ return ret;
+ }
+--
+2.1.2
+
--- /dev/null
+From 90de0103434fa69f609d8ca2d52deee6120ed153 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 27 Jan 2014 22:04:17 +0100
+Subject: clocksource: sh_cmt: Split channel setup to separate function
+
+Move the channel setup code from sh_cmt_setup to a new
+sh_cmt_setup_channel function and call it from sh_cmt_setup.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit b882e7b13bc12b3d6b00e4ea2fe374413ddcdd2d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 79 ++++++++++++++++++++++++++------------------
+ 1 file changed, 47 insertions(+), 32 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index 604199a22265..26f73cf609ba 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -693,12 +693,55 @@ static int sh_cmt_register(struct sh_cmt_channel *ch, char *name,
+ return 0;
+ }
+
++static int sh_cmt_setup_channel(struct sh_cmt_channel *ch,
++ struct sh_cmt_device *cmt)
++{
++ struct sh_timer_config *cfg = cmt->pdev->dev.platform_data;
++ int irq;
++ int ret;
++
++ memset(ch, 0, sizeof(*ch));
++ ch->cmt = cmt;
++
++ irq = platform_get_irq(cmt->pdev, 0);
++ if (irq < 0) {
++ dev_err(&cmt->pdev->dev, "failed to get irq\n");
++ return irq;
++ }
++
++ if (cmt->width == (sizeof(ch->max_match_value) * 8))
++ ch->max_match_value = ~0;
++ else
++ ch->max_match_value = (1 << cmt->width) - 1;
++
++ ch->match_value = ch->max_match_value;
++ raw_spin_lock_init(&ch->lock);
++
++ ret = sh_cmt_register(ch, (char *)dev_name(&cmt->pdev->dev),
++ cfg->clockevent_rating,
++ cfg->clocksource_rating);
++ if (ret) {
++ dev_err(&cmt->pdev->dev, "registration failed\n");
++ return ret;
++ }
++ ch->cs_enabled = false;
++
++ ret = request_irq(irq, sh_cmt_interrupt,
++ IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
++ dev_name(&cmt->pdev->dev), ch);
++ if (ret) {
++ dev_err(&cmt->pdev->dev, "failed to request irq %d\n", irq);
++ return ret;
++ }
++
++ return 0;
++}
++
+ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
+ {
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
+- struct sh_cmt_channel *ch = &cmt->channel;
+ struct resource *res, *res2;
+- int irq, ret;
++ int ret;
+ ret = -ENXIO;
+
+ memset(cmt, 0, sizeof(*cmt));
+@@ -718,12 +761,6 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
+ /* optional resource for the shared timer start/stop register */
+ res2 = platform_get_resource(cmt->pdev, IORESOURCE_MEM, 1);
+
+- irq = platform_get_irq(cmt->pdev, 0);
+- if (irq < 0) {
+- dev_err(&cmt->pdev->dev, "failed to get irq\n");
+- goto err0;
+- }
+-
+ /* map memory, let mapbase point to our channel */
+ cmt->mapbase = ioremap_nocache(res->start, resource_size(res));
+ if (cmt->mapbase == NULL) {
+@@ -775,31 +812,9 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
+ cmt->clear_bits = ~0xc000;
+ }
+
+- if (cmt->width == (sizeof(ch->max_match_value) * 8))
+- ch->max_match_value = ~0;
+- else
+- ch->max_match_value = (1 << cmt->width) - 1;
+-
+- ch->cmt = cmt;
+- ch->match_value = ch->max_match_value;
+- raw_spin_lock_init(&ch->lock);
+-
+- ret = sh_cmt_register(ch, (char *)dev_name(&cmt->pdev->dev),
+- cfg->clockevent_rating,
+- cfg->clocksource_rating);
+- if (ret) {
+- dev_err(&cmt->pdev->dev, "registration failed\n");
+- goto err4;
+- }
+- ch->cs_enabled = false;
+-
+- ret = request_irq(irq, sh_cmt_interrupt,
+- IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
+- dev_name(&cmt->pdev->dev), ch);
+- if (ret) {
+- dev_err(&cmt->pdev->dev, "failed to request irq %d\n", irq);
++ ret = sh_cmt_setup_channel(&cmt->channel, cmt);
++ if (ret < 0)
+ goto err4;
+- }
+
+ platform_set_drvdata(pdev, cmt);
+
+--
+2.1.2
+
--- /dev/null
+From 56aed887954b60fc4b6da489c78d94259728f759 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 17 Feb 2014 16:04:16 +0100
+Subject: clocksource: sh_cmt: Constify name argument to sh_cmt_register()
+
+The name argument is assigned to const structure fields only, constify
+it.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 1d053e1d8eb28f42b7ec57d1c11ce70b8fba45ff)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index 26f73cf609ba..febd6bf7a37d 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -549,7 +549,7 @@ static void sh_cmt_clocksource_resume(struct clocksource *cs)
+ }
+
+ static int sh_cmt_register_clocksource(struct sh_cmt_channel *ch,
+- char *name, unsigned long rating)
++ const char *name, unsigned long rating)
+ {
+ struct clocksource *cs = &ch->cs;
+
+@@ -660,7 +660,7 @@ static void sh_cmt_clock_event_resume(struct clock_event_device *ced)
+ }
+
+ static void sh_cmt_register_clockevent(struct sh_cmt_channel *ch,
+- char *name, unsigned long rating)
++ const char *name, unsigned long rating)
+ {
+ struct clock_event_device *ced = &ch->ced;
+
+@@ -680,7 +680,7 @@ static void sh_cmt_register_clockevent(struct sh_cmt_channel *ch,
+ clockevents_register_device(ced);
+ }
+
+-static int sh_cmt_register(struct sh_cmt_channel *ch, char *name,
++static int sh_cmt_register(struct sh_cmt_channel *ch, const char *name,
+ unsigned long clockevent_rating,
+ unsigned long clocksource_rating)
+ {
+@@ -717,7 +717,7 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch,
+ ch->match_value = ch->max_match_value;
+ raw_spin_lock_init(&ch->lock);
+
+- ret = sh_cmt_register(ch, (char *)dev_name(&cmt->pdev->dev),
++ ret = sh_cmt_register(ch, dev_name(&cmt->pdev->dev),
+ cfg->clockevent_rating,
+ cfg->clocksource_rating);
+ if (ret) {
+--
+2.1.2
+
--- /dev/null
+From e3c6e3750ab0b59681fdb1254728d664eaa97649 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 27 Jan 2014 22:04:17 +0100
+Subject: clocksource: sh_cmt: Rename mapbase/mapbase_str to mapbase_ch/mapbase
+
+The mapbase variable points to the mapped base address of the channel,
+rename it to mapbase_sh. mapbase_str points to the mapped base address
+of the CMT device, rename it to mapbase.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 36f1ac982d94cd3cce8ae24abd0676b79dec6126)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 34 +++++++++++++++++-----------------
+ 1 file changed, 17 insertions(+), 17 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index febd6bf7a37d..eb93b889e189 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -55,8 +55,8 @@ struct sh_cmt_channel {
+ struct sh_cmt_device {
+ struct platform_device *pdev;
+
++ void __iomem *mapbase_ch;
+ void __iomem *mapbase;
+- void __iomem *mapbase_str;
+ struct clk *clk;
+
+ struct sh_cmt_channel channel;
+@@ -125,41 +125,41 @@ static void sh_cmt_write32(void __iomem *base, unsigned long offs,
+
+ static inline unsigned long sh_cmt_read_cmstr(struct sh_cmt_channel *ch)
+ {
+- return ch->cmt->read_control(ch->cmt->mapbase_str, 0);
++ return ch->cmt->read_control(ch->cmt->mapbase, 0);
+ }
+
+ static inline unsigned long sh_cmt_read_cmcsr(struct sh_cmt_channel *ch)
+ {
+- return ch->cmt->read_control(ch->cmt->mapbase, CMCSR);
++ return ch->cmt->read_control(ch->cmt->mapbase_ch, CMCSR);
+ }
+
+ static inline unsigned long sh_cmt_read_cmcnt(struct sh_cmt_channel *ch)
+ {
+- return ch->cmt->read_count(ch->cmt->mapbase, CMCNT);
++ return ch->cmt->read_count(ch->cmt->mapbase_ch, CMCNT);
+ }
+
+ static inline void sh_cmt_write_cmstr(struct sh_cmt_channel *ch,
+ unsigned long value)
+ {
+- ch->cmt->write_control(ch->cmt->mapbase_str, 0, value);
++ ch->cmt->write_control(ch->cmt->mapbase, 0, value);
+ }
+
+ static inline void sh_cmt_write_cmcsr(struct sh_cmt_channel *ch,
+ unsigned long value)
+ {
+- ch->cmt->write_control(ch->cmt->mapbase, CMCSR, value);
++ ch->cmt->write_control(ch->cmt->mapbase_ch, CMCSR, value);
+ }
+
+ static inline void sh_cmt_write_cmcnt(struct sh_cmt_channel *ch,
+ unsigned long value)
+ {
+- ch->cmt->write_count(ch->cmt->mapbase, CMCNT, value);
++ ch->cmt->write_count(ch->cmt->mapbase_ch, CMCNT, value);
+ }
+
+ static inline void sh_cmt_write_cmcor(struct sh_cmt_channel *ch,
+ unsigned long value)
+ {
+- ch->cmt->write_count(ch->cmt->mapbase, CMCOR, value);
++ ch->cmt->write_count(ch->cmt->mapbase_ch, CMCOR, value);
+ }
+
+ static unsigned long sh_cmt_get_counter(struct sh_cmt_channel *ch,
+@@ -761,18 +761,18 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
+ /* optional resource for the shared timer start/stop register */
+ res2 = platform_get_resource(cmt->pdev, IORESOURCE_MEM, 1);
+
+- /* map memory, let mapbase point to our channel */
+- cmt->mapbase = ioremap_nocache(res->start, resource_size(res));
+- if (cmt->mapbase == NULL) {
++ /* map memory, let mapbase_ch point to our channel */
++ cmt->mapbase_ch = ioremap_nocache(res->start, resource_size(res));
++ if (cmt->mapbase_ch == NULL) {
+ dev_err(&cmt->pdev->dev, "failed to remap I/O memory\n");
+ goto err0;
+ }
+
+ /* map second resource for CMSTR */
+- cmt->mapbase_str = ioremap_nocache(res2 ? res2->start :
+- res->start - cfg->channel_offset,
+- res2 ? resource_size(res2) : 2);
+- if (cmt->mapbase_str == NULL) {
++ cmt->mapbase = ioremap_nocache(res2 ? res2->start :
++ res->start - cfg->channel_offset,
++ res2 ? resource_size(res2) : 2);
++ if (cmt->mapbase == NULL) {
+ dev_err(&cmt->pdev->dev, "failed to remap I/O second memory\n");
+ goto err1;
+ }
+@@ -824,9 +824,9 @@ err4:
+ err3:
+ clk_put(cmt->clk);
+ err2:
+- iounmap(cmt->mapbase_str);
+-err1:
+ iounmap(cmt->mapbase);
++err1:
++ iounmap(cmt->mapbase_ch);
+ err0:
+ return ret;
+ }
+--
+2.1.2
+
--- /dev/null
+From 6d3237bd5d16ab1f33dc531f422cf9a4d5069dcb Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 27 Jan 2014 22:04:17 +0100
+Subject: clocksource: sh_cmt: Add memory base to sh_cmt_channel structure
+
+The channel memory base is channel-specific, add it to the channel
+structure in preparation for support of multiple channels per device.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit c924d2d2a964715b55b6601be338b3bd05a1ced5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 13 ++++++++-----
+ 1 file changed, 8 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index eb93b889e189..4fcb05dc9ea4 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -40,6 +40,8 @@ struct sh_cmt_device;
+ struct sh_cmt_channel {
+ struct sh_cmt_device *cmt;
+
++ void __iomem *base;
++
+ unsigned long flags;
+ unsigned long match_value;
+ unsigned long next_match_value;
+@@ -130,12 +132,12 @@ static inline unsigned long sh_cmt_read_cmstr(struct sh_cmt_channel *ch)
+
+ static inline unsigned long sh_cmt_read_cmcsr(struct sh_cmt_channel *ch)
+ {
+- return ch->cmt->read_control(ch->cmt->mapbase_ch, CMCSR);
++ return ch->cmt->read_control(ch->base, CMCSR);
+ }
+
+ static inline unsigned long sh_cmt_read_cmcnt(struct sh_cmt_channel *ch)
+ {
+- return ch->cmt->read_count(ch->cmt->mapbase_ch, CMCNT);
++ return ch->cmt->read_count(ch->base, CMCNT);
+ }
+
+ static inline void sh_cmt_write_cmstr(struct sh_cmt_channel *ch,
+@@ -147,19 +149,19 @@ static inline void sh_cmt_write_cmstr(struct sh_cmt_channel *ch,
+ static inline void sh_cmt_write_cmcsr(struct sh_cmt_channel *ch,
+ unsigned long value)
+ {
+- ch->cmt->write_control(ch->cmt->mapbase_ch, CMCSR, value);
++ ch->cmt->write_control(ch->base, CMCSR, value);
+ }
+
+ static inline void sh_cmt_write_cmcnt(struct sh_cmt_channel *ch,
+ unsigned long value)
+ {
+- ch->cmt->write_count(ch->cmt->mapbase_ch, CMCNT, value);
++ ch->cmt->write_count(ch->base, CMCNT, value);
+ }
+
+ static inline void sh_cmt_write_cmcor(struct sh_cmt_channel *ch,
+ unsigned long value)
+ {
+- ch->cmt->write_count(ch->cmt->mapbase_ch, CMCOR, value);
++ ch->cmt->write_count(ch->base, CMCOR, value);
+ }
+
+ static unsigned long sh_cmt_get_counter(struct sh_cmt_channel *ch,
+@@ -702,6 +704,7 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch,
+
+ memset(ch, 0, sizeof(*ch));
+ ch->cmt = cmt;
++ ch->base = cmt->mapbase_ch;
+
+ irq = platform_get_irq(cmt->pdev, 0);
+ if (irq < 0) {
+--
+2.1.2
+
--- /dev/null
+From 64080195e87ebf45fdf817d9ba839bdd57edcba0 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 27 Jan 2014 22:04:17 +0100
+Subject: clocksource: sh_cmt: Add index to struct sh_cmt_channel
+
+Use the index when printing messages to identify the channel.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 740a95184dd61eb0481f75ced05ea5e01b7ce6ac)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 37 ++++++++++++++++++++++++-------------
+ 1 file changed, 24 insertions(+), 13 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index 4fcb05dc9ea4..6b65621a9733 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -39,6 +39,7 @@ struct sh_cmt_device;
+
+ struct sh_cmt_channel {
+ struct sh_cmt_device *cmt;
++ unsigned int index;
+
+ void __iomem *base;
+
+@@ -216,7 +217,8 @@ static int sh_cmt_enable(struct sh_cmt_channel *ch, unsigned long *rate)
+ /* enable clock */
+ ret = clk_enable(ch->cmt->clk);
+ if (ret) {
+- dev_err(&ch->cmt->pdev->dev, "cannot enable clock\n");
++ dev_err(&ch->cmt->pdev->dev, "ch%u: cannot enable clock\n",
++ ch->index);
+ goto err0;
+ }
+
+@@ -253,7 +255,8 @@ static int sh_cmt_enable(struct sh_cmt_channel *ch, unsigned long *rate)
+ }
+
+ if (sh_cmt_read_cmcnt(ch)) {
+- dev_err(&ch->cmt->pdev->dev, "cannot clear CMCNT\n");
++ dev_err(&ch->cmt->pdev->dev, "ch%u: cannot clear CMCNT\n",
++ ch->index);
+ ret = -ETIMEDOUT;
+ goto err1;
+ }
+@@ -371,7 +374,8 @@ static void sh_cmt_clock_event_program_verify(struct sh_cmt_channel *ch,
+ delay = 1;
+
+ if (!delay)
+- dev_warn(&ch->cmt->pdev->dev, "too long delay\n");
++ dev_warn(&ch->cmt->pdev->dev, "ch%u: too long delay\n",
++ ch->index);
+
+ } while (delay);
+ }
+@@ -379,7 +383,8 @@ static void sh_cmt_clock_event_program_verify(struct sh_cmt_channel *ch,
+ static void __sh_cmt_set_next(struct sh_cmt_channel *ch, unsigned long delta)
+ {
+ if (delta > ch->max_match_value)
+- dev_warn(&ch->cmt->pdev->dev, "delta out of range\n");
++ dev_warn(&ch->cmt->pdev->dev, "ch%u: delta out of range\n",
++ ch->index);
+
+ ch->next_match_value = delta;
+ sh_cmt_clock_event_program_verify(ch, 0);
+@@ -565,7 +570,8 @@ static int sh_cmt_register_clocksource(struct sh_cmt_channel *ch,
+ cs->mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8);
+ cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
+
+- dev_info(&ch->cmt->pdev->dev, "used as clock source\n");
++ dev_info(&ch->cmt->pdev->dev, "ch%u: used as clock source\n",
++ ch->index);
+
+ /* Register with dummy 1 Hz value, gets updated in ->enable() */
+ clocksource_register_hz(cs, 1);
+@@ -614,12 +620,12 @@ static void sh_cmt_clock_event_mode(enum clock_event_mode mode,
+ switch (mode) {
+ case CLOCK_EVT_MODE_PERIODIC:
+ dev_info(&ch->cmt->pdev->dev,
+- "used for periodic clock events\n");
++ "ch%u: used for periodic clock events\n", ch->index);
+ sh_cmt_clock_event_start(ch, 1);
+ break;
+ case CLOCK_EVT_MODE_ONESHOT:
+ dev_info(&ch->cmt->pdev->dev,
+- "used for oneshot clock events\n");
++ "ch%u: used for oneshot clock events\n", ch->index);
+ sh_cmt_clock_event_start(ch, 0);
+ break;
+ case CLOCK_EVT_MODE_SHUTDOWN:
+@@ -678,7 +684,8 @@ static void sh_cmt_register_clockevent(struct sh_cmt_channel *ch,
+ ced->suspend = sh_cmt_clock_event_suspend;
+ ced->resume = sh_cmt_clock_event_resume;
+
+- dev_info(&ch->cmt->pdev->dev, "used for clock events\n");
++ dev_info(&ch->cmt->pdev->dev, "ch%u: used for clock events\n",
++ ch->index);
+ clockevents_register_device(ced);
+ }
+
+@@ -695,7 +702,7 @@ static int sh_cmt_register(struct sh_cmt_channel *ch, const char *name,
+ return 0;
+ }
+
+-static int sh_cmt_setup_channel(struct sh_cmt_channel *ch,
++static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,
+ struct sh_cmt_device *cmt)
+ {
+ struct sh_timer_config *cfg = cmt->pdev->dev.platform_data;
+@@ -705,10 +712,12 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch,
+ memset(ch, 0, sizeof(*ch));
+ ch->cmt = cmt;
+ ch->base = cmt->mapbase_ch;
++ ch->index = index;
+
+ irq = platform_get_irq(cmt->pdev, 0);
+ if (irq < 0) {
+- dev_err(&cmt->pdev->dev, "failed to get irq\n");
++ dev_err(&cmt->pdev->dev, "ch%u: failed to get irq\n",
++ ch->index);
+ return irq;
+ }
+
+@@ -724,7 +733,8 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch,
+ cfg->clockevent_rating,
+ cfg->clocksource_rating);
+ if (ret) {
+- dev_err(&cmt->pdev->dev, "registration failed\n");
++ dev_err(&cmt->pdev->dev, "ch%u: registration failed\n",
++ ch->index);
+ return ret;
+ }
+ ch->cs_enabled = false;
+@@ -733,7 +743,8 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch,
+ IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
+ dev_name(&cmt->pdev->dev), ch);
+ if (ret) {
+- dev_err(&cmt->pdev->dev, "failed to request irq %d\n", irq);
++ dev_err(&cmt->pdev->dev, "ch%u: failed to request irq %d\n",
++ ch->index, irq);
+ return ret;
+ }
+
+@@ -815,7 +826,7 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
+ cmt->clear_bits = ~0xc000;
+ }
+
+- ret = sh_cmt_setup_channel(&cmt->channel, cmt);
++ ret = sh_cmt_setup_channel(&cmt->channel, cfg->timer_bit, cmt);
+ if (ret < 0)
+ goto err4;
+
+--
+2.1.2
+
--- /dev/null
+From b0e07321a3a1366c46289823cf9da9662489aa5f Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 27 Jan 2014 22:04:17 +0100
+Subject: clocksource: sh_cmt: Replace kmalloc + memset with kzalloc
+
+One kzalloc a day keeps the bugs away.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit b262bc74dcfd77355720342cbcf89cc8ec12e86b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 6 +-----
+ 1 file changed, 1 insertion(+), 5 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index 6b65621a9733..0779bf194aea 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -672,8 +672,6 @@ static void sh_cmt_register_clockevent(struct sh_cmt_channel *ch,
+ {
+ struct clock_event_device *ced = &ch->ced;
+
+- memset(ced, 0, sizeof(*ced));
+-
+ ced->name = name;
+ ced->features = CLOCK_EVT_FEAT_PERIODIC;
+ ced->features |= CLOCK_EVT_FEAT_ONESHOT;
+@@ -709,7 +707,6 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,
+ int irq;
+ int ret;
+
+- memset(ch, 0, sizeof(*ch));
+ ch->cmt = cmt;
+ ch->base = cmt->mapbase_ch;
+ ch->index = index;
+@@ -758,7 +755,6 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
+ int ret;
+ ret = -ENXIO;
+
+- memset(cmt, 0, sizeof(*cmt));
+ cmt->pdev = pdev;
+
+ if (!cfg) {
+@@ -861,7 +857,7 @@ static int sh_cmt_probe(struct platform_device *pdev)
+ goto out;
+ }
+
+- cmt = kmalloc(sizeof(*cmt), GFP_KERNEL);
++ cmt = kzalloc(sizeof(*cmt), GFP_KERNEL);
+ if (cmt == NULL) {
+ dev_err(&pdev->dev, "failed to allocate driver data\n");
+ return -ENOMEM;
+--
+2.1.2
+
--- /dev/null
+From ad4e79c19c8860ccd0fb311fa3c12282de9385e6 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 27 Jan 2014 22:04:17 +0100
+Subject: clocksource: sh_cmt: Allocate channels dynamically
+
+This prepares the driver for multi-channel support.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit f5ec9b194a93c05e2ccdb3e90d9061cfedc806d9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 14 ++++++++++++--
+ 1 file changed, 12 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index 0779bf194aea..f94db327ac7c 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -62,7 +62,8 @@ struct sh_cmt_device {
+ void __iomem *mapbase;
+ struct clk *clk;
+
+- struct sh_cmt_channel channel;
++ struct sh_cmt_channel *channels;
++ unsigned int num_channels;
+
+ unsigned long width; /* 16 or 32 bit version of hardware block */
+ unsigned long overflow_bit;
+@@ -822,7 +823,15 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
+ cmt->clear_bits = ~0xc000;
+ }
+
+- ret = sh_cmt_setup_channel(&cmt->channel, cfg->timer_bit, cmt);
++ cmt->channels = kzalloc(sizeof(*cmt->channels), GFP_KERNEL);
++ if (cmt->channels == NULL) {
++ ret = -ENOMEM;
++ goto err4;
++ }
++
++ cmt->num_channels = 1;
++
++ ret = sh_cmt_setup_channel(&cmt->channels[0], cfg->timer_bit, cmt);
+ if (ret < 0)
+ goto err4;
+
+@@ -830,6 +839,7 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
+
+ return 0;
+ err4:
++ kfree(cmt->channels);
+ clk_unprepare(cmt->clk);
+ err3:
+ clk_put(cmt->clk);
+--
+2.1.2
+
--- /dev/null
+From c9b75f84c0b921f302ce6e3c27411be2351ea6bc Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 11 Feb 2014 23:46:48 +0100
+Subject: clocksource: sh_cmt: Split static information from sh_cmt_device
+
+Create a new sh_cmt_info structure to hold static information about the
+device model and reference that structure from the sh_cmt_device
+structure.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 2cda3ac49d5744432e9ebffb8ba47bef6eca053d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 192 +++++++++++++++++++++++++++----------------
+ 1 file changed, 122 insertions(+), 70 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index f94db327ac7c..879b8c2ae556 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -37,6 +37,52 @@
+
+ struct sh_cmt_device;
+
++/*
++ * The CMT comes in 5 different identified flavours, depending not only on the
++ * SoC but also on the particular instance. The following table lists the main
++ * characteristics of those flavours.
++ *
++ * 16B 32B 32B-F 48B 48B-2
++ * -----------------------------------------------------------------------------
++ * Channels 2 1/4 1 6 2/8
++ * Control Width 16 16 16 16 32
++ * Counter Width 16 32 32 32/48 32/48
++ * Shared Start/Stop Y Y Y Y N
++ *
++ * The 48-bit gen2 version has a per-channel start/stop register located in the
++ * channel registers block. All other versions have a shared start/stop register
++ * located in the global space.
++ *
++ * Note that CMT0 on r8a73a4, r8a7790 and r8a7791, while implementing 32-bit
++ * channels only, is a 48-bit gen2 CMT with the 48-bit channels unavailable.
++ */
++
++enum sh_cmt_model {
++ SH_CMT_16BIT,
++ SH_CMT_32BIT,
++ SH_CMT_32BIT_FAST,
++ SH_CMT_48BIT,
++ SH_CMT_48BIT_GEN2,
++};
++
++struct sh_cmt_info {
++ enum sh_cmt_model model;
++
++ unsigned long width; /* 16 or 32 bit version of hardware block */
++ unsigned long overflow_bit;
++ unsigned long clear_bits;
++
++ /* callbacks for CMSTR and CMCSR access */
++ unsigned long (*read_control)(void __iomem *base, unsigned long offs);
++ void (*write_control)(void __iomem *base, unsigned long offs,
++ unsigned long value);
++
++ /* callbacks for CMCNT and CMCOR access */
++ unsigned long (*read_count)(void __iomem *base, unsigned long offs);
++ void (*write_count)(void __iomem *base, unsigned long offs,
++ unsigned long value);
++};
++
+ struct sh_cmt_channel {
+ struct sh_cmt_device *cmt;
+ unsigned int index;
+@@ -58,49 +104,16 @@ struct sh_cmt_channel {
+ struct sh_cmt_device {
+ struct platform_device *pdev;
+
++ const struct sh_cmt_info *info;
++
+ void __iomem *mapbase_ch;
+ void __iomem *mapbase;
+ struct clk *clk;
+
+ struct sh_cmt_channel *channels;
+ unsigned int num_channels;
+-
+- unsigned long width; /* 16 or 32 bit version of hardware block */
+- unsigned long overflow_bit;
+- unsigned long clear_bits;
+-
+- /* callbacks for CMSTR and CMCSR access */
+- unsigned long (*read_control)(void __iomem *base, unsigned long offs);
+- void (*write_control)(void __iomem *base, unsigned long offs,
+- unsigned long value);
+-
+- /* callbacks for CMCNT and CMCOR access */
+- unsigned long (*read_count)(void __iomem *base, unsigned long offs);
+- void (*write_count)(void __iomem *base, unsigned long offs,
+- unsigned long value);
+ };
+
+-/* Examples of supported CMT timer register layouts and I/O access widths:
+- *
+- * "16-bit counter and 16-bit control" as found on sh7263:
+- * CMSTR 0xfffec000 16-bit
+- * CMCSR 0xfffec002 16-bit
+- * CMCNT 0xfffec004 16-bit
+- * CMCOR 0xfffec006 16-bit
+- *
+- * "32-bit counter and 16-bit control" as found on sh7372, sh73a0, r8a7740:
+- * CMSTR 0xffca0000 16-bit
+- * CMCSR 0xffca0060 16-bit
+- * CMCNT 0xffca0064 32-bit
+- * CMCOR 0xffca0068 32-bit
+- *
+- * "32-bit counter and 32-bit control" as found on r8a73a4 and r8a7790:
+- * CMSTR 0xffca0500 32-bit
+- * CMCSR 0xffca0510 32-bit
+- * CMCNT 0xffca0514 32-bit
+- * CMCOR 0xffca0518 32-bit
+- */
+-
+ static unsigned long sh_cmt_read16(void __iomem *base, unsigned long offs)
+ {
+ return ioread16(base + (offs << 1));
+@@ -123,47 +136,100 @@ static void sh_cmt_write32(void __iomem *base, unsigned long offs,
+ iowrite32(value, base + (offs << 2));
+ }
+
++static const struct sh_cmt_info sh_cmt_info[] = {
++ [SH_CMT_16BIT] = {
++ .model = SH_CMT_16BIT,
++ .width = 16,
++ .overflow_bit = 0x80,
++ .clear_bits = ~0x80,
++ .read_control = sh_cmt_read16,
++ .write_control = sh_cmt_write16,
++ .read_count = sh_cmt_read16,
++ .write_count = sh_cmt_write16,
++ },
++ [SH_CMT_32BIT] = {
++ .model = SH_CMT_32BIT,
++ .width = 32,
++ .overflow_bit = 0x8000,
++ .clear_bits = ~0xc000,
++ .read_control = sh_cmt_read16,
++ .write_control = sh_cmt_write16,
++ .read_count = sh_cmt_read32,
++ .write_count = sh_cmt_write32,
++ },
++ [SH_CMT_32BIT_FAST] = {
++ .model = SH_CMT_32BIT_FAST,
++ .width = 32,
++ .overflow_bit = 0x8000,
++ .clear_bits = ~0xc000,
++ .read_control = sh_cmt_read16,
++ .write_control = sh_cmt_write16,
++ .read_count = sh_cmt_read32,
++ .write_count = sh_cmt_write32,
++ },
++ [SH_CMT_48BIT] = {
++ .model = SH_CMT_48BIT,
++ .width = 32,
++ .overflow_bit = 0x8000,
++ .clear_bits = ~0xc000,
++ .read_control = sh_cmt_read32,
++ .write_control = sh_cmt_write32,
++ .read_count = sh_cmt_read32,
++ .write_count = sh_cmt_write32,
++ },
++ [SH_CMT_48BIT_GEN2] = {
++ .model = SH_CMT_48BIT_GEN2,
++ .width = 32,
++ .overflow_bit = 0x8000,
++ .clear_bits = ~0xc000,
++ .read_control = sh_cmt_read32,
++ .write_control = sh_cmt_write32,
++ .read_count = sh_cmt_read32,
++ .write_count = sh_cmt_write32,
++ },
++};
++
+ #define CMCSR 0 /* channel register */
+ #define CMCNT 1 /* channel register */
+ #define CMCOR 2 /* channel register */
+
+ static inline unsigned long sh_cmt_read_cmstr(struct sh_cmt_channel *ch)
+ {
+- return ch->cmt->read_control(ch->cmt->mapbase, 0);
++ return ch->cmt->info->read_control(ch->cmt->mapbase, 0);
+ }
+
+ static inline unsigned long sh_cmt_read_cmcsr(struct sh_cmt_channel *ch)
+ {
+- return ch->cmt->read_control(ch->base, CMCSR);
++ return ch->cmt->info->read_control(ch->base, CMCSR);
+ }
+
+ static inline unsigned long sh_cmt_read_cmcnt(struct sh_cmt_channel *ch)
+ {
+- return ch->cmt->read_count(ch->base, CMCNT);
++ return ch->cmt->info->read_count(ch->base, CMCNT);
+ }
+
+ static inline void sh_cmt_write_cmstr(struct sh_cmt_channel *ch,
+ unsigned long value)
+ {
+- ch->cmt->write_control(ch->cmt->mapbase, 0, value);
++ ch->cmt->info->write_control(ch->cmt->mapbase, 0, value);
+ }
+
+ static inline void sh_cmt_write_cmcsr(struct sh_cmt_channel *ch,
+ unsigned long value)
+ {
+- ch->cmt->write_control(ch->base, CMCSR, value);
++ ch->cmt->info->write_control(ch->base, CMCSR, value);
+ }
+
+ static inline void sh_cmt_write_cmcnt(struct sh_cmt_channel *ch,
+ unsigned long value)
+ {
+- ch->cmt->write_count(ch->base, CMCNT, value);
++ ch->cmt->info->write_count(ch->base, CMCNT, value);
+ }
+
+ static inline void sh_cmt_write_cmcor(struct sh_cmt_channel *ch,
+ unsigned long value)
+ {
+- ch->cmt->write_count(ch->base, CMCOR, value);
++ ch->cmt->info->write_count(ch->base, CMCOR, value);
+ }
+
+ static unsigned long sh_cmt_get_counter(struct sh_cmt_channel *ch,
+@@ -172,7 +238,7 @@ static unsigned long sh_cmt_get_counter(struct sh_cmt_channel *ch,
+ unsigned long v1, v2, v3;
+ int o1, o2;
+
+- o1 = sh_cmt_read_cmcsr(ch) & ch->cmt->overflow_bit;
++ o1 = sh_cmt_read_cmcsr(ch) & ch->cmt->info->overflow_bit;
+
+ /* Make sure the timer value is stable. Stolen from acpi_pm.c */
+ do {
+@@ -180,7 +246,7 @@ static unsigned long sh_cmt_get_counter(struct sh_cmt_channel *ch,
+ v1 = sh_cmt_read_cmcnt(ch);
+ v2 = sh_cmt_read_cmcnt(ch);
+ v3 = sh_cmt_read_cmcnt(ch);
+- o1 = sh_cmt_read_cmcsr(ch) & ch->cmt->overflow_bit;
++ o1 = sh_cmt_read_cmcsr(ch) & ch->cmt->info->overflow_bit;
+ } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
+ || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
+
+@@ -227,7 +293,7 @@ static int sh_cmt_enable(struct sh_cmt_channel *ch, unsigned long *rate)
+ sh_cmt_start_stop_ch(ch, 0);
+
+ /* configure channel, periodic mode and maximum timeout */
+- if (ch->cmt->width == 16) {
++ if (ch->cmt->info->width == 16) {
+ *rate = clk_get_rate(ch->cmt->clk) / 512;
+ sh_cmt_write_cmcsr(ch, 0x43);
+ } else {
+@@ -405,7 +471,8 @@ static irqreturn_t sh_cmt_interrupt(int irq, void *dev_id)
+ struct sh_cmt_channel *ch = dev_id;
+
+ /* clear flags */
+- sh_cmt_write_cmcsr(ch, sh_cmt_read_cmcsr(ch) & ch->cmt->clear_bits);
++ sh_cmt_write_cmcsr(ch, sh_cmt_read_cmcsr(ch) &
++ ch->cmt->info->clear_bits);
+
+ /* update clock source counter to begin with if enabled
+ * the wrap flag should be cleared by the timer specific
+@@ -719,10 +786,10 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,
+ return irq;
+ }
+
+- if (cmt->width == (sizeof(ch->max_match_value) * 8))
++ if (cmt->info->width == (sizeof(ch->max_match_value) * 8))
+ ch->max_match_value = ~0;
+ else
+- ch->max_match_value = (1 << cmt->width) - 1;
++ ch->max_match_value = (1 << cmt->info->width) - 1;
+
+ ch->match_value = ch->max_match_value;
+ raw_spin_lock_init(&ch->lock);
+@@ -800,28 +867,13 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
+ if (ret < 0)
+ goto err3;
+
+- if (res2 && (resource_size(res2) == 4)) {
+- /* assume both CMSTR and CMCSR to be 32-bit */
+- cmt->read_control = sh_cmt_read32;
+- cmt->write_control = sh_cmt_write32;
+- } else {
+- cmt->read_control = sh_cmt_read16;
+- cmt->write_control = sh_cmt_write16;
+- }
+-
+- if (resource_size(res) == 6) {
+- cmt->width = 16;
+- cmt->read_count = sh_cmt_read16;
+- cmt->write_count = sh_cmt_write16;
+- cmt->overflow_bit = 0x80;
+- cmt->clear_bits = ~0x80;
+- } else {
+- cmt->width = 32;
+- cmt->read_count = sh_cmt_read32;
+- cmt->write_count = sh_cmt_write32;
+- cmt->overflow_bit = 0x8000;
+- cmt->clear_bits = ~0xc000;
+- }
++ /* identify the model based on the resources */
++ if (resource_size(res) == 6)
++ cmt->info = &sh_cmt_info[SH_CMT_16BIT];
++ else if (res2 && (resource_size(res2) == 4))
++ cmt->info = &sh_cmt_info[SH_CMT_48BIT_GEN2];
++ else
++ cmt->info = &sh_cmt_info[SH_CMT_32BIT];
+
+ cmt->channels = kzalloc(sizeof(*cmt->channels), GFP_KERNEL);
+ if (cmt->channels == NULL) {
+--
+2.1.2
+
--- /dev/null
+From 1ed831ad8ca8384ecda71a73c97761e1b48c9a09 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 29 Jan 2014 00:33:08 +0100
+Subject: clocksource: sh_cmt: Replace hardcoded register values with macros
+
+Define symbolic macros for all used registers bits.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit d14be99b7e3fe52bc9921caa30953d49f499f121)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 56 ++++++++++++++++++++++++++++++++++----------
+ 1 file changed, 44 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index 879b8c2ae556..ce00baaf8bd2 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -114,6 +114,34 @@ struct sh_cmt_device {
+ unsigned int num_channels;
+ };
+
++#define SH_CMT16_CMCSR_CMF (1 << 7)
++#define SH_CMT16_CMCSR_CMIE (1 << 6)
++#define SH_CMT16_CMCSR_CKS8 (0 << 0)
++#define SH_CMT16_CMCSR_CKS32 (1 << 0)
++#define SH_CMT16_CMCSR_CKS128 (2 << 0)
++#define SH_CMT16_CMCSR_CKS512 (3 << 0)
++#define SH_CMT16_CMCSR_CKS_MASK (3 << 0)
++
++#define SH_CMT32_CMCSR_CMF (1 << 15)
++#define SH_CMT32_CMCSR_OVF (1 << 14)
++#define SH_CMT32_CMCSR_WRFLG (1 << 13)
++#define SH_CMT32_CMCSR_STTF (1 << 12)
++#define SH_CMT32_CMCSR_STPF (1 << 11)
++#define SH_CMT32_CMCSR_SSIE (1 << 10)
++#define SH_CMT32_CMCSR_CMS (1 << 9)
++#define SH_CMT32_CMCSR_CMM (1 << 8)
++#define SH_CMT32_CMCSR_CMTOUT_IE (1 << 7)
++#define SH_CMT32_CMCSR_CMR_NONE (0 << 4)
++#define SH_CMT32_CMCSR_CMR_DMA (1 << 4)
++#define SH_CMT32_CMCSR_CMR_IRQ (2 << 4)
++#define SH_CMT32_CMCSR_CMR_MASK (3 << 4)
++#define SH_CMT32_CMCSR_DBGIVD (1 << 3)
++#define SH_CMT32_CMCSR_CKS_RCLK8 (4 << 0)
++#define SH_CMT32_CMCSR_CKS_RCLK32 (5 << 0)
++#define SH_CMT32_CMCSR_CKS_RCLK128 (6 << 0)
++#define SH_CMT32_CMCSR_CKS_RCLK1 (7 << 0)
++#define SH_CMT32_CMCSR_CKS_MASK (7 << 0)
++
+ static unsigned long sh_cmt_read16(void __iomem *base, unsigned long offs)
+ {
+ return ioread16(base + (offs << 1));
+@@ -140,8 +168,8 @@ static const struct sh_cmt_info sh_cmt_info[] = {
+ [SH_CMT_16BIT] = {
+ .model = SH_CMT_16BIT,
+ .width = 16,
+- .overflow_bit = 0x80,
+- .clear_bits = ~0x80,
++ .overflow_bit = SH_CMT16_CMCSR_CMF,
++ .clear_bits = ~SH_CMT16_CMCSR_CMF,
+ .read_control = sh_cmt_read16,
+ .write_control = sh_cmt_write16,
+ .read_count = sh_cmt_read16,
+@@ -150,8 +178,8 @@ static const struct sh_cmt_info sh_cmt_info[] = {
+ [SH_CMT_32BIT] = {
+ .model = SH_CMT_32BIT,
+ .width = 32,
+- .overflow_bit = 0x8000,
+- .clear_bits = ~0xc000,
++ .overflow_bit = SH_CMT32_CMCSR_CMF,
++ .clear_bits = ~(SH_CMT32_CMCSR_CMF | SH_CMT32_CMCSR_OVF),
+ .read_control = sh_cmt_read16,
+ .write_control = sh_cmt_write16,
+ .read_count = sh_cmt_read32,
+@@ -160,8 +188,8 @@ static const struct sh_cmt_info sh_cmt_info[] = {
+ [SH_CMT_32BIT_FAST] = {
+ .model = SH_CMT_32BIT_FAST,
+ .width = 32,
+- .overflow_bit = 0x8000,
+- .clear_bits = ~0xc000,
++ .overflow_bit = SH_CMT32_CMCSR_CMF,
++ .clear_bits = ~(SH_CMT32_CMCSR_CMF | SH_CMT32_CMCSR_OVF),
+ .read_control = sh_cmt_read16,
+ .write_control = sh_cmt_write16,
+ .read_count = sh_cmt_read32,
+@@ -170,8 +198,8 @@ static const struct sh_cmt_info sh_cmt_info[] = {
+ [SH_CMT_48BIT] = {
+ .model = SH_CMT_48BIT,
+ .width = 32,
+- .overflow_bit = 0x8000,
+- .clear_bits = ~0xc000,
++ .overflow_bit = SH_CMT32_CMCSR_CMF,
++ .clear_bits = ~(SH_CMT32_CMCSR_CMF | SH_CMT32_CMCSR_OVF),
+ .read_control = sh_cmt_read32,
+ .write_control = sh_cmt_write32,
+ .read_count = sh_cmt_read32,
+@@ -180,8 +208,8 @@ static const struct sh_cmt_info sh_cmt_info[] = {
+ [SH_CMT_48BIT_GEN2] = {
+ .model = SH_CMT_48BIT_GEN2,
+ .width = 32,
+- .overflow_bit = 0x8000,
+- .clear_bits = ~0xc000,
++ .overflow_bit = SH_CMT32_CMCSR_CMF,
++ .clear_bits = ~(SH_CMT32_CMCSR_CMF | SH_CMT32_CMCSR_OVF),
+ .read_control = sh_cmt_read32,
+ .write_control = sh_cmt_write32,
+ .read_count = sh_cmt_read32,
+@@ -295,10 +323,14 @@ static int sh_cmt_enable(struct sh_cmt_channel *ch, unsigned long *rate)
+ /* configure channel, periodic mode and maximum timeout */
+ if (ch->cmt->info->width == 16) {
+ *rate = clk_get_rate(ch->cmt->clk) / 512;
+- sh_cmt_write_cmcsr(ch, 0x43);
++ sh_cmt_write_cmcsr(ch, SH_CMT16_CMCSR_CMIE |
++ SH_CMT16_CMCSR_CKS512);
+ } else {
+ *rate = clk_get_rate(ch->cmt->clk) / 8;
+- sh_cmt_write_cmcsr(ch, 0x01a4);
++ sh_cmt_write_cmcsr(ch, SH_CMT32_CMCSR_CMM |
++ SH_CMT32_CMCSR_CMTOUT_IE |
++ SH_CMT32_CMCSR_CMR_IRQ |
++ SH_CMT32_CMCSR_CKS_RCLK8);
+ }
+
+ sh_cmt_write_cmcor(ch, 0xffffffff);
+--
+2.1.2
+
--- /dev/null
+From e8cb9e16b76cfe3cb8062b0451d39c940f2f2150 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 19 Feb 2014 16:19:44 +0100
+Subject: clocksource: sh_cmt: Set cpumask to cpu_possible_mask
+
+The CMT is a global timer not restricted to a single CPU. It has a lower
+rating than the TMU or ARM architected timer, but is still useful on
+systems where the other timers are stopped during CPU sleep.
+
+When multiple timers are available the timers core selects which timer
+to use based on timer ratings.
+
+On SMP systems where timer broadcasting is required, one dummy timer is
+instantiated per CPU with a rating of 100. On those systems the CMT
+timer has a rating of 80, which makes the dummy timer selected by
+default on all CPUs. The CMT is then available, and will be used as a
+broadcast timer.
+
+On UP systems no dummy timer is instantiated. The CMT timer has a rating
+of 125 on those systems and is used directly as a clock event device for
+CPU0 without broadcasting.
+
+The CMT rating shouldn't depend on whether we boot a UP or SMP system.
+We can't raise the CMT rating to 125 on SMP systems. This would select
+CMT as the clock event device for CPU0 as its rating is higher than the
+dummy timer rating, and would leave the system without a broadcast
+timer. We could instead lower the rating to 80 on all systems, but that
+wouldn't reflect reality as ratings between 1 and 99 are documented as
+"unfit for real use".
+
+We should raise the rating above 99 and still have the CMT selected as a
+broadcast timer. This can be done by changing the cpumask from
+cpumask_of(0) to cpu_possible_mask. In that case the timer selection
+logic will prefer the previously probed and already selected dummy timer
+for all CPUs based on the fact that already selected per-cpu timers are
+preferred over new global timers, regardless of their respective
+ratings. This also better reflects reality, as the CMT is not tied to
+the boot CPU.
+
+Ideally the timer selection logic should realize that the CMT needs to
+be used as a broadcast timer on SMP systems as no other broadcast timer
+is available, regardless of the cpumask and rating.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit f1ebe1e47e1979393a8492bfe751176908a830ae)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index ce00baaf8bd2..926abe288126 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -776,7 +776,7 @@ static void sh_cmt_register_clockevent(struct sh_cmt_channel *ch,
+ ced->features = CLOCK_EVT_FEAT_PERIODIC;
+ ced->features |= CLOCK_EVT_FEAT_ONESHOT;
+ ced->rating = rating;
+- ced->cpumask = cpumask_of(0);
++ ced->cpumask = cpu_possible_mask;
+ ced->set_next_event = sh_cmt_clock_event_next;
+ ced->set_mode = sh_cmt_clock_event_mode;
+ ced->suspend = sh_cmt_clock_event_suspend;
+--
+2.1.2
+
--- /dev/null
+From caf8f646c77ecda6fa7ded0824c83508123f936d Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 19 Feb 2014 17:00:31 +0100
+Subject: clocksource: sh_cmt: Hardcode CMT clock event rating to 125
+
+All boards use or should use a clock event rating of 125 for the CMT,
+hardcode it in the driver.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit b7fcbb0f830e6cccc9d358c24f8463e5d8018649)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 13 ++++++-------
+ 1 file changed, 6 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index 926abe288126..75b1f83a60a8 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -768,14 +768,14 @@ static void sh_cmt_clock_event_resume(struct clock_event_device *ced)
+ }
+
+ static void sh_cmt_register_clockevent(struct sh_cmt_channel *ch,
+- const char *name, unsigned long rating)
++ const char *name)
+ {
+ struct clock_event_device *ced = &ch->ced;
+
+ ced->name = name;
+ ced->features = CLOCK_EVT_FEAT_PERIODIC;
+ ced->features |= CLOCK_EVT_FEAT_ONESHOT;
+- ced->rating = rating;
++ ced->rating = 125;
+ ced->cpumask = cpu_possible_mask;
+ ced->set_next_event = sh_cmt_clock_event_next;
+ ced->set_mode = sh_cmt_clock_event_mode;
+@@ -788,11 +788,10 @@ static void sh_cmt_register_clockevent(struct sh_cmt_channel *ch,
+ }
+
+ static int sh_cmt_register(struct sh_cmt_channel *ch, const char *name,
+- unsigned long clockevent_rating,
+- unsigned long clocksource_rating)
++ bool clockevent, unsigned long clocksource_rating)
+ {
+- if (clockevent_rating)
+- sh_cmt_register_clockevent(ch, name, clockevent_rating);
++ if (clockevent)
++ sh_cmt_register_clockevent(ch, name);
+
+ if (clocksource_rating)
+ sh_cmt_register_clocksource(ch, name, clocksource_rating);
+@@ -827,7 +826,7 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,
+ raw_spin_lock_init(&ch->lock);
+
+ ret = sh_cmt_register(ch, dev_name(&cmt->pdev->dev),
+- cfg->clockevent_rating,
++ cfg->clockevent_rating != 0,
+ cfg->clocksource_rating);
+ if (ret) {
+ dev_err(&cmt->pdev->dev, "ch%u: registration failed\n",
+--
+2.1.2
+
--- /dev/null
+From ab858fd6d6a7b7b8ff37bbc5fc90806ddb9020bd Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 19 Feb 2014 17:00:31 +0100
+Subject: clocksource: sh_cmt: Hardcode CMT clock source rating to 125
+
+All boards use or should use a clock source rating of 125 for the CMT,
+hardcode it in the driver.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit fb28a659813084365eced5c2876c6383da52e634)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index 75b1f83a60a8..c753efcfe9f5 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -656,12 +656,12 @@ static void sh_cmt_clocksource_resume(struct clocksource *cs)
+ }
+
+ static int sh_cmt_register_clocksource(struct sh_cmt_channel *ch,
+- const char *name, unsigned long rating)
++ const char *name)
+ {
+ struct clocksource *cs = &ch->cs;
+
+ cs->name = name;
+- cs->rating = rating;
++ cs->rating = 125;
+ cs->read = sh_cmt_clocksource_read;
+ cs->enable = sh_cmt_clocksource_enable;
+ cs->disable = sh_cmt_clocksource_disable;
+@@ -788,13 +788,13 @@ static void sh_cmt_register_clockevent(struct sh_cmt_channel *ch,
+ }
+
+ static int sh_cmt_register(struct sh_cmt_channel *ch, const char *name,
+- bool clockevent, unsigned long clocksource_rating)
++ bool clockevent, bool clocksource)
+ {
+ if (clockevent)
+ sh_cmt_register_clockevent(ch, name);
+
+- if (clocksource_rating)
+- sh_cmt_register_clocksource(ch, name, clocksource_rating);
++ if (clocksource)
++ sh_cmt_register_clocksource(ch, name);
+
+ return 0;
+ }
+@@ -827,7 +827,7 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,
+
+ ret = sh_cmt_register(ch, dev_name(&cmt->pdev->dev),
+ cfg->clockevent_rating != 0,
+- cfg->clocksource_rating);
++ cfg->clocksource_rating != 0);
+ if (ret) {
+ dev_err(&cmt->pdev->dev, "ch%u: registration failed\n",
+ ch->index);
+--
+2.1.2
+
--- /dev/null
+From 05c8f3c8fa0061a598a92891f909d267dde7d63b Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 28 Jan 2014 12:36:48 +0100
+Subject: clocksource: sh_cmt: Add support for multiple channels per device
+
+CMT hardware devices can support multiple channels, with global
+registers and per-channel registers. The sh_cmt driver currently models
+the hardware with one Linux device per channel. This model makes it
+difficult to handle global registers in a clean way.
+
+Add support for a new model that uses one Linux device per timer with
+multiple channels per device. This requires changes to platform data,
+add new channel configuration fields.
+
+Support for the legacy model is kept and will be removed after all
+platforms switch to the new model.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 81b3b2711072b6047d5f332cd8751a1c5c9a3fb2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 304 +++++++++++++++++++++++++++++++++----------
+ include/linux/sh_timer.h | 1 +
+ 2 files changed, 237 insertions(+), 68 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index c753efcfe9f5..1efe7d64efca 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -53,7 +53,16 @@ struct sh_cmt_device;
+ * channel registers block. All other versions have a shared start/stop register
+ * located in the global space.
+ *
+- * Note that CMT0 on r8a73a4, r8a7790 and r8a7791, while implementing 32-bit
++ * Channels are indexed from 0 to N-1 in the documentation. The channel index
++ * infers the start/stop bit position in the control register and the channel
++ * registers block address. Some CMT instances have a subset of channels
++ * available, in which case the index in the documentation doesn't match the
++ * "real" index as implemented in hardware. This is for instance the case with
++ * CMT0 on r8a7740, which is a 32-bit variant with a single channel numbered 0
++ * in the documentation but using start/stop bit 5 and having its registers
++ * block at 0x60.
++ *
++ * Similarly CMT0 on r8a73a4, r8a7790 and r8a7791, while implementing 32-bit
+ * channels only, is a 48-bit gen2 CMT with the 48-bit channels unavailable.
+ */
+
+@@ -85,10 +94,14 @@ struct sh_cmt_info {
+
+ struct sh_cmt_channel {
+ struct sh_cmt_device *cmt;
+- unsigned int index;
+
+- void __iomem *base;
++ unsigned int index; /* Index in the documentation */
++ unsigned int hwidx; /* Real hardware index */
++
++ void __iomem *iostart;
++ void __iomem *ioctrl;
+
++ unsigned int timer_bit;
+ unsigned long flags;
+ unsigned long match_value;
+ unsigned long next_match_value;
+@@ -105,6 +118,7 @@ struct sh_cmt_device {
+ struct platform_device *pdev;
+
+ const struct sh_cmt_info *info;
++ bool legacy;
+
+ void __iomem *mapbase_ch;
+ void __iomem *mapbase;
+@@ -112,6 +126,9 @@ struct sh_cmt_device {
+
+ struct sh_cmt_channel *channels;
+ unsigned int num_channels;
++
++ bool has_clockevent;
++ bool has_clocksource;
+ };
+
+ #define SH_CMT16_CMCSR_CMF (1 << 7)
+@@ -223,41 +240,47 @@ static const struct sh_cmt_info sh_cmt_info[] = {
+
+ static inline unsigned long sh_cmt_read_cmstr(struct sh_cmt_channel *ch)
+ {
+- return ch->cmt->info->read_control(ch->cmt->mapbase, 0);
++ if (ch->iostart)
++ return ch->cmt->info->read_control(ch->iostart, 0);
++ else
++ return ch->cmt->info->read_control(ch->cmt->mapbase, 0);
+ }
+
+-static inline unsigned long sh_cmt_read_cmcsr(struct sh_cmt_channel *ch)
++static inline void sh_cmt_write_cmstr(struct sh_cmt_channel *ch,
++ unsigned long value)
+ {
+- return ch->cmt->info->read_control(ch->base, CMCSR);
++ if (ch->iostart)
++ ch->cmt->info->write_control(ch->iostart, 0, value);
++ else
++ ch->cmt->info->write_control(ch->cmt->mapbase, 0, value);
+ }
+
+-static inline unsigned long sh_cmt_read_cmcnt(struct sh_cmt_channel *ch)
++static inline unsigned long sh_cmt_read_cmcsr(struct sh_cmt_channel *ch)
+ {
+- return ch->cmt->info->read_count(ch->base, CMCNT);
++ return ch->cmt->info->read_control(ch->ioctrl, CMCSR);
+ }
+
+-static inline void sh_cmt_write_cmstr(struct sh_cmt_channel *ch,
++static inline void sh_cmt_write_cmcsr(struct sh_cmt_channel *ch,
+ unsigned long value)
+ {
+- ch->cmt->info->write_control(ch->cmt->mapbase, 0, value);
++ ch->cmt->info->write_control(ch->ioctrl, CMCSR, value);
+ }
+
+-static inline void sh_cmt_write_cmcsr(struct sh_cmt_channel *ch,
+- unsigned long value)
++static inline unsigned long sh_cmt_read_cmcnt(struct sh_cmt_channel *ch)
+ {
+- ch->cmt->info->write_control(ch->base, CMCSR, value);
++ return ch->cmt->info->read_count(ch->ioctrl, CMCNT);
+ }
+
+ static inline void sh_cmt_write_cmcnt(struct sh_cmt_channel *ch,
+ unsigned long value)
+ {
+- ch->cmt->info->write_count(ch->base, CMCNT, value);
++ ch->cmt->info->write_count(ch->ioctrl, CMCNT, value);
+ }
+
+ static inline void sh_cmt_write_cmcor(struct sh_cmt_channel *ch,
+ unsigned long value)
+ {
+- ch->cmt->info->write_count(ch->base, CMCOR, value);
++ ch->cmt->info->write_count(ch->ioctrl, CMCOR, value);
+ }
+
+ static unsigned long sh_cmt_get_counter(struct sh_cmt_channel *ch,
+@@ -286,7 +309,6 @@ static DEFINE_RAW_SPINLOCK(sh_cmt_lock);
+
+ static void sh_cmt_start_stop_ch(struct sh_cmt_channel *ch, int start)
+ {
+- struct sh_timer_config *cfg = ch->cmt->pdev->dev.platform_data;
+ unsigned long flags, value;
+
+ /* start stop register shared by multiple timer channels */
+@@ -294,9 +316,9 @@ static void sh_cmt_start_stop_ch(struct sh_cmt_channel *ch, int start)
+ value = sh_cmt_read_cmstr(ch);
+
+ if (start)
+- value |= 1 << cfg->timer_bit;
++ value |= 1 << ch->timer_bit;
+ else
+- value &= ~(1 << cfg->timer_bit);
++ value &= ~(1 << ch->timer_bit);
+
+ sh_cmt_write_cmstr(ch, value);
+ raw_spin_unlock_irqrestore(&sh_cmt_lock, flags);
+@@ -790,27 +812,72 @@ static void sh_cmt_register_clockevent(struct sh_cmt_channel *ch,
+ static int sh_cmt_register(struct sh_cmt_channel *ch, const char *name,
+ bool clockevent, bool clocksource)
+ {
+- if (clockevent)
++ if (clockevent) {
++ ch->cmt->has_clockevent = true;
+ sh_cmt_register_clockevent(ch, name);
++ }
+
+- if (clocksource)
++ if (clocksource) {
++ ch->cmt->has_clocksource = true;
+ sh_cmt_register_clocksource(ch, name);
++ }
+
+ return 0;
+ }
+
+ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,
+- struct sh_cmt_device *cmt)
++ unsigned int hwidx, bool clockevent,
++ bool clocksource, struct sh_cmt_device *cmt)
+ {
+- struct sh_timer_config *cfg = cmt->pdev->dev.platform_data;
+ int irq;
+ int ret;
+
++ /* Skip unused channels. */
++ if (!clockevent && !clocksource)
++ return 0;
++
+ ch->cmt = cmt;
+- ch->base = cmt->mapbase_ch;
+ ch->index = index;
++ ch->hwidx = hwidx;
++
++ /*
++ * Compute the address of the channel control register block. For the
++ * timers with a per-channel start/stop register, compute its address
++ * as well.
++ *
++ * For legacy configuration the address has been mapped explicitly.
++ */
++ if (cmt->legacy) {
++ ch->ioctrl = cmt->mapbase_ch;
++ } else {
++ switch (cmt->info->model) {
++ case SH_CMT_16BIT:
++ ch->ioctrl = cmt->mapbase + 2 + ch->hwidx * 6;
++ break;
++ case SH_CMT_32BIT:
++ case SH_CMT_48BIT:
++ ch->ioctrl = cmt->mapbase + 0x10 + ch->hwidx * 0x10;
++ break;
++ case SH_CMT_32BIT_FAST:
++ /*
++ * The 32-bit "fast" timer has a single channel at hwidx
++ * 5 but is located at offset 0x40 instead of 0x60 for
++ * some reason.
++ */
++ ch->ioctrl = cmt->mapbase + 0x40;
++ break;
++ case SH_CMT_48BIT_GEN2:
++ ch->iostart = cmt->mapbase + ch->hwidx * 0x100;
++ ch->ioctrl = ch->iostart + 0x10;
++ break;
++ }
++ }
++
++ if (cmt->legacy)
++ irq = platform_get_irq(cmt->pdev, 0);
++ else
++ irq = platform_get_irq(cmt->pdev, ch->index);
+
+- irq = platform_get_irq(cmt->pdev, 0);
+ if (irq < 0) {
+ dev_err(&cmt->pdev->dev, "ch%u: failed to get irq\n",
+ ch->index);
+@@ -825,9 +892,15 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,
+ ch->match_value = ch->max_match_value;
+ raw_spin_lock_init(&ch->lock);
+
++ if (cmt->legacy) {
++ ch->timer_bit = ch->hwidx;
++ } else {
++ ch->timer_bit = cmt->info->model == SH_CMT_48BIT_GEN2
++ ? 0 : ch->hwidx;
++ }
++
+ ret = sh_cmt_register(ch, dev_name(&cmt->pdev->dev),
+- cfg->clockevent_rating != 0,
+- cfg->clocksource_rating != 0);
++ clockevent, clocksource);
+ if (ret) {
+ dev_err(&cmt->pdev->dev, "ch%u: registration failed\n",
+ ch->index);
+@@ -847,97 +920,180 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,
+ return 0;
+ }
+
+-static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
++static int sh_cmt_map_memory(struct sh_cmt_device *cmt)
+ {
+- struct sh_timer_config *cfg = pdev->dev.platform_data;
+- struct resource *res, *res2;
+- int ret;
+- ret = -ENXIO;
++ struct resource *mem;
+
+- cmt->pdev = pdev;
++ mem = platform_get_resource(cmt->pdev, IORESOURCE_MEM, 0);
++ if (!mem) {
++ dev_err(&cmt->pdev->dev, "failed to get I/O memory\n");
++ return -ENXIO;
++ }
+
+- if (!cfg) {
+- dev_err(&cmt->pdev->dev, "missing platform data\n");
+- goto err0;
++ cmt->mapbase = ioremap_nocache(mem->start, resource_size(mem));
++ if (cmt->mapbase == NULL) {
++ dev_err(&cmt->pdev->dev, "failed to remap I/O memory\n");
++ return -ENXIO;
+ }
+
++ return 0;
++}
++
++static int sh_cmt_map_memory_legacy(struct sh_cmt_device *cmt)
++{
++ struct sh_timer_config *cfg = cmt->pdev->dev.platform_data;
++ struct resource *res, *res2;
++
++ /* map memory, let mapbase_ch point to our channel */
+ res = platform_get_resource(cmt->pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&cmt->pdev->dev, "failed to get I/O memory\n");
+- goto err0;
++ return -ENXIO;
+ }
+
+- /* optional resource for the shared timer start/stop register */
+- res2 = platform_get_resource(cmt->pdev, IORESOURCE_MEM, 1);
+-
+- /* map memory, let mapbase_ch point to our channel */
+ cmt->mapbase_ch = ioremap_nocache(res->start, resource_size(res));
+ if (cmt->mapbase_ch == NULL) {
+ dev_err(&cmt->pdev->dev, "failed to remap I/O memory\n");
+- goto err0;
++ return -ENXIO;
+ }
+
++ /* optional resource for the shared timer start/stop register */
++ res2 = platform_get_resource(cmt->pdev, IORESOURCE_MEM, 1);
++
+ /* map second resource for CMSTR */
+ cmt->mapbase = ioremap_nocache(res2 ? res2->start :
+ res->start - cfg->channel_offset,
+ res2 ? resource_size(res2) : 2);
+ if (cmt->mapbase == NULL) {
+ dev_err(&cmt->pdev->dev, "failed to remap I/O second memory\n");
+- goto err1;
++ iounmap(cmt->mapbase_ch);
++ return -ENXIO;
+ }
+
+- /* get hold of clock */
++ /* identify the model based on the resources */
++ if (resource_size(res) == 6)
++ cmt->info = &sh_cmt_info[SH_CMT_16BIT];
++ else if (res2 && (resource_size(res2) == 4))
++ cmt->info = &sh_cmt_info[SH_CMT_48BIT_GEN2];
++ else
++ cmt->info = &sh_cmt_info[SH_CMT_32BIT];
++
++ return 0;
++}
++
++static void sh_cmt_unmap_memory(struct sh_cmt_device *cmt)
++{
++ iounmap(cmt->mapbase);
++ if (cmt->mapbase_ch)
++ iounmap(cmt->mapbase_ch);
++}
++
++static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
++{
++ struct sh_timer_config *cfg = pdev->dev.platform_data;
++ const struct platform_device_id *id = pdev->id_entry;
++ unsigned int hw_channels;
++ int ret;
++
++ memset(cmt, 0, sizeof(*cmt));
++ cmt->pdev = pdev;
++
++ if (!cfg) {
++ dev_err(&cmt->pdev->dev, "missing platform data\n");
++ return -ENXIO;
++ }
++
++ cmt->info = (const struct sh_cmt_info *)id->driver_data;
++ cmt->legacy = cmt->info ? false : true;
++
++ /* Get hold of clock. */
+ cmt->clk = clk_get(&cmt->pdev->dev, "cmt_fck");
+ if (IS_ERR(cmt->clk)) {
+ dev_err(&cmt->pdev->dev, "cannot get clock\n");
+- ret = PTR_ERR(cmt->clk);
+- goto err2;
++ return PTR_ERR(cmt->clk);
+ }
+
+ ret = clk_prepare(cmt->clk);
+ if (ret < 0)
+- goto err3;
++ goto err_clk_put;
+
+- /* identify the model based on the resources */
+- if (resource_size(res) == 6)
+- cmt->info = &sh_cmt_info[SH_CMT_16BIT];
+- else if (res2 && (resource_size(res2) == 4))
+- cmt->info = &sh_cmt_info[SH_CMT_48BIT_GEN2];
++ /*
++ * Map the memory resource(s). We need to support both the legacy
++ * platform device configuration (with one device per channel) and the
++ * new version (with multiple channels per device).
++ */
++ if (cmt->legacy)
++ ret = sh_cmt_map_memory_legacy(cmt);
+ else
+- cmt->info = &sh_cmt_info[SH_CMT_32BIT];
++ ret = sh_cmt_map_memory(cmt);
+
+- cmt->channels = kzalloc(sizeof(*cmt->channels), GFP_KERNEL);
++ if (ret < 0)
++ goto err_clk_unprepare;
++
++ /* Allocate and setup the channels. */
++ if (cmt->legacy) {
++ cmt->num_channels = 1;
++ hw_channels = 0;
++ } else {
++ cmt->num_channels = hweight8(cfg->channels_mask);
++ hw_channels = cfg->channels_mask;
++ }
++
++ cmt->channels = kzalloc(cmt->num_channels * sizeof(*cmt->channels),
++ GFP_KERNEL);
+ if (cmt->channels == NULL) {
+ ret = -ENOMEM;
+- goto err4;
++ goto err_unmap;
+ }
+
+- cmt->num_channels = 1;
++ if (cmt->legacy) {
++ ret = sh_cmt_setup_channel(&cmt->channels[0],
++ cfg->timer_bit, cfg->timer_bit,
++ cfg->clockevent_rating != 0,
++ cfg->clocksource_rating != 0, cmt);
++ if (ret < 0)
++ goto err_unmap;
++ } else {
++ unsigned int mask = hw_channels;
++ unsigned int i;
+
+- ret = sh_cmt_setup_channel(&cmt->channels[0], cfg->timer_bit, cmt);
+- if (ret < 0)
+- goto err4;
++ /*
++ * Use the first channel as a clock event device and the second
++ * channel as a clock source. If only one channel is available
++ * use it for both.
++ */
++ for (i = 0; i < cmt->num_channels; ++i) {
++ unsigned int hwidx = ffs(mask) - 1;
++ bool clocksource = i == 1 || cmt->num_channels == 1;
++ bool clockevent = i == 0;
++
++ ret = sh_cmt_setup_channel(&cmt->channels[i], i, hwidx,
++ clockevent, clocksource,
++ cmt);
++ if (ret < 0)
++ goto err_unmap;
++
++ mask &= ~(1 << hwidx);
++ }
++ }
+
+ platform_set_drvdata(pdev, cmt);
+
+ return 0;
+-err4:
++
++err_unmap:
+ kfree(cmt->channels);
++ sh_cmt_unmap_memory(cmt);
++err_clk_unprepare:
+ clk_unprepare(cmt->clk);
+-err3:
++err_clk_put:
+ clk_put(cmt->clk);
+-err2:
+- iounmap(cmt->mapbase);
+-err1:
+- iounmap(cmt->mapbase_ch);
+-err0:
+ return ret;
+ }
+
+ static int sh_cmt_probe(struct platform_device *pdev)
+ {
+ struct sh_cmt_device *cmt = platform_get_drvdata(pdev);
+- struct sh_timer_config *cfg = pdev->dev.platform_data;
+ int ret;
+
+ if (!is_early_platform_device(pdev)) {
+@@ -966,7 +1122,7 @@ static int sh_cmt_probe(struct platform_device *pdev)
+ return 0;
+
+ out:
+- if (cfg->clockevent_rating || cfg->clocksource_rating)
++ if (cmt->has_clockevent || cmt->has_clocksource)
+ pm_runtime_irq_safe(&pdev->dev);
+ else
+ pm_runtime_idle(&pdev->dev);
+@@ -979,12 +1135,24 @@ static int sh_cmt_remove(struct platform_device *pdev)
+ return -EBUSY; /* cannot unregister clockevent and clocksource */
+ }
+
++static const struct platform_device_id sh_cmt_id_table[] = {
++ { "sh_cmt", 0 },
++ { "sh-cmt-16", (kernel_ulong_t)&sh_cmt_info[SH_CMT_16BIT] },
++ { "sh-cmt-32", (kernel_ulong_t)&sh_cmt_info[SH_CMT_32BIT] },
++ { "sh-cmt-32-fast", (kernel_ulong_t)&sh_cmt_info[SH_CMT_32BIT_FAST] },
++ { "sh-cmt-48", (kernel_ulong_t)&sh_cmt_info[SH_CMT_48BIT] },
++ { "sh-cmt-48-gen2", (kernel_ulong_t)&sh_cmt_info[SH_CMT_48BIT_GEN2] },
++ { }
++};
++MODULE_DEVICE_TABLE(platform, sh_cmt_id_table);
++
+ static struct platform_driver sh_cmt_device_driver = {
+ .probe = sh_cmt_probe,
+ .remove = sh_cmt_remove,
+ .driver = {
+ .name = "sh_cmt",
+- }
++ },
++ .id_table = sh_cmt_id_table,
+ };
+
+ static int __init sh_cmt_init(void)
+diff --git a/include/linux/sh_timer.h b/include/linux/sh_timer.h
+index 4d9dcd138315..8e1e036d6d45 100644
+--- a/include/linux/sh_timer.h
++++ b/include/linux/sh_timer.h
+@@ -7,6 +7,7 @@ struct sh_timer_config {
+ int timer_bit;
+ unsigned long clockevent_rating;
+ unsigned long clocksource_rating;
++ unsigned int channels_mask;
+ };
+
+ #endif /* __SH_TIMER_H__ */
+--
+2.1.2
+
--- /dev/null
+From 273e4a0e8d62791ce64b82b8175e0a74da83d335 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 14 Feb 2014 00:35:18 +0100
+Subject: clocksource: sh_cmt: Rename clock to "fck" in the non-legacy case
+
+The sh_cmt driver gets the CMT functional clock using a connection ID of
+"cmt_fck". While all SH SoCs create clock lookup entries with a NULL
+device ID and a "cmt_fck" connection ID, the ARM SoCs use the device ID
+only with a NULL connection ID. This works on legacy platforms but will
+break on ARM with DT boot.
+
+Fix the situation by using a connection ID of "fck" in the non-legacy
+platform data case. Clock lookup entries will be renamed to use the
+device ID as well as the connection ID as platforms get moved to new
+platform data. The legacy code will eventually be dropped, leaving us
+with device ID based clock lookup, compatible with DT boot.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 24b4e07df54b7bf7739fb3dd193f639a8f274ad6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index 1efe7d64efca..a5ea9aedbd50 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -1007,7 +1007,7 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev)
+ cmt->legacy = cmt->info ? false : true;
+
+ /* Get hold of clock. */
+- cmt->clk = clk_get(&cmt->pdev->dev, "cmt_fck");
++ cmt->clk = clk_get(&cmt->pdev->dev, cmt->legacy ? "cmt_fck" : "fck");
+ if (IS_ERR(cmt->clk)) {
+ dev_err(&cmt->pdev->dev, "cannot get clock\n");
+ return PTR_ERR(cmt->clk);
+--
+2.1.2
+
--- /dev/null
+From 2607cf65be6e28ba628273330df31483db8927ba Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 14 Feb 2014 01:25:50 +0100
+Subject: clocksource: sh_cmt: Remove FSF mail address from GPL notice
+
+Do not include the paragraph about writing to the Free Software
+Foundation's mailing address from the sample GPL notice. The FSF has
+changed addresses in the past, and may do so again. Linux already
+includes a copy of the GPL.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 1cd89c568c057a13ca11acf0eb3a78121513e2b6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 4 ----
+ 1 file changed, 4 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index a5ea9aedbd50..399e9525e226 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -11,10 +11,6 @@
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+ #include <linux/init.h>
+--
+2.1.2
+
--- /dev/null
+From d36481ac4802e43aa792ccf9243ef2b1ec692cca Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 12 Feb 2014 16:56:44 +0100
+Subject: clocksource: sh_cmt: Sort headers alphabetically
+
+This helps locating duplicates and inserting new headers.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit e7a9bcc2372b0e62443569c63a369cfd528db4f4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 20 ++++++++++----------
+ 1 file changed, 10 insertions(+), 10 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index 399e9525e226..9f215e74751c 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -13,23 +13,23 @@
+ * GNU General Public License for more details.
+ */
+
++#include <linux/clk.h>
++#include <linux/clockchips.h>
++#include <linux/clocksource.h>
++#include <linux/delay.h>
++#include <linux/err.h>
+ #include <linux/init.h>
+-#include <linux/platform_device.h>
+-#include <linux/spinlock.h>
+ #include <linux/interrupt.h>
+-#include <linux/ioport.h>
+ #include <linux/io.h>
+-#include <linux/clk.h>
++#include <linux/ioport.h>
+ #include <linux/irq.h>
+-#include <linux/err.h>
+-#include <linux/delay.h>
+-#include <linux/clocksource.h>
+-#include <linux/clockchips.h>
+-#include <linux/sh_timer.h>
+-#include <linux/slab.h>
+ #include <linux/module.h>
++#include <linux/platform_device.h>
+ #include <linux/pm_domain.h>
+ #include <linux/pm_runtime.h>
++#include <linux/sh_timer.h>
++#include <linux/slab.h>
++#include <linux/spinlock.h>
+
+ struct sh_cmt_device;
+
+--
+2.1.2
+
--- /dev/null
+From 346cff671beb2aa2188d2db2ceeda08e42140d12 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 21 Feb 2014 01:24:47 +0100
+Subject: clocksource: sh_cmt: Request IRQ for clock event device only
+
+Clock sources don't need an IRQ, request the IRQ only for channels used
+as clock event devices.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit bfa76bb12f23ecf0c6d07c302f4571a6fe9bc3e3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 51 +++++++++++++++++++++++---------------------
+ 1 file changed, 27 insertions(+), 24 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index 9f215e74751c..bc8d025ce861 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -785,10 +785,28 @@ static void sh_cmt_clock_event_resume(struct clock_event_device *ced)
+ pm_genpd_syscore_poweron(&ch->cmt->pdev->dev);
+ }
+
+-static void sh_cmt_register_clockevent(struct sh_cmt_channel *ch,
+- const char *name)
++static int sh_cmt_register_clockevent(struct sh_cmt_channel *ch,
++ const char *name)
+ {
+ struct clock_event_device *ced = &ch->ced;
++ int irq;
++ int ret;
++
++ irq = platform_get_irq(ch->cmt->pdev, ch->cmt->legacy ? 0 : ch->index);
++ if (irq < 0) {
++ dev_err(&ch->cmt->pdev->dev, "ch%u: failed to get irq\n",
++ ch->index);
++ return irq;
++ }
++
++ ret = request_irq(irq, sh_cmt_interrupt,
++ IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
++ dev_name(&ch->cmt->pdev->dev), ch);
++ if (ret) {
++ dev_err(&ch->cmt->pdev->dev, "ch%u: failed to request irq %d\n",
++ ch->index, irq);
++ return ret;
++ }
+
+ ced->name = name;
+ ced->features = CLOCK_EVT_FEAT_PERIODIC;
+@@ -803,14 +821,20 @@ static void sh_cmt_register_clockevent(struct sh_cmt_channel *ch,
+ dev_info(&ch->cmt->pdev->dev, "ch%u: used for clock events\n",
+ ch->index);
+ clockevents_register_device(ced);
++
++ return 0;
+ }
+
+ static int sh_cmt_register(struct sh_cmt_channel *ch, const char *name,
+ bool clockevent, bool clocksource)
+ {
++ int ret;
++
+ if (clockevent) {
+ ch->cmt->has_clockevent = true;
+- sh_cmt_register_clockevent(ch, name);
++ ret = sh_cmt_register_clockevent(ch, name);
++ if (ret < 0)
++ return ret;
+ }
+
+ if (clocksource) {
+@@ -825,7 +849,6 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,
+ unsigned int hwidx, bool clockevent,
+ bool clocksource, struct sh_cmt_device *cmt)
+ {
+- int irq;
+ int ret;
+
+ /* Skip unused channels. */
+@@ -869,17 +892,6 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,
+ }
+ }
+
+- if (cmt->legacy)
+- irq = platform_get_irq(cmt->pdev, 0);
+- else
+- irq = platform_get_irq(cmt->pdev, ch->index);
+-
+- if (irq < 0) {
+- dev_err(&cmt->pdev->dev, "ch%u: failed to get irq\n",
+- ch->index);
+- return irq;
+- }
+-
+ if (cmt->info->width == (sizeof(ch->max_match_value) * 8))
+ ch->max_match_value = ~0;
+ else
+@@ -904,15 +916,6 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index,
+ }
+ ch->cs_enabled = false;
+
+- ret = request_irq(irq, sh_cmt_interrupt,
+- IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
+- dev_name(&cmt->pdev->dev), ch);
+- if (ret) {
+- dev_err(&cmt->pdev->dev, "ch%u: failed to request irq %d\n",
+- ch->index, irq);
+- return ret;
+- }
+-
+ return 0;
+ }
+
+--
+2.1.2
+
--- /dev/null
+From 016705dac5f3d7da6e08a7421a573defb5afd44f Mon Sep 17 00:00:00 2001
+From: Jingoo Han <jg1.han@samsung.com>
+Date: Thu, 22 May 2014 14:05:06 +0200
+Subject: clocksource: sh_cmt: Remove unnecessary OOM messages
+
+The site-specific OOM messages are unnecessary, because they
+duplicate the MM subsystem generic OOM message.
+
+[dlezcano] : refreshed against latest modifications: kmalloc -> kzalloc
+
+Signed-off-by: Jingoo Han <jg1.han@samsung.com>
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+(cherry picked from commit 0178f41d3d35b63ed25a066d90e7dda380018c06)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_cmt.c | 4 +---
+ 1 file changed, 1 insertion(+), 3 deletions(-)
+
+diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
+index bc8d025ce861..dfa780396b91 100644
+--- a/drivers/clocksource/sh_cmt.c
++++ b/drivers/clocksource/sh_cmt.c
+@@ -1106,10 +1106,8 @@ static int sh_cmt_probe(struct platform_device *pdev)
+ }
+
+ cmt = kzalloc(sizeof(*cmt), GFP_KERNEL);
+- if (cmt == NULL) {
+- dev_err(&pdev->dev, "failed to allocate driver data\n");
++ if (cmt == NULL)
+ return -ENOMEM;
+- }
+
+ ret = sh_cmt_setup(cmt, pdev);
+ if (ret) {
+--
+2.1.2
+
--- /dev/null
+From bf4134c119de4fee4664c4a6de97a49a36592593 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 17 Feb 2014 11:27:49 +0100
+Subject: clocksource: sh_mtu2: Use request_irq() instead of setup_irq()
+
+The driver claims it needs to register an interrupt handler too early
+for request_irq(). This might have been true in the past, but the only
+meaningful difference between request_irq() and setup_irq() today is an
+additional kzalloc() call in request_irq(). As the driver calls
+kmalloc() itself we know that the slab allocator is available, we can
+thus switch to request_irq().
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Wolfram Sang <wsa@sang-engineering.com>
+(cherry picked from commit 276bee05d8b72e98d530b55161e0a2131da99f58)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_mtu2.c | 22 ++++++++--------------
+ 1 file changed, 8 insertions(+), 14 deletions(-)
+
+diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
+index e30d76e0a6fa..77992e081205 100644
+--- a/drivers/clocksource/sh_mtu2.c
++++ b/drivers/clocksource/sh_mtu2.c
+@@ -37,7 +37,7 @@
+ struct sh_mtu2_priv {
+ void __iomem *mapbase;
+ struct clk *clk;
+- struct irqaction irqaction;
++ int irq;
+ struct platform_device *pdev;
+ unsigned long rate;
+ unsigned long periodic;
+@@ -244,10 +244,11 @@ static void sh_mtu2_register_clockevent(struct sh_mtu2_priv *p,
+ dev_info(&p->pdev->dev, "used for clock events\n");
+ clockevents_register_device(ced);
+
+- ret = setup_irq(p->irqaction.irq, &p->irqaction);
++ ret = request_irq(p->irq, sh_mtu2_interrupt,
++ IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
++ dev_name(&p->pdev->dev), p);
+ if (ret) {
+- dev_err(&p->pdev->dev, "failed to request irq %d\n",
+- p->irqaction.irq);
++ dev_err(&p->pdev->dev, "failed to request irq %d\n", p->irq);
+ return;
+ }
+ }
+@@ -265,7 +266,7 @@ static int sh_mtu2_setup(struct sh_mtu2_priv *p, struct platform_device *pdev)
+ {
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
+ struct resource *res;
+- int irq, ret;
++ int ret;
+ ret = -ENXIO;
+
+ memset(p, 0, sizeof(*p));
+@@ -284,8 +285,8 @@ static int sh_mtu2_setup(struct sh_mtu2_priv *p, struct platform_device *pdev)
+ goto err0;
+ }
+
+- irq = platform_get_irq(p->pdev, 0);
+- if (irq < 0) {
++ p->irq = platform_get_irq(p->pdev, 0);
++ if (p->irq < 0) {
+ dev_err(&p->pdev->dev, "failed to get irq\n");
+ goto err0;
+ }
+@@ -297,13 +298,6 @@ static int sh_mtu2_setup(struct sh_mtu2_priv *p, struct platform_device *pdev)
+ goto err0;
+ }
+
+- /* setup data for setup_irq() (too early for request_irq()) */
+- p->irqaction.name = dev_name(&p->pdev->dev);
+- p->irqaction.handler = sh_mtu2_interrupt;
+- p->irqaction.dev_id = p;
+- p->irqaction.irq = irq;
+- p->irqaction.flags = IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING;
+-
+ /* get hold of clock */
+ p->clk = clk_get(&p->pdev->dev, "mtu2_fck");
+ if (IS_ERR(p->clk)) {
+--
+2.1.2
+
--- /dev/null
+From b558d803e549005ba747fc5da374bfdee6090e98 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 4 Mar 2014 12:59:54 +0100
+Subject: clocksource: sh_mtu2: Turn sh_mtu2_priv fields into local variables
+
+The rate and periodic fields are used in a single function only, as
+local variables. Remove them from the structure.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Wolfram Sang <wsa@sang-engineering.com>
+(cherry picked from commit f92d62f53973466cccb25900c2597ff6df950d74)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_mtu2.c | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
+index 77992e081205..66684552fcc9 100644
+--- a/drivers/clocksource/sh_mtu2.c
++++ b/drivers/clocksource/sh_mtu2.c
+@@ -39,8 +39,6 @@ struct sh_mtu2_priv {
+ struct clk *clk;
+ int irq;
+ struct platform_device *pdev;
+- unsigned long rate;
+- unsigned long periodic;
+ struct clock_event_device ced;
+ };
+
+@@ -122,6 +120,8 @@ static void sh_mtu2_start_stop_ch(struct sh_mtu2_priv *p, int start)
+
+ static int sh_mtu2_enable(struct sh_mtu2_priv *p)
+ {
++ unsigned long periodic;
++ unsigned long rate;
+ int ret;
+
+ pm_runtime_get_sync(&p->pdev->dev);
+@@ -137,13 +137,13 @@ static int sh_mtu2_enable(struct sh_mtu2_priv *p)
+ /* make sure channel is disabled */
+ sh_mtu2_start_stop_ch(p, 0);
+
+- p->rate = clk_get_rate(p->clk) / 64;
+- p->periodic = (p->rate + HZ/2) / HZ;
++ rate = clk_get_rate(p->clk) / 64;
++ periodic = (rate + HZ/2) / HZ;
+
+ /* "Periodic Counter Operation" */
+ sh_mtu2_write(p, TCR, 0x23); /* TGRA clear, divide clock by 64 */
+ sh_mtu2_write(p, TIOR, 0);
+- sh_mtu2_write(p, TGR, p->periodic);
++ sh_mtu2_write(p, TGR, periodic);
+ sh_mtu2_write(p, TCNT, 0);
+ sh_mtu2_write(p, TMDR, 0);
+ sh_mtu2_write(p, TIER, 0x01);
+--
+2.1.2
+
--- /dev/null
+From cd6f1cee239cb604cf8a2d8b3b2d711983924696 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 4 Mar 2014 12:58:30 +0100
+Subject: clocksource: sh_mtu2: Split channel fields from sh_mtu2_priv
+
+Create a new sh_mtu2_channel structure to hold the channel-specific
+fields in preparation for multiple channels per device support.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Wolfram Sang <wsa@sang-engineering.com>
+(cherry picked from commit 42752cc619c0ee619b56f86932ce42b00adb5052)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_mtu2.c | 125 +++++++++++++++++++++++-------------------
+ 1 file changed, 69 insertions(+), 56 deletions(-)
+
+diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
+index 66684552fcc9..e509f417ef64 100644
+--- a/drivers/clocksource/sh_mtu2.c
++++ b/drivers/clocksource/sh_mtu2.c
+@@ -34,12 +34,21 @@
+ #include <linux/pm_domain.h>
+ #include <linux/pm_runtime.h>
+
++struct sh_mtu2_priv;
++
++struct sh_mtu2_channel {
++ struct sh_mtu2_priv *mtu;
++ int irq;
++ struct clock_event_device ced;
++};
++
+ struct sh_mtu2_priv {
++ struct platform_device *pdev;
++
+ void __iomem *mapbase;
+ struct clk *clk;
+- int irq;
+- struct platform_device *pdev;
+- struct clock_event_device ced;
++
++ struct sh_mtu2_channel channel;
+ };
+
+ static DEFINE_RAW_SPINLOCK(sh_mtu2_lock);
+@@ -63,10 +72,10 @@ static unsigned long mtu2_reg_offs[] = {
+ [TGR] = 8,
+ };
+
+-static inline unsigned long sh_mtu2_read(struct sh_mtu2_priv *p, int reg_nr)
++static inline unsigned long sh_mtu2_read(struct sh_mtu2_channel *ch, int reg_nr)
+ {
+- struct sh_timer_config *cfg = p->pdev->dev.platform_data;
+- void __iomem *base = p->mapbase;
++ struct sh_timer_config *cfg = ch->mtu->pdev->dev.platform_data;
++ void __iomem *base = ch->mtu->mapbase;
+ unsigned long offs;
+
+ if (reg_nr == TSTR)
+@@ -80,11 +89,11 @@ static inline unsigned long sh_mtu2_read(struct sh_mtu2_priv *p, int reg_nr)
+ return ioread8(base + offs);
+ }
+
+-static inline void sh_mtu2_write(struct sh_mtu2_priv *p, int reg_nr,
++static inline void sh_mtu2_write(struct sh_mtu2_channel *ch, int reg_nr,
+ unsigned long value)
+ {
+- struct sh_timer_config *cfg = p->pdev->dev.platform_data;
+- void __iomem *base = p->mapbase;
++ struct sh_timer_config *cfg = ch->mtu->pdev->dev.platform_data;
++ void __iomem *base = ch->mtu->mapbase;
+ unsigned long offs;
+
+ if (reg_nr == TSTR) {
+@@ -100,100 +109,100 @@ static inline void sh_mtu2_write(struct sh_mtu2_priv *p, int reg_nr,
+ iowrite8(value, base + offs);
+ }
+
+-static void sh_mtu2_start_stop_ch(struct sh_mtu2_priv *p, int start)
++static void sh_mtu2_start_stop_ch(struct sh_mtu2_channel *ch, int start)
+ {
+- struct sh_timer_config *cfg = p->pdev->dev.platform_data;
++ struct sh_timer_config *cfg = ch->mtu->pdev->dev.platform_data;
+ unsigned long flags, value;
+
+ /* start stop register shared by multiple timer channels */
+ raw_spin_lock_irqsave(&sh_mtu2_lock, flags);
+- value = sh_mtu2_read(p, TSTR);
++ value = sh_mtu2_read(ch, TSTR);
+
+ if (start)
+ value |= 1 << cfg->timer_bit;
+ else
+ value &= ~(1 << cfg->timer_bit);
+
+- sh_mtu2_write(p, TSTR, value);
++ sh_mtu2_write(ch, TSTR, value);
+ raw_spin_unlock_irqrestore(&sh_mtu2_lock, flags);
+ }
+
+-static int sh_mtu2_enable(struct sh_mtu2_priv *p)
++static int sh_mtu2_enable(struct sh_mtu2_channel *ch)
+ {
+ unsigned long periodic;
+ unsigned long rate;
+ int ret;
+
+- pm_runtime_get_sync(&p->pdev->dev);
+- dev_pm_syscore_device(&p->pdev->dev, true);
++ pm_runtime_get_sync(&ch->mtu->pdev->dev);
++ dev_pm_syscore_device(&ch->mtu->pdev->dev, true);
+
+ /* enable clock */
+- ret = clk_enable(p->clk);
++ ret = clk_enable(ch->mtu->clk);
+ if (ret) {
+- dev_err(&p->pdev->dev, "cannot enable clock\n");
++ dev_err(&ch->mtu->pdev->dev, "cannot enable clock\n");
+ return ret;
+ }
+
+ /* make sure channel is disabled */
+- sh_mtu2_start_stop_ch(p, 0);
++ sh_mtu2_start_stop_ch(ch, 0);
+
+- rate = clk_get_rate(p->clk) / 64;
++ rate = clk_get_rate(ch->mtu->clk) / 64;
+ periodic = (rate + HZ/2) / HZ;
+
+ /* "Periodic Counter Operation" */
+- sh_mtu2_write(p, TCR, 0x23); /* TGRA clear, divide clock by 64 */
+- sh_mtu2_write(p, TIOR, 0);
+- sh_mtu2_write(p, TGR, periodic);
+- sh_mtu2_write(p, TCNT, 0);
+- sh_mtu2_write(p, TMDR, 0);
+- sh_mtu2_write(p, TIER, 0x01);
++ sh_mtu2_write(ch, TCR, 0x23); /* TGRA clear, divide clock by 64 */
++ sh_mtu2_write(ch, TIOR, 0);
++ sh_mtu2_write(ch, TGR, periodic);
++ sh_mtu2_write(ch, TCNT, 0);
++ sh_mtu2_write(ch, TMDR, 0);
++ sh_mtu2_write(ch, TIER, 0x01);
+
+ /* enable channel */
+- sh_mtu2_start_stop_ch(p, 1);
++ sh_mtu2_start_stop_ch(ch, 1);
+
+ return 0;
+ }
+
+-static void sh_mtu2_disable(struct sh_mtu2_priv *p)
++static void sh_mtu2_disable(struct sh_mtu2_channel *ch)
+ {
+ /* disable channel */
+- sh_mtu2_start_stop_ch(p, 0);
++ sh_mtu2_start_stop_ch(ch, 0);
+
+ /* stop clock */
+- clk_disable(p->clk);
++ clk_disable(ch->mtu->clk);
+
+- dev_pm_syscore_device(&p->pdev->dev, false);
+- pm_runtime_put(&p->pdev->dev);
++ dev_pm_syscore_device(&ch->mtu->pdev->dev, false);
++ pm_runtime_put(&ch->mtu->pdev->dev);
+ }
+
+ static irqreturn_t sh_mtu2_interrupt(int irq, void *dev_id)
+ {
+- struct sh_mtu2_priv *p = dev_id;
++ struct sh_mtu2_channel *ch = dev_id;
+
+ /* acknowledge interrupt */
+- sh_mtu2_read(p, TSR);
+- sh_mtu2_write(p, TSR, 0xfe);
++ sh_mtu2_read(ch, TSR);
++ sh_mtu2_write(ch, TSR, 0xfe);
+
+ /* notify clockevent layer */
+- p->ced.event_handler(&p->ced);
++ ch->ced.event_handler(&ch->ced);
+ return IRQ_HANDLED;
+ }
+
+-static struct sh_mtu2_priv *ced_to_sh_mtu2(struct clock_event_device *ced)
++static struct sh_mtu2_channel *ced_to_sh_mtu2(struct clock_event_device *ced)
+ {
+- return container_of(ced, struct sh_mtu2_priv, ced);
++ return container_of(ced, struct sh_mtu2_channel, ced);
+ }
+
+ static void sh_mtu2_clock_event_mode(enum clock_event_mode mode,
+ struct clock_event_device *ced)
+ {
+- struct sh_mtu2_priv *p = ced_to_sh_mtu2(ced);
++ struct sh_mtu2_channel *ch = ced_to_sh_mtu2(ced);
+ int disabled = 0;
+
+ /* deal with old setting first */
+ switch (ced->mode) {
+ case CLOCK_EVT_MODE_PERIODIC:
+- sh_mtu2_disable(p);
++ sh_mtu2_disable(ch);
+ disabled = 1;
+ break;
+ default:
+@@ -202,12 +211,13 @@ static void sh_mtu2_clock_event_mode(enum clock_event_mode mode,
+
+ switch (mode) {
+ case CLOCK_EVT_MODE_PERIODIC:
+- dev_info(&p->pdev->dev, "used for periodic clock events\n");
+- sh_mtu2_enable(p);
++ dev_info(&ch->mtu->pdev->dev,
++ "used for periodic clock events\n");
++ sh_mtu2_enable(ch);
+ break;
+ case CLOCK_EVT_MODE_UNUSED:
+ if (!disabled)
+- sh_mtu2_disable(p);
++ sh_mtu2_disable(ch);
+ break;
+ case CLOCK_EVT_MODE_SHUTDOWN:
+ default:
+@@ -217,18 +227,18 @@ static void sh_mtu2_clock_event_mode(enum clock_event_mode mode,
+
+ static void sh_mtu2_clock_event_suspend(struct clock_event_device *ced)
+ {
+- pm_genpd_syscore_poweroff(&ced_to_sh_mtu2(ced)->pdev->dev);
++ pm_genpd_syscore_poweroff(&ced_to_sh_mtu2(ced)->mtu->pdev->dev);
+ }
+
+ static void sh_mtu2_clock_event_resume(struct clock_event_device *ced)
+ {
+- pm_genpd_syscore_poweron(&ced_to_sh_mtu2(ced)->pdev->dev);
++ pm_genpd_syscore_poweron(&ced_to_sh_mtu2(ced)->mtu->pdev->dev);
+ }
+
+-static void sh_mtu2_register_clockevent(struct sh_mtu2_priv *p,
++static void sh_mtu2_register_clockevent(struct sh_mtu2_channel *ch,
+ char *name, unsigned long rating)
+ {
+- struct clock_event_device *ced = &p->ced;
++ struct clock_event_device *ced = &ch->ced;
+ int ret;
+
+ memset(ced, 0, sizeof(*ced));
+@@ -241,23 +251,24 @@ static void sh_mtu2_register_clockevent(struct sh_mtu2_priv *p,
+ ced->suspend = sh_mtu2_clock_event_suspend;
+ ced->resume = sh_mtu2_clock_event_resume;
+
+- dev_info(&p->pdev->dev, "used for clock events\n");
++ dev_info(&ch->mtu->pdev->dev, "used for clock events\n");
+ clockevents_register_device(ced);
+
+- ret = request_irq(p->irq, sh_mtu2_interrupt,
++ ret = request_irq(ch->irq, sh_mtu2_interrupt,
+ IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
+- dev_name(&p->pdev->dev), p);
++ dev_name(&ch->mtu->pdev->dev), ch);
+ if (ret) {
+- dev_err(&p->pdev->dev, "failed to request irq %d\n", p->irq);
++ dev_err(&ch->mtu->pdev->dev, "failed to request irq %d\n",
++ ch->irq);
+ return;
+ }
+ }
+
+-static int sh_mtu2_register(struct sh_mtu2_priv *p, char *name,
++static int sh_mtu2_register(struct sh_mtu2_channel *ch, char *name,
+ unsigned long clockevent_rating)
+ {
+ if (clockevent_rating)
+- sh_mtu2_register_clockevent(p, name, clockevent_rating);
++ sh_mtu2_register_clockevent(ch, name, clockevent_rating);
+
+ return 0;
+ }
+@@ -285,8 +296,8 @@ static int sh_mtu2_setup(struct sh_mtu2_priv *p, struct platform_device *pdev)
+ goto err0;
+ }
+
+- p->irq = platform_get_irq(p->pdev, 0);
+- if (p->irq < 0) {
++ p->channel.irq = platform_get_irq(p->pdev, 0);
++ if (p->channel.irq < 0) {
+ dev_err(&p->pdev->dev, "failed to get irq\n");
+ goto err0;
+ }
+@@ -310,7 +321,9 @@ static int sh_mtu2_setup(struct sh_mtu2_priv *p, struct platform_device *pdev)
+ if (ret < 0)
+ goto err2;
+
+- ret = sh_mtu2_register(p, (char *)dev_name(&p->pdev->dev),
++ p->channel.mtu = p;
++
++ ret = sh_mtu2_register(&p->channel, (char *)dev_name(&p->pdev->dev),
+ cfg->clockevent_rating);
+ if (ret < 0)
+ goto err3;
+--
+2.1.2
+
--- /dev/null
+From fb9f615ca5901fd5b9d6719b2914455703540adb Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 4 Mar 2014 13:04:48 +0100
+Subject: clocksource: sh_mtu2: Rename struct sh_mtu2_priv to sh_mtu2_device
+
+Channel data is private as well, rename priv to device to make the
+distrinction between the core device and the channels clearer.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Wolfram Sang <wsa@sang-engineering.com>
+(cherry picked from commit 7dad72de1b475d02935e5c79c218637b6c63108b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_mtu2.c | 65 ++++++++++++++++++++++---------------------
+ 1 file changed, 33 insertions(+), 32 deletions(-)
+
+diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
+index e509f417ef64..256621c156e6 100644
+--- a/drivers/clocksource/sh_mtu2.c
++++ b/drivers/clocksource/sh_mtu2.c
+@@ -34,15 +34,15 @@
+ #include <linux/pm_domain.h>
+ #include <linux/pm_runtime.h>
+
+-struct sh_mtu2_priv;
++struct sh_mtu2_device;
+
+ struct sh_mtu2_channel {
+- struct sh_mtu2_priv *mtu;
++ struct sh_mtu2_device *mtu;
+ int irq;
+ struct clock_event_device ced;
+ };
+
+-struct sh_mtu2_priv {
++struct sh_mtu2_device {
+ struct platform_device *pdev;
+
+ void __iomem *mapbase;
+@@ -273,75 +273,76 @@ static int sh_mtu2_register(struct sh_mtu2_channel *ch, char *name,
+ return 0;
+ }
+
+-static int sh_mtu2_setup(struct sh_mtu2_priv *p, struct platform_device *pdev)
++static int sh_mtu2_setup(struct sh_mtu2_device *mtu,
++ struct platform_device *pdev)
+ {
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
+ struct resource *res;
+ int ret;
+ ret = -ENXIO;
+
+- memset(p, 0, sizeof(*p));
+- p->pdev = pdev;
++ memset(mtu, 0, sizeof(*mtu));
++ mtu->pdev = pdev;
+
+ if (!cfg) {
+- dev_err(&p->pdev->dev, "missing platform data\n");
++ dev_err(&mtu->pdev->dev, "missing platform data\n");
+ goto err0;
+ }
+
+- platform_set_drvdata(pdev, p);
++ platform_set_drvdata(pdev, mtu);
+
+- res = platform_get_resource(p->pdev, IORESOURCE_MEM, 0);
++ res = platform_get_resource(mtu->pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+- dev_err(&p->pdev->dev, "failed to get I/O memory\n");
++ dev_err(&mtu->pdev->dev, "failed to get I/O memory\n");
+ goto err0;
+ }
+
+- p->channel.irq = platform_get_irq(p->pdev, 0);
+- if (p->channel.irq < 0) {
+- dev_err(&p->pdev->dev, "failed to get irq\n");
++ mtu->channel.irq = platform_get_irq(mtu->pdev, 0);
++ if (mtu->channel.irq < 0) {
++ dev_err(&mtu->pdev->dev, "failed to get irq\n");
+ goto err0;
+ }
+
+ /* map memory, let mapbase point to our channel */
+- p->mapbase = ioremap_nocache(res->start, resource_size(res));
+- if (p->mapbase == NULL) {
+- dev_err(&p->pdev->dev, "failed to remap I/O memory\n");
++ mtu->mapbase = ioremap_nocache(res->start, resource_size(res));
++ if (mtu->mapbase == NULL) {
++ dev_err(&mtu->pdev->dev, "failed to remap I/O memory\n");
+ goto err0;
+ }
+
+ /* get hold of clock */
+- p->clk = clk_get(&p->pdev->dev, "mtu2_fck");
+- if (IS_ERR(p->clk)) {
+- dev_err(&p->pdev->dev, "cannot get clock\n");
+- ret = PTR_ERR(p->clk);
++ mtu->clk = clk_get(&mtu->pdev->dev, "mtu2_fck");
++ if (IS_ERR(mtu->clk)) {
++ dev_err(&mtu->pdev->dev, "cannot get clock\n");
++ ret = PTR_ERR(mtu->clk);
+ goto err1;
+ }
+
+- ret = clk_prepare(p->clk);
++ ret = clk_prepare(mtu->clk);
+ if (ret < 0)
+ goto err2;
+
+- p->channel.mtu = p;
++ mtu->channel.mtu = mtu;
+
+- ret = sh_mtu2_register(&p->channel, (char *)dev_name(&p->pdev->dev),
++ ret = sh_mtu2_register(&mtu->channel, (char *)dev_name(&mtu->pdev->dev),
+ cfg->clockevent_rating);
+ if (ret < 0)
+ goto err3;
+
+ return 0;
+ err3:
+- clk_unprepare(p->clk);
++ clk_unprepare(mtu->clk);
+ err2:
+- clk_put(p->clk);
++ clk_put(mtu->clk);
+ err1:
+- iounmap(p->mapbase);
++ iounmap(mtu->mapbase);
+ err0:
+ return ret;
+ }
+
+ static int sh_mtu2_probe(struct platform_device *pdev)
+ {
+- struct sh_mtu2_priv *p = platform_get_drvdata(pdev);
++ struct sh_mtu2_device *mtu = platform_get_drvdata(pdev);
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
+ int ret;
+
+@@ -350,20 +351,20 @@ static int sh_mtu2_probe(struct platform_device *pdev)
+ pm_runtime_enable(&pdev->dev);
+ }
+
+- if (p) {
++ if (mtu) {
+ dev_info(&pdev->dev, "kept as earlytimer\n");
+ goto out;
+ }
+
+- p = kmalloc(sizeof(*p), GFP_KERNEL);
+- if (p == NULL) {
++ mtu = kmalloc(sizeof(*mtu), GFP_KERNEL);
++ if (mtu == NULL) {
+ dev_err(&pdev->dev, "failed to allocate driver data\n");
+ return -ENOMEM;
+ }
+
+- ret = sh_mtu2_setup(p, pdev);
++ ret = sh_mtu2_setup(mtu, pdev);
+ if (ret) {
+- kfree(p);
++ kfree(mtu);
+ pm_runtime_idle(&pdev->dev);
+ return ret;
+ }
+--
+2.1.2
+
--- /dev/null
+From c5f858279101772b2d0dd142f7fbc4831d3a5661 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 4 Mar 2014 13:11:23 +0100
+Subject: clocksource: sh_mtu2: Split channel setup to separate function
+
+Move the channel setup code from sh_mtu2_setup to a new
+sh_mtu2_setup_channel function and call it from sh_mtu2_setup.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Wolfram Sang <wsa@sang-engineering.com>
+(cherry picked from commit 2e1a53265d550002fdd1658778854d56ae4cadc1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_mtu2.c | 29 +++++++++++++++++++----------
+ 1 file changed, 19 insertions(+), 10 deletions(-)
+
+diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
+index 256621c156e6..8fd705909f98 100644
+--- a/drivers/clocksource/sh_mtu2.c
++++ b/drivers/clocksource/sh_mtu2.c
+@@ -273,6 +273,24 @@ static int sh_mtu2_register(struct sh_mtu2_channel *ch, char *name,
+ return 0;
+ }
+
++static int sh_mtu2_setup_channel(struct sh_mtu2_channel *ch,
++ struct sh_mtu2_device *mtu)
++{
++ struct sh_timer_config *cfg = mtu->pdev->dev.platform_data;
++
++ memset(ch, 0, sizeof(*ch));
++ ch->mtu = mtu;
++
++ ch->irq = platform_get_irq(mtu->pdev, 0);
++ if (ch->irq < 0) {
++ dev_err(&mtu->pdev->dev, "failed to get irq\n");
++ return ch->irq;
++ }
++
++ return sh_mtu2_register(ch, (char *)dev_name(&mtu->pdev->dev),
++ cfg->clockevent_rating);
++}
++
+ static int sh_mtu2_setup(struct sh_mtu2_device *mtu,
+ struct platform_device *pdev)
+ {
+@@ -297,12 +315,6 @@ static int sh_mtu2_setup(struct sh_mtu2_device *mtu,
+ goto err0;
+ }
+
+- mtu->channel.irq = platform_get_irq(mtu->pdev, 0);
+- if (mtu->channel.irq < 0) {
+- dev_err(&mtu->pdev->dev, "failed to get irq\n");
+- goto err0;
+- }
+-
+ /* map memory, let mapbase point to our channel */
+ mtu->mapbase = ioremap_nocache(res->start, resource_size(res));
+ if (mtu->mapbase == NULL) {
+@@ -322,10 +334,7 @@ static int sh_mtu2_setup(struct sh_mtu2_device *mtu,
+ if (ret < 0)
+ goto err2;
+
+- mtu->channel.mtu = mtu;
+-
+- ret = sh_mtu2_register(&mtu->channel, (char *)dev_name(&mtu->pdev->dev),
+- cfg->clockevent_rating);
++ ret = sh_mtu2_setup_channel(&mtu->channel, mtu);
+ if (ret < 0)
+ goto err3;
+
+--
+2.1.2
+
--- /dev/null
+From 7a1fbec514697a4df482023451c2793026db4d10 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 4 Mar 2014 13:57:14 +0100
+Subject: clocksource: sh_mtu2: Constify name argument to sh_mtu2_register()
+
+The name argument is assigned to const structure fields only, constify
+it.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Wolfram Sang <wsa@sang-engineering.com>
+(cherry picked from commit aa83804af705731d2802b80fb4b94a79045d31a3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_mtu2.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
+index 8fd705909f98..2fe3ab4c3231 100644
+--- a/drivers/clocksource/sh_mtu2.c
++++ b/drivers/clocksource/sh_mtu2.c
+@@ -236,7 +236,7 @@ static void sh_mtu2_clock_event_resume(struct clock_event_device *ced)
+ }
+
+ static void sh_mtu2_register_clockevent(struct sh_mtu2_channel *ch,
+- char *name, unsigned long rating)
++ const char *name, unsigned long rating)
+ {
+ struct clock_event_device *ced = &ch->ced;
+ int ret;
+@@ -264,7 +264,7 @@ static void sh_mtu2_register_clockevent(struct sh_mtu2_channel *ch,
+ }
+ }
+
+-static int sh_mtu2_register(struct sh_mtu2_channel *ch, char *name,
++static int sh_mtu2_register(struct sh_mtu2_channel *ch, const char *name,
+ unsigned long clockevent_rating)
+ {
+ if (clockevent_rating)
+@@ -287,7 +287,7 @@ static int sh_mtu2_setup_channel(struct sh_mtu2_channel *ch,
+ return ch->irq;
+ }
+
+- return sh_mtu2_register(ch, (char *)dev_name(&mtu->pdev->dev),
++ return sh_mtu2_register(ch, dev_name(&mtu->pdev->dev),
+ cfg->clockevent_rating);
+ }
+
+--
+2.1.2
+
--- /dev/null
+From b65c9acd5dccf91ea9a68d553174b911328808ff Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 4 Mar 2014 14:04:24 +0100
+Subject: clocksource: sh_mtu2: Add memory base to sh_mtu2_channel structure
+
+The channel memory base is channel-specific, add it to the channel
+structure in preparation for support of multiple channels per device.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Wolfram Sang <wsa@sang-engineering.com>
+(cherry picked from commit da90a1c67751a412499a9f5698c3bf0bf80f65a6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_mtu2.c | 32 ++++++++++++++++++--------------
+ 1 file changed, 18 insertions(+), 14 deletions(-)
+
+diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
+index 2fe3ab4c3231..97714ce5e851 100644
+--- a/drivers/clocksource/sh_mtu2.c
++++ b/drivers/clocksource/sh_mtu2.c
+@@ -38,7 +38,10 @@ struct sh_mtu2_device;
+
+ struct sh_mtu2_channel {
+ struct sh_mtu2_device *mtu;
++
++ void __iomem *base;
+ int irq;
++
+ struct clock_event_device ced;
+ };
+
+@@ -74,39 +77,35 @@ static unsigned long mtu2_reg_offs[] = {
+
+ static inline unsigned long sh_mtu2_read(struct sh_mtu2_channel *ch, int reg_nr)
+ {
+- struct sh_timer_config *cfg = ch->mtu->pdev->dev.platform_data;
+- void __iomem *base = ch->mtu->mapbase;
+ unsigned long offs;
+
+ if (reg_nr == TSTR)
+- return ioread8(base + cfg->channel_offset);
++ return ioread8(ch->mtu->mapbase);
+
+ offs = mtu2_reg_offs[reg_nr];
+
+ if ((reg_nr == TCNT) || (reg_nr == TGR))
+- return ioread16(base + offs);
++ return ioread16(ch->base + offs);
+ else
+- return ioread8(base + offs);
++ return ioread8(ch->base + offs);
+ }
+
+ static inline void sh_mtu2_write(struct sh_mtu2_channel *ch, int reg_nr,
+ unsigned long value)
+ {
+- struct sh_timer_config *cfg = ch->mtu->pdev->dev.platform_data;
+- void __iomem *base = ch->mtu->mapbase;
+ unsigned long offs;
+
+ if (reg_nr == TSTR) {
+- iowrite8(value, base + cfg->channel_offset);
++ iowrite8(value, ch->mtu->mapbase);
+ return;
+ }
+
+ offs = mtu2_reg_offs[reg_nr];
+
+ if ((reg_nr == TCNT) || (reg_nr == TGR))
+- iowrite16(value, base + offs);
++ iowrite16(value, ch->base + offs);
+ else
+- iowrite8(value, base + offs);
++ iowrite8(value, ch->base + offs);
+ }
+
+ static void sh_mtu2_start_stop_ch(struct sh_mtu2_channel *ch, int start)
+@@ -315,13 +314,18 @@ static int sh_mtu2_setup(struct sh_mtu2_device *mtu,
+ goto err0;
+ }
+
+- /* map memory, let mapbase point to our channel */
+- mtu->mapbase = ioremap_nocache(res->start, resource_size(res));
+- if (mtu->mapbase == NULL) {
++ /*
++ * Map memory, let channel.base point to our channel and mapbase to the
++ * start/stop shared register.
++ */
++ mtu->channel.base = ioremap_nocache(res->start, resource_size(res));
++ if (mtu->channel.base == NULL) {
+ dev_err(&mtu->pdev->dev, "failed to remap I/O memory\n");
+ goto err0;
+ }
+
++ mtu->mapbase = mtu->channel.base + cfg->channel_offset;
++
+ /* get hold of clock */
+ mtu->clk = clk_get(&mtu->pdev->dev, "mtu2_fck");
+ if (IS_ERR(mtu->clk)) {
+@@ -344,7 +348,7 @@ static int sh_mtu2_setup(struct sh_mtu2_device *mtu,
+ err2:
+ clk_put(mtu->clk);
+ err1:
+- iounmap(mtu->mapbase);
++ iounmap(mtu->channel.base);
+ err0:
+ return ret;
+ }
+--
+2.1.2
+
--- /dev/null
+From f61baa5c30521c16d025208bb0c606ae0b250538 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 4 Mar 2014 14:17:26 +0100
+Subject: clocksource: sh_mtu2: Add index to struct sh_mtu2_channel
+
+Use the index as the timer start/stop bit and when printing messages to
+identify the channel.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Wolfram Sang <wsa@sang-engineering.com>
+(cherry picked from commit d2b93177065fd8e1e18f4f42880326e0881ff457)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_mtu2.c | 22 +++++++++++++---------
+ 1 file changed, 13 insertions(+), 9 deletions(-)
+
+diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
+index 97714ce5e851..61827c66f7d3 100644
+--- a/drivers/clocksource/sh_mtu2.c
++++ b/drivers/clocksource/sh_mtu2.c
+@@ -38,6 +38,7 @@ struct sh_mtu2_device;
+
+ struct sh_mtu2_channel {
+ struct sh_mtu2_device *mtu;
++ unsigned int index;
+
+ void __iomem *base;
+ int irq;
+@@ -110,7 +111,6 @@ static inline void sh_mtu2_write(struct sh_mtu2_channel *ch, int reg_nr,
+
+ static void sh_mtu2_start_stop_ch(struct sh_mtu2_channel *ch, int start)
+ {
+- struct sh_timer_config *cfg = ch->mtu->pdev->dev.platform_data;
+ unsigned long flags, value;
+
+ /* start stop register shared by multiple timer channels */
+@@ -118,9 +118,9 @@ static void sh_mtu2_start_stop_ch(struct sh_mtu2_channel *ch, int start)
+ value = sh_mtu2_read(ch, TSTR);
+
+ if (start)
+- value |= 1 << cfg->timer_bit;
++ value |= 1 << ch->index;
+ else
+- value &= ~(1 << cfg->timer_bit);
++ value &= ~(1 << ch->index);
+
+ sh_mtu2_write(ch, TSTR, value);
+ raw_spin_unlock_irqrestore(&sh_mtu2_lock, flags);
+@@ -138,7 +138,8 @@ static int sh_mtu2_enable(struct sh_mtu2_channel *ch)
+ /* enable clock */
+ ret = clk_enable(ch->mtu->clk);
+ if (ret) {
+- dev_err(&ch->mtu->pdev->dev, "cannot enable clock\n");
++ dev_err(&ch->mtu->pdev->dev, "ch%u: cannot enable clock\n",
++ ch->index);
+ return ret;
+ }
+
+@@ -211,7 +212,7 @@ static void sh_mtu2_clock_event_mode(enum clock_event_mode mode,
+ switch (mode) {
+ case CLOCK_EVT_MODE_PERIODIC:
+ dev_info(&ch->mtu->pdev->dev,
+- "used for periodic clock events\n");
++ "ch%u: used for periodic clock events\n", ch->index);
+ sh_mtu2_enable(ch);
+ break;
+ case CLOCK_EVT_MODE_UNUSED:
+@@ -250,15 +251,16 @@ static void sh_mtu2_register_clockevent(struct sh_mtu2_channel *ch,
+ ced->suspend = sh_mtu2_clock_event_suspend;
+ ced->resume = sh_mtu2_clock_event_resume;
+
+- dev_info(&ch->mtu->pdev->dev, "used for clock events\n");
++ dev_info(&ch->mtu->pdev->dev, "ch%u: used for clock events\n",
++ ch->index);
+ clockevents_register_device(ced);
+
+ ret = request_irq(ch->irq, sh_mtu2_interrupt,
+ IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
+ dev_name(&ch->mtu->pdev->dev), ch);
+ if (ret) {
+- dev_err(&ch->mtu->pdev->dev, "failed to request irq %d\n",
+- ch->irq);
++ dev_err(&ch->mtu->pdev->dev, "ch%u: failed to request irq %d\n",
++ ch->index, ch->irq);
+ return;
+ }
+ }
+@@ -279,10 +281,12 @@ static int sh_mtu2_setup_channel(struct sh_mtu2_channel *ch,
+
+ memset(ch, 0, sizeof(*ch));
+ ch->mtu = mtu;
++ ch->index = cfg->timer_bit;
+
+ ch->irq = platform_get_irq(mtu->pdev, 0);
+ if (ch->irq < 0) {
+- dev_err(&mtu->pdev->dev, "failed to get irq\n");
++ dev_err(&mtu->pdev->dev, "ch%u: failed to get irq\n",
++ ch->index);
+ return ch->irq;
+ }
+
+--
+2.1.2
+
--- /dev/null
+From bbaba8a8d2033e610d83f227e708d48732e1e93d Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 4 Mar 2014 14:10:55 +0100
+Subject: clocksource: sh_mtu2: Replace kmalloc + memset with kzalloc
+
+One kzalloc a day keeps the bugs away.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Wolfram Sang <wsa@sang-engineering.com>
+(cherry picked from commit 810c651369b343618d949826e0acd0df1b8b06eb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_mtu2.c | 6 +-----
+ 1 file changed, 1 insertion(+), 5 deletions(-)
+
+diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
+index 61827c66f7d3..94a53428a556 100644
+--- a/drivers/clocksource/sh_mtu2.c
++++ b/drivers/clocksource/sh_mtu2.c
+@@ -241,8 +241,6 @@ static void sh_mtu2_register_clockevent(struct sh_mtu2_channel *ch,
+ struct clock_event_device *ced = &ch->ced;
+ int ret;
+
+- memset(ced, 0, sizeof(*ced));
+-
+ ced->name = name;
+ ced->features = CLOCK_EVT_FEAT_PERIODIC;
+ ced->rating = rating;
+@@ -279,7 +277,6 @@ static int sh_mtu2_setup_channel(struct sh_mtu2_channel *ch,
+ {
+ struct sh_timer_config *cfg = mtu->pdev->dev.platform_data;
+
+- memset(ch, 0, sizeof(*ch));
+ ch->mtu = mtu;
+ ch->index = cfg->timer_bit;
+
+@@ -302,7 +299,6 @@ static int sh_mtu2_setup(struct sh_mtu2_device *mtu,
+ int ret;
+ ret = -ENXIO;
+
+- memset(mtu, 0, sizeof(*mtu));
+ mtu->pdev = pdev;
+
+ if (!cfg) {
+@@ -373,7 +369,7 @@ static int sh_mtu2_probe(struct platform_device *pdev)
+ goto out;
+ }
+
+- mtu = kmalloc(sizeof(*mtu), GFP_KERNEL);
++ mtu = kzalloc(sizeof(*mtu), GFP_KERNEL);
+ if (mtu == NULL) {
+ dev_err(&pdev->dev, "failed to allocate driver data\n");
+ return -ENOMEM;
+--
+2.1.2
+
--- /dev/null
+From 31a7d4871fb9b8785d3a95e390b19f38c3155826 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 4 Mar 2014 14:23:00 +0100
+Subject: clocksource: sh_mtu2: Allocate channels dynamically
+
+This prepares the driver for multi-channel support.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Wolfram Sang <wsa@sang-engineering.com>
+(cherry picked from commit c54ccb431ce6ce813bb850e8659991fc4c5bc6bc)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_mtu2.c | 27 ++++++++++++++++++++-------
+ 1 file changed, 20 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
+index 94a53428a556..45e1e85fcbeb 100644
+--- a/drivers/clocksource/sh_mtu2.c
++++ b/drivers/clocksource/sh_mtu2.c
+@@ -52,7 +52,8 @@ struct sh_mtu2_device {
+ void __iomem *mapbase;
+ struct clk *clk;
+
+- struct sh_mtu2_channel channel;
++ struct sh_mtu2_channel *channels;
++ unsigned int num_channels;
+ };
+
+ static DEFINE_RAW_SPINLOCK(sh_mtu2_lock);
+@@ -296,6 +297,7 @@ static int sh_mtu2_setup(struct sh_mtu2_device *mtu,
+ {
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
+ struct resource *res;
++ void __iomem *base;
+ int ret;
+ ret = -ENXIO;
+
+@@ -315,16 +317,16 @@ static int sh_mtu2_setup(struct sh_mtu2_device *mtu,
+ }
+
+ /*
+- * Map memory, let channel.base point to our channel and mapbase to the
++ * Map memory, let base point to our channel and mapbase to the
+ * start/stop shared register.
+ */
+- mtu->channel.base = ioremap_nocache(res->start, resource_size(res));
+- if (mtu->channel.base == NULL) {
++ base = ioremap_nocache(res->start, resource_size(res));
++ if (base == NULL) {
+ dev_err(&mtu->pdev->dev, "failed to remap I/O memory\n");
+ goto err0;
+ }
+
+- mtu->mapbase = mtu->channel.base + cfg->channel_offset;
++ mtu->mapbase = base + cfg->channel_offset;
+
+ /* get hold of clock */
+ mtu->clk = clk_get(&mtu->pdev->dev, "mtu2_fck");
+@@ -338,17 +340,28 @@ static int sh_mtu2_setup(struct sh_mtu2_device *mtu,
+ if (ret < 0)
+ goto err2;
+
+- ret = sh_mtu2_setup_channel(&mtu->channel, mtu);
++ mtu->channels = kzalloc(sizeof(*mtu->channels), GFP_KERNEL);
++ if (mtu->channels == NULL) {
++ ret = -ENOMEM;
++ goto err3;
++ }
++
++ mtu->num_channels = 1;
++
++ mtu->channels[0].base = base;
++
++ ret = sh_mtu2_setup_channel(&mtu->channels[0], mtu);
+ if (ret < 0)
+ goto err3;
+
+ return 0;
+ err3:
++ kfree(mtu->channels);
+ clk_unprepare(mtu->clk);
+ err2:
+ clk_put(mtu->clk);
+ err1:
+- iounmap(mtu->channel.base);
++ iounmap(base);
+ err0:
+ return ret;
+ }
+--
+2.1.2
+
--- /dev/null
+From eef94c0cfa69f75bfc3bc7517a69cd3e8346e31d Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 4 Mar 2014 15:16:25 +0100
+Subject: clocksource: sh_mtu2: Replace hardcoded register values with macros
+
+Define symbolic macros for all used registers bits.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Wolfram Sang <wsa@sang-engineering.com>
+(cherry picked from commit f992c2410bd31b7c80ba8cc8b989d91b9cac3c30)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_mtu2.c | 98 ++++++++++++++++++++++++++++++++++++++++---
+ 1 file changed, 92 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
+index 45e1e85fcbeb..2cf004880746 100644
+--- a/drivers/clocksource/sh_mtu2.c
++++ b/drivers/clocksource/sh_mtu2.c
+@@ -67,6 +67,88 @@ static DEFINE_RAW_SPINLOCK(sh_mtu2_lock);
+ #define TCNT 5 /* channel register */
+ #define TGR 6 /* channel register */
+
++#define TCR_CCLR_NONE (0 << 5)
++#define TCR_CCLR_TGRA (1 << 5)
++#define TCR_CCLR_TGRB (2 << 5)
++#define TCR_CCLR_SYNC (3 << 5)
++#define TCR_CCLR_TGRC (5 << 5)
++#define TCR_CCLR_TGRD (6 << 5)
++#define TCR_CCLR_MASK (7 << 5)
++#define TCR_CKEG_RISING (0 << 3)
++#define TCR_CKEG_FALLING (1 << 3)
++#define TCR_CKEG_BOTH (2 << 3)
++#define TCR_CKEG_MASK (3 << 3)
++/* Values 4 to 7 are channel-dependent */
++#define TCR_TPSC_P1 (0 << 0)
++#define TCR_TPSC_P4 (1 << 0)
++#define TCR_TPSC_P16 (2 << 0)
++#define TCR_TPSC_P64 (3 << 0)
++#define TCR_TPSC_CH0_TCLKA (4 << 0)
++#define TCR_TPSC_CH0_TCLKB (5 << 0)
++#define TCR_TPSC_CH0_TCLKC (6 << 0)
++#define TCR_TPSC_CH0_TCLKD (7 << 0)
++#define TCR_TPSC_CH1_TCLKA (4 << 0)
++#define TCR_TPSC_CH1_TCLKB (5 << 0)
++#define TCR_TPSC_CH1_P256 (6 << 0)
++#define TCR_TPSC_CH1_TCNT2 (7 << 0)
++#define TCR_TPSC_CH2_TCLKA (4 << 0)
++#define TCR_TPSC_CH2_TCLKB (5 << 0)
++#define TCR_TPSC_CH2_TCLKC (6 << 0)
++#define TCR_TPSC_CH2_P1024 (7 << 0)
++#define TCR_TPSC_CH34_P256 (4 << 0)
++#define TCR_TPSC_CH34_P1024 (5 << 0)
++#define TCR_TPSC_CH34_TCLKA (6 << 0)
++#define TCR_TPSC_CH34_TCLKB (7 << 0)
++#define TCR_TPSC_MASK (7 << 0)
++
++#define TMDR_BFE (1 << 6)
++#define TMDR_BFB (1 << 5)
++#define TMDR_BFA (1 << 4)
++#define TMDR_MD_NORMAL (0 << 0)
++#define TMDR_MD_PWM_1 (2 << 0)
++#define TMDR_MD_PWM_2 (3 << 0)
++#define TMDR_MD_PHASE_1 (4 << 0)
++#define TMDR_MD_PHASE_2 (5 << 0)
++#define TMDR_MD_PHASE_3 (6 << 0)
++#define TMDR_MD_PHASE_4 (7 << 0)
++#define TMDR_MD_PWM_SYNC (8 << 0)
++#define TMDR_MD_PWM_COMP_CREST (13 << 0)
++#define TMDR_MD_PWM_COMP_TROUGH (14 << 0)
++#define TMDR_MD_PWM_COMP_BOTH (15 << 0)
++#define TMDR_MD_MASK (15 << 0)
++
++#define TIOC_IOCH(n) ((n) << 4)
++#define TIOC_IOCL(n) ((n) << 0)
++#define TIOR_OC_RETAIN (0 << 0)
++#define TIOR_OC_0_CLEAR (1 << 0)
++#define TIOR_OC_0_SET (2 << 0)
++#define TIOR_OC_0_TOGGLE (3 << 0)
++#define TIOR_OC_1_CLEAR (5 << 0)
++#define TIOR_OC_1_SET (6 << 0)
++#define TIOR_OC_1_TOGGLE (7 << 0)
++#define TIOR_IC_RISING (8 << 0)
++#define TIOR_IC_FALLING (9 << 0)
++#define TIOR_IC_BOTH (10 << 0)
++#define TIOR_IC_TCNT (12 << 0)
++#define TIOR_MASK (15 << 0)
++
++#define TIER_TTGE (1 << 7)
++#define TIER_TTGE2 (1 << 6)
++#define TIER_TCIEU (1 << 5)
++#define TIER_TCIEV (1 << 4)
++#define TIER_TGIED (1 << 3)
++#define TIER_TGIEC (1 << 2)
++#define TIER_TGIEB (1 << 1)
++#define TIER_TGIEA (1 << 0)
++
++#define TSR_TCFD (1 << 7)
++#define TSR_TCFU (1 << 5)
++#define TSR_TCFV (1 << 4)
++#define TSR_TGFD (1 << 3)
++#define TSR_TGFC (1 << 2)
++#define TSR_TGFB (1 << 1)
++#define TSR_TGFA (1 << 0)
++
+ static unsigned long mtu2_reg_offs[] = {
+ [TCR] = 0,
+ [TMDR] = 1,
+@@ -150,13 +232,17 @@ static int sh_mtu2_enable(struct sh_mtu2_channel *ch)
+ rate = clk_get_rate(ch->mtu->clk) / 64;
+ periodic = (rate + HZ/2) / HZ;
+
+- /* "Periodic Counter Operation" */
+- sh_mtu2_write(ch, TCR, 0x23); /* TGRA clear, divide clock by 64 */
+- sh_mtu2_write(ch, TIOR, 0);
++ /*
++ * "Periodic Counter Operation"
++ * Clear on TGRA compare match, divide clock by 64.
++ */
++ sh_mtu2_write(ch, TCR, TCR_CCLR_TGRA | TCR_TPSC_P64);
++ sh_mtu2_write(ch, TIOR, TIOC_IOCH(TIOR_OC_0_CLEAR) |
++ TIOC_IOCL(TIOR_OC_0_CLEAR));
+ sh_mtu2_write(ch, TGR, periodic);
+ sh_mtu2_write(ch, TCNT, 0);
+- sh_mtu2_write(ch, TMDR, 0);
+- sh_mtu2_write(ch, TIER, 0x01);
++ sh_mtu2_write(ch, TMDR, TMDR_MD_NORMAL);
++ sh_mtu2_write(ch, TIER, TIER_TGIEA);
+
+ /* enable channel */
+ sh_mtu2_start_stop_ch(ch, 1);
+@@ -182,7 +268,7 @@ static irqreturn_t sh_mtu2_interrupt(int irq, void *dev_id)
+
+ /* acknowledge interrupt */
+ sh_mtu2_read(ch, TSR);
+- sh_mtu2_write(ch, TSR, 0xfe);
++ sh_mtu2_write(ch, TSR, ~TSR_TGFA);
+
+ /* notify clockevent layer */
+ ch->ced.event_handler(&ch->ced);
+--
+2.1.2
+
--- /dev/null
+From a398a3a470afb2ad9a76feeda04041cc501eb855 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 4 Mar 2014 15:22:19 +0100
+Subject: clocksource: sh_mtu2: Set cpumask to cpu_possible_mask
+
+The MTU2 is not tied to CPU0, make it usable on any CPU.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Wolfram Sang <wsa@sang-engineering.com>
+(cherry picked from commit 3cc950479891040366629247357512f1cc928da3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_mtu2.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
+index 2cf004880746..702ce6044793 100644
+--- a/drivers/clocksource/sh_mtu2.c
++++ b/drivers/clocksource/sh_mtu2.c
+@@ -331,7 +331,7 @@ static void sh_mtu2_register_clockevent(struct sh_mtu2_channel *ch,
+ ced->name = name;
+ ced->features = CLOCK_EVT_FEAT_PERIODIC;
+ ced->rating = rating;
+- ced->cpumask = cpumask_of(0);
++ ced->cpumask = cpu_possible_mask;
+ ced->set_mode = sh_mtu2_clock_event_mode;
+ ced->suspend = sh_mtu2_clock_event_suspend;
+ ced->resume = sh_mtu2_clock_event_resume;
+--
+2.1.2
+
--- /dev/null
+From 01c5cf2f181c5d3a2702cef1fdb778bcc95fd953 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 4 Mar 2014 15:19:41 +0100
+Subject: clocksource: sh_mtu2: Hardcode MTU2 clock event rating to 200
+
+All boards use clock event ratings of 200 for the MTU2, hardcode it in
+the driver.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Wolfram Sang <wsa@sang-engineering.com>
+(cherry picked from commit 207e21a9732a27f58843ccae1c9644f3a1636b66)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_mtu2.c | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
+index 702ce6044793..14cc7b6f703b 100644
+--- a/drivers/clocksource/sh_mtu2.c
++++ b/drivers/clocksource/sh_mtu2.c
+@@ -323,14 +323,14 @@ static void sh_mtu2_clock_event_resume(struct clock_event_device *ced)
+ }
+
+ static void sh_mtu2_register_clockevent(struct sh_mtu2_channel *ch,
+- const char *name, unsigned long rating)
++ const char *name)
+ {
+ struct clock_event_device *ced = &ch->ced;
+ int ret;
+
+ ced->name = name;
+ ced->features = CLOCK_EVT_FEAT_PERIODIC;
+- ced->rating = rating;
++ ced->rating = 200;
+ ced->cpumask = cpu_possible_mask;
+ ced->set_mode = sh_mtu2_clock_event_mode;
+ ced->suspend = sh_mtu2_clock_event_suspend;
+@@ -351,10 +351,10 @@ static void sh_mtu2_register_clockevent(struct sh_mtu2_channel *ch,
+ }
+
+ static int sh_mtu2_register(struct sh_mtu2_channel *ch, const char *name,
+- unsigned long clockevent_rating)
++ bool clockevent)
+ {
+- if (clockevent_rating)
+- sh_mtu2_register_clockevent(ch, name, clockevent_rating);
++ if (clockevent)
++ sh_mtu2_register_clockevent(ch, name);
+
+ return 0;
+ }
+@@ -375,7 +375,7 @@ static int sh_mtu2_setup_channel(struct sh_mtu2_channel *ch,
+ }
+
+ return sh_mtu2_register(ch, dev_name(&mtu->pdev->dev),
+- cfg->clockevent_rating);
++ cfg->clockevent_rating != 0);
+ }
+
+ static int sh_mtu2_setup(struct sh_mtu2_device *mtu,
+--
+2.1.2
+
--- /dev/null
+From e94bb1253790b369f39011c92011fca798d6f726 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 4 Mar 2014 18:05:45 +0100
+Subject: clocksource: sh_mtu2: Add support for multiple channels per device
+
+MTU2 hardware devices can support multiple channels, with global
+registers and per-channel registers. The sh_mtu2 driver currently models
+the hardware with one Linux device per channel. This model makes it
+difficult to handle global registers in a clean way.
+
+Add support for a new model that uses one Linux device per timer with
+multiple channels per device. This requires changes to platform data,
+add new channel configuration fields.
+
+Support for the legacy model is kept and will be removed after all
+platforms switch to the new model.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Wolfram Sang <wsa@sang-engineering.com>
+(cherry picked from commit faf3f4f8c805f5f8a786ba544c94bf3e01838388)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_mtu2.c | 184 +++++++++++++++++++++++++++++-------------
+ 1 file changed, 130 insertions(+), 54 deletions(-)
+
+diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
+index 14cc7b6f703b..7cc6d9429f81 100644
+--- a/drivers/clocksource/sh_mtu2.c
++++ b/drivers/clocksource/sh_mtu2.c
+@@ -54,6 +54,9 @@ struct sh_mtu2_device {
+
+ struct sh_mtu2_channel *channels;
+ unsigned int num_channels;
++
++ bool legacy;
++ bool has_clockevent;
+ };
+
+ static DEFINE_RAW_SPINLOCK(sh_mtu2_lock);
+@@ -163,8 +166,12 @@ static inline unsigned long sh_mtu2_read(struct sh_mtu2_channel *ch, int reg_nr)
+ {
+ unsigned long offs;
+
+- if (reg_nr == TSTR)
+- return ioread8(ch->mtu->mapbase);
++ if (reg_nr == TSTR) {
++ if (ch->mtu->legacy)
++ return ioread8(ch->mtu->mapbase);
++ else
++ return ioread8(ch->mtu->mapbase + 0x280);
++ }
+
+ offs = mtu2_reg_offs[reg_nr];
+
+@@ -180,8 +187,10 @@ static inline void sh_mtu2_write(struct sh_mtu2_channel *ch, int reg_nr,
+ unsigned long offs;
+
+ if (reg_nr == TSTR) {
+- iowrite8(value, ch->mtu->mapbase);
+- return;
++ if (ch->mtu->legacy)
++ return iowrite8(value, ch->mtu->mapbase);
++ else
++ return iowrite8(value, ch->mtu->mapbase + 0x280);
+ }
+
+ offs = mtu2_reg_offs[reg_nr];
+@@ -353,109 +362,168 @@ static void sh_mtu2_register_clockevent(struct sh_mtu2_channel *ch,
+ static int sh_mtu2_register(struct sh_mtu2_channel *ch, const char *name,
+ bool clockevent)
+ {
+- if (clockevent)
++ if (clockevent) {
++ ch->mtu->has_clockevent = true;
+ sh_mtu2_register_clockevent(ch, name);
++ }
+
+ return 0;
+ }
+
+-static int sh_mtu2_setup_channel(struct sh_mtu2_channel *ch,
++static int sh_mtu2_setup_channel(struct sh_mtu2_channel *ch, unsigned int index,
+ struct sh_mtu2_device *mtu)
+ {
+- struct sh_timer_config *cfg = mtu->pdev->dev.platform_data;
++ static const unsigned int channel_offsets[] = {
++ 0x300, 0x380, 0x000,
++ };
++ bool clockevent;
+
+ ch->mtu = mtu;
+- ch->index = cfg->timer_bit;
+
+- ch->irq = platform_get_irq(mtu->pdev, 0);
++ if (mtu->legacy) {
++ struct sh_timer_config *cfg = mtu->pdev->dev.platform_data;
++
++ clockevent = cfg->clockevent_rating != 0;
++
++ ch->irq = platform_get_irq(mtu->pdev, 0);
++ ch->base = mtu->mapbase - cfg->channel_offset;
++ ch->index = cfg->timer_bit;
++ } else {
++ char name[6];
++
++ clockevent = true;
++
++ sprintf(name, "tgi%ua", index);
++ ch->irq = platform_get_irq_byname(mtu->pdev, name);
++ ch->base = mtu->mapbase + channel_offsets[index];
++ ch->index = index;
++ }
++
+ if (ch->irq < 0) {
++ /* Skip channels with no declared interrupt. */
++ if (!mtu->legacy)
++ return 0;
++
+ dev_err(&mtu->pdev->dev, "ch%u: failed to get irq\n",
+ ch->index);
+ return ch->irq;
+ }
+
+- return sh_mtu2_register(ch, dev_name(&mtu->pdev->dev),
+- cfg->clockevent_rating != 0);
++ return sh_mtu2_register(ch, dev_name(&mtu->pdev->dev), clockevent);
+ }
+
+-static int sh_mtu2_setup(struct sh_mtu2_device *mtu,
+- struct platform_device *pdev)
++static int sh_mtu2_map_memory(struct sh_mtu2_device *mtu)
+ {
+- struct sh_timer_config *cfg = pdev->dev.platform_data;
+ struct resource *res;
+- void __iomem *base;
+- int ret;
+- ret = -ENXIO;
+-
+- mtu->pdev = pdev;
+-
+- if (!cfg) {
+- dev_err(&mtu->pdev->dev, "missing platform data\n");
+- goto err0;
+- }
+-
+- platform_set_drvdata(pdev, mtu);
+
+ res = platform_get_resource(mtu->pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&mtu->pdev->dev, "failed to get I/O memory\n");
+- goto err0;
++ return -ENXIO;
+ }
+
++ mtu->mapbase = ioremap_nocache(res->start, resource_size(res));
++ if (mtu->mapbase == NULL)
++ return -ENXIO;
++
+ /*
+- * Map memory, let base point to our channel and mapbase to the
+- * start/stop shared register.
++ * In legacy platform device configuration (with one device per channel)
++ * the resource points to the channel base address.
+ */
+- base = ioremap_nocache(res->start, resource_size(res));
+- if (base == NULL) {
+- dev_err(&mtu->pdev->dev, "failed to remap I/O memory\n");
+- goto err0;
++ if (mtu->legacy) {
++ struct sh_timer_config *cfg = mtu->pdev->dev.platform_data;
++ mtu->mapbase += cfg->channel_offset;
++ }
++
++ return 0;
++}
++
++static void sh_mtu2_unmap_memory(struct sh_mtu2_device *mtu)
++{
++ if (mtu->legacy) {
++ struct sh_timer_config *cfg = mtu->pdev->dev.platform_data;
++ mtu->mapbase -= cfg->channel_offset;
+ }
+
+- mtu->mapbase = base + cfg->channel_offset;
++ iounmap(mtu->mapbase);
++}
++
++static int sh_mtu2_setup(struct sh_mtu2_device *mtu,
++ struct platform_device *pdev)
++{
++ struct sh_timer_config *cfg = pdev->dev.platform_data;
++ const struct platform_device_id *id = pdev->id_entry;
++ unsigned int i;
++ int ret;
++
++ mtu->pdev = pdev;
++ mtu->legacy = id->driver_data;
++
++ if (mtu->legacy && !cfg) {
++ dev_err(&mtu->pdev->dev, "missing platform data\n");
++ return -ENXIO;
++ }
+
+- /* get hold of clock */
++ /* Get hold of clock. */
+ mtu->clk = clk_get(&mtu->pdev->dev, "mtu2_fck");
+ if (IS_ERR(mtu->clk)) {
+ dev_err(&mtu->pdev->dev, "cannot get clock\n");
+- ret = PTR_ERR(mtu->clk);
+- goto err1;
++ return PTR_ERR(mtu->clk);
+ }
+
+ ret = clk_prepare(mtu->clk);
+ if (ret < 0)
+- goto err2;
++ goto err_clk_put;
+
+- mtu->channels = kzalloc(sizeof(*mtu->channels), GFP_KERNEL);
++ /* Map the memory resource. */
++ ret = sh_mtu2_map_memory(mtu);
++ if (ret < 0) {
++ dev_err(&mtu->pdev->dev, "failed to remap I/O memory\n");
++ goto err_clk_unprepare;
++ }
++
++ /* Allocate and setup the channels. */
++ if (mtu->legacy)
++ mtu->num_channels = 1;
++ else
++ mtu->num_channels = 3;
++
++ mtu->channels = kzalloc(sizeof(*mtu->channels) * mtu->num_channels,
++ GFP_KERNEL);
+ if (mtu->channels == NULL) {
+ ret = -ENOMEM;
+- goto err3;
++ goto err_unmap;
+ }
+
+- mtu->num_channels = 1;
+-
+- mtu->channels[0].base = base;
++ if (mtu->legacy) {
++ ret = sh_mtu2_setup_channel(&mtu->channels[0], 0, mtu);
++ if (ret < 0)
++ goto err_unmap;
++ } else {
++ for (i = 0; i < mtu->num_channels; ++i) {
++ ret = sh_mtu2_setup_channel(&mtu->channels[i], i, mtu);
++ if (ret < 0)
++ goto err_unmap;
++ }
++ }
+
+- ret = sh_mtu2_setup_channel(&mtu->channels[0], mtu);
+- if (ret < 0)
+- goto err3;
++ platform_set_drvdata(pdev, mtu);
+
+ return 0;
+- err3:
++
++err_unmap:
+ kfree(mtu->channels);
++ sh_mtu2_unmap_memory(mtu);
++err_clk_unprepare:
+ clk_unprepare(mtu->clk);
+- err2:
++err_clk_put:
+ clk_put(mtu->clk);
+- err1:
+- iounmap(base);
+- err0:
+ return ret;
+ }
+
+ static int sh_mtu2_probe(struct platform_device *pdev)
+ {
+ struct sh_mtu2_device *mtu = platform_get_drvdata(pdev);
+- struct sh_timer_config *cfg = pdev->dev.platform_data;
+ int ret;
+
+ if (!is_early_platform_device(pdev)) {
+@@ -484,7 +552,7 @@ static int sh_mtu2_probe(struct platform_device *pdev)
+ return 0;
+
+ out:
+- if (cfg->clockevent_rating)
++ if (mtu->has_clockevent)
+ pm_runtime_irq_safe(&pdev->dev);
+ else
+ pm_runtime_idle(&pdev->dev);
+@@ -497,12 +565,20 @@ static int sh_mtu2_remove(struct platform_device *pdev)
+ return -EBUSY; /* cannot unregister clockevent */
+ }
+
++static const struct platform_device_id sh_mtu2_id_table[] = {
++ { "sh_mtu2", 1 },
++ { "sh-mtu2", 0 },
++ { },
++};
++MODULE_DEVICE_TABLE(platform, sh_mtu2_id_table);
++
+ static struct platform_driver sh_mtu2_device_driver = {
+ .probe = sh_mtu2_probe,
+ .remove = sh_mtu2_remove,
+ .driver = {
+ .name = "sh_mtu2",
+- }
++ },
++ .id_table = sh_mtu2_id_table,
+ };
+
+ static int __init sh_mtu2_init(void)
+--
+2.1.2
+
--- /dev/null
+From 0ff1145693a5ad05ab440085288305069a17d038 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 4 Mar 2014 18:09:15 +0100
+Subject: clocksource: sh_mtu2: Rename clock to "fck" in the non-legacy case
+
+The sh_mtu2 driver gets the MTU2 functional clock using a connection ID
+of "mtu2_fck". While all SH SoCs create clock lookup entries with a NULL
+device ID and a "mtu2_fck" connection ID, the ARM SoCs use the device ID
+only with a NULL connection ID. This works on legacy platforms but will
+break on ARM with DT boot.
+
+Fix the situation by using a connection ID of "fck" in the non-legacy
+platform data case. Clock lookup entries will be renamed to use the
+device ID as well as the connection ID as platforms get moved to new
+platform data. The legacy code will eventually be dropped, leaving us
+with device ID based clock lookup, compatible with DT boot.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Wolfram Sang <wsa@sang-engineering.com>
+(cherry picked from commit 6dc9693bb3997cb324a2ffb39deaa72081a9bd0d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_mtu2.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
+index 7cc6d9429f81..3a3785702422 100644
+--- a/drivers/clocksource/sh_mtu2.c
++++ b/drivers/clocksource/sh_mtu2.c
+@@ -465,7 +465,7 @@ static int sh_mtu2_setup(struct sh_mtu2_device *mtu,
+ }
+
+ /* Get hold of clock. */
+- mtu->clk = clk_get(&mtu->pdev->dev, "mtu2_fck");
++ mtu->clk = clk_get(&mtu->pdev->dev, mtu->legacy ? "mtu2_fck" : "fck");
+ if (IS_ERR(mtu->clk)) {
+ dev_err(&mtu->pdev->dev, "cannot get clock\n");
+ return PTR_ERR(mtu->clk);
+--
+2.1.2
+
--- /dev/null
+From ec141a70af4cb7b1f4e242110f0e49057d5d7fe0 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 4 Mar 2014 14:12:32 +0100
+Subject: clocksource: sh_mtu2: Remove FSF mail address from GPL notice
+
+Do not include the paragraph about writing to the Free Software
+Foundation's mailing address from the sample GPL notice. The FSF has
+changed addresses in the past, and may do so again. Linux already
+includes a copy of the GPL.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Wolfram Sang <wsa@sang-engineering.com>
+(cherry picked from commit 24c8f71707087eb177b45f4a24faedaa0d8f0287)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_mtu2.c | 4 ----
+ 1 file changed, 4 deletions(-)
+
+diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
+index 3a3785702422..510bd324c1a9 100644
+--- a/drivers/clocksource/sh_mtu2.c
++++ b/drivers/clocksource/sh_mtu2.c
+@@ -11,10 +11,6 @@
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+ #include <linux/init.h>
+--
+2.1.2
+
--- /dev/null
+From 68d8dee8004d6a2b0483ffa88aff759f48bcfbae Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 4 Mar 2014 14:11:47 +0100
+Subject: clocksource: sh_mtu2: Sort headers alphabetically
+
+This helps locating duplicates and inserting new headers.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Wolfram Sang <wsa@sang-engineering.com>
+(cherry picked from commit 346f5e76b3822a2530a03f33b00ee89dfc463326)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_mtu2.c | 18 +++++++++---------
+ 1 file changed, 9 insertions(+), 9 deletions(-)
+
+diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
+index 510bd324c1a9..f2c1c36139e1 100644
+--- a/drivers/clocksource/sh_mtu2.c
++++ b/drivers/clocksource/sh_mtu2.c
+@@ -13,22 +13,22 @@
+ * GNU General Public License for more details.
+ */
+
++#include <linux/clk.h>
++#include <linux/clockchips.h>
++#include <linux/delay.h>
++#include <linux/err.h>
+ #include <linux/init.h>
+-#include <linux/platform_device.h>
+-#include <linux/spinlock.h>
+ #include <linux/interrupt.h>
+-#include <linux/ioport.h>
+-#include <linux/delay.h>
+ #include <linux/io.h>
+-#include <linux/clk.h>
++#include <linux/ioport.h>
+ #include <linux/irq.h>
+-#include <linux/err.h>
+-#include <linux/clockchips.h>
+-#include <linux/sh_timer.h>
+-#include <linux/slab.h>
+ #include <linux/module.h>
++#include <linux/platform_device.h>
+ #include <linux/pm_domain.h>
+ #include <linux/pm_runtime.h>
++#include <linux/sh_timer.h>
++#include <linux/slab.h>
++#include <linux/spinlock.h>
+
+ struct sh_mtu2_device;
+
+--
+2.1.2
+
--- /dev/null
+From 372684b38ca7a643d10579968fbd1ed767e24a2d Mon Sep 17 00:00:00 2001
+From: Jingoo Han <jg1.han@samsung.com>
+Date: Thu, 22 May 2014 14:05:07 +0200
+Subject: clocksource: sh_mtu2: Remove unnecessary OOM messages
+
+The site-specific OOM messages are unnecessary, because they
+duplicate the MM subsystem generic OOM message.
+
+[dlezcano] : refreshed against latest modifications: kmalloc -> kzalloc
+
+Signed-off-by: Jingoo Han <jg1.han@samsung.com>
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+(cherry picked from commit c77a565b2966567b97d589e90a6b9ce725bb15b1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_mtu2.c | 4 +---
+ 1 file changed, 1 insertion(+), 3 deletions(-)
+
+diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
+index f2c1c36139e1..188d4e092efc 100644
+--- a/drivers/clocksource/sh_mtu2.c
++++ b/drivers/clocksource/sh_mtu2.c
+@@ -533,10 +533,8 @@ static int sh_mtu2_probe(struct platform_device *pdev)
+ }
+
+ mtu = kzalloc(sizeof(*mtu), GFP_KERNEL);
+- if (mtu == NULL) {
+- dev_err(&pdev->dev, "failed to allocate driver data\n");
++ if (mtu == NULL)
+ return -ENOMEM;
+- }
+
+ ret = sh_mtu2_setup(mtu, pdev);
+ if (ret) {
+--
+2.1.2
+
--- /dev/null
+From 1e3e35c0af27cd424c24f329e822e5327be8f15d Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 1 Apr 2014 12:59:09 +0200
+Subject: pinctrl: sh-pfc: r8a7791: Split the DU sync and cde/disp groups
+
+The DU parallel interface ODDF signal is optional, move it out of the
+HSYNC/VSYNC group into a group of its down. The CDE and DISP signals are
+independent, split them to two different groups.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit d10046e25c73e6150677b1b5360f20bb631181a7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 37 ++++++++++++++++++++++++++----------
+ 1 file changed, 27 insertions(+), 10 deletions(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+index 7868bf3a0f91..a823b5ba4fd8 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+@@ -1733,19 +1733,32 @@ static const unsigned int du_clk_out_1_mux[] = {
+ DU1_DOTCLKOUT1_MARK
+ };
+ static const unsigned int du_sync_pins[] = {
+- /* EXVSYNC/VSYNC, EXHSYNC/HSYNC, EXDISP/EXODDF/EXCDE */
+- RCAR_GP_PIN(3, 29), RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 27),
++ /* EXVSYNC/VSYNC, EXHSYNC/HSYNC */
++ RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 27),
+ };
+ static const unsigned int du_sync_mux[] = {
+- DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK,
+ DU1_EXVSYNC_DU1_VSYNC_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK
+ };
+-static const unsigned int du_cde_disp_pins[] = {
+- /* CDE DISP */
+- RCAR_GP_PIN(3, 31), RCAR_GP_PIN(3, 30),
++static const unsigned int du_oddf_pins[] = {
++ /* EXDISP/EXODDF/EXCDE */
++ RCAR_GP_PIN(3, 29),
++};
++static const unsigned int du_oddf_mux[] = {
++ DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK,
++};
++static const unsigned int du_cde_pins[] = {
++ /* CDE */
++ RCAR_GP_PIN(3, 31),
++};
++static const unsigned int du_cde_mux[] = {
++ DU1_CDE_MARK,
++};
++static const unsigned int du_disp_pins[] = {
++ /* DISP */
++ RCAR_GP_PIN(3, 30),
+ };
+-static const unsigned int du_cde_disp_mux[] = {
+- DU1_CDE_MARK, DU1_DISP_MARK
++static const unsigned int du_disp_mux[] = {
++ DU1_DISP_MARK,
+ };
+ static const unsigned int du0_clk_in_pins[] = {
+ /* CLKIN */
+@@ -3555,7 +3568,9 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(du_clk_out_0),
+ SH_PFC_PIN_GROUP(du_clk_out_1),
+ SH_PFC_PIN_GROUP(du_sync),
+- SH_PFC_PIN_GROUP(du_cde_disp),
++ SH_PFC_PIN_GROUP(du_oddf),
++ SH_PFC_PIN_GROUP(du_cde),
++ SH_PFC_PIN_GROUP(du_disp),
+ SH_PFC_PIN_GROUP(du0_clk_in),
+ SH_PFC_PIN_GROUP(du1_clk_in),
+ SH_PFC_PIN_GROUP(du1_clk_in_b),
+@@ -3804,7 +3819,9 @@ static const char * const du_groups[] = {
+ "du_clk_out_0",
+ "du_clk_out_1",
+ "du_sync",
+- "du_cde_disp",
++ "du_oddf",
++ "du_cde",
++ "du_disp",
+ };
+
+ static const char * const du0_groups[] = {
+--
+2.1.2
+
--- /dev/null
+From 9a2904879742b9e68416981ed5b4bb88977124a1 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 13 Apr 2014 17:23:35 -0700
+Subject: sh-pfc: r8a7791: Add SSI pin support
+
+Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit b664cd1f020211d8e4480c2937b82fe513a9c757)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 314 +++++++++++++++++++++++++++++++++++
+ 1 file changed, 314 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+index a823b5ba4fd8..c1c6dfec3f8e 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+@@ -3259,6 +3259,260 @@ static const unsigned int sdhi2_wp_pins[] = {
+ static const unsigned int sdhi2_wp_mux[] = {
+ SD2_WP_MARK,
+ };
++
++/* - SSI -------------------------------------------------------------------- */
++static const unsigned int ssi0_data_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(2, 2),
++};
++
++static const unsigned int ssi0_data_mux[] = {
++ SSI_SDATA0_MARK,
++};
++
++static const unsigned int ssi0_data_b_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(3, 4),
++};
++
++static const unsigned int ssi0_data_b_mux[] = {
++ SSI_SDATA0_B_MARK,
++};
++
++static const unsigned int ssi0129_ctrl_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1),
++};
++
++static const unsigned int ssi0129_ctrl_mux[] = {
++ SSI_SCK0129_MARK, SSI_WS0129_MARK,
++};
++
++static const unsigned int ssi0129_ctrl_b_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3),
++};
++
++static const unsigned int ssi0129_ctrl_b_mux[] = {
++ SSI_SCK0129_B_MARK, SSI_WS0129_B_MARK,
++};
++
++static const unsigned int ssi1_data_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(2, 5),
++};
++
++static const unsigned int ssi1_data_mux[] = {
++ SSI_SDATA1_MARK,
++};
++
++static const unsigned int ssi1_data_b_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(3, 7),
++};
++
++static const unsigned int ssi1_data_b_mux[] = {
++ SSI_SDATA1_B_MARK,
++};
++
++static const unsigned int ssi1_ctrl_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 4),
++};
++
++static const unsigned int ssi1_ctrl_mux[] = {
++ SSI_SCK1_MARK, SSI_WS1_MARK,
++};
++
++static const unsigned int ssi1_ctrl_b_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 6),
++};
++
++static const unsigned int ssi1_ctrl_b_mux[] = {
++ SSI_SCK1_B_MARK, SSI_WS1_B_MARK,
++};
++
++static const unsigned int ssi2_data_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(2, 8),
++};
++
++static const unsigned int ssi2_data_mux[] = {
++ SSI_SDATA2_MARK,
++};
++
++static const unsigned int ssi2_ctrl_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7),
++};
++
++static const unsigned int ssi2_ctrl_mux[] = {
++ SSI_SCK2_MARK, SSI_WS2_MARK,
++};
++
++static const unsigned int ssi3_data_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(2, 11),
++};
++
++static const unsigned int ssi3_data_mux[] = {
++ SSI_SDATA3_MARK,
++};
++
++static const unsigned int ssi34_ctrl_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(2, 9), RCAR_GP_PIN(2, 10),
++};
++
++static const unsigned int ssi34_ctrl_mux[] = {
++ SSI_SCK34_MARK, SSI_WS34_MARK,
++};
++
++static const unsigned int ssi4_data_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(2, 14),
++};
++
++static const unsigned int ssi4_data_mux[] = {
++ SSI_SDATA4_MARK,
++};
++
++static const unsigned int ssi4_ctrl_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 13),
++};
++
++static const unsigned int ssi4_ctrl_mux[] = {
++ SSI_SCK4_MARK, SSI_WS4_MARK,
++};
++
++static const unsigned int ssi5_data_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(2, 17),
++};
++
++static const unsigned int ssi5_data_mux[] = {
++ SSI_SDATA5_MARK,
++};
++
++static const unsigned int ssi5_ctrl_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(2, 15), RCAR_GP_PIN(2, 16),
++};
++
++static const unsigned int ssi5_ctrl_mux[] = {
++ SSI_SCK5_MARK, SSI_WS5_MARK,
++};
++
++static const unsigned int ssi6_data_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(2, 20),
++};
++
++static const unsigned int ssi6_data_mux[] = {
++ SSI_SDATA6_MARK,
++};
++
++static const unsigned int ssi6_ctrl_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(2, 18), RCAR_GP_PIN(2, 19),
++};
++
++static const unsigned int ssi6_ctrl_mux[] = {
++ SSI_SCK6_MARK, SSI_WS6_MARK,
++};
++
++static const unsigned int ssi7_data_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(2, 23),
++};
++
++static const unsigned int ssi7_data_mux[] = {
++ SSI_SDATA7_MARK,
++};
++
++static const unsigned int ssi7_data_b_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(3, 12),
++};
++
++static const unsigned int ssi7_data_b_mux[] = {
++ SSI_SDATA7_B_MARK,
++};
++
++static const unsigned int ssi78_ctrl_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 22),
++};
++
++static const unsigned int ssi78_ctrl_mux[] = {
++ SSI_SCK78_MARK, SSI_WS78_MARK,
++};
++
++static const unsigned int ssi78_ctrl_b_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11),
++};
++
++static const unsigned int ssi78_ctrl_b_mux[] = {
++ SSI_SCK78_B_MARK, SSI_WS78_B_MARK,
++};
++
++static const unsigned int ssi8_data_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(2, 24),
++};
++
++static const unsigned int ssi8_data_mux[] = {
++ SSI_SDATA8_MARK,
++};
++
++static const unsigned int ssi8_data_b_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(3, 13),
++};
++
++static const unsigned int ssi8_data_b_mux[] = {
++ SSI_SDATA8_B_MARK,
++};
++
++static const unsigned int ssi9_data_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(2, 27),
++};
++
++static const unsigned int ssi9_data_mux[] = {
++ SSI_SDATA9_MARK,
++};
++
++static const unsigned int ssi9_data_b_pins[] = {
++ /* SDATA */
++ RCAR_GP_PIN(3, 18),
++};
++
++static const unsigned int ssi9_data_b_mux[] = {
++ SSI_SDATA9_B_MARK,
++};
++
++static const unsigned int ssi9_ctrl_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(2, 25), RCAR_GP_PIN(2, 26),
++};
++
++static const unsigned int ssi9_ctrl_mux[] = {
++ SSI_SCK9_MARK, SSI_WS9_MARK,
++};
++
++static const unsigned int ssi9_ctrl_b_pins[] = {
++ /* SCK, WS */
++ RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15),
++};
++
++static const unsigned int ssi9_ctrl_b_mux[] = {
++ SSI_SCK9_B_MARK, SSI_WS9_B_MARK,
++};
++
+ /* - USB0 ------------------------------------------------------------------- */
+ static const unsigned int usb0_pins[] = {
+ RCAR_GP_PIN(7, 23), /* PWEN */
+@@ -3777,6 +4031,34 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(sdhi2_ctrl),
+ SH_PFC_PIN_GROUP(sdhi2_cd),
+ SH_PFC_PIN_GROUP(sdhi2_wp),
++ SH_PFC_PIN_GROUP(ssi0_data),
++ SH_PFC_PIN_GROUP(ssi0_data_b),
++ SH_PFC_PIN_GROUP(ssi0129_ctrl),
++ SH_PFC_PIN_GROUP(ssi0129_ctrl_b),
++ SH_PFC_PIN_GROUP(ssi1_data),
++ SH_PFC_PIN_GROUP(ssi1_data_b),
++ SH_PFC_PIN_GROUP(ssi1_ctrl),
++ SH_PFC_PIN_GROUP(ssi1_ctrl_b),
++ SH_PFC_PIN_GROUP(ssi2_data),
++ SH_PFC_PIN_GROUP(ssi2_ctrl),
++ SH_PFC_PIN_GROUP(ssi3_data),
++ SH_PFC_PIN_GROUP(ssi34_ctrl),
++ SH_PFC_PIN_GROUP(ssi4_data),
++ SH_PFC_PIN_GROUP(ssi4_ctrl),
++ SH_PFC_PIN_GROUP(ssi5_data),
++ SH_PFC_PIN_GROUP(ssi5_ctrl),
++ SH_PFC_PIN_GROUP(ssi6_data),
++ SH_PFC_PIN_GROUP(ssi6_ctrl),
++ SH_PFC_PIN_GROUP(ssi7_data),
++ SH_PFC_PIN_GROUP(ssi7_data_b),
++ SH_PFC_PIN_GROUP(ssi78_ctrl),
++ SH_PFC_PIN_GROUP(ssi78_ctrl_b),
++ SH_PFC_PIN_GROUP(ssi8_data),
++ SH_PFC_PIN_GROUP(ssi8_data_b),
++ SH_PFC_PIN_GROUP(ssi9_data),
++ SH_PFC_PIN_GROUP(ssi9_data_b),
++ SH_PFC_PIN_GROUP(ssi9_ctrl),
++ SH_PFC_PIN_GROUP(ssi9_ctrl_b),
+ SH_PFC_PIN_GROUP(usb0),
+ SH_PFC_PIN_GROUP(usb1),
+ VIN_DATA_PIN_GROUP(vin0_data, 24),
+@@ -4120,6 +4402,37 @@ static const char * const sdhi2_groups[] = {
+ "sdhi2_wp",
+ };
+
++static const char * const ssi_groups[] = {
++ "ssi0_data",
++ "ssi0_data_b",
++ "ssi0129_ctrl",
++ "ssi0129_ctrl_b",
++ "ssi1_data",
++ "ssi1_data_b",
++ "ssi1_ctrl",
++ "ssi1_ctrl_b",
++ "ssi2_data",
++ "ssi2_ctrl",
++ "ssi3_data",
++ "ssi34_ctrl",
++ "ssi4_data",
++ "ssi4_ctrl",
++ "ssi5_data",
++ "ssi5_ctrl",
++ "ssi6_data",
++ "ssi6_ctrl",
++ "ssi7_data",
++ "ssi7_data_b",
++ "ssi78_ctrl",
++ "ssi78_ctrl_b",
++ "ssi8_data",
++ "ssi8_data_b",
++ "ssi9_data",
++ "ssi9_data_b",
++ "ssi9_ctrl",
++ "ssi9_ctrl_b",
++};
++
+ static const char * const usb0_groups[] = {
+ "usb0",
+ };
+@@ -4204,6 +4517,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(sdhi0),
+ SH_PFC_FUNCTION(sdhi1),
+ SH_PFC_FUNCTION(sdhi2),
++ SH_PFC_FUNCTION(ssi),
+ SH_PFC_FUNCTION(usb0),
+ SH_PFC_FUNCTION(usb1),
+ SH_PFC_FUNCTION(vin0),
+--
+2.1.2
+
--- /dev/null
+From 809f30fc07b5882aa87964f899dad9255a902422 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 13 Apr 2014 17:24:04 -0700
+Subject: sh-pfc: r8a7791: Add Audio pin support
+
+Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit c57a05b0eb0ee0205b34f2694b035afc75fa71e4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 61 ++++++++++++++++++++++++++++++++++++
+ 1 file changed, 61 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+index c1c6dfec3f8e..2e688dc4a3c8 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+@@ -1680,6 +1680,53 @@ static const struct sh_pfc_pin pinmux_pins[] = {
+ PINMUX_GPIO_GP_ALL(),
+ };
+
++/* - Audio Clock ------------------------------------------------------------ */
++static const unsigned int audio_clk_a_pins[] = {
++ /* CLK */
++ RCAR_GP_PIN(2, 28),
++};
++
++static const unsigned int audio_clk_a_mux[] = {
++ AUDIO_CLKA_MARK,
++};
++
++static const unsigned int audio_clk_b_pins[] = {
++ /* CLK */
++ RCAR_GP_PIN(2, 29),
++};
++
++static const unsigned int audio_clk_b_mux[] = {
++ AUDIO_CLKB_MARK,
++};
++
++static const unsigned int audio_clk_b_b_pins[] = {
++ /* CLK */
++ RCAR_GP_PIN(7, 20),
++};
++
++static const unsigned int audio_clk_b_b_mux[] = {
++ AUDIO_CLKB_B_MARK,
++};
++
++static const unsigned int audio_clk_c_pins[] = {
++ /* CLK */
++ RCAR_GP_PIN(2, 30),
++};
++
++static const unsigned int audio_clk_c_mux[] = {
++ AUDIO_CLKC_MARK,
++};
++
++static const unsigned int audio_clkout_pins[] = {
++ /* CLK */
++ RCAR_GP_PIN(2, 31),
++};
++
++static const unsigned int audio_clkout_mux[] = {
++ AUDIO_CLKOUT_MARK,
++};
++
++
+ /* - DU --------------------------------------------------------------------- */
+ static const unsigned int du_rgb666_pins[] = {
+ /* R[7:2], G[7:2], B[7:2] */
+@@ -3817,6 +3864,11 @@ static const unsigned int vin2_clk_mux[] = {
+ };
+
+ static const struct sh_pfc_pin_group pinmux_groups[] = {
++ SH_PFC_PIN_GROUP(audio_clk_a),
++ SH_PFC_PIN_GROUP(audio_clk_b),
++ SH_PFC_PIN_GROUP(audio_clk_b_b),
++ SH_PFC_PIN_GROUP(audio_clk_c),
++ SH_PFC_PIN_GROUP(audio_clkout),
+ SH_PFC_PIN_GROUP(du_rgb666),
+ SH_PFC_PIN_GROUP(du_rgb888),
+ SH_PFC_PIN_GROUP(du_clk_out_0),
+@@ -4095,6 +4147,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(vin2_clk),
+ };
+
++static const char * const audio_clk_groups[] = {
++ "audio_clk_a",
++ "audio_clk_b",
++ "audio_clk_b_b",
++ "audio_clk_c",
++ "audio_clkout",
++};
++
+ static const char * const du_groups[] = {
+ "du_rgb666",
+ "du_rgb888",
+@@ -4482,6 +4542,7 @@ static const char * const vin2_groups[] = {
+ };
+
+ static const struct sh_pfc_function pinmux_functions[] = {
++ SH_PFC_FUNCTION(audio_clk),
+ SH_PFC_FUNCTION(du),
+ SH_PFC_FUNCTION(du0),
+ SH_PFC_FUNCTION(du1),
+--
+2.1.2
+
--- /dev/null
+From 4644433a2dc9cf2bc23180d467b7f9b3163db292 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa@sang-engineering.com>
+Date: Tue, 25 Mar 2014 19:56:25 +0100
+Subject: pinctrl: pfc: r8a7790: add i2c0 muxing
+
+Add the muxing for the last missing i2c rcar core. Fix the sorting for
+SH_PFC_PIN_NAMED while we are here.
+
+Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit 35a493de0daf4955b6d15d488b3f8754d4637a04)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 22 +++++++++++++++++++++-
+ 1 file changed, 21 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+index f5cd3f961808..88b91cd47a87 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+@@ -782,6 +782,7 @@ enum {
+ USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK,
+ TCLK1_B_MARK,
+
++ I2C0_SCL_MARK, I2C0_SDA_MARK,
+ I2C3_SCL_MARK, I2C3_SDA_MARK,
+ PINMUX_MARK_END,
+ };
+@@ -1722,6 +1723,9 @@ static const u16 pinmux_data[] = {
+ PINMUX_IPSR_DATA(IP16_7, USB1_OVC),
+ PINMUX_IPSR_MODSEL_DATA(IP16_7, TCLK1_B, SEL_TMU1_1),
+
++ PINMUX_DATA(I2C0_SCL_MARK, FN_SEL_IIC0_1),
++ PINMUX_DATA(I2C0_SDA_MARK, FN_SEL_IIC0_1),
++
+ PINMUX_DATA(I2C3_SCL_MARK, FN_SEL_IICDVFS_1),
+ PINMUX_DATA(I2C3_SDA_MARK, FN_SEL_IICDVFS_1),
+ };
+@@ -1735,8 +1739,10 @@ static const struct sh_pfc_pin pinmux_pins[] = {
+ PINMUX_GPIO_GP_ALL(),
+
+ /* Pins not associated with a GPIO port */
+- SH_PFC_PIN_NAMED(ROW_GROUP_A('J'), 15, AJ15),
++ SH_PFC_PIN_NAMED(ROW_GROUP_A('F'), 15, AF15),
++ SH_PFC_PIN_NAMED(ROW_GROUP_A('G'), 15, AG15),
+ SH_PFC_PIN_NAMED(ROW_GROUP_A('H'), 15, AH15),
++ SH_PFC_PIN_NAMED(ROW_GROUP_A('J'), 15, AJ15),
+ };
+
+ /* - AUDIO CLOCK ------------------------------------------------------------ */
+@@ -2054,6 +2060,14 @@ static const unsigned int hscif1_ctrl_b_pins[] = {
+ static const unsigned int hscif1_ctrl_b_mux[] = {
+ HRTS1_N_B_MARK, HCTS1_N_B_MARK,
+ };
++/* - I2C0 ------------------------------------------------------------------- */
++static const unsigned int i2c0_pins[] = {
++ /* SCL, SDA */
++ PIN_A_NUMBER('G', 15), PIN_A_NUMBER('F', 15),
++};
++static const unsigned int i2c0_mux[] = {
++ I2C0_SCL_MARK, I2C0_SDA_MARK,
++};
+ /* - I2C1 ------------------------------------------------------------------- */
+ static const unsigned int i2c1_pins[] = {
+ /* SCL, SDA */
+@@ -3757,6 +3771,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(hscif1_data_b),
+ SH_PFC_PIN_GROUP(hscif1_clk_b),
+ SH_PFC_PIN_GROUP(hscif1_ctrl_b),
++ SH_PFC_PIN_GROUP(i2c0),
+ SH_PFC_PIN_GROUP(i2c1),
+ SH_PFC_PIN_GROUP(i2c1_b),
+ SH_PFC_PIN_GROUP(i2c1_c),
+@@ -4044,6 +4059,10 @@ static const char * const hscif1_groups[] = {
+ "hscif1_ctrl_b",
+ };
+
++static const char * const i2c0_groups[] = {
++ "i2c0",
++};
++
+ static const char * const i2c1_groups[] = {
+ "i2c1",
+ "i2c1_b",
+@@ -4373,6 +4392,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(eth),
+ SH_PFC_FUNCTION(hscif0),
+ SH_PFC_FUNCTION(hscif1),
++ SH_PFC_FUNCTION(i2c0),
+ SH_PFC_FUNCTION(i2c1),
+ SH_PFC_FUNCTION(i2c2),
+ SH_PFC_FUNCTION(i2c3),
+--
+2.1.2
+
--- /dev/null
+From f058260ddce247b77c28b5b5f16c5db8bf75a9e5 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa@sang-engineering.com>
+Date: Tue, 25 Mar 2014 19:56:26 +0100
+Subject: pinctrl: pfc: r8a7790: add mux data for IIC(B) cores
+
+Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit a16b81dcbfc5889c37dac5f8e836136e4740fc18)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 118 ++++++++++++++++++++++++++++++++++-
+ 1 file changed, 116 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+index 88b91cd47a87..9a179c94b4dc 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+@@ -782,8 +782,8 @@ enum {
+ USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK,
+ TCLK1_B_MARK,
+
+- I2C0_SCL_MARK, I2C0_SDA_MARK,
+- I2C3_SCL_MARK, I2C3_SDA_MARK,
++ IIC0_SCL_MARK, IIC0_SDA_MARK, I2C0_SCL_MARK, I2C0_SDA_MARK,
++ IIC3_SCL_MARK, IIC3_SDA_MARK, I2C3_SCL_MARK, I2C3_SDA_MARK,
+ PINMUX_MARK_END,
+ };
+
+@@ -1723,9 +1723,13 @@ static const u16 pinmux_data[] = {
+ PINMUX_IPSR_DATA(IP16_7, USB1_OVC),
+ PINMUX_IPSR_MODSEL_DATA(IP16_7, TCLK1_B, SEL_TMU1_1),
+
++ PINMUX_DATA(IIC0_SCL_MARK, FN_SEL_IIC0_0),
++ PINMUX_DATA(IIC0_SDA_MARK, FN_SEL_IIC0_0),
+ PINMUX_DATA(I2C0_SCL_MARK, FN_SEL_IIC0_1),
+ PINMUX_DATA(I2C0_SDA_MARK, FN_SEL_IIC0_1),
+
++ PINMUX_DATA(IIC3_SCL_MARK, FN_SEL_IICDVFS_0),
++ PINMUX_DATA(IIC3_SDA_MARK, FN_SEL_IICDVFS_0),
+ PINMUX_DATA(I2C3_SCL_MARK, FN_SEL_IICDVFS_1),
+ PINMUX_DATA(I2C3_SDA_MARK, FN_SEL_IICDVFS_1),
+ };
+@@ -2134,6 +2138,80 @@ static const unsigned int i2c3_pins[] = {
+ static const unsigned int i2c3_mux[] = {
+ I2C3_SCL_MARK, I2C3_SDA_MARK,
+ };
++/* - IIC0 (I2C4) ------------------------------------------------------------ */
++static const unsigned int iic0_pins[] = {
++ /* SCL, SDA */
++ PIN_A_NUMBER('G', 15), PIN_A_NUMBER('F', 15),
++};
++static const unsigned int iic0_mux[] = {
++ IIC0_SCL_MARK, IIC0_SDA_MARK,
++};
++/* - IIC1 (I2C5) ------------------------------------------------------------ */
++static const unsigned int iic1_pins[] = {
++ /* SCL, SDA */
++ RCAR_GP_PIN(1, 16), RCAR_GP_PIN(1, 17),
++};
++static const unsigned int iic1_mux[] = {
++ IIC1_SCL_MARK, IIC1_SDA_MARK,
++};
++static const unsigned int iic1_b_pins[] = {
++ /* SCL, SDA */
++ RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
++};
++static const unsigned int iic1_b_mux[] = {
++ IIC1_SCL_B_MARK, IIC1_SDA_B_MARK,
++};
++static const unsigned int iic1_c_pins[] = {
++ /* SCL, SDA */
++ RCAR_GP_PIN(4, 30), RCAR_GP_PIN(4, 27),
++};
++static const unsigned int iic1_c_mux[] = {
++ IIC1_SCL_C_MARK, IIC1_SDA_C_MARK,
++};
++/* - IIC2 (I2C6) ------------------------------------------------------------ */
++static const unsigned int iic2_pins[] = {
++ /* SCL, SDA */
++ RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
++};
++static const unsigned int iic2_mux[] = {
++ IIC2_SCL_MARK, IIC2_SDA_MARK,
++};
++static const unsigned int iic2_b_pins[] = {
++ /* SCL, SDA */
++ RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1),
++};
++static const unsigned int iic2_b_mux[] = {
++ IIC2_SCL_B_MARK, IIC2_SDA_B_MARK,
++};
++static const unsigned int iic2_c_pins[] = {
++ /* SCL, SDA */
++ RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7),
++};
++static const unsigned int iic2_c_mux[] = {
++ IIC2_SCL_C_MARK, IIC2_SDA_C_MARK,
++};
++static const unsigned int iic2_d_pins[] = {
++ /* SCL, SDA */
++ RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15),
++};
++static const unsigned int iic2_d_mux[] = {
++ IIC2_SCL_D_MARK, IIC2_SDA_D_MARK,
++};
++static const unsigned int iic2_e_pins[] = {
++ /* SCL, SDA */
++ RCAR_GP_PIN(2, 18), RCAR_GP_PIN(2, 19),
++};
++static const unsigned int iic2_e_mux[] = {
++ IIC2_SCL_E_MARK, IIC2_SDA_E_MARK,
++};
++/* - IIC3 (I2C7) ------------------------------------------------------------ */
++static const unsigned int iic3_pins[] = {
++/* SCL, SDA */
++ PIN_A_NUMBER('J', 15), PIN_A_NUMBER('H', 15),
++};
++static const unsigned int iic3_mux[] = {
++ IIC3_SCL_MARK, IIC3_SDA_MARK,
++};
+ /* - INTC ------------------------------------------------------------------- */
+ static const unsigned int intc_irq0_pins[] = {
+ /* IRQ */
+@@ -3781,6 +3859,16 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(i2c2_d),
+ SH_PFC_PIN_GROUP(i2c2_e),
+ SH_PFC_PIN_GROUP(i2c3),
++ SH_PFC_PIN_GROUP(iic0),
++ SH_PFC_PIN_GROUP(iic1),
++ SH_PFC_PIN_GROUP(iic1_b),
++ SH_PFC_PIN_GROUP(iic1_c),
++ SH_PFC_PIN_GROUP(iic2),
++ SH_PFC_PIN_GROUP(iic2_b),
++ SH_PFC_PIN_GROUP(iic2_c),
++ SH_PFC_PIN_GROUP(iic2_d),
++ SH_PFC_PIN_GROUP(iic2_e),
++ SH_PFC_PIN_GROUP(iic3),
+ SH_PFC_PIN_GROUP(intc_irq0),
+ SH_PFC_PIN_GROUP(intc_irq1),
+ SH_PFC_PIN_GROUP(intc_irq2),
+@@ -4081,6 +4169,28 @@ static const char * const i2c3_groups[] = {
+ "i2c3",
+ };
+
++static const char * const iic0_groups[] = {
++ "iic0",
++};
++
++static const char * const iic1_groups[] = {
++ "iic1",
++ "iic1_b",
++ "iic1_c",
++};
++
++static const char * const iic2_groups[] = {
++ "iic2",
++ "iic2_b",
++ "iic2_c",
++ "iic2_d",
++ "iic2_e",
++};
++
++static const char * const iic3_groups[] = {
++ "iic3",
++};
++
+ static const char * const intc_groups[] = {
+ "intc_irq0",
+ "intc_irq1",
+@@ -4396,6 +4506,10 @@ static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(i2c1),
+ SH_PFC_FUNCTION(i2c2),
+ SH_PFC_FUNCTION(i2c3),
++ SH_PFC_FUNCTION(iic0),
++ SH_PFC_FUNCTION(iic1),
++ SH_PFC_FUNCTION(iic2),
++ SH_PFC_FUNCTION(iic3),
+ SH_PFC_FUNCTION(intc),
+ SH_PFC_FUNCTION(mmc0),
+ SH_PFC_FUNCTION(mmc1),
+--
+2.1.2
+
--- /dev/null
+From 6a01819234d02e985297cfc6d5536a93d7b0300f Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 13 May 2014 13:37:46 +0200
+Subject: pinctrl: sh-pfc: Don't set the pinmux_irq irq field for multiplatform
+
+In the multiplatform kernel case the IRQs associated with the PFC GPIOs
+are specified through DT. The pinmux_irq irq field is thus ignored by
+the code, and doesn't need to be set.
+
+This will allow removing the mach/irq.h include from pfc-*.c files that
+was required for the irq_pin() macro used to initialize the irq field.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit 0e26e8dfb9dddb0559fb7cd7b53a8b497a8d4121)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/sh_pfc.h | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
+index ab8fd258d9ed..d482c40b012a 100644
+--- a/drivers/pinctrl/sh-pfc/sh_pfc.h
++++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
+@@ -98,8 +98,13 @@ struct pinmux_irq {
+ const short *gpios;
+ };
+
++#ifdef CONFIG_ARCH_MULTIPLATFORM
++#define PINMUX_IRQ(irq_nr, ids...) \
++ { .gpios = (const short []) { ids, -1 } }
++#else
+ #define PINMUX_IRQ(irq_nr, ids...) \
+ { .irq = irq_nr, .gpios = (const short []) { ids, -1 } }
++#endif
+
+ struct pinmux_range {
+ u16 begin;
+--
+2.1.2
+
--- /dev/null
+From c486b07f0c39542291c5d5815312500ab15dd7b5 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Tue, 13 May 2014 13:37:47 +0200
+Subject: pinctrl: sh-pfc: r8a7740: Allow Multiplatform Build
+
+Add #ifdefs to allow r8a7740 Multiplatform build. Needed
+to enable r8a7740 Multiplatform support.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit b6c996a295620b67e4033f2eb07e5a5cf9e7a48f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
+index 6c83ce43a940..e4c1ef477053 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
+@@ -22,7 +22,9 @@
+ #include <linux/kernel.h>
+ #include <linux/pinctrl/pinconf-generic.h>
+
++#ifndef CONFIG_ARCH_MULTIPLATFORM
+ #include <mach/irqs.h>
++#endif
+
+ #include "core.h"
+ #include "sh_pfc.h"
+--
+2.1.2
+
--- /dev/null
+From 02dc6a2a08769384391a5522a98008632e7c1cf4 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Tue, 13 May 2014 13:37:48 +0200
+Subject: pinctrl: sh-pfc: sh73a0: Allow Multiplatform Build
+
+Add #ifdefs to allow sh73a0 Multiplatform build. Needed
+to enable sh73a0 Multiplatform support.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit 672d32377494b84d6af483ce46eda07baba4e3ea)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/pfc-sh73a0.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
+index 6f6ba100994d..ee370de4609a 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
++++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
+@@ -26,7 +26,9 @@
+ #include <linux/regulator/machine.h>
+ #include <linux/slab.h>
+
++#ifndef CONFIG_ARCH_MULTIPLATFORM
+ #include <mach/irqs.h>
++#endif
+
+ #include "core.h"
+ #include "sh_pfc.h"
+--
+2.1.2
+
--- /dev/null
+From dbd79dca93c1b26a6c860d0d494e6aac8e914b31 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Tue, 13 May 2014 13:37:49 +0200
+Subject: pinctrl: sh-pfc: r8a73a4: Allow Multiplatform Build
+
+Add #ifdefs to allow r8a73a4 Multiplatform build. Needed
+to enable r8a73a4 Multiplatform support.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit f39d8a72feb073c4ef6296f1d12cedf2ed572bfb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pinctrl/sh-pfc/pfc-r8a73a4.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
+index d39ca87353e4..ce9fb7aa8ba3 100644
+--- a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
++++ b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
+@@ -20,7 +20,10 @@
+ #include <linux/io.h>
+ #include <linux/kernel.h>
+ #include <linux/pinctrl/pinconf-generic.h>
++
++#ifndef CONFIG_ARCH_MULTIPLATFORM
+ #include <mach/irqs.h>
++#endif
+
+ #include "core.h"
+ #include "sh_pfc.h"
+--
+2.1.2
+
--- /dev/null
+From 79ee30c3c8fa546e755482f15daf95639e4b8fb3 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 24 Apr 2014 15:54:44 +0900
+Subject: serial: sh-sci: Add device tree support for r8a7779
+
+According to the platform data for the legacy-C initialisation of sh-sci
+for the r8a7779 SoC and my own testing the SCIx_SH4_SCIF_REGTYPE bit of
+scscr needs to be set.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit fcbee4d49f30eb0eaa83a62e6a3cab5a892ed93f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ .../devicetree/bindings/serial/renesas,sci-serial.txt | 1 +
+ drivers/tty/serial/sh-sci.c | 10 +++++++++-
+ 2 files changed, 10 insertions(+), 1 deletion(-)
+
+diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
+index 53e6c175db6c..bba86de1a094 100644
+--- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
++++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
+@@ -12,6 +12,7 @@ Required properties:
+ - "renesas,scifa-r8a7791" for R8A7791 (R-Car M2) SCIFA compatible UART.
+ - "renesas,scifb-r8a7791" for R8A7791 (R-Car M2) SCIFB compatible UART.
+ - "renesas,hscif-r8a7791" for R8A7791 (R-Car M2) HSCIF compatible UART.
++ - "renesas,scif-r8a7779" for R8A7779 (R-Car H1) SCIF compatible UART.
+ - "renesas,scif" for generic SCIF compatible UART.
+ - "renesas,scifa" for generic SCIFA compatible UART.
+ - "renesas,scifb" for generic SCIFB compatible UART.
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index 88236da0ddf7..3b5d2f679946 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -2419,6 +2419,7 @@ static int sci_remove(struct platform_device *dev)
+ struct sci_port_info {
+ unsigned int type;
+ unsigned int regtype;
++ unsigned int scscr_extra;
+ };
+
+ static const struct of_device_id of_sci_match[] = {
+@@ -2429,6 +2430,13 @@ static const struct of_device_id of_sci_match[] = {
+ .regtype = SCIx_SH4_SCIF_REGTYPE,
+ },
+ }, {
++ .compatible = "renesas,scif-r8a7779",
++ .data = (void *)&(const struct sci_port_info) {
++ .type = PORT_SCIF,
++ .regtype = SCIx_SH4_SCIF_REGTYPE,
++ .scscr_extra = SCSCR_CKE1,
++ },
++ }, {
+ .compatible = "renesas,scifa",
+ .data = &(const struct sci_port_info) {
+ .type = PORT_SCIFA,
+@@ -2488,7 +2496,7 @@ sci_parse_dt(struct platform_device *pdev, unsigned int *dev_id)
+ p->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
+ p->type = info->type;
+ p->regtype = info->regtype;
+- p->scscr = SCSCR_RE | SCSCR_TE;
++ p->scscr = SCSCR_RE | SCSCR_TE | info->scscr_extra;
+
+ return p;
+ }
+--
+2.1.2
+
--- /dev/null
+From b1a12fad3a5f04582ae616c913a849fe44d8e1a8 Mon Sep 17 00:00:00 2001
+From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Date: Thu, 24 Apr 2014 19:26:16 -0700
+Subject: Revert "serial: sh-sci: Add device tree support for r8a7779"
+
+This reverts commit fcbee4d49f30eb0eaa83a62e6a3cab5a892ed93f.
+
+It wasn't quite ready to go in yet, sorry about that.
+
+Cc: Simon Horman <horms@verge.net.au>
+Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 2aafb3864b9fa5ce83250537d940f973ef37b8dc)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ .../devicetree/bindings/serial/renesas,sci-serial.txt | 1 -
+ drivers/tty/serial/sh-sci.c | 10 +---------
+ 2 files changed, 1 insertion(+), 10 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
+index bba86de1a094..53e6c175db6c 100644
+--- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
++++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
+@@ -12,7 +12,6 @@ Required properties:
+ - "renesas,scifa-r8a7791" for R8A7791 (R-Car M2) SCIFA compatible UART.
+ - "renesas,scifb-r8a7791" for R8A7791 (R-Car M2) SCIFB compatible UART.
+ - "renesas,hscif-r8a7791" for R8A7791 (R-Car M2) HSCIF compatible UART.
+- - "renesas,scif-r8a7779" for R8A7779 (R-Car H1) SCIF compatible UART.
+ - "renesas,scif" for generic SCIF compatible UART.
+ - "renesas,scifa" for generic SCIFA compatible UART.
+ - "renesas,scifb" for generic SCIFB compatible UART.
+diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
+index 3b5d2f679946..88236da0ddf7 100644
+--- a/drivers/tty/serial/sh-sci.c
++++ b/drivers/tty/serial/sh-sci.c
+@@ -2419,7 +2419,6 @@ static int sci_remove(struct platform_device *dev)
+ struct sci_port_info {
+ unsigned int type;
+ unsigned int regtype;
+- unsigned int scscr_extra;
+ };
+
+ static const struct of_device_id of_sci_match[] = {
+@@ -2430,13 +2429,6 @@ static const struct of_device_id of_sci_match[] = {
+ .regtype = SCIx_SH4_SCIF_REGTYPE,
+ },
+ }, {
+- .compatible = "renesas,scif-r8a7779",
+- .data = (void *)&(const struct sci_port_info) {
+- .type = PORT_SCIF,
+- .regtype = SCIx_SH4_SCIF_REGTYPE,
+- .scscr_extra = SCSCR_CKE1,
+- },
+- }, {
+ .compatible = "renesas,scifa",
+ .data = &(const struct sci_port_info) {
+ .type = PORT_SCIFA,
+@@ -2496,7 +2488,7 @@ sci_parse_dt(struct platform_device *pdev, unsigned int *dev_id)
+ p->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
+ p->type = info->type;
+ p->regtype = info->regtype;
+- p->scscr = SCSCR_RE | SCSCR_TE | info->scscr_extra;
++ p->scscr = SCSCR_RE | SCSCR_TE;
+
+ return p;
+ }
+--
+2.1.2
+
--- /dev/null
+From 88237401dd494fe0feba0a68840b1efb8504b911 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 15 May 2014 20:00:58 +0900
+Subject: serial: sh-sci: Add device tree support for r8a7779
+
+Simply document a new compat string.
+There appears to be no need for a driver updates.
+
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 81bd1eb7af751666ace2f1dadb0b0101401807cd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/serial/renesas,sci-serial.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
+index 53e6c175db6c..64fd7dec1bbc 100644
+--- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
++++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
+@@ -4,6 +4,7 @@ Required properties:
+
+ - compatible: Must contain one of the following:
+
++ - "renesas,scif-r8a7779" for R8A7779 (R-Car H1) SCIF compatible UART.
+ - "renesas,scif-r8a7790" for R8A7790 (R-Car H2) SCIF compatible UART.
+ - "renesas,scifa-r8a7790" for R8A7790 (R-Car H2) SCIFA compatible UART.
+ - "renesas,scifb-r8a7790" for R8A7790 (R-Car H2) SCIFB compatible UART.
+--
+2.1.2
+
--- /dev/null
+From 53dd260142ecffccf9ccefa3d255847f8f089769 Mon Sep 17 00:00:00 2001
+From: Seungwon Jeon <tgih.jun@samsung.com>
+Date: Fri, 14 Mar 2014 21:11:56 +0900
+Subject: mmc: clarify DDR timing mode between SD-UHS and eMMC
+
+This change distinguishes DDR timing mode of current
+mixed usage to clarify device type.
+
+Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
+Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Chris Ball <chris@printf.net>
+(cherry picked from commit 79f7ae7c45a6ccf04e2908337461dee615f6afb0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/mmc/core/debugfs.c | 3 +++
+ drivers/mmc/core/mmc.c | 2 +-
+ include/linux/mmc/host.h | 3 ++-
+ 3 files changed, 6 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/mmc/core/debugfs.c b/drivers/mmc/core/debugfs.c
+index 54829c0ed000..509229b48b55 100644
+--- a/drivers/mmc/core/debugfs.c
++++ b/drivers/mmc/core/debugfs.c
+@@ -135,6 +135,9 @@ static int mmc_ios_show(struct seq_file *s, void *data)
+ case MMC_TIMING_UHS_DDR50:
+ str = "sd uhs DDR50";
+ break;
++ case MMC_TIMING_MMC_DDR52:
++ str = "mmc DDR52";
++ break;
+ case MMC_TIMING_MMC_HS200:
+ str = "mmc high-speed SDR200";
+ break;
+diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
+index 98e9eb0f6643..6d91ff76f246 100644
+--- a/drivers/mmc/core/mmc.c
++++ b/drivers/mmc/core/mmc.c
+@@ -1261,7 +1261,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
+ goto err;
+ }
+ mmc_card_set_ddr_mode(card);
+- mmc_set_timing(card->host, MMC_TIMING_UHS_DDR50);
++ mmc_set_timing(card->host, MMC_TIMING_MMC_DDR52);
+ mmc_set_bus_width(card->host, bus_width);
+ }
+ }
+diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
+index 99f5709ac343..87b1f4f2fe79 100644
+--- a/include/linux/mmc/host.h
++++ b/include/linux/mmc/host.h
+@@ -58,7 +58,8 @@ struct mmc_ios {
+ #define MMC_TIMING_UHS_SDR50 5
+ #define MMC_TIMING_UHS_SDR104 6
+ #define MMC_TIMING_UHS_DDR50 7
+-#define MMC_TIMING_MMC_HS200 8
++#define MMC_TIMING_MMC_DDR52 8
++#define MMC_TIMING_MMC_HS200 9
+
+ #define MMC_SDR_MODE 0
+ #define MMC_1_2V_DDR_MODE 1
+--
+2.1.2
+
--- /dev/null
+From 17d84a3a4c31e154d5593a63ad6cb1ee5dfe2fd9 Mon Sep 17 00:00:00 2001
+From: Seungwon Jeon <tgih.jun@samsung.com>
+Date: Fri, 14 Mar 2014 21:12:33 +0900
+Subject: mmc: sh_mmcif: clarify DDR timing mode between SD-UHS and eMMC
+
+Replaced UHS_DDR50 with MMC_DDR52.
+
+CC: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Chris Ball <chris@printf.net>
+(cherry picked from commit 4039ff4741c6e8d27b5ca42dc92d87dc2d625b80)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/mmc/host/sh_mmcif.c | 9 +++++----
+ 1 file changed, 5 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
+index 54730f4aac87..656fbba4c422 100644
+--- a/drivers/mmc/host/sh_mmcif.c
++++ b/drivers/mmc/host/sh_mmcif.c
+@@ -803,12 +803,13 @@ static u32 sh_mmcif_set_cmd(struct sh_mmcif_host *host,
+ break;
+ }
+ switch (host->timing) {
+- case MMC_TIMING_UHS_DDR50:
++ case MMC_TIMING_MMC_DDR52:
+ /*
+ * MMC core will only set this timing, if the host
+- * advertises the MMC_CAP_UHS_DDR50 capability. MMCIF
+- * implementations with this capability, e.g. sh73a0,
+- * will have to set it in their platform data.
++ * advertises the MMC_CAP_1_8V_DDR/MMC_CAP_1_2V_DDR
++ * capability. MMCIF implementations with this
++ * capability, e.g. sh73a0, will have to set it
++ * in their platform data.
+ */
+ tmp |= CMD_SET_DARS;
+ break;
+--
+2.1.2
+
--- /dev/null
+From 146b625d1e94f4a2a7c3956a524d6eecb87c43ef Mon Sep 17 00:00:00 2001
+From: Stratos Karafotis <stratosk@semaphore.gr>
+Date: Fri, 25 Apr 2014 23:15:23 +0300
+Subject: cpufreq: Introduce macros for cpufreq_frequency_table iteration
+
+Many cpufreq drivers need to iterate over the cpufreq_frequency_table
+for various tasks.
+
+This patch introduces two macros which can be used for iteration over
+cpufreq_frequency_table keeping a common coding style across drivers:
+
+- cpufreq_for_each_entry: iterate over each entry of the table
+- cpufreq_for_each_valid_entry: iterate over each entry that contains
+a valid frequency.
+
+It should have no functional changes.
+
+Signed-off-by: Stratos Karafotis <stratosk@semaphore.gr>
+Acked-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
+Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+(cherry picked from commit 27e289dce29764e488c1e13e9aa6950cad1f4aab)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/cpu-freq/cpu-drivers.txt | 19 +++++++++++++++++++
+ drivers/cpufreq/cpufreq.c | 11 +++++++++++
+ include/linux/cpufreq.h | 21 +++++++++++++++++++++
+ 3 files changed, 51 insertions(+)
+
+diff --git a/Documentation/cpu-freq/cpu-drivers.txt b/Documentation/cpu-freq/cpu-drivers.txt
+index 8b1a4451422e..d3cb4d3d9bb2 100644
+--- a/Documentation/cpu-freq/cpu-drivers.txt
++++ b/Documentation/cpu-freq/cpu-drivers.txt
+@@ -222,3 +222,22 @@ is the corresponding frequency table helper for the ->target
+ stage. Just pass the values to this function, and the unsigned int
+ index returns the number of the frequency table entry which contains
+ the frequency the CPU shall be set to.
++
++The following macros can be used as iterators over cpufreq_frequency_table:
++
++cpufreq_for_each_entry(pos, table) - iterates over all entries of frequency
++table.
++
++cpufreq-for_each_valid_entry(pos, table) - iterates over all entries,
++excluding CPUFREQ_ENTRY_INVALID frequencies.
++Use arguments "pos" - a cpufreq_frequency_table * as a loop cursor and
++"table" - the cpufreq_frequency_table * you want to iterate over.
++
++For example:
++
++ struct cpufreq_frequency_table *pos, *driver_freq_table;
++
++ cpufreq_for_each_entry(pos, driver_freq_table) {
++ /* Do something with pos */
++ pos->frequency = ...
++ }
+diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
+index dc1447dc173e..e9ab2efcc37f 100644
+--- a/drivers/cpufreq/cpufreq.c
++++ b/drivers/cpufreq/cpufreq.c
+@@ -230,6 +230,17 @@ void cpufreq_cpu_put(struct cpufreq_policy *policy)
+ }
+ EXPORT_SYMBOL_GPL(cpufreq_cpu_put);
+
++bool cpufreq_next_valid(struct cpufreq_frequency_table **pos)
++{
++ while ((*pos)->frequency != CPUFREQ_TABLE_END)
++ if ((*pos)->frequency != CPUFREQ_ENTRY_INVALID)
++ return true;
++ else
++ (*pos)++;
++ return false;
++}
++EXPORT_SYMBOL_GPL(cpufreq_next_valid);
++
+ /*********************************************************************
+ * EXTERNALLY AFFECTING FREQUENCY CHANGES *
+ *********************************************************************/
+diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
+index 945313ca4bbf..e8d7b6b7e3b7 100644
+--- a/include/linux/cpufreq.h
++++ b/include/linux/cpufreq.h
+@@ -446,6 +446,27 @@ struct cpufreq_frequency_table {
+ * order */
+ };
+
++bool cpufreq_next_valid(struct cpufreq_frequency_table **pos);
++
++/*
++ * cpufreq_for_each_entry - iterate over a cpufreq_frequency_table
++ * @pos: the cpufreq_frequency_table * to use as a loop cursor.
++ * @table: the cpufreq_frequency_table * to iterate over.
++ */
++
++#define cpufreq_for_each_entry(pos, table) \
++ for (pos = table; pos->frequency != CPUFREQ_TABLE_END; pos++)
++
++/*
++ * cpufreq_for_each_valid_entry - iterate over a cpufreq_frequency_table
++ * excluding CPUFREQ_ENTRY_INVALID frequencies.
++ * @pos: the cpufreq_frequency_table * to use as a loop cursor.
++ * @table: the cpufreq_frequency_table * to iterate over.
++ */
++
++#define cpufreq_for_each_valid_entry(pos, table) \
++ for (pos = table; cpufreq_next_valid(&pos); pos++)
++
+ int cpufreq_frequency_table_cpuinfo(struct cpufreq_policy *policy,
+ struct cpufreq_frequency_table *table);
+
+--
+2.1.2
+
--- /dev/null
+From 160eb115968fb6d59993e8c5d196cca87268eae0 Mon Sep 17 00:00:00 2001
+From: Stratos Karafotis <stratosk@semaphore.gr>
+Date: Wed, 7 May 2014 19:33:33 +0300
+Subject: cpufreq: Fix build error on some platforms that use
+ cpufreq_for_each_*
+
+On platforms that use cpufreq_for_each_* macros, build fails if
+CONFIG_CPU_FREQ=n, e.g. ARM/shmobile/koelsch/non-multiplatform:
+
+drivers/built-in.o: In function `clk_round_parent':
+clkdev.c:(.text+0xcf168): undefined reference to `cpufreq_next_valid'
+drivers/built-in.o: In function `clk_rate_table_find':
+clkdev.c:(.text+0xcf820): undefined reference to `cpufreq_next_valid'
+make[3]: *** [vmlinux] Error 1
+
+Fix this making cpufreq_next_valid function inline and move it to
+cpufreq.h.
+
+Fixes: 27e289dce297 (cpufreq: Introduce macros for cpufreq_frequency_table iteration)
+Reported-and-tested-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Stratos Karafotis <stratosk@semaphore.gr>
+Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+(cherry picked from commit 5eeaf1f1897372590105f155c6a7110b3fa36aef)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+Conflicts:
+ include/linux/cpufreq.h
+---
+ drivers/cpufreq/cpufreq.c | 11 -----------
+ include/linux/cpufreq.h | 10 +++++++++-
+ 2 files changed, 9 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
+index e9ab2efcc37f..dc1447dc173e 100644
+--- a/drivers/cpufreq/cpufreq.c
++++ b/drivers/cpufreq/cpufreq.c
+@@ -230,17 +230,6 @@ void cpufreq_cpu_put(struct cpufreq_policy *policy)
+ }
+ EXPORT_SYMBOL_GPL(cpufreq_cpu_put);
+
+-bool cpufreq_next_valid(struct cpufreq_frequency_table **pos)
+-{
+- while ((*pos)->frequency != CPUFREQ_TABLE_END)
+- if ((*pos)->frequency != CPUFREQ_ENTRY_INVALID)
+- return true;
+- else
+- (*pos)++;
+- return false;
+-}
+-EXPORT_SYMBOL_GPL(cpufreq_next_valid);
+-
+ /*********************************************************************
+ * EXTERNALLY AFFECTING FREQUENCY CHANGES *
+ *********************************************************************/
+diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
+index e8d7b6b7e3b7..c7b85eeaf4f1 100644
+--- a/include/linux/cpufreq.h
++++ b/include/linux/cpufreq.h
+@@ -446,7 +446,15 @@ struct cpufreq_frequency_table {
+ * order */
+ };
+
+-bool cpufreq_next_valid(struct cpufreq_frequency_table **pos);
++static inline bool cpufreq_next_valid(struct cpufreq_frequency_table **pos)
++{
++ while ((*pos)->frequency != CPUFREQ_TABLE_END)
++ if ((*pos)->frequency != CPUFREQ_ENTRY_INVALID)
++ return true;
++ else
++ (*pos)++;
++ return false;
++}
+
+ /*
+ * cpufreq_for_each_entry - iterate over a cpufreq_frequency_table
+--
+2.1.2
+
--- /dev/null
+From ac926e83708bf51d4226e7b0eb932daa8acd0825 Mon Sep 17 00:00:00 2001
+From: Stratos Karafotis <stratosk@semaphore.gr>
+Date: Fri, 25 Apr 2014 23:16:58 +0300
+Subject: sh: clk: Use cpufreq_for_each_valid_entry macro for iteration
+
+The cpufreq core now supports the cpufreq_for_each_valid_entry macro
+helper for iteration over the cpufreq_frequency_table, so use it.
+
+It should have no functional changes.
+
+Signed-off-by: Stratos Karafotis <stratosk@semaphore.gr>
+Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+(cherry picked from commit 4229e1c61a4a7ac21d5d0790f6add1c9b98d33e7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/sh/clk/core.c | 20 +++++---------------
+ 1 file changed, 5 insertions(+), 15 deletions(-)
+
+diff --git a/drivers/sh/clk/core.c b/drivers/sh/clk/core.c
+index 74727851820d..be56b22ca941 100644
+--- a/drivers/sh/clk/core.c
++++ b/drivers/sh/clk/core.c
+@@ -196,17 +196,11 @@ int clk_rate_table_find(struct clk *clk,
+ struct cpufreq_frequency_table *freq_table,
+ unsigned long rate)
+ {
+- int i;
+-
+- for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
+- unsigned long freq = freq_table[i].frequency;
++ struct cpufreq_frequency_table *pos;
+
+- if (freq == CPUFREQ_ENTRY_INVALID)
+- continue;
+-
+- if (freq == rate)
+- return i;
+- }
++ cpufreq_for_each_valid_entry(pos, freq_table)
++ if (pos->frequency == rate)
++ return pos - freq_table;
+
+ return -ENOENT;
+ }
+@@ -575,11 +569,7 @@ long clk_round_parent(struct clk *clk, unsigned long target,
+ return abs(target - *best_freq);
+ }
+
+- for (freq = parent->freq_table; freq->frequency != CPUFREQ_TABLE_END;
+- freq++) {
+- if (freq->frequency == CPUFREQ_ENTRY_INVALID)
+- continue;
+-
++ cpufreq_for_each_valid_entry(freq, parent->freq_table) {
+ if (unlikely(freq->frequency / target <= div_min - 1)) {
+ unsigned long freq_max;
+
+--
+2.1.2
+
--- /dev/null
+From 25348953d780730e4014b575b6ab0b6aa3ac9b74 Mon Sep 17 00:00:00 2001
+From: Thomas Gleixner <tglx@linutronix.de>
+Date: Wed, 7 May 2014 15:44:18 +0000
+Subject: sh: intc: Remove pointless irq_reserve_irqs() invocation
+
+The preceding call to irq_create_identity_mapping() marks the
+interrupt as allocated already. Remove the leftover.
+
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Reviewed-by: Grant Likely <grant.likely@linaro.org>
+Cc: Tony Luck <tony.luck@intel.com>
+Cc: Peter Zijlstra <peterz@infradead.org>
+Acked-by: Simon Horman <horms@verge.net.au>
+Cc: linux-sh@vger.kernel.org
+Link: http://lkml.kernel.org/r/20140507154339.189047829@linutronix.de
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+(cherry picked from commit 3670802223e164f1089287d1c223d34d3c5dc3da)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/sh/intc/core.c | 6 ------
+ 1 file changed, 6 deletions(-)
+
+diff --git a/drivers/sh/intc/core.c b/drivers/sh/intc/core.c
+index 8f32a1323a79..81f22980b2de 100644
+--- a/drivers/sh/intc/core.c
++++ b/drivers/sh/intc/core.c
+@@ -80,12 +80,6 @@ static void __init intc_register_irq(struct intc_desc *desc,
+ unsigned int data[2], primary;
+ unsigned long flags;
+
+- /*
+- * Register the IRQ position with the global IRQ map, then insert
+- * it in to the radix tree.
+- */
+- irq_reserve_irq(irq);
+-
+ raw_spin_lock_irqsave(&intc_big_lock, flags);
+ radix_tree_insert(&d->tree, enum_id, intc_irq_xlate_get(irq));
+ raw_spin_unlock_irqrestore(&intc_big_lock, flags);
+--
+2.1.2
+
--- /dev/null
+From 04a60ffdac109b0b32da9a2ab484672a6d6a35b4 Mon Sep 17 00:00:00 2001
+From: Ben Dooks <ben.dooks@codethink.co.uk>
+Date: Thu, 22 May 2014 20:00:04 +0200
+Subject: drivers: sh: pm_runtime does not need idle callback
+
+In the runtime_pm idle callback the code assumes that a NULL .runtime_idle
+entry is the same as a .runtime_idle entry that returns 0 as a result. This
+means the entry in drivers/sh/pm_runtime can be removed in favour of just
+leaving the entry NULL.
+
+Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> [r8a7779 legacy]
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit fe95c932a31e7f12bcb6a4e07434462da2ac6e1d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/sh/pm_runtime.c | 8 --------
+ 1 file changed, 8 deletions(-)
+
+diff --git a/drivers/sh/pm_runtime.c b/drivers/sh/pm_runtime.c
+index 10c65eb51f85..00b82ec94442 100644
+--- a/drivers/sh/pm_runtime.c
++++ b/drivers/sh/pm_runtime.c
+@@ -21,18 +21,10 @@
+ #include <linux/slab.h>
+
+ #ifdef CONFIG_PM_RUNTIME
+-
+-static int default_platform_runtime_idle(struct device *dev)
+-{
+- /* suspend synchronously to disable clocks immediately */
+- return 0;
+-}
+-
+ static struct dev_pm_domain default_pm_domain = {
+ .ops = {
+ .runtime_suspend = pm_clk_suspend,
+ .runtime_resume = pm_clk_resume,
+- .runtime_idle = default_platform_runtime_idle,
+ USE_PLATFORM_PM_SLEEP_OPS
+ },
+ };
+--
+2.1.2
+
--- /dev/null
+From 46eaa9c37ba9d183bd5dc4f46f3592d5c4750d25 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 22 May 2014 20:00:06 +0200
+Subject: drivers: sh: Restrict INTC_USERIMASK to SH4A
+
+register_intc_userimask() is called from sh4a code only.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> [r8a7779 legacy]
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 39c5abbc54179998bf04368a11c561e19220d7d4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/sh/intc/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/sh/intc/Kconfig b/drivers/sh/intc/Kconfig
+index f7d90617c9d9..60228fae943f 100644
+--- a/drivers/sh/intc/Kconfig
++++ b/drivers/sh/intc/Kconfig
+@@ -6,7 +6,7 @@ comment "Interrupt controller options"
+
+ config INTC_USERIMASK
+ bool "Userspace interrupt masking support"
+- depends on ARCH_SHMOBILE || (SUPERH && CPU_SH4A) || COMPILE_TEST
++ depends on (SUPERH && CPU_SH4A) || COMPILE_TEST
+ help
+ This enables support for hardware-assisted userspace hardirq
+ masking.
+--
+2.1.2
+
--- /dev/null
+From 20cc8319830f052a7ad06c02a10293111dd9169f Mon Sep 17 00:00:00 2001
+From: Ben Dooks <ben.dooks@codethink.co.uk>
+Date: Thu, 22 May 2014 20:00:05 +0200
+Subject: drivers: sh: pm_runtime implementation needs to suspend and resume
+ devices
+
+If we override the platform bus calls for pm_runtime then we end up
+with the calls to the devices' suspend and resume methods ignored
+in favour of the bus ones.
+
+Change to calling the pm_runtime calls to suspend and resume the
+devices specifically in the drivers/sh/pm_runtime.c implementation
+to allow any device that may want to run power management to do so.
+
+Note, all the current sh driver implementations do not use their
+own power management code so this is not a major implementation
+issues.
+
+This also brings the implementation into line with the versions
+used by the Davinci and Keystone PM domain code, so once fully
+tested these implementations could be merged together.
+
+Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8255fe169232364e5a01bd062e8037b8c1a9adec)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/sh/pm_runtime.c | 37 +++++++++++++++++++++++++++++++++++--
+ 1 file changed, 35 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/sh/pm_runtime.c b/drivers/sh/pm_runtime.c
+index 00b82ec94442..25eafbe4da33 100644
+--- a/drivers/sh/pm_runtime.c
++++ b/drivers/sh/pm_runtime.c
+@@ -21,10 +21,43 @@
+ #include <linux/slab.h>
+
+ #ifdef CONFIG_PM_RUNTIME
++static int sh_pm_runtime_suspend(struct device *dev)
++{
++ int ret;
++
++ ret = pm_generic_runtime_suspend(dev);
++ if (ret) {
++ dev_err(dev, "failed to suspend device\n");
++ return ret;
++ }
++
++ ret = pm_clk_suspend(dev);
++ if (ret) {
++ dev_err(dev, "failed to suspend clock\n");
++ pm_generic_runtime_resume(dev);
++ return ret;
++ }
++
++ return 0;
++}
++
++static int sh_pm_runtime_resume(struct device *dev)
++{
++ int ret;
++
++ ret = pm_clk_resume(dev);
++ if (ret) {
++ dev_err(dev, "failed to resume clock\n");
++ return ret;
++ }
++
++ return pm_generic_runtime_resume(dev);
++}
++
+ static struct dev_pm_domain default_pm_domain = {
+ .ops = {
+- .runtime_suspend = pm_clk_suspend,
+- .runtime_resume = pm_clk_resume,
++ .runtime_suspend = sh_pm_runtime_suspend,
++ .runtime_resume = sh_pm_runtime_resume,
+ USE_PLATFORM_PM_SLEEP_OPS
+ },
+ };
+--
+2.1.2
+
--- /dev/null
+From c511e7c342cc592ee11cd5440ce13b1cd88fdd77 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 27 May 2014 15:45:09 +0200
+Subject: drivers: sh: Enable PM runtime for new R-Car Gen2 SoCs
+
+The PM runtime code should also be enabled for:
+ - r8a7792 (R-Car V2H)
+ - r8a7793 (R-Car M2-N)
+ - r8a7794 (R-Car E2)
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 2f35fb3c8a6018a0a5fe4a7fb0948b853c157256)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/sh/pm_runtime.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/drivers/sh/pm_runtime.c b/drivers/sh/pm_runtime.c
+index 25eafbe4da33..72f63817a1a0 100644
+--- a/drivers/sh/pm_runtime.c
++++ b/drivers/sh/pm_runtime.c
+@@ -88,6 +88,9 @@ static int __init sh_pm_runtime_init(void)
+ !of_machine_is_compatible("renesas,r8a7779") &&
+ !of_machine_is_compatible("renesas,r8a7790") &&
+ !of_machine_is_compatible("renesas,r8a7791") &&
++ !of_machine_is_compatible("renesas,r8a7792") &&
++ !of_machine_is_compatible("renesas,r8a7793") &&
++ !of_machine_is_compatible("renesas,r8a7794") &&
+ !of_machine_is_compatible("renesas,sh7372") &&
+ !of_machine_is_compatible("renesas,sh73a0"))
+ return 0;
+--
+2.1.2
+
--- /dev/null
+From a152d004374199ce599408cd03af1e9b53d3c2fa Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Thu, 22 May 2014 20:07:35 +0200
+Subject: spi: rspi: Round up division to avoid slave overclocking
+
+The calculation of the bit rate divider used a standard C division, which
+rounds down the quotient. This may lead to a higher bitrate than requested.
+Round up to avoid this.
+
+E.g. on Koelsch, the SPI flash (configured for 30 MHz) was driven at 48.75
+MHz. After this patch it's driven at a safe 24.375 MHz.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 3beb61dbfcf188399cbc36ce1eeb8b2ba724de38)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-rspi.c | 8 +++++---
+ 1 file changed, 5 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
+index 1fb0ad213324..5639f9529e0b 100644
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -266,7 +266,8 @@ static int rspi_set_config_register(struct rspi_data *rspi, int access_size)
+ rspi_write8(rspi, rspi->sppcr, RSPI_SPPCR);
+
+ /* Sets transfer bit rate */
+- spbr = clk_get_rate(rspi->clk) / (2 * rspi->max_speed_hz) - 1;
++ spbr = DIV_ROUND_UP(clk_get_rate(rspi->clk),
++ 2 * rspi->max_speed_hz) - 1;
+ rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR);
+
+ /* Disable dummy transmission, set 16-bit word access, 1 frame */
+@@ -302,7 +303,8 @@ static int rspi_rz_set_config_register(struct rspi_data *rspi, int access_size)
+ rspi_write8(rspi, rspi->sppcr, RSPI_SPPCR);
+
+ /* Sets transfer bit rate */
+- spbr = clk_get_rate(rspi->clk) / (2 * rspi->max_speed_hz) - 1;
++ spbr = DIV_ROUND_UP(clk_get_rate(rspi->clk),
++ 2 * rspi->max_speed_hz) - 1;
+ rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR);
+
+ /* Disable dummy transmission, set byte access */
+@@ -335,7 +337,7 @@ static int qspi_set_config_register(struct rspi_data *rspi, int access_size)
+ rspi_write8(rspi, rspi->sppcr, RSPI_SPPCR);
+
+ /* Sets transfer bit rate */
+- spbr = clk_get_rate(rspi->clk) / (2 * rspi->max_speed_hz);
++ spbr = DIV_ROUND_UP(clk_get_rate(rspi->clk), 2 * rspi->max_speed_hz);
+ rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR);
+
+ /* Disable dummy transmission, set byte access */
+--
+2.1.2
+
--- /dev/null
+From eb2c97e62a5b4c9cec3769c42894204c73185e03 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 2 Jun 2014 15:38:03 +0200
+Subject: spi: rspi: Extract rspi_wait_for_{tx_empty,rx_full}()
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 5f684c34fc82be84ece158aa5c5c7c5072daa9a0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-rspi.c | 29 +++++++++++++++++++++--------
+ 1 file changed, 21 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
+index 5639f9529e0b..d04a4acce231 100644
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -405,11 +405,22 @@ static int rspi_wait_for_interrupt(struct rspi_data *rspi, u8 wait_mask,
+ return 0;
+ }
+
++static inline int rspi_wait_for_tx_empty(struct rspi_data *rspi)
++{
++ return rspi_wait_for_interrupt(rspi, SPSR_SPTEF, SPCR_SPTIE);
++}
++
++static inline int rspi_wait_for_rx_full(struct rspi_data *rspi)
++{
++ return rspi_wait_for_interrupt(rspi, SPSR_SPRF, SPCR_SPRIE);
++}
++
+ static int rspi_data_out(struct rspi_data *rspi, u8 data)
+ {
+- if (rspi_wait_for_interrupt(rspi, SPSR_SPTEF, SPCR_SPTIE) < 0) {
++ int error = rspi_wait_for_tx_empty(rspi);
++ if (error < 0) {
+ dev_err(&rspi->master->dev, "transmit timeout\n");
+- return -ETIMEDOUT;
++ return error;
+ }
+ rspi_write_data(rspi, data);
+ return 0;
+@@ -417,11 +428,13 @@ static int rspi_data_out(struct rspi_data *rspi, u8 data)
+
+ static int rspi_data_in(struct rspi_data *rspi)
+ {
++ int error;
+ u8 data;
+
+- if (rspi_wait_for_interrupt(rspi, SPSR_SPRF, SPCR_SPRIE) < 0) {
++ error = rspi_wait_for_rx_full(rspi);
++ if (error < 0) {
+ dev_err(&rspi->master->dev, "receive timeout\n");
+- return -ETIMEDOUT;
++ return error;
+ }
+ data = rspi_read_data(rspi);
+ return data;
+@@ -737,7 +750,7 @@ static int rspi_transfer_out_in(struct rspi_data *rspi,
+ }
+
+ /* Wait for the last transmission */
+- rspi_wait_for_interrupt(rspi, SPSR_SPTEF, SPCR_SPTIE);
++ rspi_wait_for_tx_empty(rspi);
+
+ return 0;
+ }
+@@ -783,7 +796,7 @@ static int rspi_rz_transfer_out_in(struct rspi_data *rspi,
+ }
+
+ /* Wait for the last transmission */
+- rspi_wait_for_interrupt(rspi, SPSR_SPTEF, SPCR_SPTIE);
++ rspi_wait_for_tx_empty(rspi);
+
+ return 0;
+ }
+@@ -818,7 +831,7 @@ static int qspi_transfer_out_in(struct rspi_data *rspi,
+ }
+
+ /* Wait for the last transmission */
+- rspi_wait_for_interrupt(rspi, SPSR_SPTEF, SPCR_SPTIE);
++ rspi_wait_for_tx_empty(rspi);
+
+ return 0;
+ }
+@@ -836,7 +849,7 @@ static int qspi_transfer_out(struct rspi_data *rspi, struct spi_transfer *xfer)
+ }
+
+ /* Wait for the last transmission */
+- rspi_wait_for_interrupt(rspi, SPSR_SPTEF, SPCR_SPTIE);
++ rspi_wait_for_tx_empty(rspi);
+
+ return 0;
+ }
+--
+2.1.2
+
--- /dev/null
+From f61b61466d8a5c9aceaeb18179e7f3ab254560f5 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 2 Jun 2014 15:38:04 +0200
+Subject: spi: rspi: Do not call rspi_receive_init() for TX-only
+
+Since commit 8449fd76deb9ac67a15a6fb8ead7bb4595d019d2 ("spi: rspi: Merge
+rspi_send_pio() and rspi_receive_pio()"), rspi_receive_init() is called
+for transmit-only transfers too, while this is not needed.
+Only call rspi_receive_init() when receiving, to preserve behavior on
+RSPI on SH.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 32c64261c6f50a4e71ec7546f7e2f48eba91c985)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-rspi.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
+index d04a4acce231..57beda209599 100644
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -726,13 +726,13 @@ static int rspi_transfer_out_in(struct rspi_data *rspi,
+ u8 *rx_buf = xfer->rx_buf;
+ u8 spcr, data;
+
+- rspi_receive_init(rspi);
+-
+ spcr = rspi_read8(rspi, RSPI_SPCR);
+- if (rx_buf)
++ if (rx_buf) {
++ rspi_receive_init(rspi);
+ spcr &= ~SPCR_TXMD;
+- else
++ } else {
+ spcr |= SPCR_TXMD;
++ }
+ rspi_write8(rspi, spcr, RSPI_SPCR);
+
+ while (remain > 0) {
+--
+2.1.2
+
--- /dev/null
+From d744ff0a58d89d9861218ec2e39f1cfba194bf18 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 2 Jun 2014 15:38:05 +0200
+Subject: spi: rspi: Remove unused 16-bit DMA support
+
+The 16-bit DMA support doesn't fit well within the SPI core DMA framework,
+as it needs to manage its own double-sized temporary buffers, for handling
+the interleaved data.
+Remove it, as there is no in-tree board code that sets
+rspi_plat_data.dma_width_16bit.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 9c5de2c1754c2bb3c69c4d7bf0d0edc0a61d8232)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-rspi.c | 84 ++++--------------------------------------------
+ include/linux/spi/rspi.h | 2 --
+ 2 files changed, 6 insertions(+), 80 deletions(-)
+
+diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
+index 57beda209599..3bd06fd9af47 100644
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -201,7 +201,6 @@ struct rspi_data {
+ struct dma_chan *chan_tx;
+ struct dma_chan *chan_rx;
+
+- unsigned dma_width_16bit:1;
+ unsigned dma_callbacked:1;
+ unsigned byte_access:1;
+ };
+@@ -475,60 +474,17 @@ static void rspi_dma_unmap_sg(struct scatterlist *sg, struct dma_chan *chan,
+ dma_unmap_sg(chan->device->dev, sg, 1, dir);
+ }
+
+-static void rspi_memory_to_8bit(void *buf, const void *data, unsigned len)
+-{
+- u16 *dst = buf;
+- const u8 *src = data;
+-
+- while (len) {
+- *dst++ = (u16)(*src++);
+- len--;
+- }
+-}
+-
+-static void rspi_memory_from_8bit(void *buf, const void *data, unsigned len)
+-{
+- u8 *dst = buf;
+- const u16 *src = data;
+-
+- while (len) {
+- *dst++ = (u8)*src++;
+- len--;
+- }
+-}
+-
+ static int rspi_send_dma(struct rspi_data *rspi, struct spi_transfer *t)
+ {
+ struct scatterlist sg;
+- const void *buf = NULL;
++ const void *buf = t->tx_buf;
+ struct dma_async_tx_descriptor *desc;
+- unsigned int len;
++ unsigned int len = t->len;
+ int ret = 0;
+
+- if (rspi->dma_width_16bit) {
+- void *tmp;
+- /*
+- * If DMAC bus width is 16-bit, the driver allocates a dummy
+- * buffer. And, the driver converts original data into the
+- * DMAC data as the following format:
+- * original data: 1st byte, 2nd byte ...
+- * DMAC data: 1st byte, dummy, 2nd byte, dummy ...
+- */
+- len = t->len * 2;
+- tmp = kmalloc(len, GFP_KERNEL);
+- if (!tmp)
+- return -ENOMEM;
+- rspi_memory_to_8bit(tmp, t->tx_buf, t->len);
+- buf = tmp;
+- } else {
+- len = t->len;
+- buf = t->tx_buf;
+- }
++ if (!rspi_dma_map_sg(&sg, buf, len, rspi->chan_tx, DMA_TO_DEVICE))
++ return -EFAULT;
+
+- if (!rspi_dma_map_sg(&sg, buf, len, rspi->chan_tx, DMA_TO_DEVICE)) {
+- ret = -EFAULT;
+- goto end_nomap;
+- }
+ desc = dmaengine_prep_slave_sg(rspi->chan_tx, &sg, 1, DMA_TO_DEVICE,
+ DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+ if (!desc) {
+@@ -563,10 +519,6 @@ static int rspi_send_dma(struct rspi_data *rspi, struct spi_transfer *t)
+
+ end:
+ rspi_dma_unmap_sg(&sg, rspi->chan_tx, DMA_TO_DEVICE);
+-end_nomap:
+- if (rspi->dma_width_16bit)
+- kfree(buf);
+-
+ return ret;
+ }
+
+@@ -603,28 +555,11 @@ static void qspi_receive_init(const struct rspi_data *rspi)
+ static int rspi_receive_dma(struct rspi_data *rspi, struct spi_transfer *t)
+ {
+ struct scatterlist sg, sg_dummy;
+- void *dummy = NULL, *rx_buf = NULL;
++ void *dummy = NULL, *rx_buf = t->rx_buf;
+ struct dma_async_tx_descriptor *desc, *desc_dummy;
+- unsigned int len;
++ unsigned int len = t->len;
+ int ret = 0;
+
+- if (rspi->dma_width_16bit) {
+- /*
+- * If DMAC bus width is 16-bit, the driver allocates a dummy
+- * buffer. And, finally the driver converts the DMAC data into
+- * actual data as the following format:
+- * DMAC data: 1st byte, dummy, 2nd byte, dummy ...
+- * actual data: 1st byte, 2nd byte ...
+- */
+- len = t->len * 2;
+- rx_buf = kmalloc(len, GFP_KERNEL);
+- if (!rx_buf)
+- return -ENOMEM;
+- } else {
+- len = t->len;
+- rx_buf = t->rx_buf;
+- }
+-
+ /* prepare dummy transfer to generate SPI clocks */
+ dummy = kzalloc(len, GFP_KERNEL);
+ if (!dummy) {
+@@ -697,11 +632,6 @@ end:
+ end_dummy_mapped:
+ rspi_dma_unmap_sg(&sg_dummy, rspi->chan_tx, DMA_TO_DEVICE);
+ end_nomap:
+- if (rspi->dma_width_16bit) {
+- if (!ret)
+- rspi_memory_from_8bit(t->rx_buf, rx_buf, t->len);
+- kfree(rx_buf);
+- }
+ kfree(dummy);
+
+ return ret;
+@@ -1073,8 +1003,6 @@ static int rspi_request_dma(struct rspi_data *rspi,
+ if (!res || !rspi_pd)
+ return 0; /* The driver assumes no error. */
+
+- rspi->dma_width_16bit = rspi_pd->dma_width_16bit;
+-
+ /* If the module receives data by DMAC, it also needs TX DMAC */
+ if (rspi_pd->dma_rx_id && rspi_pd->dma_tx_id) {
+ dma_cap_zero(mask);
+diff --git a/include/linux/spi/rspi.h b/include/linux/spi/rspi.h
+index a25bd6f65e7f..e546b2ceb623 100644
+--- a/include/linux/spi/rspi.h
++++ b/include/linux/spi/rspi.h
+@@ -25,8 +25,6 @@ struct rspi_plat_data {
+ unsigned int dma_tx_id;
+ unsigned int dma_rx_id;
+
+- unsigned dma_width_16bit:1; /* DMAC read/write width = 16-bit */
+-
+ u16 num_chipselect;
+ };
+
+--
+2.1.2
+
--- /dev/null
+From 80967c858d36b6cf3ca676125b8869050c32a3ec Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 2 Jun 2014 15:38:06 +0200
+Subject: spi: rspi: Use core SPI_MASTER_MUST_[RT]X handling
+
+RSPI needs dummy transfers to generate the SPI clock on receive.
+RSPI-RZ and QSPI always do both transmit and receive.
+
+Use the SPI core SPI_MASTER_MUST_RX/SPI_MASTER_MUST_TX infrastructure
+instead of checking for the presence of buffers and providing dummy data
+ourselves (for PIO), or providing a dummy buffer (for DMA).
+
+rspi_receive_dma() now provides full duplex DMA transfers on RSPI, and is
+renamed to rspi_send_receive_dma().
+
+As the SPI core will always provide a TX buffer, the logic to choose
+between DMA send and DMA send/receive in rspi_transfer_one() now has to
+check for the presence of an RX buffer. Likewise for the DMA availability
+tests in rspi_is_dma().
+
+The buffer tests in qspi_transfer_one() are now always true, so they're
+removed.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit b42e03596db3d45980c976c8124fdc323f031dc4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-rspi.c | 132 ++++++++++++++++++++++---------------------------
+ 1 file changed, 58 insertions(+), 74 deletions(-)
+
+diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
+index 3bd06fd9af47..ece8f6037943 100644
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -183,8 +183,6 @@
+ #define SPBFCR_TXTRG_MASK 0x30 /* Transmit Buffer Data Triggering Number */
+ #define SPBFCR_RXTRG_MASK 0x07 /* Receive Buffer Data Triggering Number */
+
+-#define DUMMY_DATA 0x00
+-
+ struct rspi_data {
+ void __iomem *addr;
+ u32 max_speed_hz;
+@@ -252,6 +250,7 @@ struct spi_ops {
+ int (*transfer_one)(struct spi_master *master, struct spi_device *spi,
+ struct spi_transfer *xfer);
+ u16 mode_bits;
++ u16 flags;
+ };
+
+ /*
+@@ -552,42 +551,38 @@ static void qspi_receive_init(const struct rspi_data *rspi)
+ rspi_write8(rspi, 0, QSPI_SPBFCR);
+ }
+
+-static int rspi_receive_dma(struct rspi_data *rspi, struct spi_transfer *t)
++static int rspi_send_receive_dma(struct rspi_data *rspi, struct spi_transfer *t)
+ {
+- struct scatterlist sg, sg_dummy;
+- void *dummy = NULL, *rx_buf = t->rx_buf;
+- struct dma_async_tx_descriptor *desc, *desc_dummy;
++ struct scatterlist sg_rx, sg_tx;
++ const void *tx_buf = t->tx_buf;
++ void *rx_buf = t->rx_buf;
++ struct dma_async_tx_descriptor *desc_tx, *desc_rx;
+ unsigned int len = t->len;
+ int ret = 0;
+
+- /* prepare dummy transfer to generate SPI clocks */
+- dummy = kzalloc(len, GFP_KERNEL);
+- if (!dummy) {
+- ret = -ENOMEM;
+- goto end_nomap;
+- }
+- if (!rspi_dma_map_sg(&sg_dummy, dummy, len, rspi->chan_tx,
+- DMA_TO_DEVICE)) {
+- ret = -EFAULT;
+- goto end_nomap;
+- }
+- desc_dummy = dmaengine_prep_slave_sg(rspi->chan_tx, &sg_dummy, 1,
++ /* prepare transmit transfer */
++ if (!rspi_dma_map_sg(&sg_tx, tx_buf, len, rspi->chan_tx,
++ DMA_TO_DEVICE))
++ return -EFAULT;
++
++ desc_tx = dmaengine_prep_slave_sg(rspi->chan_tx, &sg_tx, 1,
+ DMA_TO_DEVICE, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+- if (!desc_dummy) {
++ if (!desc_tx) {
+ ret = -EIO;
+- goto end_dummy_mapped;
++ goto end_tx_mapped;
+ }
+
+ /* prepare receive transfer */
+- if (!rspi_dma_map_sg(&sg, rx_buf, len, rspi->chan_rx,
++ if (!rspi_dma_map_sg(&sg_rx, rx_buf, len, rspi->chan_rx,
+ DMA_FROM_DEVICE)) {
+ ret = -EFAULT;
+- goto end_dummy_mapped;
++ goto end_tx_mapped;
+
+ }
+- desc = dmaengine_prep_slave_sg(rspi->chan_rx, &sg, 1, DMA_FROM_DEVICE,
+- DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+- if (!desc) {
++ desc_rx = dmaengine_prep_slave_sg(rspi->chan_rx, &sg_rx, 1,
++ DMA_FROM_DEVICE,
++ DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
++ if (!desc_rx) {
+ ret = -EIO;
+ goto end;
+ }
+@@ -606,13 +601,13 @@ static int rspi_receive_dma(struct rspi_data *rspi, struct spi_transfer *t)
+ rspi_enable_irq(rspi, SPCR_SPTIE | SPCR_SPRIE);
+ rspi->dma_callbacked = 0;
+
+- desc->callback = rspi_dma_complete;
+- desc->callback_param = rspi;
+- dmaengine_submit(desc);
++ desc_rx->callback = rspi_dma_complete;
++ desc_rx->callback_param = rspi;
++ dmaengine_submit(desc_rx);
+ dma_async_issue_pending(rspi->chan_rx);
+
+- desc_dummy->callback = NULL; /* No callback */
+- dmaengine_submit(desc_dummy);
++ desc_tx->callback = NULL; /* No callback */
++ dmaengine_submit(desc_tx);
+ dma_async_issue_pending(rspi->chan_tx);
+
+ ret = wait_event_interruptible_timeout(rspi->wait,
+@@ -628,21 +623,19 @@ static int rspi_receive_dma(struct rspi_data *rspi, struct spi_transfer *t)
+ enable_irq(rspi->rx_irq);
+
+ end:
+- rspi_dma_unmap_sg(&sg, rspi->chan_rx, DMA_FROM_DEVICE);
+-end_dummy_mapped:
+- rspi_dma_unmap_sg(&sg_dummy, rspi->chan_tx, DMA_TO_DEVICE);
+-end_nomap:
+- kfree(dummy);
+-
++ rspi_dma_unmap_sg(&sg_rx, rspi->chan_rx, DMA_FROM_DEVICE);
++end_tx_mapped:
++ rspi_dma_unmap_sg(&sg_tx, rspi->chan_tx, DMA_TO_DEVICE);
+ return ret;
+ }
+
+ static int rspi_is_dma(const struct rspi_data *rspi, struct spi_transfer *t)
+ {
+- if (t->tx_buf && rspi->chan_tx)
+- return 1;
+ /* If the module receives data by DMAC, it also needs TX DMAC */
+- if (t->rx_buf && rspi->chan_tx && rspi->chan_rx)
++ if (t->rx_buf)
++ return rspi->chan_tx && rspi->chan_rx;
++
++ if (rspi->chan_tx)
+ return 1;
+
+ return 0;
+@@ -654,7 +647,7 @@ static int rspi_transfer_out_in(struct rspi_data *rspi,
+ int remain = xfer->len, ret;
+ const u8 *tx_buf = xfer->tx_buf;
+ u8 *rx_buf = xfer->rx_buf;
+- u8 spcr, data;
++ u8 spcr;
+
+ spcr = rspi_read8(rspi, RSPI_SPCR);
+ if (rx_buf) {
+@@ -666,8 +659,7 @@ static int rspi_transfer_out_in(struct rspi_data *rspi,
+ rspi_write8(rspi, spcr, RSPI_SPCR);
+
+ while (remain > 0) {
+- data = tx_buf ? *tx_buf++ : DUMMY_DATA;
+- ret = rspi_data_out(rspi, data);
++ ret = rspi_data_out(rspi, *tx_buf++);
+ if (ret < 0)
+ return ret;
+ if (rx_buf) {
+@@ -689,20 +681,14 @@ static int rspi_transfer_one(struct spi_master *master, struct spi_device *spi,
+ struct spi_transfer *xfer)
+ {
+ struct rspi_data *rspi = spi_master_get_devdata(master);
+- int ret;
+
+ if (!rspi_is_dma(rspi, xfer))
+ return rspi_transfer_out_in(rspi, xfer);
+
+- if (xfer->tx_buf) {
+- ret = rspi_send_dma(rspi, xfer);
+- if (ret < 0)
+- return ret;
+- }
+ if (xfer->rx_buf)
+- return rspi_receive_dma(rspi, xfer);
+-
+- return 0;
++ return rspi_send_receive_dma(rspi, xfer);
++ else
++ return rspi_send_dma(rspi, xfer);
+ }
+
+ static int rspi_rz_transfer_out_in(struct rspi_data *rspi,
+@@ -711,17 +697,14 @@ static int rspi_rz_transfer_out_in(struct rspi_data *rspi,
+ int remain = xfer->len, ret;
+ const u8 *tx_buf = xfer->tx_buf;
+ u8 *rx_buf = xfer->rx_buf;
+- u8 data;
+
+ rspi_rz_receive_init(rspi);
+
+ while (remain > 0) {
+- data = tx_buf ? *tx_buf++ : DUMMY_DATA;
+- ret = rspi_data_out_in(rspi, data);
++ ret = rspi_data_out_in(rspi, *tx_buf++);
+ if (ret < 0)
+ return ret;
+- if (rx_buf)
+- *rx_buf++ = ret;
++ *rx_buf++ = ret;
+ remain--;
+ }
+
+@@ -746,17 +729,14 @@ static int qspi_transfer_out_in(struct rspi_data *rspi,
+ int remain = xfer->len, ret;
+ const u8 *tx_buf = xfer->tx_buf;
+ u8 *rx_buf = xfer->rx_buf;
+- u8 data;
+
+ qspi_receive_init(rspi);
+
+ while (remain > 0) {
+- data = tx_buf ? *tx_buf++ : DUMMY_DATA;
+- ret = rspi_data_out_in(rspi, data);
++ ret = rspi_data_out_in(rspi, *tx_buf++);
+ if (ret < 0)
+ return ret;
+- if (rx_buf)
+- *rx_buf++ = ret;
++ *rx_buf++ = ret;
+ remain--;
+ }
+
+@@ -807,10 +787,10 @@ static int qspi_transfer_one(struct spi_master *master, struct spi_device *spi,
+
+ if (spi->mode & SPI_LOOP) {
+ return qspi_transfer_out_in(rspi, xfer);
+- } else if (xfer->tx_buf && xfer->tx_nbits > SPI_NBITS_SINGLE) {
++ } else if (xfer->tx_nbits > SPI_NBITS_SINGLE) {
+ /* Quad or Dual SPI Write */
+ return qspi_transfer_out(rspi, xfer);
+- } else if (xfer->rx_buf && xfer->rx_nbits > SPI_NBITS_SINGLE) {
++ } else if (xfer->rx_nbits > SPI_NBITS_SINGLE) {
+ /* Quad or Dual SPI Read */
+ return qspi_transfer_in(rspi, xfer);
+ } else {
+@@ -1061,23 +1041,26 @@ static int rspi_remove(struct platform_device *pdev)
+ }
+
+ static const struct spi_ops rspi_ops = {
+- .set_config_register = rspi_set_config_register,
+- .transfer_one = rspi_transfer_one,
+- .mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP,
++ .set_config_register = rspi_set_config_register,
++ .transfer_one = rspi_transfer_one,
++ .mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP,
++ .flags = SPI_MASTER_MUST_TX,
+ };
+
+ static const struct spi_ops rspi_rz_ops = {
+- .set_config_register = rspi_rz_set_config_register,
+- .transfer_one = rspi_rz_transfer_one,
+- .mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP,
++ .set_config_register = rspi_rz_set_config_register,
++ .transfer_one = rspi_rz_transfer_one,
++ .mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP,
++ .flags = SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX,
+ };
+
+ static const struct spi_ops qspi_ops = {
+- .set_config_register = qspi_set_config_register,
+- .transfer_one = qspi_transfer_one,
+- .mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP |
+- SPI_TX_DUAL | SPI_TX_QUAD |
+- SPI_RX_DUAL | SPI_RX_QUAD,
++ .set_config_register = qspi_set_config_register,
++ .transfer_one = qspi_transfer_one,
++ .mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP |
++ SPI_TX_DUAL | SPI_TX_QUAD |
++ SPI_RX_DUAL | SPI_RX_QUAD,
++ .flags = SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX,
+ };
+
+ #ifdef CONFIG_OF
+@@ -1197,6 +1180,7 @@ static int rspi_probe(struct platform_device *pdev)
+ master->prepare_message = rspi_prepare_message;
+ master->unprepare_message = rspi_unprepare_message;
+ master->mode_bits = ops->mode_bits;
++ master->flags = ops->flags;
+ master->dev.of_node = pdev->dev.of_node;
+
+ ret = platform_get_irq_byname(pdev, "rx");
+--
+2.1.2
+
--- /dev/null
+From 1a623ed03a7b94e3e0abda21240e7a94c1dc884a Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 2 Jun 2014 15:38:07 +0200
+Subject: spi: rspi: Extract rspi_pio_transfer()
+
+The various PIO loops are very similar. Consolidate into a single
+function rspi_pio_transfer().
+
+Both buffer pointers can be NULL, as RSPI supports TX-only mode, and
+Dual/Quad SPI Transfers are unidirectional.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 6837b8e91d2a080293c30d5fe42d9692390091fa)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-rspi.c | 95 ++++++++++++++++++--------------------------------
+ 1 file changed, 33 insertions(+), 62 deletions(-)
+
+diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
+index ece8f6037943..fdbd46d0c570 100644
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -438,15 +438,24 @@ static int rspi_data_in(struct rspi_data *rspi)
+ return data;
+ }
+
+-static int rspi_data_out_in(struct rspi_data *rspi, u8 data)
++static int rspi_pio_transfer(struct rspi_data *rspi, const u8 *tx, u8 *rx,
++ unsigned int n)
+ {
+- int ret;
+-
+- ret = rspi_data_out(rspi, data);
+- if (ret < 0)
+- return ret;
++ while (n-- > 0) {
++ if (tx) {
++ int ret = rspi_data_out(rspi, *tx++);
++ if (ret < 0)
++ return ret;
++ }
++ if (rx) {
++ int ret = rspi_data_in(rspi);
++ if (ret < 0)
++ return ret;
++ *rx++ = ret;
++ }
++ }
+
+- return rspi_data_in(rspi);
++ return 0;
+ }
+
+ static void rspi_dma_complete(void *arg)
+@@ -644,13 +653,11 @@ static int rspi_is_dma(const struct rspi_data *rspi, struct spi_transfer *t)
+ static int rspi_transfer_out_in(struct rspi_data *rspi,
+ struct spi_transfer *xfer)
+ {
+- int remain = xfer->len, ret;
+- const u8 *tx_buf = xfer->tx_buf;
+- u8 *rx_buf = xfer->rx_buf;
+ u8 spcr;
++ int ret;
+
+ spcr = rspi_read8(rspi, RSPI_SPCR);
+- if (rx_buf) {
++ if (xfer->rx_buf) {
+ rspi_receive_init(rspi);
+ spcr &= ~SPCR_TXMD;
+ } else {
+@@ -658,18 +665,9 @@ static int rspi_transfer_out_in(struct rspi_data *rspi,
+ }
+ rspi_write8(rspi, spcr, RSPI_SPCR);
+
+- while (remain > 0) {
+- ret = rspi_data_out(rspi, *tx_buf++);
+- if (ret < 0)
+- return ret;
+- if (rx_buf) {
+- ret = rspi_data_in(rspi);
+- if (ret < 0)
+- return ret;
+- *rx_buf++ = ret;
+- }
+- remain--;
+- }
++ ret = rspi_pio_transfer(rspi, xfer->tx_buf, xfer->rx_buf, xfer->len);
++ if (ret < 0)
++ return ret;
+
+ /* Wait for the last transmission */
+ rspi_wait_for_tx_empty(rspi);
+@@ -694,19 +692,13 @@ static int rspi_transfer_one(struct spi_master *master, struct spi_device *spi,
+ static int rspi_rz_transfer_out_in(struct rspi_data *rspi,
+ struct spi_transfer *xfer)
+ {
+- int remain = xfer->len, ret;
+- const u8 *tx_buf = xfer->tx_buf;
+- u8 *rx_buf = xfer->rx_buf;
++ int ret;
+
+ rspi_rz_receive_init(rspi);
+
+- while (remain > 0) {
+- ret = rspi_data_out_in(rspi, *tx_buf++);
+- if (ret < 0)
+- return ret;
+- *rx_buf++ = ret;
+- remain--;
+- }
++ ret = rspi_pio_transfer(rspi, xfer->tx_buf, xfer->rx_buf, xfer->len);
++ if (ret < 0)
++ return ret;
+
+ /* Wait for the last transmission */
+ rspi_wait_for_tx_empty(rspi);
+@@ -726,19 +718,13 @@ static int rspi_rz_transfer_one(struct spi_master *master,
+ static int qspi_transfer_out_in(struct rspi_data *rspi,
+ struct spi_transfer *xfer)
+ {
+- int remain = xfer->len, ret;
+- const u8 *tx_buf = xfer->tx_buf;
+- u8 *rx_buf = xfer->rx_buf;
++ int ret;
+
+ qspi_receive_init(rspi);
+
+- while (remain > 0) {
+- ret = rspi_data_out_in(rspi, *tx_buf++);
+- if (ret < 0)
+- return ret;
+- *rx_buf++ = ret;
+- remain--;
+- }
++ ret = rspi_pio_transfer(rspi, xfer->tx_buf, xfer->rx_buf, xfer->len);
++ if (ret < 0)
++ return ret;
+
+ /* Wait for the last transmission */
+ rspi_wait_for_tx_empty(rspi);
+@@ -748,15 +734,11 @@ static int qspi_transfer_out_in(struct rspi_data *rspi,
+
+ static int qspi_transfer_out(struct rspi_data *rspi, struct spi_transfer *xfer)
+ {
+- const u8 *buf = xfer->tx_buf;
+- unsigned int i;
+ int ret;
+
+- for (i = 0; i < xfer->len; i++) {
+- ret = rspi_data_out(rspi, *buf++);
+- if (ret < 0)
+- return ret;
+- }
++ ret = rspi_pio_transfer(rspi, xfer->tx_buf, NULL, xfer->len);
++ if (ret < 0)
++ return ret;
+
+ /* Wait for the last transmission */
+ rspi_wait_for_tx_empty(rspi);
+@@ -766,18 +748,7 @@ static int qspi_transfer_out(struct rspi_data *rspi, struct spi_transfer *xfer)
+
+ static int qspi_transfer_in(struct rspi_data *rspi, struct spi_transfer *xfer)
+ {
+- u8 *buf = xfer->rx_buf;
+- unsigned int i;
+- int ret;
+-
+- for (i = 0; i < xfer->len; i++) {
+- ret = rspi_data_in(rspi);
+- if (ret < 0)
+- return ret;
+- *buf++ = ret;
+- }
+-
+- return 0;
++ return rspi_pio_transfer(rspi, NULL, xfer->rx_buf, xfer->len);
+ }
+
+ static int qspi_transfer_one(struct spi_master *master, struct spi_device *spi,
+--
+2.1.2
+
--- /dev/null
+From 612e3785e34dcfe88cce1c8695077533a807e49e Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 2 Jun 2014 15:38:08 +0200
+Subject: spi: rspi: Don't consider DMA configuration failures fatal
+
+Fall back to PIO if DMA configuration failed.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 27e105a6006b8ce1b55709c5e24f63959981475d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-rspi.c | 6 ++----
+ 1 file changed, 2 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
+index fdbd46d0c570..94a99ec7d989 100644
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -1190,10 +1190,8 @@ static int rspi_probe(struct platform_device *pdev)
+ }
+
+ ret = rspi_request_dma(rspi, pdev);
+- if (ret < 0) {
+- dev_err(&pdev->dev, "rspi_request_dma failed.\n");
+- goto error3;
+- }
++ if (ret < 0)
++ dev_warn(&pdev->dev, "DMA not available, using PIO\n");
+
+ ret = devm_spi_register_master(&pdev->dev, master);
+ if (ret < 0) {
+--
+2.1.2
+
--- /dev/null
+From ef4f1f20ede7ef65162c11f9ed63a07a18bf4041 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 2 Jun 2014 15:38:09 +0200
+Subject: spi: rspi: Extract rspi_request_dma_chan()
+
+Setup of the receive and transmit DMA channels is very similar, so let's
+consolidate.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 65bf220571f131a7c3a564a88793bd0f16fd7c96)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-rspi.c | 89 +++++++++++++++++++++++++++++++-------------------
+ 1 file changed, 55 insertions(+), 34 deletions(-)
+
+diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
+index 94a99ec7d989..0a7a2d618f0f 100644
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -942,52 +942,73 @@ static irqreturn_t rspi_irq_tx(int irq, void *_sr)
+ return 0;
+ }
+
+-static int rspi_request_dma(struct rspi_data *rspi,
+- struct platform_device *pdev)
++static struct dma_chan *rspi_request_dma_chan(struct device *dev,
++ enum dma_transfer_direction dir,
++ unsigned int id,
++ dma_addr_t port_addr)
+ {
+- const struct rspi_plat_data *rspi_pd = dev_get_platdata(&pdev->dev);
+- struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ dma_cap_mask_t mask;
++ struct dma_chan *chan;
+ struct dma_slave_config cfg;
+ int ret;
+
++ dma_cap_zero(mask);
++ dma_cap_set(DMA_SLAVE, mask);
++
++ chan = dma_request_channel(mask, shdma_chan_filter,
++ (void *)(unsigned long)id);
++ if (!chan) {
++ dev_warn(dev, "dma_request_channel failed\n");
++ return NULL;
++ }
++
++ memset(&cfg, 0, sizeof(cfg));
++ cfg.slave_id = id;
++ cfg.direction = dir;
++ if (dir == DMA_MEM_TO_DEV)
++ cfg.dst_addr = port_addr;
++ else
++ cfg.src_addr = port_addr;
++
++ ret = dmaengine_slave_config(chan, &cfg);
++ if (ret) {
++ dev_warn(dev, "dmaengine_slave_config failed %d\n", ret);
++ dma_release_channel(chan);
++ return NULL;
++ }
++
++ return chan;
++}
++
++static int rspi_request_dma(struct rspi_data *rspi,
++ struct platform_device *pdev)
++{
++ const struct rspi_plat_data *rspi_pd = dev_get_platdata(&pdev->dev);
++ struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++
+ if (!res || !rspi_pd)
+ return 0; /* The driver assumes no error. */
+
+ /* If the module receives data by DMAC, it also needs TX DMAC */
+ if (rspi_pd->dma_rx_id && rspi_pd->dma_tx_id) {
+- dma_cap_zero(mask);
+- dma_cap_set(DMA_SLAVE, mask);
+- rspi->chan_rx = dma_request_channel(mask, shdma_chan_filter,
+- (void *)rspi_pd->dma_rx_id);
+- if (rspi->chan_rx) {
+- cfg.slave_id = rspi_pd->dma_rx_id;
+- cfg.direction = DMA_DEV_TO_MEM;
+- cfg.dst_addr = 0;
+- cfg.src_addr = res->start + RSPI_SPDR;
+- ret = dmaengine_slave_config(rspi->chan_rx, &cfg);
+- if (!ret)
+- dev_info(&pdev->dev, "Use DMA when rx.\n");
+- else
+- return ret;
+- }
++ rspi->chan_rx = rspi_request_dma_chan(&pdev->dev,
++ DMA_DEV_TO_MEM,
++ rspi_pd->dma_rx_id,
++ res->start + RSPI_SPDR);
++ if (!rspi->chan_rx)
++ return -ENODEV;
++
++ dev_info(&pdev->dev, "Use DMA when rx.\n");
+ }
+ if (rspi_pd->dma_tx_id) {
+- dma_cap_zero(mask);
+- dma_cap_set(DMA_SLAVE, mask);
+- rspi->chan_tx = dma_request_channel(mask, shdma_chan_filter,
+- (void *)rspi_pd->dma_tx_id);
+- if (rspi->chan_tx) {
+- cfg.slave_id = rspi_pd->dma_tx_id;
+- cfg.direction = DMA_MEM_TO_DEV;
+- cfg.dst_addr = res->start + RSPI_SPDR;
+- cfg.src_addr = 0;
+- ret = dmaengine_slave_config(rspi->chan_tx, &cfg);
+- if (!ret)
+- dev_info(&pdev->dev, "Use DMA when tx\n");
+- else
+- return ret;
+- }
++ rspi->chan_tx = rspi_request_dma_chan(&pdev->dev,
++ DMA_MEM_TO_DEV,
++ rspi_pd->dma_tx_id,
++ res->start + RSPI_SPDR);
++ if (!rspi->chan_tx)
++ return -ENODEV;
++
++ dev_info(&pdev->dev, "Use DMA when tx\n");
+ }
+
+ return 0;
+--
+2.1.2
+
--- /dev/null
+From e19a345165d2e645dc340f7fff8c1e11e0128189 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 2 Jun 2014 15:38:10 +0200
+Subject: spi: rspi: Remove unneeded resource test in DMA setup
+
+The resource is know to exist, as rspi_probe() already mapped it.
+Remove the test, and just pass the resource.
+Pass the device pointer instead of the platform device pointer, as the
+latter is no longer needed.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit fcdc49ae53dc8cfc1a7758607bca68935f568ca2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-rspi.c | 21 +++++++++------------
+ 1 file changed, 9 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
+index 0a7a2d618f0f..1ec51cb00203 100644
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -980,35 +980,32 @@ static struct dma_chan *rspi_request_dma_chan(struct device *dev,
+ return chan;
+ }
+
+-static int rspi_request_dma(struct rspi_data *rspi,
+- struct platform_device *pdev)
++static int rspi_request_dma(struct device *dev, struct rspi_data *rspi,
++ const struct resource *res)
+ {
+- const struct rspi_plat_data *rspi_pd = dev_get_platdata(&pdev->dev);
+- struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ const struct rspi_plat_data *rspi_pd = dev_get_platdata(dev);
+
+- if (!res || !rspi_pd)
++ if (!rspi_pd)
+ return 0; /* The driver assumes no error. */
+
+ /* If the module receives data by DMAC, it also needs TX DMAC */
+ if (rspi_pd->dma_rx_id && rspi_pd->dma_tx_id) {
+- rspi->chan_rx = rspi_request_dma_chan(&pdev->dev,
+- DMA_DEV_TO_MEM,
++ rspi->chan_rx = rspi_request_dma_chan(dev, DMA_DEV_TO_MEM,
+ rspi_pd->dma_rx_id,
+ res->start + RSPI_SPDR);
+ if (!rspi->chan_rx)
+ return -ENODEV;
+
+- dev_info(&pdev->dev, "Use DMA when rx.\n");
++ dev_info(dev, "Use DMA when rx.\n");
+ }
+ if (rspi_pd->dma_tx_id) {
+- rspi->chan_tx = rspi_request_dma_chan(&pdev->dev,
+- DMA_MEM_TO_DEV,
++ rspi->chan_tx = rspi_request_dma_chan(dev, DMA_MEM_TO_DEV,
+ rspi_pd->dma_tx_id,
+ res->start + RSPI_SPDR);
+ if (!rspi->chan_tx)
+ return -ENODEV;
+
+- dev_info(&pdev->dev, "Use DMA when tx\n");
++ dev_info(dev, "Use DMA when tx\n");
+ }
+
+ return 0;
+@@ -1210,7 +1207,7 @@ static int rspi_probe(struct platform_device *pdev)
+ goto error2;
+ }
+
+- ret = rspi_request_dma(rspi, pdev);
++ ret = rspi_request_dma(&pdev->dev, rspi, res);
+ if (ret < 0)
+ dev_warn(&pdev->dev, "DMA not available, using PIO\n");
+
+--
+2.1.2
+
--- /dev/null
+From 0ebe5710335d98e589ac3611ae05e6e52c2643f7 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 2 Jun 2014 15:38:11 +0200
+Subject: spi: rspi: SPI DMA core needs both RX and TX DMA to function
+
+The SPI DMA core framework needs both RX and TX DMA to function. As a
+preparation for converting the driver to use this framework, fall back to
+PIO if no DMA channel or only one DMA channel is available.
+
+This affects only RSPI, which could do DMA transfers for TX-only before.
+RSPI-RZ and QSPI (at least for Single SPI Transfers) will need both RX and
+TX DMA anyway.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 5f338d0ce0b4c9e6c554b92cfb288789a41bfbc1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-rspi.c | 36 ++++++++++++++----------------------
+ 1 file changed, 14 insertions(+), 22 deletions(-)
+
+diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
+index 1ec51cb00203..7b993f75a3cf 100644
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -640,10 +640,6 @@ end_tx_mapped:
+
+ static int rspi_is_dma(const struct rspi_data *rspi, struct spi_transfer *t)
+ {
+- /* If the module receives data by DMAC, it also needs TX DMAC */
+- if (t->rx_buf)
+- return rspi->chan_tx && rspi->chan_rx;
+-
+ if (rspi->chan_tx)
+ return 1;
+
+@@ -985,29 +981,25 @@ static int rspi_request_dma(struct device *dev, struct rspi_data *rspi,
+ {
+ const struct rspi_plat_data *rspi_pd = dev_get_platdata(dev);
+
+- if (!rspi_pd)
++ if (!rspi_pd || !rspi_pd->dma_rx_id || !rspi_pd->dma_tx_id)
+ return 0; /* The driver assumes no error. */
+
+- /* If the module receives data by DMAC, it also needs TX DMAC */
+- if (rspi_pd->dma_rx_id && rspi_pd->dma_tx_id) {
+- rspi->chan_rx = rspi_request_dma_chan(dev, DMA_DEV_TO_MEM,
+- rspi_pd->dma_rx_id,
+- res->start + RSPI_SPDR);
+- if (!rspi->chan_rx)
+- return -ENODEV;
++ rspi->chan_rx = rspi_request_dma_chan(dev, DMA_DEV_TO_MEM,
++ rspi_pd->dma_rx_id,
++ res->start + RSPI_SPDR);
++ if (!rspi->chan_rx)
++ return -ENODEV;
+
+- dev_info(dev, "Use DMA when rx.\n");
+- }
+- if (rspi_pd->dma_tx_id) {
+- rspi->chan_tx = rspi_request_dma_chan(dev, DMA_MEM_TO_DEV,
+- rspi_pd->dma_tx_id,
+- res->start + RSPI_SPDR);
+- if (!rspi->chan_tx)
+- return -ENODEV;
+-
+- dev_info(dev, "Use DMA when tx\n");
++ rspi->chan_tx = rspi_request_dma_chan(dev, DMA_MEM_TO_DEV,
++ rspi_pd->dma_tx_id,
++ res->start + RSPI_SPDR);
++ if (!rspi->chan_tx) {
++ dma_release_channel(rspi->chan_rx);
++ rspi->chan_rx = NULL;
++ return -ENODEV;
+ }
+
++ dev_info(dev, "DMA available");
+ return 0;
+ }
+
+--
+2.1.2
+
--- /dev/null
+From c2353009eb7a1f2640ea9bef2e88e104c0687c7a Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 2 Jun 2014 15:38:12 +0200
+Subject: spi: rspi: Use SPI core DMA mapping framework
+
+Use the SPI core DMA mapping framework instead of our own.
+If available, DMA is used for transfers larger than the FIFO size
+(8 or 32 bytes).
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 2f777ec91aa0623e058c43dd4aaf0b3325d3c3e8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-rspi.c | 140 ++++++++++++++++++-------------------------------
+ 1 file changed, 50 insertions(+), 90 deletions(-)
+
+diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
+index 7b993f75a3cf..753ac7bdfd55 100644
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -195,10 +195,6 @@ struct rspi_data {
+ int rx_irq, tx_irq;
+ const struct spi_ops *ops;
+
+- /* for dmaengine */
+- struct dma_chan *chan_tx;
+- struct dma_chan *chan_rx;
+-
+ unsigned dma_callbacked:1;
+ unsigned byte_access:1;
+ };
+@@ -251,6 +247,7 @@ struct spi_ops {
+ struct spi_transfer *xfer);
+ u16 mode_bits;
+ u16 flags;
++ u16 fifo_size;
+ };
+
+ /*
+@@ -466,39 +463,16 @@ static void rspi_dma_complete(void *arg)
+ wake_up_interruptible(&rspi->wait);
+ }
+
+-static int rspi_dma_map_sg(struct scatterlist *sg, const void *buf,
+- unsigned len, struct dma_chan *chan,
+- enum dma_transfer_direction dir)
+-{
+- sg_init_table(sg, 1);
+- sg_set_buf(sg, buf, len);
+- sg_dma_len(sg) = len;
+- return dma_map_sg(chan->device->dev, sg, 1, dir);
+-}
+-
+-static void rspi_dma_unmap_sg(struct scatterlist *sg, struct dma_chan *chan,
+- enum dma_transfer_direction dir)
+-{
+- dma_unmap_sg(chan->device->dev, sg, 1, dir);
+-}
+-
+ static int rspi_send_dma(struct rspi_data *rspi, struct spi_transfer *t)
+ {
+- struct scatterlist sg;
+- const void *buf = t->tx_buf;
+ struct dma_async_tx_descriptor *desc;
+- unsigned int len = t->len;
+- int ret = 0;
+-
+- if (!rspi_dma_map_sg(&sg, buf, len, rspi->chan_tx, DMA_TO_DEVICE))
+- return -EFAULT;
++ int ret;
+
+- desc = dmaengine_prep_slave_sg(rspi->chan_tx, &sg, 1, DMA_TO_DEVICE,
++ desc = dmaengine_prep_slave_sg(rspi->master->dma_tx, t->tx_sg.sgl,
++ t->tx_sg.nents, DMA_TO_DEVICE,
+ DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+- if (!desc) {
+- ret = -EIO;
+- goto end;
+- }
++ if (!desc)
++ return -EIO;
+
+ /*
+ * DMAC needs SPTIE, but if SPTIE is set, this IRQ routine will be
+@@ -513,7 +487,7 @@ static int rspi_send_dma(struct rspi_data *rspi, struct spi_transfer *t)
+ desc->callback = rspi_dma_complete;
+ desc->callback_param = rspi;
+ dmaengine_submit(desc);
+- dma_async_issue_pending(rspi->chan_tx);
++ dma_async_issue_pending(rspi->master->dma_tx);
+
+ ret = wait_event_interruptible_timeout(rspi->wait,
+ rspi->dma_callbacked, HZ);
+@@ -524,9 +498,6 @@ static int rspi_send_dma(struct rspi_data *rspi, struct spi_transfer *t)
+ rspi_disable_irq(rspi, SPCR_SPTIE);
+
+ enable_irq(rspi->tx_irq);
+-
+-end:
+- rspi_dma_unmap_sg(&sg, rspi->chan_tx, DMA_TO_DEVICE);
+ return ret;
+ }
+
+@@ -562,39 +533,22 @@ static void qspi_receive_init(const struct rspi_data *rspi)
+
+ static int rspi_send_receive_dma(struct rspi_data *rspi, struct spi_transfer *t)
+ {
+- struct scatterlist sg_rx, sg_tx;
+- const void *tx_buf = t->tx_buf;
+- void *rx_buf = t->rx_buf;
+ struct dma_async_tx_descriptor *desc_tx, *desc_rx;
+- unsigned int len = t->len;
+- int ret = 0;
++ int ret;
+
+ /* prepare transmit transfer */
+- if (!rspi_dma_map_sg(&sg_tx, tx_buf, len, rspi->chan_tx,
+- DMA_TO_DEVICE))
+- return -EFAULT;
+-
+- desc_tx = dmaengine_prep_slave_sg(rspi->chan_tx, &sg_tx, 1,
+- DMA_TO_DEVICE, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+- if (!desc_tx) {
+- ret = -EIO;
+- goto end_tx_mapped;
+- }
++ desc_tx = dmaengine_prep_slave_sg(rspi->master->dma_tx, t->tx_sg.sgl,
++ t->tx_sg.nents, DMA_TO_DEVICE,
++ DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
++ if (!desc_tx)
++ return -EIO;
+
+ /* prepare receive transfer */
+- if (!rspi_dma_map_sg(&sg_rx, rx_buf, len, rspi->chan_rx,
+- DMA_FROM_DEVICE)) {
+- ret = -EFAULT;
+- goto end_tx_mapped;
+-
+- }
+- desc_rx = dmaengine_prep_slave_sg(rspi->chan_rx, &sg_rx, 1,
+- DMA_FROM_DEVICE,
++ desc_rx = dmaengine_prep_slave_sg(rspi->master->dma_rx, t->rx_sg.sgl,
++ t->rx_sg.nents, DMA_FROM_DEVICE,
+ DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+- if (!desc_rx) {
+- ret = -EIO;
+- goto end;
+- }
++ if (!desc_rx)
++ return -EIO;
+
+ rspi_receive_init(rspi);
+
+@@ -613,11 +567,11 @@ static int rspi_send_receive_dma(struct rspi_data *rspi, struct spi_transfer *t)
+ desc_rx->callback = rspi_dma_complete;
+ desc_rx->callback_param = rspi;
+ dmaengine_submit(desc_rx);
+- dma_async_issue_pending(rspi->chan_rx);
++ dma_async_issue_pending(rspi->master->dma_rx);
+
+ desc_tx->callback = NULL; /* No callback */
+ dmaengine_submit(desc_tx);
+- dma_async_issue_pending(rspi->chan_tx);
++ dma_async_issue_pending(rspi->master->dma_tx);
+
+ ret = wait_event_interruptible_timeout(rspi->wait,
+ rspi->dma_callbacked, HZ);
+@@ -631,19 +585,21 @@ static int rspi_send_receive_dma(struct rspi_data *rspi, struct spi_transfer *t)
+ if (rspi->rx_irq != rspi->tx_irq)
+ enable_irq(rspi->rx_irq);
+
+-end:
+- rspi_dma_unmap_sg(&sg_rx, rspi->chan_rx, DMA_FROM_DEVICE);
+-end_tx_mapped:
+- rspi_dma_unmap_sg(&sg_tx, rspi->chan_tx, DMA_TO_DEVICE);
+ return ret;
+ }
+
+-static int rspi_is_dma(const struct rspi_data *rspi, struct spi_transfer *t)
++static bool __rspi_can_dma(const struct rspi_data *rspi,
++ const struct spi_transfer *xfer)
+ {
+- if (rspi->chan_tx)
+- return 1;
++ return xfer->len > rspi->ops->fifo_size;
++}
+
+- return 0;
++static bool rspi_can_dma(struct spi_master *master, struct spi_device *spi,
++ struct spi_transfer *xfer)
++{
++ struct rspi_data *rspi = spi_master_get_devdata(master);
++
++ return __rspi_can_dma(rspi, xfer);
+ }
+
+ static int rspi_transfer_out_in(struct rspi_data *rspi,
+@@ -676,7 +632,7 @@ static int rspi_transfer_one(struct spi_master *master, struct spi_device *spi,
+ {
+ struct rspi_data *rspi = spi_master_get_devdata(master);
+
+- if (!rspi_is_dma(rspi, xfer))
++ if (!master->can_dma || !__rspi_can_dma(rspi, xfer))
+ return rspi_transfer_out_in(rspi, xfer);
+
+ if (xfer->rx_buf)
+@@ -976,7 +932,7 @@ static struct dma_chan *rspi_request_dma_chan(struct device *dev,
+ return chan;
+ }
+
+-static int rspi_request_dma(struct device *dev, struct rspi_data *rspi,
++static int rspi_request_dma(struct device *dev, struct spi_master *master,
+ const struct resource *res)
+ {
+ const struct rspi_plat_data *rspi_pd = dev_get_platdata(dev);
+@@ -984,31 +940,32 @@ static int rspi_request_dma(struct device *dev, struct rspi_data *rspi,
+ if (!rspi_pd || !rspi_pd->dma_rx_id || !rspi_pd->dma_tx_id)
+ return 0; /* The driver assumes no error. */
+
+- rspi->chan_rx = rspi_request_dma_chan(dev, DMA_DEV_TO_MEM,
+- rspi_pd->dma_rx_id,
+- res->start + RSPI_SPDR);
+- if (!rspi->chan_rx)
++ master->dma_rx = rspi_request_dma_chan(dev, DMA_DEV_TO_MEM,
++ rspi_pd->dma_rx_id,
++ res->start + RSPI_SPDR);
++ if (!master->dma_rx)
+ return -ENODEV;
+
+- rspi->chan_tx = rspi_request_dma_chan(dev, DMA_MEM_TO_DEV,
+- rspi_pd->dma_tx_id,
+- res->start + RSPI_SPDR);
+- if (!rspi->chan_tx) {
+- dma_release_channel(rspi->chan_rx);
+- rspi->chan_rx = NULL;
++ master->dma_tx = rspi_request_dma_chan(dev, DMA_MEM_TO_DEV,
++ rspi_pd->dma_tx_id,
++ res->start + RSPI_SPDR);
++ if (!master->dma_tx) {
++ dma_release_channel(master->dma_rx);
++ master->dma_rx = NULL;
+ return -ENODEV;
+ }
+
++ master->can_dma = rspi_can_dma;
+ dev_info(dev, "DMA available");
+ return 0;
+ }
+
+ static void rspi_release_dma(struct rspi_data *rspi)
+ {
+- if (rspi->chan_tx)
+- dma_release_channel(rspi->chan_tx);
+- if (rspi->chan_rx)
+- dma_release_channel(rspi->chan_rx);
++ if (rspi->master->dma_tx)
++ dma_release_channel(rspi->master->dma_tx);
++ if (rspi->master->dma_rx)
++ dma_release_channel(rspi->master->dma_rx);
+ }
+
+ static int rspi_remove(struct platform_device *pdev)
+@@ -1026,6 +983,7 @@ static const struct spi_ops rspi_ops = {
+ .transfer_one = rspi_transfer_one,
+ .mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP,
+ .flags = SPI_MASTER_MUST_TX,
++ .fifo_size = 8,
+ };
+
+ static const struct spi_ops rspi_rz_ops = {
+@@ -1033,6 +991,7 @@ static const struct spi_ops rspi_rz_ops = {
+ .transfer_one = rspi_rz_transfer_one,
+ .mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP,
+ .flags = SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX,
++ .fifo_size = 8, /* 8 for TX, 32 for RX */
+ };
+
+ static const struct spi_ops qspi_ops = {
+@@ -1042,6 +1001,7 @@ static const struct spi_ops qspi_ops = {
+ SPI_TX_DUAL | SPI_TX_QUAD |
+ SPI_RX_DUAL | SPI_RX_QUAD,
+ .flags = SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX,
++ .fifo_size = 32,
+ };
+
+ #ifdef CONFIG_OF
+@@ -1199,7 +1159,7 @@ static int rspi_probe(struct platform_device *pdev)
+ goto error2;
+ }
+
+- ret = rspi_request_dma(&pdev->dev, rspi, res);
++ ret = rspi_request_dma(&pdev->dev, master, res);
+ if (ret < 0)
+ dev_warn(&pdev->dev, "DMA not available, using PIO\n");
+
+--
+2.1.2
+
--- /dev/null
+From b766f05dda90bf0eb96929d618f6dff567c23b4d Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 2 Jun 2014 15:38:13 +0200
+Subject: spi: rspi: Move RSPI-specific setup out of DMA routines
+
+Refactor RSPI (on SH) DMA handling to make it reusable for other RSPI
+implementations:
+ - Call the DMA routines after configuring the TX Mode bit and after
+ calling rspi_receive_init(), so these RSPI-specific operations can be
+ removed from the DMA routines,
+ - Absorb rspi_transfer_out_in() into rspi_transfer_one().
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 8393fa787bf63c05cb6f9cf0a58ba1ea213c3f01)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-rspi.c | 30 ++++++++++--------------------
+ 1 file changed, 10 insertions(+), 20 deletions(-)
+
+diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
+index 753ac7bdfd55..3dea8adfdcf3 100644
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -480,7 +480,6 @@ static int rspi_send_dma(struct rspi_data *rspi, struct spi_transfer *t)
+ */
+ disable_irq(rspi->tx_irq);
+
+- rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) | SPCR_TXMD, RSPI_SPCR);
+ rspi_enable_irq(rspi, SPCR_SPTIE);
+ rspi->dma_callbacked = 0;
+
+@@ -550,8 +549,6 @@ static int rspi_send_receive_dma(struct rspi_data *rspi, struct spi_transfer *t)
+ if (!desc_rx)
+ return -EIO;
+
+- rspi_receive_init(rspi);
+-
+ /*
+ * DMAC needs SPTIE, but if SPTIE is set, this IRQ routine will be
+ * called. So, this driver disables the IRQ while DMA transfer.
+@@ -560,7 +557,6 @@ static int rspi_send_receive_dma(struct rspi_data *rspi, struct spi_transfer *t)
+ if (rspi->rx_irq != rspi->tx_irq)
+ disable_irq(rspi->rx_irq);
+
+- rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) & ~SPCR_TXMD, RSPI_SPCR);
+ rspi_enable_irq(rspi, SPCR_SPTIE | SPCR_SPRIE);
+ rspi->dma_callbacked = 0;
+
+@@ -602,9 +598,10 @@ static bool rspi_can_dma(struct spi_master *master, struct spi_device *spi,
+ return __rspi_can_dma(rspi, xfer);
+ }
+
+-static int rspi_transfer_out_in(struct rspi_data *rspi,
+- struct spi_transfer *xfer)
++static int rspi_transfer_one(struct spi_master *master, struct spi_device *spi,
++ struct spi_transfer *xfer)
+ {
++ struct rspi_data *rspi = spi_master_get_devdata(master);
+ u8 spcr;
+ int ret;
+
+@@ -617,6 +614,13 @@ static int rspi_transfer_out_in(struct rspi_data *rspi,
+ }
+ rspi_write8(rspi, spcr, RSPI_SPCR);
+
++ if (master->can_dma && __rspi_can_dma(rspi, xfer)) {
++ if (xfer->rx_buf)
++ return rspi_send_receive_dma(rspi, xfer);
++ else
++ return rspi_send_dma(rspi, xfer);
++ }
++
+ ret = rspi_pio_transfer(rspi, xfer->tx_buf, xfer->rx_buf, xfer->len);
+ if (ret < 0)
+ return ret;
+@@ -627,20 +631,6 @@ static int rspi_transfer_out_in(struct rspi_data *rspi,
+ return 0;
+ }
+
+-static int rspi_transfer_one(struct spi_master *master, struct spi_device *spi,
+- struct spi_transfer *xfer)
+-{
+- struct rspi_data *rspi = spi_master_get_devdata(master);
+-
+- if (!master->can_dma || !__rspi_can_dma(rspi, xfer))
+- return rspi_transfer_out_in(rspi, xfer);
+-
+- if (xfer->rx_buf)
+- return rspi_send_receive_dma(rspi, xfer);
+- else
+- return rspi_send_dma(rspi, xfer);
+-}
+-
+ static int rspi_rz_transfer_out_in(struct rspi_data *rspi,
+ struct spi_transfer *xfer)
+ {
+--
+2.1.2
+
--- /dev/null
+From d98f94e92c37faf323e3f547d46768eec34ebca1 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 2 Jun 2014 15:38:14 +0200
+Subject: spi: rspi: Pass sg_tables instead of spi_tranfer to rspi_*_dma()
+
+The DMA routines only need access to the scatter-gather tables inside the
+spi_transfer structures, hence just pass those.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit e4b52dc4625ee739195189d40c6ddc7d55ddf312)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-rspi.c | 22 ++++++++++++----------
+ 1 file changed, 12 insertions(+), 10 deletions(-)
+
+diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
+index 3dea8adfdcf3..bfa5e7e5df5a 100644
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -463,13 +463,13 @@ static void rspi_dma_complete(void *arg)
+ wake_up_interruptible(&rspi->wait);
+ }
+
+-static int rspi_send_dma(struct rspi_data *rspi, struct spi_transfer *t)
++static int rspi_send_dma(struct rspi_data *rspi, struct sg_table *tx)
+ {
+ struct dma_async_tx_descriptor *desc;
+ int ret;
+
+- desc = dmaengine_prep_slave_sg(rspi->master->dma_tx, t->tx_sg.sgl,
+- t->tx_sg.nents, DMA_TO_DEVICE,
++ desc = dmaengine_prep_slave_sg(rspi->master->dma_tx, tx->sgl,
++ tx->nents, DMA_TO_DEVICE,
+ DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+ if (!desc)
+ return -EIO;
+@@ -530,21 +530,22 @@ static void qspi_receive_init(const struct rspi_data *rspi)
+ rspi_write8(rspi, 0, QSPI_SPBFCR);
+ }
+
+-static int rspi_send_receive_dma(struct rspi_data *rspi, struct spi_transfer *t)
++static int rspi_send_receive_dma(struct rspi_data *rspi, struct sg_table *tx,
++ struct sg_table *rx)
+ {
+ struct dma_async_tx_descriptor *desc_tx, *desc_rx;
+ int ret;
+
+ /* prepare transmit transfer */
+- desc_tx = dmaengine_prep_slave_sg(rspi->master->dma_tx, t->tx_sg.sgl,
+- t->tx_sg.nents, DMA_TO_DEVICE,
++ desc_tx = dmaengine_prep_slave_sg(rspi->master->dma_tx, tx->sgl,
++ tx->nents, DMA_TO_DEVICE,
+ DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+ if (!desc_tx)
+ return -EIO;
+
+ /* prepare receive transfer */
+- desc_rx = dmaengine_prep_slave_sg(rspi->master->dma_rx, t->rx_sg.sgl,
+- t->rx_sg.nents, DMA_FROM_DEVICE,
++ desc_rx = dmaengine_prep_slave_sg(rspi->master->dma_rx, rx->sgl,
++ rx->nents, DMA_FROM_DEVICE,
+ DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+ if (!desc_rx)
+ return -EIO;
+@@ -616,9 +617,10 @@ static int rspi_transfer_one(struct spi_master *master, struct spi_device *spi,
+
+ if (master->can_dma && __rspi_can_dma(rspi, xfer)) {
+ if (xfer->rx_buf)
+- return rspi_send_receive_dma(rspi, xfer);
++ return rspi_send_receive_dma(rspi, &xfer->tx_sg,
++ &xfer->rx_sg);
+ else
+- return rspi_send_dma(rspi, xfer);
++ return rspi_send_dma(rspi, &xfer->tx_sg);
+ }
+
+ ret = rspi_pio_transfer(rspi, xfer->tx_buf, xfer->rx_buf, xfer->len);
+--
+2.1.2
+
--- /dev/null
+From f03fe9bf498b3a767392d34ad1da78d302c8d748 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 2 Jun 2014 15:38:15 +0200
+Subject: spi: rspi: Merge rspi_*_dma() into rspi_dma_transfer()
+
+rspi_send_dma() and rspi_send_receive_dma() are very similar. Consolidate
+into a single function rspi_dma_transfer(), and add missing checks for
+dmaengine_submit() failures.
+
+Both sg_table pointer parameters can be NULL, as RSPI supports TX-only
+mode, and unidirectional DMA transfers will also be needed later for
+Dual/Quad DMA support.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit c52fb6d63425248bd4152451a2cc74b7df8fa989)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-rspi.c | 139 ++++++++++++++++++++++---------------------------
+ 1 file changed, 61 insertions(+), 78 deletions(-)
+
+diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
+index bfa5e7e5df5a..c77cfe654b0e 100644
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -463,30 +463,67 @@ static void rspi_dma_complete(void *arg)
+ wake_up_interruptible(&rspi->wait);
+ }
+
+-static int rspi_send_dma(struct rspi_data *rspi, struct sg_table *tx)
++static int rspi_dma_transfer(struct rspi_data *rspi, struct sg_table *tx,
++ struct sg_table *rx)
+ {
+- struct dma_async_tx_descriptor *desc;
++ struct dma_async_tx_descriptor *desc_tx = NULL, *desc_rx = NULL;
++ u8 irq_mask = 0;
++ unsigned int other_irq = 0;
++ dma_cookie_t cookie;
+ int ret;
+
+- desc = dmaengine_prep_slave_sg(rspi->master->dma_tx, tx->sgl,
+- tx->nents, DMA_TO_DEVICE,
+- DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+- if (!desc)
+- return -EIO;
++ if (tx) {
++ desc_tx = dmaengine_prep_slave_sg(rspi->master->dma_tx,
++ tx->sgl, tx->nents, DMA_TO_DEVICE,
++ DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
++ if (!desc_tx)
++ return -EIO;
++
++ irq_mask |= SPCR_SPTIE;
++ }
++ if (rx) {
++ desc_rx = dmaengine_prep_slave_sg(rspi->master->dma_rx,
++ rx->sgl, rx->nents, DMA_FROM_DEVICE,
++ DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
++ if (!desc_rx)
++ return -EIO;
++
++ irq_mask |= SPCR_SPRIE;
++ }
+
+ /*
+- * DMAC needs SPTIE, but if SPTIE is set, this IRQ routine will be
++ * DMAC needs SPxIE, but if SPxIE is set, the IRQ routine will be
+ * called. So, this driver disables the IRQ while DMA transfer.
+ */
+- disable_irq(rspi->tx_irq);
++ if (tx)
++ disable_irq(other_irq = rspi->tx_irq);
++ if (rx && rspi->rx_irq != other_irq)
++ disable_irq(rspi->rx_irq);
+
+- rspi_enable_irq(rspi, SPCR_SPTIE);
++ rspi_enable_irq(rspi, irq_mask);
+ rspi->dma_callbacked = 0;
+
+- desc->callback = rspi_dma_complete;
+- desc->callback_param = rspi;
+- dmaengine_submit(desc);
+- dma_async_issue_pending(rspi->master->dma_tx);
++ if (rx) {
++ desc_rx->callback = rspi_dma_complete;
++ desc_rx->callback_param = rspi;
++ cookie = dmaengine_submit(desc_rx);
++ if (dma_submit_error(cookie))
++ return cookie;
++ dma_async_issue_pending(rspi->master->dma_rx);
++ }
++ if (tx) {
++ if (rx) {
++ /* No callback */
++ desc_tx->callback = NULL;
++ } else {
++ desc_tx->callback = rspi_dma_complete;
++ desc_tx->callback_param = rspi;
++ }
++ cookie = dmaengine_submit(desc_tx);
++ if (dma_submit_error(cookie))
++ return cookie;
++ dma_async_issue_pending(rspi->master->dma_tx);
++ }
+
+ ret = wait_event_interruptible_timeout(rspi->wait,
+ rspi->dma_callbacked, HZ);
+@@ -494,9 +531,14 @@ static int rspi_send_dma(struct rspi_data *rspi, struct sg_table *tx)
+ ret = 0;
+ else if (!ret)
+ ret = -ETIMEDOUT;
+- rspi_disable_irq(rspi, SPCR_SPTIE);
+
+- enable_irq(rspi->tx_irq);
++ rspi_disable_irq(rspi, irq_mask);
++
++ if (tx)
++ enable_irq(rspi->tx_irq);
++ if (rx && rspi->rx_irq != other_irq)
++ enable_irq(rspi->rx_irq);
++
+ return ret;
+ }
+
+@@ -530,61 +572,6 @@ static void qspi_receive_init(const struct rspi_data *rspi)
+ rspi_write8(rspi, 0, QSPI_SPBFCR);
+ }
+
+-static int rspi_send_receive_dma(struct rspi_data *rspi, struct sg_table *tx,
+- struct sg_table *rx)
+-{
+- struct dma_async_tx_descriptor *desc_tx, *desc_rx;
+- int ret;
+-
+- /* prepare transmit transfer */
+- desc_tx = dmaengine_prep_slave_sg(rspi->master->dma_tx, tx->sgl,
+- tx->nents, DMA_TO_DEVICE,
+- DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+- if (!desc_tx)
+- return -EIO;
+-
+- /* prepare receive transfer */
+- desc_rx = dmaengine_prep_slave_sg(rspi->master->dma_rx, rx->sgl,
+- rx->nents, DMA_FROM_DEVICE,
+- DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+- if (!desc_rx)
+- return -EIO;
+-
+- /*
+- * DMAC needs SPTIE, but if SPTIE is set, this IRQ routine will be
+- * called. So, this driver disables the IRQ while DMA transfer.
+- */
+- disable_irq(rspi->tx_irq);
+- if (rspi->rx_irq != rspi->tx_irq)
+- disable_irq(rspi->rx_irq);
+-
+- rspi_enable_irq(rspi, SPCR_SPTIE | SPCR_SPRIE);
+- rspi->dma_callbacked = 0;
+-
+- desc_rx->callback = rspi_dma_complete;
+- desc_rx->callback_param = rspi;
+- dmaengine_submit(desc_rx);
+- dma_async_issue_pending(rspi->master->dma_rx);
+-
+- desc_tx->callback = NULL; /* No callback */
+- dmaengine_submit(desc_tx);
+- dma_async_issue_pending(rspi->master->dma_tx);
+-
+- ret = wait_event_interruptible_timeout(rspi->wait,
+- rspi->dma_callbacked, HZ);
+- if (ret > 0 && rspi->dma_callbacked)
+- ret = 0;
+- else if (!ret)
+- ret = -ETIMEDOUT;
+- rspi_disable_irq(rspi, SPCR_SPTIE | SPCR_SPRIE);
+-
+- enable_irq(rspi->tx_irq);
+- if (rspi->rx_irq != rspi->tx_irq)
+- enable_irq(rspi->rx_irq);
+-
+- return ret;
+-}
+-
+ static bool __rspi_can_dma(const struct rspi_data *rspi,
+ const struct spi_transfer *xfer)
+ {
+@@ -615,13 +602,9 @@ static int rspi_transfer_one(struct spi_master *master, struct spi_device *spi,
+ }
+ rspi_write8(rspi, spcr, RSPI_SPCR);
+
+- if (master->can_dma && __rspi_can_dma(rspi, xfer)) {
+- if (xfer->rx_buf)
+- return rspi_send_receive_dma(rspi, &xfer->tx_sg,
+- &xfer->rx_sg);
+- else
+- return rspi_send_dma(rspi, &xfer->tx_sg);
+- }
++ if (master->can_dma && __rspi_can_dma(rspi, xfer))
++ return rspi_dma_transfer(rspi, &xfer->tx_sg,
++ xfer->rx_buf ? &xfer->rx_sg : NULL);
+
+ ret = rspi_pio_transfer(rspi, xfer->tx_buf, xfer->rx_buf, xfer->len);
+ if (ret < 0)
+--
+2.1.2
+
--- /dev/null
+From 3cd12523509abb5ec4ffe59e0cb204e9b6e54f7c Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 2 Jun 2014 15:38:16 +0200
+Subject: spi: rspi: Absorb rspi_rz_transfer_out_in() into
+ rspi_rz_transfer_one()
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 03e627c55752fa434d5b3eba5ee3e489c51672b6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-rspi.c | 15 ++++-----------
+ 1 file changed, 4 insertions(+), 11 deletions(-)
+
+diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
+index c77cfe654b0e..b7f8be81423b 100644
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -616,9 +616,11 @@ static int rspi_transfer_one(struct spi_master *master, struct spi_device *spi,
+ return 0;
+ }
+
+-static int rspi_rz_transfer_out_in(struct rspi_data *rspi,
+- struct spi_transfer *xfer)
++static int rspi_rz_transfer_one(struct spi_master *master,
++ struct spi_device *spi,
++ struct spi_transfer *xfer)
+ {
++ struct rspi_data *rspi = spi_master_get_devdata(master);
+ int ret;
+
+ rspi_rz_receive_init(rspi);
+@@ -633,15 +635,6 @@ static int rspi_rz_transfer_out_in(struct rspi_data *rspi,
+ return 0;
+ }
+
+-static int rspi_rz_transfer_one(struct spi_master *master,
+- struct spi_device *spi,
+- struct spi_transfer *xfer)
+-{
+- struct rspi_data *rspi = spi_master_get_devdata(master);
+-
+- return rspi_rz_transfer_out_in(rspi, xfer);
+-}
+-
+ static int qspi_transfer_out_in(struct rspi_data *rspi,
+ struct spi_transfer *xfer)
+ {
+--
+2.1.2
+
--- /dev/null
+From 019e3a201fcc178b58e63806c37353e7055df877 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 2 Jun 2014 15:38:17 +0200
+Subject: spi: rspi: Add DMA support for QSPI on R-Car Gen2
+
+Enable DMA support for QSPI on R-Car Gen2, for Single, Dual, and Quad SPI
+Transfers.
+
+Performance figures for reading from a QSPI FLASH driven at 24.375 MHz
+on r8a7791/koelsch:
+ - Single: 1.1 Mbps PIO, 23 Mbps DMA
+ - Dual : 12.7 Mbps PIO, 48 Mbps DMA
+ - Quad : 13 Mbps PIO, 70 Mbps DMA
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 4f12b5e529e4ff274eb478ec1c2ef41358ed9577)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-rspi.c | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
+index b7f8be81423b..bec81470dd9c 100644
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -642,6 +642,9 @@ static int qspi_transfer_out_in(struct rspi_data *rspi,
+
+ qspi_receive_init(rspi);
+
++ if (rspi->master->can_dma && __rspi_can_dma(rspi, xfer))
++ return rspi_dma_transfer(rspi, &xfer->tx_sg, &xfer->rx_sg);
++
+ ret = rspi_pio_transfer(rspi, xfer->tx_buf, xfer->rx_buf, xfer->len);
+ if (ret < 0)
+ return ret;
+@@ -656,6 +659,9 @@ static int qspi_transfer_out(struct rspi_data *rspi, struct spi_transfer *xfer)
+ {
+ int ret;
+
++ if (rspi->master->can_dma && __rspi_can_dma(rspi, xfer))
++ return rspi_dma_transfer(rspi, &xfer->tx_sg, NULL);
++
+ ret = rspi_pio_transfer(rspi, xfer->tx_buf, NULL, xfer->len);
+ if (ret < 0)
+ return ret;
+@@ -668,6 +674,9 @@ static int qspi_transfer_out(struct rspi_data *rspi, struct spi_transfer *xfer)
+
+ static int qspi_transfer_in(struct rspi_data *rspi, struct spi_transfer *xfer)
+ {
++ if (rspi->master->can_dma && __rspi_can_dma(rspi, xfer))
++ return rspi_dma_transfer(rspi, NULL, &xfer->rx_sg);
++
+ return rspi_pio_transfer(rspi, NULL, xfer->rx_buf, xfer->len);
+ }
+
+--
+2.1.2
+
--- /dev/null
+From e56d4fdbae55f9daa5dedb7af34fb2310cb7192b Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 2 Jun 2014 15:38:18 +0200
+Subject: spi: rspi: Add DMA support for RSPI on RZ/A1H
+
+Enable DMA support for RSPI on r7s72100 (RZ/A1H).
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit e7fb921d9f62df05240ad1a74b5a0f623e503c9c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-rspi.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
+index bec81470dd9c..4bc4138e002b 100644
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -625,6 +625,9 @@ static int rspi_rz_transfer_one(struct spi_master *master,
+
+ rspi_rz_receive_init(rspi);
+
++ if (master->can_dma && __rspi_can_dma(rspi, xfer))
++ return rspi_dma_transfer(rspi, &xfer->tx_sg, &xfer->rx_sg);
++
+ ret = rspi_pio_transfer(rspi, xfer->tx_buf, xfer->rx_buf, xfer->len);
+ if (ret < 0)
+ return ret;
+--
+2.1.2
+
--- /dev/null
+From 2c539bf067e77137af2ecd1ccdb5801e57ffdae5 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 2 Jun 2014 15:38:19 +0200
+Subject: spi: rspi: Extract rspi_common_transfer()
+
+Extract the common parts of rspi_transfer_one(), rspi_rz_transfer_one(),
+and qspi_transfer_out_in() into the new function rspi_common_transfer().
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 8b983e90ea1a3dd82070f96c062ad521a06b7cc0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-rspi.c | 61 ++++++++++++++++++++------------------------------
+ 1 file changed, 24 insertions(+), 37 deletions(-)
+
+diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
+index 4bc4138e002b..10112745bb17 100644
+--- a/drivers/spi/spi-rspi.c
++++ b/drivers/spi/spi-rspi.c
+@@ -586,12 +586,32 @@ static bool rspi_can_dma(struct spi_master *master, struct spi_device *spi,
+ return __rspi_can_dma(rspi, xfer);
+ }
+
++static int rspi_common_transfer(struct rspi_data *rspi,
++ struct spi_transfer *xfer)
++{
++ int ret;
++
++ if (rspi->master->can_dma && __rspi_can_dma(rspi, xfer)) {
++ /* rx_buf can be NULL on RSPI on SH in TX-only Mode */
++ return rspi_dma_transfer(rspi, &xfer->tx_sg,
++ xfer->rx_buf ? &xfer->rx_sg : NULL);
++ }
++
++ ret = rspi_pio_transfer(rspi, xfer->tx_buf, xfer->rx_buf, xfer->len);
++ if (ret < 0)
++ return ret;
++
++ /* Wait for the last transmission */
++ rspi_wait_for_tx_empty(rspi);
++
++ return 0;
++}
++
+ static int rspi_transfer_one(struct spi_master *master, struct spi_device *spi,
+ struct spi_transfer *xfer)
+ {
+ struct rspi_data *rspi = spi_master_get_devdata(master);
+ u8 spcr;
+- int ret;
+
+ spcr = rspi_read8(rspi, RSPI_SPCR);
+ if (xfer->rx_buf) {
+@@ -602,18 +622,7 @@ static int rspi_transfer_one(struct spi_master *master, struct spi_device *spi,
+ }
+ rspi_write8(rspi, spcr, RSPI_SPCR);
+
+- if (master->can_dma && __rspi_can_dma(rspi, xfer))
+- return rspi_dma_transfer(rspi, &xfer->tx_sg,
+- xfer->rx_buf ? &xfer->rx_sg : NULL);
+-
+- ret = rspi_pio_transfer(rspi, xfer->tx_buf, xfer->rx_buf, xfer->len);
+- if (ret < 0)
+- return ret;
+-
+- /* Wait for the last transmission */
+- rspi_wait_for_tx_empty(rspi);
+-
+- return 0;
++ return rspi_common_transfer(rspi, xfer);
+ }
+
+ static int rspi_rz_transfer_one(struct spi_master *master,
+@@ -625,37 +634,15 @@ static int rspi_rz_transfer_one(struct spi_master *master,
+
+ rspi_rz_receive_init(rspi);
+
+- if (master->can_dma && __rspi_can_dma(rspi, xfer))
+- return rspi_dma_transfer(rspi, &xfer->tx_sg, &xfer->rx_sg);
+-
+- ret = rspi_pio_transfer(rspi, xfer->tx_buf, xfer->rx_buf, xfer->len);
+- if (ret < 0)
+- return ret;
+-
+- /* Wait for the last transmission */
+- rspi_wait_for_tx_empty(rspi);
+-
+- return 0;
++ return rspi_common_transfer(rspi, xfer);
+ }
+
+ static int qspi_transfer_out_in(struct rspi_data *rspi,
+ struct spi_transfer *xfer)
+ {
+- int ret;
+-
+ qspi_receive_init(rspi);
+
+- if (rspi->master->can_dma && __rspi_can_dma(rspi, xfer))
+- return rspi_dma_transfer(rspi, &xfer->tx_sg, &xfer->rx_sg);
+-
+- ret = rspi_pio_transfer(rspi, xfer->tx_buf, xfer->rx_buf, xfer->len);
+- if (ret < 0)
+- return ret;
+-
+- /* Wait for the last transmission */
+- rspi_wait_for_tx_empty(rspi);
+-
+- return 0;
++ return rspi_common_transfer(rspi, xfer);
+ }
+
+ static int qspi_transfer_out(struct rspi_data *rspi, struct spi_transfer *xfer)
+--
+2.1.2
+
--- /dev/null
+From fa588c118c6d93e70244437cc6799bca403fd0d2 Mon Sep 17 00:00:00 2001
+From: Sascha Hauer <s.hauer@pengutronix.de>
+Date: Wed, 14 May 2014 09:37:33 +0200
+Subject: ASoC: ak4642: Fix typo zoro -> zero
+
+Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit da731845d5b47c517876cb70884789aafa00771b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/codecs/ak4642.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/sound/soc/codecs/ak4642.c b/sound/soc/codecs/ak4642.c
+index 86242f770c10..647be66078ec 100644
+--- a/sound/soc/codecs/ak4642.c
++++ b/sound/soc/codecs/ak4642.c
+@@ -98,7 +98,7 @@
+ #define MGAIN0 (1 << 0) /* MIC amp gain*/
+
+ /* TIMER */
+-#define ZTM(param) ((param & 0x3) << 4) /* ALC Zoro Crossing TimeOut */
++#define ZTM(param) ((param & 0x3) << 4) /* ALC Zero Crossing TimeOut */
+ #define WTM(param) (((param & 0x4) << 4) | ((param & 0x3) << 2))
+
+ /* ALC_CTL1 */
+--
+2.1.2
+
--- /dev/null
+From 790fc89523e52a39e0d2d296d88cad59b1ca8580 Mon Sep 17 00:00:00 2001
+From: Alexandre Belloni <alexandre.belloni@free-electrons.com>
+Date: Mon, 19 May 2014 22:42:32 +0200
+Subject: pwm: add period and polarity to struct pwm_lookup
+
+Add period and polarity members to struct pwm_lookup so that platforms
+using the lookup table can be treated the same way as those using the
+device tree.
+
+Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
+Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
+(cherry picked from commit 3796ce1d4d4b330a75005c5eda105603ce9d4071)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pwm/core.c | 8 +++++++-
+ include/linux/pwm.h | 2 ++
+ 2 files changed, 9 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/pwm/core.c b/drivers/pwm/core.c
+index a80471399c20..4b66bf09ee55 100644
+--- a/drivers/pwm/core.c
++++ b/drivers/pwm/core.c
+@@ -661,10 +661,16 @@ struct pwm_device *pwm_get(struct device *dev, const char *con_id)
+ }
+ }
+
++ mutex_unlock(&pwm_lookup_lock);
++
+ if (chip)
+ pwm = pwm_request_from_chip(chip, index, con_id ?: dev_id);
++ if (IS_ERR(pwm))
++ return pwm;
++
++ pwm_set_period(pwm, p->period);
++ pwm_set_polarity(pwm, p->polarity);
+
+- mutex_unlock(&pwm_lookup_lock);
+
+ return pwm;
+ }
+diff --git a/include/linux/pwm.h b/include/linux/pwm.h
+index f0feafd184a0..29ca4572629d 100644
+--- a/include/linux/pwm.h
++++ b/include/linux/pwm.h
+@@ -274,6 +274,8 @@ struct pwm_lookup {
+ unsigned int index;
+ const char *dev_id;
+ const char *con_id;
++ unsigned int period;
++ enum pwm_polarity polarity;
+ };
+
+ #define PWM_LOOKUP(_provider, _index, _dev_id, _con_id) \
+--
+2.1.2
+
--- /dev/null
+From 5f34f219811b5b22e7116425b9a35b875111113c Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 1 Jun 2014 20:31:46 -0700
+Subject: usb: renesas: gadget: fixup: complete STATUS stage after receiving
+
+Current usbhs gadget driver didn't complete STATUS stage after receiving.
+It wasn't problem for us before, because some USB class doesn't use
+DATA OUT stage in control transfer.
+But, it is required on some device.
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Felipe Balbi <balbi@ti.com>
+(cherry picked from commit 3fe15505296cb563362e2cf6d3aed73e123e0df0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/renesas_usbhs/fifo.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c
+index d49f9c326035..4fd36530bfa3 100644
+--- a/drivers/usb/renesas_usbhs/fifo.c
++++ b/drivers/usb/renesas_usbhs/fifo.c
+@@ -681,6 +681,14 @@ usbhs_fifo_read_end:
+ usbhs_pipe_number(pipe),
+ pkt->length, pkt->actual, *is_done, pkt->zero);
+
++ /*
++ * Transmission end
++ */
++ if (*is_done) {
++ if (usbhs_pipe_is_dcp(pipe))
++ usbhs_dcp_control_transfer_done(pipe);
++ }
++
+ usbhs_fifo_read_busy:
+ usbhsf_fifo_unselect(pipe, fifo);
+
+--
+2.1.2
+
--- /dev/null
+From 049519721ae82d5c0ac4e4ea7a77190ade532cff Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Tue, 13 May 2014 02:30:14 +0400
+Subject: sh_eth: replace devm_kzalloc() with devm_kmalloc_array()
+
+When I was converting the driver to the managed device API, only devm_kzalloc()
+was available for memory allocation, so I had to use it, despite zeroing out the
+PHY IRQ array right before initializing all its entries to PHY_POLL was quite
+stupid. Now that devm_kmalloc_array() has become available, we can avoid the
+needless zeroing out...
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 86b5d251d5ac4dda51a022b34cb29b4ce65a8cd5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
+index 08ed9a30c3a7..2a29caa30479 100644
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -2641,8 +2641,8 @@ static int sh_mdio_init(struct sh_eth_private *mdp,
+ pdev->name, pdev->id);
+
+ /* PHY IRQ */
+- mdp->mii_bus->irq = devm_kzalloc(dev, sizeof(int) * PHY_MAX_ADDR,
+- GFP_KERNEL);
++ mdp->mii_bus->irq = devm_kmalloc_array(dev, PHY_MAX_ADDR, sizeof(int),
++ GFP_KERNEL);
+ if (!mdp->mii_bus->irq) {
+ ret = -ENOMEM;
+ goto out_free_bus;
+--
+2.1.2
+
--- /dev/null
+From 6957356d5eb8ab68bb660bfd3384b9ad06bd31cf Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Tue, 10 Jun 2014 09:40:14 +0900
+Subject: net: sh_eth: Fix receive packet "exceeded" condition in sh_eth_rx()
+
+This patch fixes the packet "exceeded" condition in sh_eth_rx() when
+RACT in an RX descriptor is not set and the "quota" is 0.
+Otherwise, kernel panic happens because the "&n->poll_list" is deleted
+twice in sh_eth_poll() which calls napi_complete() and net_rx_action().
+
+Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 4f809cea611f1f00a0b7a42751cb12d997a4c11c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 8 +++-----
+ 1 file changed, 3 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
+index 2a29caa30479..1b34ac0a2420 100644
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -1399,7 +1399,6 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
+ int entry = mdp->cur_rx % mdp->num_rx_ring;
+ int boguscnt = (mdp->dirty_rx + mdp->num_rx_ring) - mdp->cur_rx;
+ struct sk_buff *skb;
+- int exceeded = 0;
+ u16 pkt_len = 0;
+ u32 desc_status;
+
+@@ -1411,10 +1410,9 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
+ if (--boguscnt < 0)
+ break;
+
+- if (*quota <= 0) {
+- exceeded = 1;
++ if (*quota <= 0)
+ break;
+- }
++
+ (*quota)--;
+
+ if (!(desc_status & RDFEND))
+@@ -1508,7 +1506,7 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
+ sh_eth_write(ndev, EDRRR_R, EDRRR);
+ }
+
+- return exceeded;
++ return *quota <= 0;
+ }
+
+ static void sh_eth_rcv_snd_disable(struct net_device *ndev)
+--
+2.1.2
+
--- /dev/null
+From 95182e43d089e4bacb90726bd2c629d7a79df05e Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Tue, 10 Jun 2014 09:40:24 +0900
+Subject: net: sh_eth: Fix timing of RACT setting in sh_eth_rx()
+
+This patch fixes an issue that we cannot use nfs rootfs correctly
+on r8a7790 when the command below runs on a host PC.
+
+ $ sudo ping -f -l 8 $BOARD_IP_ADDR
+
+Since the driver sets the RACT to 1 in the first while loop of
+sh_eth_rx(), the controller accepts a next frame into the next RX
+descriptor during the while loop. But, in the first while loop
+doesn't allocate a next skb. So, this patch removes the RACT setting
+in the first while loop of sh_eth_rx().
+
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+(cherry picked from commit 1b72a0fc9c308d9f3255c177945cf383c3c82b0e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/net/ethernet/renesas/sh_eth.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
+index 1b34ac0a2420..10af820e1d45 100644
+--- a/drivers/net/ethernet/renesas/sh_eth.c
++++ b/drivers/net/ethernet/renesas/sh_eth.c
+@@ -1460,7 +1460,6 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
+ ndev->stats.rx_packets++;
+ ndev->stats.rx_bytes += pkt_len;
+ }
+- rxdesc->status |= cpu_to_edmac(mdp, RD_RACT);
+ entry = (++mdp->cur_rx) % mdp->num_rx_ring;
+ rxdesc = &mdp->rx_ring[entry];
+ }
+--
+2.1.2
+
--- /dev/null
+From c951633533e5729e39d98064c78f1c61e21f31eb Mon Sep 17 00:00:00 2001
+From: Phil Edworthy <phil.edworthy@renesas.com>
+Date: Mon, 12 May 2014 11:57:48 +0100
+Subject: PCI: rcar: Add Renesas R-Car PCIe driver
+
+This PCIe Host driver currently does not support MSI, so cards fall back to
+INTx interrupts.
+
+Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Acked-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c25da4778803b41e11fd82dd5576c35c09b5f0e0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pci/host/Kconfig | 6 +
+ drivers/pci/host/Makefile | 1 +
+ drivers/pci/host/pcie-rcar.c | 768 +++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 775 insertions(+)
+ create mode 100644 drivers/pci/host/pcie-rcar.c
+
+diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
+index 47d46c6d8468..dc627e5b7795 100644
+--- a/drivers/pci/host/Kconfig
++++ b/drivers/pci/host/Kconfig
+@@ -33,4 +33,10 @@ config PCI_RCAR_GEN2
+ There are 3 internal PCI controllers available with a single
+ built-in EHCI/OHCI host controller present on each one.
+
++config PCI_RCAR_GEN2_PCIE
++ bool "Renesas R-Car PCIe controller"
++ depends on ARCH_SHMOBILE || (ARM && COMPILE_TEST)
++ help
++ Say Y here if you want PCIe controller support on R-Car Gen2 SoCs.
++
+ endmenu
+diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile
+index 13fb3333aa05..19946f9a4521 100644
+--- a/drivers/pci/host/Makefile
++++ b/drivers/pci/host/Makefile
+@@ -4,3 +4,4 @@ obj-$(CONFIG_PCI_IMX6) += pci-imx6.o
+ obj-$(CONFIG_PCI_MVEBU) += pci-mvebu.o
+ obj-$(CONFIG_PCI_TEGRA) += pci-tegra.o
+ obj-$(CONFIG_PCI_RCAR_GEN2) += pci-rcar-gen2.o
++obj-$(CONFIG_PCI_RCAR_GEN2_PCIE) += pcie-rcar.o
+diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
+new file mode 100644
+index 000000000000..3c524b9e60e5
+--- /dev/null
++++ b/drivers/pci/host/pcie-rcar.c
+@@ -0,0 +1,768 @@
++/*
++ * PCIe driver for Renesas R-Car SoCs
++ * Copyright (C) 2014 Renesas Electronics Europe Ltd
++ *
++ * Based on:
++ * arch/sh/drivers/pci/pcie-sh7786.c
++ * arch/sh/drivers/pci/ops-sh7786.c
++ * Copyright (C) 2009 - 2011 Paul Mundt
++ *
++ * This file is licensed under the terms of the GNU General Public
++ * License version 2. This program is licensed "as is" without any
++ * warranty of any kind, whether express or implied.
++ */
++
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/interrupt.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/of_address.h>
++#include <linux/of_irq.h>
++#include <linux/of_pci.h>
++#include <linux/of_platform.h>
++#include <linux/pci.h>
++#include <linux/platform_device.h>
++#include <linux/slab.h>
++
++#define DRV_NAME "rcar-pcie"
++
++#define PCIECAR 0x000010
++#define PCIECCTLR 0x000018
++#define CONFIG_SEND_ENABLE (1 << 31)
++#define TYPE0 (0 << 8)
++#define TYPE1 (1 << 8)
++#define PCIECDR 0x000020
++#define PCIEMSR 0x000028
++#define PCIEINTXR 0x000400
++
++/* Transfer control */
++#define PCIETCTLR 0x02000
++#define CFINIT 1
++#define PCIETSTR 0x02004
++#define DATA_LINK_ACTIVE 1
++#define PCIEERRFR 0x02020
++#define UNSUPPORTED_REQUEST (1 << 4)
++
++/* root port address */
++#define PCIEPRAR(x) (0x02080 + ((x) * 0x4))
++
++/* local address reg & mask */
++#define PCIELAR(x) (0x02200 + ((x) * 0x20))
++#define PCIELAMR(x) (0x02208 + ((x) * 0x20))
++#define LAM_PREFETCH (1 << 3)
++#define LAM_64BIT (1 << 2)
++#define LAR_ENABLE (1 << 1)
++
++/* PCIe address reg & mask */
++#define PCIEPARL(x) (0x03400 + ((x) * 0x20))
++#define PCIEPARH(x) (0x03404 + ((x) * 0x20))
++#define PCIEPAMR(x) (0x03408 + ((x) * 0x20))
++#define PCIEPTCTLR(x) (0x0340c + ((x) * 0x20))
++#define PAR_ENABLE (1 << 31)
++#define IO_SPACE (1 << 8)
++
++/* Configuration */
++#define PCICONF(x) (0x010000 + ((x) * 0x4))
++#define PMCAP(x) (0x010040 + ((x) * 0x4))
++#define EXPCAP(x) (0x010070 + ((x) * 0x4))
++#define VCCAP(x) (0x010100 + ((x) * 0x4))
++
++/* link layer */
++#define IDSETR1 0x011004
++#define TLCTLR 0x011048
++#define MACSR 0x011054
++#define MACCTLR 0x011058
++#define SCRAMBLE_DISABLE (1 << 27)
++
++/* R-Car H1 PHY */
++#define H1_PCIEPHYADRR 0x04000c
++#define WRITE_CMD (1 << 16)
++#define PHY_ACK (1 << 24)
++#define RATE_POS 12
++#define LANE_POS 8
++#define ADR_POS 0
++#define H1_PCIEPHYDOUTR 0x040014
++#define H1_PCIEPHYSR 0x040018
++
++#define RCONF(x) (PCICONF(0)+(x))
++#define RPMCAP(x) (PMCAP(0)+(x))
++#define REXPCAP(x) (EXPCAP(0)+(x))
++#define RVCCAP(x) (VCCAP(0)+(x))
++
++#define PCIE_CONF_BUS(b) (((b) & 0xff) << 24)
++#define PCIE_CONF_DEV(d) (((d) & 0x1f) << 19)
++#define PCIE_CONF_FUNC(f) (((f) & 0x7) << 16)
++
++#define PCI_MAX_RESOURCES 4
++#define MAX_NR_INBOUND_MAPS 6
++
++/* Structure representing the PCIe interface */
++struct rcar_pcie {
++ struct device *dev;
++ void __iomem *base;
++ struct resource res[PCI_MAX_RESOURCES];
++ struct resource busn;
++ int root_bus_nr;
++ struct clk *clk;
++ struct clk *bus_clk;
++};
++
++static inline struct rcar_pcie *sys_to_pcie(struct pci_sys_data *sys)
++{
++ return sys->private_data;
++}
++
++static void pci_write_reg(struct rcar_pcie *pcie, unsigned long val,
++ unsigned long reg)
++{
++ writel(val, pcie->base + reg);
++}
++
++static unsigned long pci_read_reg(struct rcar_pcie *pcie, unsigned long reg)
++{
++ return readl(pcie->base + reg);
++}
++
++enum {
++ PCI_ACCESS_READ,
++ PCI_ACCESS_WRITE,
++};
++
++static void rcar_rmw32(struct rcar_pcie *pcie, int where, u32 mask, u32 data)
++{
++ int shift = 8 * (where & 3);
++ u32 val = pci_read_reg(pcie, where & ~3);
++
++ val &= ~(mask << shift);
++ val |= data << shift;
++ pci_write_reg(pcie, val, where & ~3);
++}
++
++static u32 rcar_read_conf(struct rcar_pcie *pcie, int where)
++{
++ int shift = 8 * (where & 3);
++ u32 val = pci_read_reg(pcie, where & ~3);
++
++ return val >> shift;
++}
++
++/* Serialization is provided by 'pci_lock' in drivers/pci/access.c */
++static int rcar_pcie_config_access(struct rcar_pcie *pcie,
++ unsigned char access_type, struct pci_bus *bus,
++ unsigned int devfn, int where, u32 *data)
++{
++ int dev, func, reg, index;
++
++ dev = PCI_SLOT(devfn);
++ func = PCI_FUNC(devfn);
++ reg = where & ~3;
++ index = reg / 4;
++
++ /*
++ * While each channel has its own memory-mapped extended config
++ * space, it's generally only accessible when in endpoint mode.
++ * When in root complex mode, the controller is unable to target
++ * itself with either type 0 or type 1 accesses, and indeed, any
++ * controller initiated target transfer to its own config space
++ * result in a completer abort.
++ *
++ * Each channel effectively only supports a single device, but as
++ * the same channel <-> device access works for any PCI_SLOT()
++ * value, we cheat a bit here and bind the controller's config
++ * space to devfn 0 in order to enable self-enumeration. In this
++ * case the regular ECAR/ECDR path is sidelined and the mangled
++ * config access itself is initiated as an internal bus transaction.
++ */
++ if (pci_is_root_bus(bus)) {
++ if (dev != 0)
++ return PCIBIOS_DEVICE_NOT_FOUND;
++
++ if (access_type == PCI_ACCESS_READ) {
++ *data = pci_read_reg(pcie, PCICONF(index));
++ } else {
++ /* Keep an eye out for changes to the root bus number */
++ if (pci_is_root_bus(bus) && (reg == PCI_PRIMARY_BUS))
++ pcie->root_bus_nr = *data & 0xff;
++
++ pci_write_reg(pcie, *data, PCICONF(index));
++ }
++
++ return PCIBIOS_SUCCESSFUL;
++ }
++
++ if (pcie->root_bus_nr < 0)
++ return PCIBIOS_DEVICE_NOT_FOUND;
++
++ /* Clear errors */
++ pci_write_reg(pcie, pci_read_reg(pcie, PCIEERRFR), PCIEERRFR);
++
++ /* Set the PIO address */
++ pci_write_reg(pcie, PCIE_CONF_BUS(bus->number) | PCIE_CONF_DEV(dev) |
++ PCIE_CONF_FUNC(func) | reg, PCIECAR);
++
++ /* Enable the configuration access */
++ if (bus->parent->number == pcie->root_bus_nr)
++ pci_write_reg(pcie, CONFIG_SEND_ENABLE | TYPE0, PCIECCTLR);
++ else
++ pci_write_reg(pcie, CONFIG_SEND_ENABLE | TYPE1, PCIECCTLR);
++
++ /* Check for errors */
++ if (pci_read_reg(pcie, PCIEERRFR) & UNSUPPORTED_REQUEST)
++ return PCIBIOS_DEVICE_NOT_FOUND;
++
++ /* Check for master and target aborts */
++ if (rcar_read_conf(pcie, RCONF(PCI_STATUS)) &
++ (PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_REC_TARGET_ABORT))
++ return PCIBIOS_DEVICE_NOT_FOUND;
++
++ if (access_type == PCI_ACCESS_READ)
++ *data = pci_read_reg(pcie, PCIECDR);
++ else
++ pci_write_reg(pcie, *data, PCIECDR);
++
++ /* Disable the configuration access */
++ pci_write_reg(pcie, 0, PCIECCTLR);
++
++ return PCIBIOS_SUCCESSFUL;
++}
++
++static int rcar_pcie_read_conf(struct pci_bus *bus, unsigned int devfn,
++ int where, int size, u32 *val)
++{
++ struct rcar_pcie *pcie = sys_to_pcie(bus->sysdata);
++ int ret;
++
++ if ((size == 2) && (where & 1))
++ return PCIBIOS_BAD_REGISTER_NUMBER;
++ else if ((size == 4) && (where & 3))
++ return PCIBIOS_BAD_REGISTER_NUMBER;
++
++ ret = rcar_pcie_config_access(pcie, PCI_ACCESS_READ,
++ bus, devfn, where, val);
++ if (ret != PCIBIOS_SUCCESSFUL) {
++ *val = 0xffffffff;
++ return ret;
++ }
++
++ if (size == 1)
++ *val = (*val >> (8 * (where & 3))) & 0xff;
++ else if (size == 2)
++ *val = (*val >> (8 * (where & 2))) & 0xffff;
++
++ dev_dbg(&bus->dev, "pcie-config-read: bus=%3d devfn=0x%04x "
++ "where=0x%04x size=%d val=0x%08lx\n", bus->number,
++ devfn, where, size, (unsigned long)*val);
++
++ return ret;
++}
++
++/* Serialization is provided by 'pci_lock' in drivers/pci/access.c */
++static int rcar_pcie_write_conf(struct pci_bus *bus, unsigned int devfn,
++ int where, int size, u32 val)
++{
++ struct rcar_pcie *pcie = sys_to_pcie(bus->sysdata);
++ int shift, ret;
++ u32 data;
++
++ if ((size == 2) && (where & 1))
++ return PCIBIOS_BAD_REGISTER_NUMBER;
++ else if ((size == 4) && (where & 3))
++ return PCIBIOS_BAD_REGISTER_NUMBER;
++
++ ret = rcar_pcie_config_access(pcie, PCI_ACCESS_READ,
++ bus, devfn, where, &data);
++ if (ret != PCIBIOS_SUCCESSFUL)
++ return ret;
++
++ dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x "
++ "where=0x%04x size=%d val=0x%08lx\n", bus->number,
++ devfn, where, size, (unsigned long)val);
++
++ if (size == 1) {
++ shift = 8 * (where & 3);
++ data &= ~(0xff << shift);
++ data |= ((val & 0xff) << shift);
++ } else if (size == 2) {
++ shift = 8 * (where & 2);
++ data &= ~(0xffff << shift);
++ data |= ((val & 0xffff) << shift);
++ } else
++ data = val;
++
++ ret = rcar_pcie_config_access(pcie, PCI_ACCESS_WRITE,
++ bus, devfn, where, &data);
++
++ return ret;
++}
++
++static struct pci_ops rcar_pcie_ops = {
++ .read = rcar_pcie_read_conf,
++ .write = rcar_pcie_write_conf,
++};
++
++static void rcar_pcie_setup_window(int win, struct resource *res,
++ struct rcar_pcie *pcie)
++{
++ /* Setup PCIe address space mappings for each resource */
++ resource_size_t size;
++ u32 mask;
++
++ pci_write_reg(pcie, 0x00000000, PCIEPTCTLR(win));
++
++ /*
++ * The PAMR mask is calculated in units of 128Bytes, which
++ * keeps things pretty simple.
++ */
++ size = resource_size(res);
++ mask = (roundup_pow_of_two(size) / SZ_128) - 1;
++ pci_write_reg(pcie, mask << 7, PCIEPAMR(win));
++
++ pci_write_reg(pcie, upper_32_bits(res->start), PCIEPARH(win));
++ pci_write_reg(pcie, lower_32_bits(res->start), PCIEPARL(win));
++
++ /* First resource is for IO */
++ mask = PAR_ENABLE;
++ if (res->flags & IORESOURCE_IO)
++ mask |= IO_SPACE;
++
++ pci_write_reg(pcie, mask, PCIEPTCTLR(win));
++}
++
++static int rcar_pcie_setup(int nr, struct pci_sys_data *sys)
++{
++ struct rcar_pcie *pcie = sys_to_pcie(sys);
++ struct resource *res;
++ int i;
++
++ pcie->root_bus_nr = -1;
++
++ /* Setup PCI resources */
++ for (i = 0; i < PCI_MAX_RESOURCES; i++) {
++
++ res = &pcie->res[i];
++ if (!res->flags)
++ continue;
++
++ rcar_pcie_setup_window(i, res, pcie);
++
++ if (res->flags & IORESOURCE_IO)
++ pci_ioremap_io(nr * SZ_64K, res->start);
++ else
++ pci_add_resource(&sys->resources, res);
++ }
++ pci_add_resource(&sys->resources, &pcie->busn);
++
++ return 1;
++}
++
++struct hw_pci rcar_pci = {
++ .setup = rcar_pcie_setup,
++ .map_irq = of_irq_parse_and_map_pci,
++ .ops = &rcar_pcie_ops,
++};
++
++static void rcar_pcie_enable(struct rcar_pcie *pcie)
++{
++ struct platform_device *pdev = to_platform_device(pcie->dev);
++
++ rcar_pci.nr_controllers = 1;
++ rcar_pci.private_data = (void **)&pcie;
++
++ pci_common_init_dev(&pdev->dev, &rcar_pci);
++#ifdef CONFIG_PCI_DOMAINS
++ rcar_pci.domain++;
++#endif
++}
++
++static int phy_wait_for_ack(struct rcar_pcie *pcie)
++{
++ unsigned int timeout = 100;
++
++ while (timeout--) {
++ if (pci_read_reg(pcie, H1_PCIEPHYADRR) & PHY_ACK)
++ return 0;
++
++ udelay(100);
++ }
++
++ dev_err(pcie->dev, "Access to PCIe phy timed out\n");
++
++ return -ETIMEDOUT;
++}
++
++static void phy_write_reg(struct rcar_pcie *pcie,
++ unsigned int rate, unsigned int addr,
++ unsigned int lane, unsigned int data)
++{
++ unsigned long phyaddr;
++
++ phyaddr = WRITE_CMD |
++ ((rate & 1) << RATE_POS) |
++ ((lane & 0xf) << LANE_POS) |
++ ((addr & 0xff) << ADR_POS);
++
++ /* Set write data */
++ pci_write_reg(pcie, data, H1_PCIEPHYDOUTR);
++ pci_write_reg(pcie, phyaddr, H1_PCIEPHYADRR);
++
++ /* Ignore errors as they will be dealt with if the data link is down */
++ phy_wait_for_ack(pcie);
++
++ /* Clear command */
++ pci_write_reg(pcie, 0, H1_PCIEPHYDOUTR);
++ pci_write_reg(pcie, 0, H1_PCIEPHYADRR);
++
++ /* Ignore errors as they will be dealt with if the data link is down */
++ phy_wait_for_ack(pcie);
++}
++
++static int rcar_pcie_wait_for_dl(struct rcar_pcie *pcie)
++{
++ unsigned int timeout = 10;
++
++ while (timeout--) {
++ if ((pci_read_reg(pcie, PCIETSTR) & DATA_LINK_ACTIVE))
++ return 0;
++
++ msleep(5);
++ }
++
++ return -ETIMEDOUT;
++}
++
++static int rcar_pcie_hw_init(struct rcar_pcie *pcie)
++{
++ int err;
++
++ /* Begin initialization */
++ pci_write_reg(pcie, 0, PCIETCTLR);
++
++ /* Set mode */
++ pci_write_reg(pcie, 1, PCIEMSR);
++
++ /*
++ * Initial header for port config space is type 1, set the device
++ * class to match. Hardware takes care of propagating the IDSETR
++ * settings, so there is no need to bother with a quirk.
++ */
++ pci_write_reg(pcie, PCI_CLASS_BRIDGE_PCI << 16, IDSETR1);
++
++ /*
++ * Setup Secondary Bus Number & Subordinate Bus Number, even though
++ * they aren't used, to avoid bridge being detected as broken.
++ */
++ rcar_rmw32(pcie, RCONF(PCI_SECONDARY_BUS), 0xff, 1);
++ rcar_rmw32(pcie, RCONF(PCI_SUBORDINATE_BUS), 0xff, 1);
++
++ /* Initialize default capabilities. */
++ rcar_rmw32(pcie, REXPCAP(0), 0, PCI_CAP_ID_EXP);
++ rcar_rmw32(pcie, REXPCAP(PCI_EXP_FLAGS),
++ PCI_EXP_FLAGS_TYPE, PCI_EXP_TYPE_ROOT_PORT << 4);
++ rcar_rmw32(pcie, RCONF(PCI_HEADER_TYPE), 0x7f,
++ PCI_HEADER_TYPE_BRIDGE);
++
++ /* Enable data link layer active state reporting */
++ rcar_rmw32(pcie, REXPCAP(PCI_EXP_LNKCAP), 0, PCI_EXP_LNKCAP_DLLLARC);
++
++ /* Write out the physical slot number = 0 */
++ rcar_rmw32(pcie, REXPCAP(PCI_EXP_SLTCAP), PCI_EXP_SLTCAP_PSN, 0);
++
++ /* Set the completion timer timeout to the maximum 50ms. */
++ rcar_rmw32(pcie, TLCTLR+1, 0x3f, 50);
++
++ /* Terminate list of capabilities (Next Capability Offset=0) */
++ rcar_rmw32(pcie, RVCCAP(0), 0xfff0, 0);
++
++ /* Enable MAC data scrambling. */
++ rcar_rmw32(pcie, MACCTLR, SCRAMBLE_DISABLE, 0);
++
++ /* Finish initialization - establish a PCI Express link */
++ pci_write_reg(pcie, CFINIT, PCIETCTLR);
++
++ /* This will timeout if we don't have a link. */
++ err = rcar_pcie_wait_for_dl(pcie);
++ if (err)
++ return err;
++
++ /* Enable INTx interrupts */
++ rcar_rmw32(pcie, PCIEINTXR, 0, 0xF << 8);
++
++ /* Enable slave Bus Mastering */
++ rcar_rmw32(pcie, RCONF(PCI_STATUS), PCI_STATUS_DEVSEL_MASK,
++ PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
++ PCI_STATUS_CAP_LIST | PCI_STATUS_DEVSEL_FAST);
++
++ wmb();
++
++ return 0;
++}
++
++static int rcar_pcie_hw_init_h1(struct rcar_pcie *pcie)
++{
++ unsigned int timeout = 10;
++
++ /* Initialize the phy */
++ phy_write_reg(pcie, 0, 0x42, 0x1, 0x0EC34191);
++ phy_write_reg(pcie, 1, 0x42, 0x1, 0x0EC34180);
++ phy_write_reg(pcie, 0, 0x43, 0x1, 0x00210188);
++ phy_write_reg(pcie, 1, 0x43, 0x1, 0x00210188);
++ phy_write_reg(pcie, 0, 0x44, 0x1, 0x015C0014);
++ phy_write_reg(pcie, 1, 0x44, 0x1, 0x015C0014);
++ phy_write_reg(pcie, 1, 0x4C, 0x1, 0x786174A0);
++ phy_write_reg(pcie, 1, 0x4D, 0x1, 0x048000BB);
++ phy_write_reg(pcie, 0, 0x51, 0x1, 0x079EC062);
++ phy_write_reg(pcie, 0, 0x52, 0x1, 0x20000000);
++ phy_write_reg(pcie, 1, 0x52, 0x1, 0x20000000);
++ phy_write_reg(pcie, 1, 0x56, 0x1, 0x00003806);
++
++ phy_write_reg(pcie, 0, 0x60, 0x1, 0x004B03A5);
++ phy_write_reg(pcie, 0, 0x64, 0x1, 0x3F0F1F0F);
++ phy_write_reg(pcie, 0, 0x66, 0x1, 0x00008000);
++
++ while (timeout--) {
++ if (pci_read_reg(pcie, H1_PCIEPHYSR))
++ return rcar_pcie_hw_init(pcie);
++
++ msleep(5);
++ }
++
++ return -ETIMEDOUT;
++}
++
++static int rcar_pcie_get_resources(struct platform_device *pdev,
++ struct rcar_pcie *pcie)
++{
++ struct resource res;
++ int err;
++
++ err = of_address_to_resource(pdev->dev.of_node, 0, &res);
++ if (err)
++ return err;
++
++ pcie->clk = devm_clk_get(&pdev->dev, "pcie");
++ if (IS_ERR(pcie->clk)) {
++ dev_err(pcie->dev, "cannot get platform clock\n");
++ return PTR_ERR(pcie->clk);
++ }
++ err = clk_prepare_enable(pcie->clk);
++ if (err)
++ goto fail_clk;
++
++ pcie->bus_clk = devm_clk_get(&pdev->dev, "pcie_bus");
++ if (IS_ERR(pcie->bus_clk)) {
++ dev_err(pcie->dev, "cannot get pcie bus clock\n");
++ err = PTR_ERR(pcie->bus_clk);
++ goto fail_clk;
++ }
++ err = clk_prepare_enable(pcie->bus_clk);
++ if (err)
++ goto err_map_reg;
++
++ pcie->base = devm_ioremap_resource(&pdev->dev, &res);
++ if (IS_ERR(pcie->base)) {
++ err = PTR_ERR(pcie->base);
++ goto err_map_reg;
++ }
++
++ return 0;
++
++err_map_reg:
++ clk_disable_unprepare(pcie->bus_clk);
++fail_clk:
++ clk_disable_unprepare(pcie->clk);
++
++ return err;
++}
++
++static int rcar_pcie_inbound_ranges(struct rcar_pcie *pcie,
++ struct of_pci_range *range,
++ int *index)
++{
++ u64 restype = range->flags;
++ u64 cpu_addr = range->cpu_addr;
++ u64 cpu_end = range->cpu_addr + range->size;
++ u64 pci_addr = range->pci_addr;
++ u32 flags = LAM_64BIT | LAR_ENABLE;
++ u64 mask;
++ u64 size;
++ int idx = *index;
++
++ if (restype & IORESOURCE_PREFETCH)
++ flags |= LAM_PREFETCH;
++
++ /*
++ * If the size of the range is larger than the alignment of the start
++ * address, we have to use multiple entries to perform the mapping.
++ */
++ if (cpu_addr > 0) {
++ unsigned long nr_zeros = __ffs64(cpu_addr);
++ u64 alignment = 1ULL << nr_zeros;
++ size = min(range->size, alignment);
++ } else {
++ size = range->size;
++ }
++ /* Hardware supports max 4GiB inbound region */
++ size = min(size, 1ULL << 32);
++
++ mask = roundup_pow_of_two(size) - 1;
++ mask &= ~0xf;
++
++ while (cpu_addr < cpu_end) {
++ /*
++ * Set up 64-bit inbound regions as the range parser doesn't
++ * distinguish between 32 and 64-bit types.
++ */
++ pci_write_reg(pcie, lower_32_bits(pci_addr), PCIEPRAR(idx));
++ pci_write_reg(pcie, lower_32_bits(cpu_addr), PCIELAR(idx));
++ pci_write_reg(pcie, lower_32_bits(mask) | flags, PCIELAMR(idx));
++
++ pci_write_reg(pcie, upper_32_bits(pci_addr), PCIEPRAR(idx+1));
++ pci_write_reg(pcie, upper_32_bits(cpu_addr), PCIELAR(idx+1));
++ pci_write_reg(pcie, 0, PCIELAMR(idx+1));
++
++ pci_addr += size;
++ cpu_addr += size;
++ idx += 2;
++
++ if (idx > MAX_NR_INBOUND_MAPS) {
++ dev_err(pcie->dev, "Failed to map inbound regions!\n");
++ return -EINVAL;
++ }
++ }
++ *index = idx;
++
++ return 0;
++}
++
++static int pci_dma_range_parser_init(struct of_pci_range_parser *parser,
++ struct device_node *node)
++{
++ const int na = 3, ns = 2;
++ int rlen;
++
++ parser->node = node;
++ parser->pna = of_n_addr_cells(node);
++ parser->np = parser->pna + na + ns;
++
++ parser->range = of_get_property(node, "dma-ranges", &rlen);
++ if (!parser->range)
++ return -ENOENT;
++
++ parser->end = parser->range + rlen / sizeof(__be32);
++ return 0;
++}
++
++static int rcar_pcie_parse_map_dma_ranges(struct rcar_pcie *pcie,
++ struct device_node *np)
++{
++ struct of_pci_range range;
++ struct of_pci_range_parser parser;
++ int index = 0;
++ int err;
++
++ if (pci_dma_range_parser_init(&parser, np))
++ return -EINVAL;
++
++ /* Get the dma-ranges from DT */
++ for_each_of_pci_range(&parser, &range) {
++ u64 end = range.cpu_addr + range.size - 1;
++ dev_dbg(pcie->dev, "0x%08x 0x%016llx..0x%016llx -> 0x%016llx\n",
++ range.flags, range.cpu_addr, end, range.pci_addr);
++
++ err = rcar_pcie_inbound_ranges(pcie, &range, &index);
++ if (err)
++ return err;
++ }
++
++ return 0;
++}
++
++static const struct of_device_id rcar_pcie_of_match[] = {
++ { .compatible = "renesas,pcie-r8a7779", .data = rcar_pcie_hw_init_h1 },
++ { .compatible = "renesas,pcie-r8a7790", .data = rcar_pcie_hw_init },
++ { .compatible = "renesas,pcie-r8a7791", .data = rcar_pcie_hw_init },
++ {},
++};
++MODULE_DEVICE_TABLE(of, rcar_pcie_of_match);
++
++static int rcar_pcie_probe(struct platform_device *pdev)
++{
++ struct rcar_pcie *pcie;
++ unsigned int data;
++ struct of_pci_range range;
++ struct of_pci_range_parser parser;
++ const struct of_device_id *of_id;
++ int err, win = 0;
++ int (*hw_init_fn)(struct rcar_pcie *);
++
++ pcie = devm_kzalloc(&pdev->dev, sizeof(*pcie), GFP_KERNEL);
++ if (!pcie)
++ return -ENOMEM;
++
++ pcie->dev = &pdev->dev;
++ platform_set_drvdata(pdev, pcie);
++
++ /* Get the bus range */
++ if (of_pci_parse_bus_range(pdev->dev.of_node, &pcie->busn)) {
++ dev_err(&pdev->dev, "failed to parse bus-range property\n");
++ return -EINVAL;
++ }
++
++ if (of_pci_range_parser_init(&parser, pdev->dev.of_node)) {
++ dev_err(&pdev->dev, "missing ranges property\n");
++ return -EINVAL;
++ }
++
++ err = rcar_pcie_get_resources(pdev, pcie);
++ if (err < 0) {
++ dev_err(&pdev->dev, "failed to request resources: %d\n", err);
++ return err;
++ }
++
++ for_each_of_pci_range(&parser, &range) {
++ of_pci_range_to_resource(&range, pdev->dev.of_node,
++ &pcie->res[win++]);
++
++ if (win > PCI_MAX_RESOURCES)
++ break;
++ }
++
++ err = rcar_pcie_parse_map_dma_ranges(pcie, pdev->dev.of_node);
++ if (err)
++ return err;
++
++ of_id = of_match_device(rcar_pcie_of_match, pcie->dev);
++ if (!of_id || !of_id->data)
++ return -EINVAL;
++ hw_init_fn = of_id->data;
++
++ /* Failure to get a link might just be that no cards are inserted */
++ err = hw_init_fn(pcie);
++ if (err) {
++ dev_info(&pdev->dev, "PCIe link down\n");
++ return 0;
++ }
++
++ data = pci_read_reg(pcie, MACSR);
++ dev_info(&pdev->dev, "PCIe x%d: link up\n", (data >> 20) & 0x3f);
++
++ rcar_pcie_enable(pcie);
++
++ return 0;
++}
++
++static struct platform_driver rcar_pcie_driver = {
++ .driver = {
++ .name = DRV_NAME,
++ .owner = THIS_MODULE,
++ .of_match_table = rcar_pcie_of_match,
++ .suppress_bind_attrs = true,
++ },
++ .probe = rcar_pcie_probe,
++};
++module_platform_driver(rcar_pcie_driver);
++
++MODULE_AUTHOR("Phil Edworthy <phil.edworthy@renesas.com>");
++MODULE_DESCRIPTION("Renesas R-Car PCIe driver");
++MODULE_LICENSE("GPLv2");
+--
+2.1.2
+
--- /dev/null
+From 9da52b385656f7aadbb7a819282652a0e1713393 Mon Sep 17 00:00:00 2001
+From: Phil Edworthy <phil.edworthy@renesas.com>
+Date: Mon, 12 May 2014 11:57:49 +0100
+Subject: PCI: rcar: Add MSI support for PCIe
+
+Add MSI support to the R-Car PCIe driver.
+
+Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
+Acked-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 290c1fb35860540223bef1be021944d02232889d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/pci/host/pcie-rcar.c | 242 ++++++++++++++++++++++++++++++++++++++++++-
+ 1 file changed, 241 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
+index 3c524b9e60e5..8e06124aa80f 100644
+--- a/drivers/pci/host/pcie-rcar.c
++++ b/drivers/pci/host/pcie-rcar.c
+@@ -15,8 +15,11 @@
+ #include <linux/clk.h>
+ #include <linux/delay.h>
+ #include <linux/interrupt.h>
++#include <linux/irq.h>
++#include <linux/irqdomain.h>
+ #include <linux/kernel.h>
+ #include <linux/module.h>
++#include <linux/msi.h>
+ #include <linux/of_address.h>
+ #include <linux/of_irq.h>
+ #include <linux/of_pci.h>
+@@ -35,6 +38,7 @@
+ #define PCIECDR 0x000020
+ #define PCIEMSR 0x000028
+ #define PCIEINTXR 0x000400
++#define PCIEMSITXR 0x000840
+
+ /* Transfer control */
+ #define PCIETCTLR 0x02000
+@@ -43,6 +47,11 @@
+ #define DATA_LINK_ACTIVE 1
+ #define PCIEERRFR 0x02020
+ #define UNSUPPORTED_REQUEST (1 << 4)
++#define PCIEMSIFR 0x02044
++#define PCIEMSIALR 0x02048
++#define MSIFE 1
++#define PCIEMSIAUR 0x0204c
++#define PCIEMSIIER 0x02050
+
+ /* root port address */
+ #define PCIEPRAR(x) (0x02080 + ((x) * 0x4))
+@@ -85,6 +94,8 @@
+ #define H1_PCIEPHYDOUTR 0x040014
+ #define H1_PCIEPHYSR 0x040018
+
++#define INT_PCI_MSI_NR 32
++
+ #define RCONF(x) (PCICONF(0)+(x))
+ #define RPMCAP(x) (PMCAP(0)+(x))
+ #define REXPCAP(x) (EXPCAP(0)+(x))
+@@ -97,6 +108,21 @@
+ #define PCI_MAX_RESOURCES 4
+ #define MAX_NR_INBOUND_MAPS 6
+
++struct rcar_msi {
++ DECLARE_BITMAP(used, INT_PCI_MSI_NR);
++ struct irq_domain *domain;
++ struct msi_chip chip;
++ unsigned long pages;
++ struct mutex lock;
++ int irq1;
++ int irq2;
++};
++
++static inline struct rcar_msi *to_rcar_msi(struct msi_chip *chip)
++{
++ return container_of(chip, struct rcar_msi, chip);
++}
++
+ /* Structure representing the PCIe interface */
+ struct rcar_pcie {
+ struct device *dev;
+@@ -106,6 +132,7 @@ struct rcar_pcie {
+ int root_bus_nr;
+ struct clk *clk;
+ struct clk *bus_clk;
++ struct rcar_msi msi;
+ };
+
+ static inline struct rcar_pcie *sys_to_pcie(struct pci_sys_data *sys)
+@@ -356,10 +383,20 @@ static int rcar_pcie_setup(int nr, struct pci_sys_data *sys)
+ return 1;
+ }
+
++static void rcar_pcie_add_bus(struct pci_bus *bus)
++{
++ if (IS_ENABLED(CONFIG_PCI_MSI)) {
++ struct rcar_pcie *pcie = sys_to_pcie(bus->sysdata);
++
++ bus->msi = &pcie->msi.chip;
++ }
++}
++
+ struct hw_pci rcar_pci = {
+ .setup = rcar_pcie_setup,
+ .map_irq = of_irq_parse_and_map_pci,
+ .ops = &rcar_pcie_ops,
++ .add_bus = rcar_pcie_add_bus,
+ };
+
+ static void rcar_pcie_enable(struct rcar_pcie *pcie)
+@@ -477,6 +514,10 @@ static int rcar_pcie_hw_init(struct rcar_pcie *pcie)
+ /* Enable MAC data scrambling. */
+ rcar_rmw32(pcie, MACCTLR, SCRAMBLE_DISABLE, 0);
+
++ /* Enable MSI */
++ if (IS_ENABLED(CONFIG_PCI_MSI))
++ pci_write_reg(pcie, 0x101f0000, PCIEMSITXR);
++
+ /* Finish initialization - establish a PCI Express link */
+ pci_write_reg(pcie, CFINIT, PCIETCTLR);
+
+@@ -530,11 +571,184 @@ static int rcar_pcie_hw_init_h1(struct rcar_pcie *pcie)
+ return -ETIMEDOUT;
+ }
+
++static int rcar_msi_alloc(struct rcar_msi *chip)
++{
++ int msi;
++
++ mutex_lock(&chip->lock);
++
++ msi = find_first_zero_bit(chip->used, INT_PCI_MSI_NR);
++ if (msi < INT_PCI_MSI_NR)
++ set_bit(msi, chip->used);
++ else
++ msi = -ENOSPC;
++
++ mutex_unlock(&chip->lock);
++
++ return msi;
++}
++
++static void rcar_msi_free(struct rcar_msi *chip, unsigned long irq)
++{
++ mutex_lock(&chip->lock);
++ clear_bit(irq, chip->used);
++ mutex_unlock(&chip->lock);
++}
++
++static irqreturn_t rcar_pcie_msi_irq(int irq, void *data)
++{
++ struct rcar_pcie *pcie = data;
++ struct rcar_msi *msi = &pcie->msi;
++ unsigned long reg;
++
++ reg = pci_read_reg(pcie, PCIEMSIFR);
++
++ /* MSI & INTx share an interrupt - we only handle MSI here */
++ if (!reg)
++ return IRQ_NONE;
++
++ while (reg) {
++ unsigned int index = find_first_bit(®, 32);
++ unsigned int irq;
++
++ /* clear the interrupt */
++ pci_write_reg(pcie, 1 << index, PCIEMSIFR);
++
++ irq = irq_find_mapping(msi->domain, index);
++ if (irq) {
++ if (test_bit(index, msi->used))
++ generic_handle_irq(irq);
++ else
++ dev_info(pcie->dev, "unhandled MSI\n");
++ } else {
++ /* Unknown MSI, just clear it */
++ dev_dbg(pcie->dev, "unexpected MSI\n");
++ }
++
++ /* see if there's any more pending in this vector */
++ reg = pci_read_reg(pcie, PCIEMSIFR);
++ }
++
++ return IRQ_HANDLED;
++}
++
++static int rcar_msi_setup_irq(struct msi_chip *chip, struct pci_dev *pdev,
++ struct msi_desc *desc)
++{
++ struct rcar_msi *msi = to_rcar_msi(chip);
++ struct rcar_pcie *pcie = container_of(chip, struct rcar_pcie, msi.chip);
++ struct msi_msg msg;
++ unsigned int irq;
++ int hwirq;
++
++ hwirq = rcar_msi_alloc(msi);
++ if (hwirq < 0)
++ return hwirq;
++
++ irq = irq_create_mapping(msi->domain, hwirq);
++ if (!irq) {
++ rcar_msi_free(msi, hwirq);
++ return -EINVAL;
++ }
++
++ irq_set_msi_desc(irq, desc);
++
++ msg.address_lo = pci_read_reg(pcie, PCIEMSIALR) & ~MSIFE;
++ msg.address_hi = pci_read_reg(pcie, PCIEMSIAUR);
++ msg.data = hwirq;
++
++ write_msi_msg(irq, &msg);
++
++ return 0;
++}
++
++static void rcar_msi_teardown_irq(struct msi_chip *chip, unsigned int irq)
++{
++ struct rcar_msi *msi = to_rcar_msi(chip);
++ struct irq_data *d = irq_get_irq_data(irq);
++
++ rcar_msi_free(msi, d->hwirq);
++}
++
++static struct irq_chip rcar_msi_irq_chip = {
++ .name = "R-Car PCIe MSI",
++ .irq_enable = unmask_msi_irq,
++ .irq_disable = mask_msi_irq,
++ .irq_mask = mask_msi_irq,
++ .irq_unmask = unmask_msi_irq,
++};
++
++static int rcar_msi_map(struct irq_domain *domain, unsigned int irq,
++ irq_hw_number_t hwirq)
++{
++ irq_set_chip_and_handler(irq, &rcar_msi_irq_chip, handle_simple_irq);
++ irq_set_chip_data(irq, domain->host_data);
++ set_irq_flags(irq, IRQF_VALID);
++
++ return 0;
++}
++
++static const struct irq_domain_ops msi_domain_ops = {
++ .map = rcar_msi_map,
++};
++
++static int rcar_pcie_enable_msi(struct rcar_pcie *pcie)
++{
++ struct platform_device *pdev = to_platform_device(pcie->dev);
++ struct rcar_msi *msi = &pcie->msi;
++ unsigned long base;
++ int err;
++
++ mutex_init(&msi->lock);
++
++ msi->chip.dev = pcie->dev;
++ msi->chip.setup_irq = rcar_msi_setup_irq;
++ msi->chip.teardown_irq = rcar_msi_teardown_irq;
++
++ msi->domain = irq_domain_add_linear(pcie->dev->of_node, INT_PCI_MSI_NR,
++ &msi_domain_ops, &msi->chip);
++ if (!msi->domain) {
++ dev_err(&pdev->dev, "failed to create IRQ domain\n");
++ return -ENOMEM;
++ }
++
++ /* Two irqs are for MSI, but they are also used for non-MSI irqs */
++ err = devm_request_irq(&pdev->dev, msi->irq1, rcar_pcie_msi_irq,
++ IRQF_SHARED, rcar_msi_irq_chip.name, pcie);
++ if (err < 0) {
++ dev_err(&pdev->dev, "failed to request IRQ: %d\n", err);
++ goto err;
++ }
++
++ err = devm_request_irq(&pdev->dev, msi->irq2, rcar_pcie_msi_irq,
++ IRQF_SHARED, rcar_msi_irq_chip.name, pcie);
++ if (err < 0) {
++ dev_err(&pdev->dev, "failed to request IRQ: %d\n", err);
++ goto err;
++ }
++
++ /* setup MSI data target */
++ msi->pages = __get_free_pages(GFP_KERNEL, 0);
++ base = virt_to_phys((void *)msi->pages);
++
++ pci_write_reg(pcie, base | MSIFE, PCIEMSIALR);
++ pci_write_reg(pcie, 0, PCIEMSIAUR);
++
++ /* enable all MSI interrupts */
++ pci_write_reg(pcie, 0xffffffff, PCIEMSIIER);
++
++ return 0;
++
++err:
++ irq_domain_remove(msi->domain);
++ return err;
++}
++
+ static int rcar_pcie_get_resources(struct platform_device *pdev,
+ struct rcar_pcie *pcie)
+ {
+ struct resource res;
+- int err;
++ int err, i;
+
+ err = of_address_to_resource(pdev->dev.of_node, 0, &res);
+ if (err)
+@@ -559,6 +773,22 @@ static int rcar_pcie_get_resources(struct platform_device *pdev,
+ if (err)
+ goto err_map_reg;
+
++ i = irq_of_parse_and_map(pdev->dev.of_node, 0);
++ if (i < 0) {
++ dev_err(pcie->dev, "cannot get platform resources for msi interrupt\n");
++ err = -ENOENT;
++ goto err_map_reg;
++ }
++ pcie->msi.irq1 = i;
++
++ i = irq_of_parse_and_map(pdev->dev.of_node, 1);
++ if (i < 0) {
++ dev_err(pcie->dev, "cannot get platform resources for msi interrupt\n");
++ err = -ENOENT;
++ goto err_map_reg;
++ }
++ pcie->msi.irq2 = i;
++
+ pcie->base = devm_ioremap_resource(&pdev->dev, &res);
+ if (IS_ERR(pcie->base)) {
+ err = PTR_ERR(pcie->base);
+@@ -732,6 +962,16 @@ static int rcar_pcie_probe(struct platform_device *pdev)
+ if (err)
+ return err;
+
++ if (IS_ENABLED(CONFIG_PCI_MSI)) {
++ err = rcar_pcie_enable_msi(pcie);
++ if (err < 0) {
++ dev_err(&pdev->dev,
++ "failed to enable MSI support: %d\n",
++ err);
++ return err;
++ }
++ }
++
+ of_id = of_match_device(rcar_pcie_of_match, pcie->dev);
+ if (!of_id || !of_id->data)
+ return -EINVAL;
+--
+2.1.2
+
--- /dev/null
+From 6386ee451814920cff65bcb994c41a27e33d9de8 Mon Sep 17 00:00:00 2001
+From: Phil Edworthy <phil.edworthy@renesas.com>
+Date: Mon, 12 May 2014 11:57:50 +0100
+Subject: PCI: rcar: Add R-Car PCIe device tree bindings
+
+This patch adds the bindings for the R-Car PCIe driver. The driver resides
+under drivers/pci/host/pcie-rcar.c
+
+Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
+Acked-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 7869fc6e295cbb1f80e30555bebbc795abb5b9a7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/pci/rcar-pci.txt | 47 ++++++++++++++++++++++
+ 1 file changed, 47 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pci/rcar-pci.txt
+
+diff --git a/Documentation/devicetree/bindings/pci/rcar-pci.txt b/Documentation/devicetree/bindings/pci/rcar-pci.txt
+new file mode 100644
+index 000000000000..29d3b989d3b0
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt
+@@ -0,0 +1,47 @@
++* Renesas RCar PCIe interface
++
++Required properties:
++- compatible: should contain one of the following
++ "renesas,pcie-r8a7779", "renesas,pcie-r8a7790", "renesas,pcie-r8a7791"
++- reg: base address and length of the pcie controller registers.
++- #address-cells: set to <3>
++- #size-cells: set to <2>
++- bus-range: PCI bus numbers covered
++- device_type: set to "pci"
++- ranges: ranges for the PCI memory and I/O regions.
++- dma-ranges: ranges for the inbound memory regions.
++- interrupts: two interrupt sources for MSI interrupts, followed by interrupt
++ source for hardware related interrupts (e.g. link speed change).
++- #interrupt-cells: set to <1>
++- interrupt-map-mask and interrupt-map: standard PCI properties
++ to define the mapping of the PCIe interface to interrupt
++ numbers.
++- clocks: from common clock binding: clock specifiers for the PCIe controller
++ and PCIe bus clocks.
++- clock-names: from common clock binding: should be "pcie" and "pcie_bus".
++
++Example:
++
++SoC specific DT Entry:
++
++ pcie: pcie@fe000000 {
++ compatible = "renesas,pcie-r8a7791";
++ reg = <0 0xfe000000 0 0x80000>;
++ #address-cells = <3>;
++ #size-cells = <2>;
++ bus-range = <0x00 0xff>;
++ device_type = "pci";
++ ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
++ 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
++ 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
++ 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
++ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000
++ 0x42000000 2 0x00000000 2 0x00000000 0 0x40000000>;
++ interrupts = <0 116 4>, <0 117 4>, <0 118 4>;
++ #interrupt-cells = <1>;
++ interrupt-map-mask = <0 0 0 0>;
++ interrupt-map = <0 0 0 0 &gic 0 116 4>;
++ clocks = <&mstp3_clks R8A7791_CLK_PCIE>, <&pcie_bus_clk>;
++ clock-names = "pcie", "pcie_bus";
++ status = "disabled";
++ };
+--
+2.1.2
+
--- /dev/null
+From 54b41c63f46053715a58b21edea255112722b05c Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Wed, 2 Apr 2014 20:17:00 -0700
+Subject: DMA: shdma: add cyclic transfer support
+
+This patch add cyclic transfer support and enables dmaengine_prep_dma_cyclic()
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+[reflown changelog for readablity]
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+
+(cherry picked from commit dfbb85cab5f0819d0424a3637b03e7892704fa42)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/dma/sh/shdma-base.c | 72 ++++++++++++++++++++++++++++++++++++++++-----
+ include/linux/shdma-base.h | 1 +
+ 2 files changed, 66 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/dma/sh/shdma-base.c b/drivers/dma/sh/shdma-base.c
+index 52396771acbe..a26ded263b0d 100644
+--- a/drivers/dma/sh/shdma-base.c
++++ b/drivers/dma/sh/shdma-base.c
+@@ -304,6 +304,7 @@ static dma_async_tx_callback __ld_cleanup(struct shdma_chan *schan, bool all)
+ dma_async_tx_callback callback = NULL;
+ void *param = NULL;
+ unsigned long flags;
++ LIST_HEAD(cyclic_list);
+
+ spin_lock_irqsave(&schan->chan_lock, flags);
+ list_for_each_entry_safe(desc, _desc, &schan->ld_queue, node) {
+@@ -369,10 +370,16 @@ static dma_async_tx_callback __ld_cleanup(struct shdma_chan *schan, bool all)
+ if (((desc->mark == DESC_COMPLETED ||
+ desc->mark == DESC_WAITING) &&
+ async_tx_test_ack(&desc->async_tx)) || all) {
+- /* Remove from ld_queue list */
+- desc->mark = DESC_IDLE;
+
+- list_move(&desc->node, &schan->ld_free);
++ if (all || !desc->cyclic) {
++ /* Remove from ld_queue list */
++ desc->mark = DESC_IDLE;
++ list_move(&desc->node, &schan->ld_free);
++ } else {
++ /* reuse as cyclic */
++ desc->mark = DESC_SUBMITTED;
++ list_move_tail(&desc->node, &cyclic_list);
++ }
+
+ if (list_empty(&schan->ld_queue)) {
+ dev_dbg(schan->dev, "Bring down channel %d\n", schan->id);
+@@ -389,6 +396,8 @@ static dma_async_tx_callback __ld_cleanup(struct shdma_chan *schan, bool all)
+ */
+ schan->dma_chan.completed_cookie = schan->dma_chan.cookie;
+
++ list_splice_tail(&cyclic_list, &schan->ld_queue);
++
+ spin_unlock_irqrestore(&schan->chan_lock, flags);
+
+ if (callback)
+@@ -521,7 +530,7 @@ static struct shdma_desc *shdma_add_desc(struct shdma_chan *schan,
+ */
+ static struct dma_async_tx_descriptor *shdma_prep_sg(struct shdma_chan *schan,
+ struct scatterlist *sgl, unsigned int sg_len, dma_addr_t *addr,
+- enum dma_transfer_direction direction, unsigned long flags)
++ enum dma_transfer_direction direction, unsigned long flags, bool cyclic)
+ {
+ struct scatterlist *sg;
+ struct shdma_desc *first = NULL, *new = NULL /* compiler... */;
+@@ -569,7 +578,11 @@ static struct dma_async_tx_descriptor *shdma_prep_sg(struct shdma_chan *schan,
+ if (!new)
+ goto err_get_desc;
+
+- new->chunks = chunks--;
++ new->cyclic = cyclic;
++ if (cyclic)
++ new->chunks = 1;
++ else
++ new->chunks = chunks--;
+ list_add_tail(&new->node, &tx_list);
+ } while (len);
+ }
+@@ -612,7 +625,8 @@ static struct dma_async_tx_descriptor *shdma_prep_memcpy(
+ sg_dma_address(&sg) = dma_src;
+ sg_dma_len(&sg) = len;
+
+- return shdma_prep_sg(schan, &sg, 1, &dma_dest, DMA_MEM_TO_MEM, flags);
++ return shdma_prep_sg(schan, &sg, 1, &dma_dest, DMA_MEM_TO_MEM,
++ flags, false);
+ }
+
+ static struct dma_async_tx_descriptor *shdma_prep_slave_sg(
+@@ -640,7 +654,50 @@ static struct dma_async_tx_descriptor *shdma_prep_slave_sg(
+ slave_addr = ops->slave_addr(schan);
+
+ return shdma_prep_sg(schan, sgl, sg_len, &slave_addr,
+- direction, flags);
++ direction, flags, false);
++}
++
++struct dma_async_tx_descriptor *shdma_prep_dma_cyclic(
++ struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
++ size_t period_len, enum dma_transfer_direction direction,
++ unsigned long flags, void *context)
++{
++ struct shdma_chan *schan = to_shdma_chan(chan);
++ struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
++ const struct shdma_ops *ops = sdev->ops;
++ unsigned int sg_len = buf_len / period_len;
++ int slave_id = schan->slave_id;
++ dma_addr_t slave_addr;
++ struct scatterlist sgl[sg_len];
++ int i;
++
++ if (!chan)
++ return NULL;
++
++ BUG_ON(!schan->desc_num);
++
++ /* Someone calling slave DMA on a generic channel? */
++ if (slave_id < 0 || (buf_len < period_len)) {
++ dev_warn(schan->dev,
++ "%s: bad parameter: buf_len=%d, period_len=%d, id=%d\n",
++ __func__, buf_len, period_len, slave_id);
++ return NULL;
++ }
++
++ slave_addr = ops->slave_addr(schan);
++
++ sg_init_table(sgl, sg_len);
++ for (i = 0; i < sg_len; i++) {
++ dma_addr_t src = buf_addr + (period_len * i);
++
++ sg_set_page(&sgl[i], pfn_to_page(PFN_DOWN(src)), period_len,
++ offset_in_page(src));
++ sg_dma_address(&sgl[i]) = src;
++ sg_dma_len(&sgl[i]) = period_len;
++ }
++
++ return shdma_prep_sg(schan, sgl, sg_len, &slave_addr,
++ direction, flags, true);
+ }
+
+ static int shdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
+@@ -915,6 +972,7 @@ int shdma_init(struct device *dev, struct shdma_dev *sdev,
+
+ /* Compulsory for DMA_SLAVE fields */
+ dma_dev->device_prep_slave_sg = shdma_prep_slave_sg;
++ dma_dev->device_prep_dma_cyclic = shdma_prep_dma_cyclic;
+ dma_dev->device_control = shdma_control;
+
+ dma_dev->dev = dev;
+diff --git a/include/linux/shdma-base.h b/include/linux/shdma-base.h
+index f92c0a43c54c..abdf1f229dc3 100644
+--- a/include/linux/shdma-base.h
++++ b/include/linux/shdma-base.h
+@@ -54,6 +54,7 @@ struct shdma_desc {
+ dma_cookie_t cookie;
+ int chunks;
+ int mark;
++ bool cyclic; /* used as cyclic transfer */
+ };
+
+ struct shdma_chan {
+--
+2.1.2
+
--- /dev/null
+From 9e5e722f16fae2058628f2652cdea2947250c0ce Mon Sep 17 00:00:00 2001
+From: Alexandre Belloni <alexandre.belloni@free-electrons.com>
+Date: Mon, 19 May 2014 22:42:33 +0200
+Subject: ARM: shmobile: armadillo: initialize all struct pwm_lookup members
+
+Initializing all the struct pwm_lookup members allows to get rid of the
+struct tpu_pwm_platform_data as the polarity initialization will be
+taken care of by the PWM core.
+
+Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
+(cherry picked from commit b16001d745fbc900cc96c8ca2cd2cd08e738c421)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-armadillo800eva.c | 20 +++++++++-----------
+ 1 file changed, 9 insertions(+), 11 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
+index 486063db2a2f..8410ce7a2ffb 100644
+--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
++++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
+@@ -31,7 +31,7 @@
+ #include <linux/gpio_keys.h>
+ #include <linux/regulator/driver.h>
+ #include <linux/pinctrl/machine.h>
+-#include <linux/platform_data/pwm-renesas-tpu.h>
++#include <linux/pwm.h>
+ #include <linux/pwm_backlight.h>
+ #include <linux/regulator/fixed.h>
+ #include <linux/regulator/gpio-regulator.h>
+@@ -399,24 +399,22 @@ static struct resource pwm_resources[] = {
+ },
+ };
+
+-static struct tpu_pwm_platform_data pwm_device_data = {
+- .channels[2] = {
+- .polarity = PWM_POLARITY_INVERSED,
+- }
+-};
+-
+ static struct platform_device pwm_device = {
+ .name = "renesas-tpu-pwm",
+ .id = -1,
+- .dev = {
+- .platform_data = &pwm_device_data,
+- },
+ .num_resources = ARRAY_SIZE(pwm_resources),
+ .resource = pwm_resources,
+ };
+
+ static struct pwm_lookup pwm_lookup[] = {
+- PWM_LOOKUP("renesas-tpu-pwm", 2, "pwm-backlight.0", NULL),
++ {
++ .provider = "renesas-tpu-pwm",
++ .index = 2,
++ .dev_id = "pwm-backlight.0",
++ .con_id = NULL,
++ .period = 33333,
++ .polarity = PWM_POLARITY_INVERSED,
++ },
+ };
+
+ /* LCDC and backlight */
+--
+2.1.2
+
--- /dev/null
+From d78e49817cbfc3318c67c76a46d6f9ef74602519 Mon Sep 17 00:00:00 2001
+From: Alexandre Belloni <alexandre.belloni@free-electrons.com>
+Date: Mon, 19 May 2014 22:42:35 +0200
+Subject: ARM: OMAP3: Beagle: initialize all the struct pwm_lookup members
+
+The PWM core can retrieve the period from the PWM lookup table, so the
+struct led_pwm.pwm_period_ns member can be removed.
+
+Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
+Acked-by: Tony Lindgren <tony@atomide.com>
+Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
+(cherry picked from commit e02a84a5ad2f46d4a262884df5ad9ab9e833a7b5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-omap2/board-omap3beagle.c | 9 ++++++++-
+ 1 file changed, 8 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index d6ed819ff15c..f27e1ec90b5e 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
++++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -61,7 +61,14 @@
+
+ static struct pwm_lookup pwm_lookup[] = {
+ /* LEDB -> PMU_STAT */
+- PWM_LOOKUP("twl-pwmled", 1, "leds_pwm", "beagleboard::pmu_stat"),
++ {
++ .provider = "twl-pwmled",
++ .index = 1,
++ .dev_id = "leds_pwm",
++ .con_id = "beagleboard::pmu_stat",
++ .period = 7812500,
++ .polarity = PWM_POLARITY_NORMAL,
++ },
+ };
+
+ static struct led_pwm pwm_leds[] = {
+--
+2.1.2
+
--- /dev/null
+From 4c7f2c11f8fa24bf503485b9a75ac7ebf8474f51 Mon Sep 17 00:00:00 2001
+From: Alexandre Belloni <alexandre.belloni@free-electrons.com>
+Date: Mon, 19 May 2014 22:42:36 +0200
+Subject: ARM: pxa: hx4700: initialize all the struct pwm_lookup members
+
+Instead of relying on the .pwm_period_ns member of the pwm-backlight
+driver's platform data, the PWM period can be retrieved from the PWM
+lookup table.
+
+Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
+Acked-by: Philipp Zabel <philipp.zabel@gmail.com>
+Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
+(cherry picked from commit fcb355063ffb12a834b3ca1383c9beec9285d568)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-pxa/hx4700.c | 9 ++++++++-
+ 1 file changed, 8 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
+index a7c30eb0c8db..0788a1f171fe 100644
+--- a/arch/arm/mach-pxa/hx4700.c
++++ b/arch/arm/mach-pxa/hx4700.c
+@@ -574,7 +574,14 @@ static struct platform_device backlight = {
+ };
+
+ static struct pwm_lookup hx4700_pwm_lookup[] = {
+- PWM_LOOKUP("pxa27x-pwm.1", 0, "pwm-backlight", NULL),
++ {
++ .provider = "pxa27x-pwm.1",
++ .index = 0,
++ .dev_id = "pwm-backlight",
++ .con_id = NULL,
++ .period = 30923,
++ .polarity = PWM_POLARITY_NORMAL,
++ },
+ };
+
+ /*
+--
+2.1.2
+
--- /dev/null
+From c18354a6bdce95ee96db628d7423875d9f4f7f52 Mon Sep 17 00:00:00 2001
+From: Alexandre Belloni <alexandre.belloni@free-electrons.com>
+Date: Mon, 19 May 2014 22:42:37 +0200
+Subject: pwm: modify PWM_LOOKUP to initialize all struct pwm_lookup members
+
+Now that PWM_LOOKUP is not used anymore, modify it to initialize all the
+members of struct pwm_lookup.
+
+Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
+Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
+(cherry picked from commit 4284402924cc55e182008ca7e9d4fb1e891ff5ae)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/pwm.txt | 3 ++-
+ include/linux/pwm.h | 4 +++-
+ 2 files changed, 5 insertions(+), 2 deletions(-)
+
+diff --git a/Documentation/pwm.txt b/Documentation/pwm.txt
+index 93cb97974986..f38f99cda64f 100644
+--- a/Documentation/pwm.txt
++++ b/Documentation/pwm.txt
+@@ -19,7 +19,8 @@ should instead register a static mapping that can be used to match PWM
+ consumers to providers, as given in the following example:
+
+ static struct pwm_lookup board_pwm_lookup[] = {
+- PWM_LOOKUP("tegra-pwm", 0, "pwm-backlight", NULL),
++ PWM_LOOKUP("tegra-pwm", 0, "pwm-backlight", NULL,
++ 50000, PWM_POLARITY_NORMAL),
+ };
+
+ static void __init board_init(void)
+diff --git a/include/linux/pwm.h b/include/linux/pwm.h
+index 29ca4572629d..e16ee37fb255 100644
+--- a/include/linux/pwm.h
++++ b/include/linux/pwm.h
+@@ -278,12 +278,14 @@ struct pwm_lookup {
+ enum pwm_polarity polarity;
+ };
+
+-#define PWM_LOOKUP(_provider, _index, _dev_id, _con_id) \
++#define PWM_LOOKUP(_provider, _index, _dev_id, _con_id, _period, _polarity) \
+ { \
+ .provider = _provider, \
+ .index = _index, \
+ .dev_id = _dev_id, \
+ .con_id = _con_id, \
++ .period = _period, \
++ .polarity = _polarity \
+ }
+
+ #if IS_ENABLED(CONFIG_PWM)
+--
+2.1.2
+
--- /dev/null
+From 53b94f6fa22edf4015c3e218007f45b1dd862967 Mon Sep 17 00:00:00 2001
+From: Alexandre Belloni <alexandre.belloni@free-electrons.com>
+Date: Mon, 19 May 2014 22:42:38 +0200
+Subject: ARM: OMAP3: Beagle: use PWM_LOOKUP to initialize struct pwm_lookup
+
+Use the new variant of the PWM_LOOKUP macro to initialize the PWM lookup
+table.
+
+Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
+Acked-by: Tony Lindgren <tony@atomide.com>
+Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
+(cherry picked from commit dee401e1fd5eddc8e3d6ae0e8b5c4bd64aa2a369)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-omap2/board-omap3beagle.c | 10 ++--------
+ 1 file changed, 2 insertions(+), 8 deletions(-)
+
+diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
+index f27e1ec90b5e..54c135a5b4f7 100644
+--- a/arch/arm/mach-omap2/board-omap3beagle.c
++++ b/arch/arm/mach-omap2/board-omap3beagle.c
+@@ -61,14 +61,8 @@
+
+ static struct pwm_lookup pwm_lookup[] = {
+ /* LEDB -> PMU_STAT */
+- {
+- .provider = "twl-pwmled",
+- .index = 1,
+- .dev_id = "leds_pwm",
+- .con_id = "beagleboard::pmu_stat",
+- .period = 7812500,
+- .polarity = PWM_POLARITY_NORMAL,
+- },
++ PWM_LOOKUP("twl-pwmled", 1, "leds_pwm", "beagleboard::pmu_stat",
++ 7812500, PWM_POLARITY_NORMAL),
+ };
+
+ static struct led_pwm pwm_leds[] = {
+--
+2.1.2
+
--- /dev/null
+From 4d94e9fe954382b1cf3bf9c7c2254694549ab097 Mon Sep 17 00:00:00 2001
+From: Alexandre Belloni <alexandre.belloni@free-electrons.com>
+Date: Mon, 19 May 2014 22:42:39 +0200
+Subject: ARM: shmobile: armadillo: use PWM_LOOKUP to initialize struct
+ pwm_lookup
+
+Use the new variant of the PWM_LOOKUP macro to initialize the PWM lookup
+table.
+
+Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
+(cherry picked from commit 48d6f146dced79d1df0cb91b30f1cdb749ecdf9f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-armadillo800eva.c | 10 ++--------
+ 1 file changed, 2 insertions(+), 8 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
+index 8410ce7a2ffb..dfdc9730e029 100644
+--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
++++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
+@@ -407,14 +407,8 @@ static struct platform_device pwm_device = {
+ };
+
+ static struct pwm_lookup pwm_lookup[] = {
+- {
+- .provider = "renesas-tpu-pwm",
+- .index = 2,
+- .dev_id = "pwm-backlight.0",
+- .con_id = NULL,
+- .period = 33333,
+- .polarity = PWM_POLARITY_INVERSED,
+- },
++ PWM_LOOKUP("renesas-tpu-pwm", 2, "pwm-backlight.0", NULL,
++ 33333, PWM_POLARITY_INVERSED),
+ };
+
+ /* LCDC and backlight */
+--
+2.1.2
+
--- /dev/null
+From bb983333824dee3ff8d8d86c7033aba5e2d0f126 Mon Sep 17 00:00:00 2001
+From: Alexandre Belloni <alexandre.belloni@free-electrons.com>
+Date: Mon, 19 May 2014 22:42:40 +0200
+Subject: ARM: pxa: hx4700: use PWM_LOOKUP to initialize struct pwm_lookup
+
+Use the new variant of the PWM_LOOKUP macro to initialize the PWM lookup
+table.
+
+Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
+Acked-by: Philipp Zabel <philipp.zabel@gmail.com>
+Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
+(cherry picked from commit 9becf5001130bcd24f57584e48467050e85eee03)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-pxa/hx4700.c | 10 ++--------
+ 1 file changed, 2 insertions(+), 8 deletions(-)
+
+diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
+index 0788a1f171fe..c66ad4edc5e3 100644
+--- a/arch/arm/mach-pxa/hx4700.c
++++ b/arch/arm/mach-pxa/hx4700.c
+@@ -574,14 +574,8 @@ static struct platform_device backlight = {
+ };
+
+ static struct pwm_lookup hx4700_pwm_lookup[] = {
+- {
+- .provider = "pxa27x-pwm.1",
+- .index = 0,
+- .dev_id = "pwm-backlight",
+- .con_id = NULL,
+- .period = 30923,
+- .polarity = PWM_POLARITY_NORMAL,
+- },
++ PWM_LOOKUP("pxa27x-pwm.1", 0, "pwm-backlight", NULL,
++ 30923, PWM_POLARITY_NORMAL),
+ };
+
+ /*
+--
+2.1.2
+
--- /dev/null
+From 016b67e717ef312dd430a3b7c742b850a292a063 Mon Sep 17 00:00:00 2001
+From: Jyri Sarha <jsarha@ti.com>
+Date: Mon, 24 Mar 2014 12:15:24 +0200
+Subject: ASoC: core: Update snd_soc_of_parse_daifmt() interface
+
+Adds struct device_node **bitclkmaster and struct device_node **framemaster
+function parameters. With the new syntax bitclock-master and frame-master
+properties can explicitly indicate the dai-link bit-clock and frame masters
+with a phandle. This patch also makes the minimal changes to simple-card
+for it to work with the updated snd_soc_of_parse_daifmt(). Simple-card appears
+to be the only user of snd_soc_of_parse_daifmt() for now.
+
+Signed-off-by: Jyri Sarha <jsarha@ti.com>
+Acked-by: Jean-Francois Moine <moinejf@free.fr>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 389cb8348cf5ac4a702c71bf13673c4c8bf01e34)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ include/sound/soc.h | 4 +++-
+ sound/soc/generic/simple-card.c | 5 +++--
+ sound/soc/soc-core.c | 8 +++++++-
+ 3 files changed, 13 insertions(+), 4 deletions(-)
+
+diff --git a/include/sound/soc.h b/include/sound/soc.h
+index 2a878d03c147..27bb5abf62b0 100644
+--- a/include/sound/soc.h
++++ b/include/sound/soc.h
+@@ -1181,7 +1181,9 @@ int snd_soc_of_parse_tdm_slot(struct device_node *np,
+ int snd_soc_of_parse_audio_routing(struct snd_soc_card *card,
+ const char *propname);
+ unsigned int snd_soc_of_parse_daifmt(struct device_node *np,
+- const char *prefix);
++ const char *prefix,
++ struct device_node **bitclkmaster,
++ struct device_node **framemaster);
+ int snd_soc_of_get_dai_name(struct device_node *of_node,
+ const char **dai_name);
+
+diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c
+index 21f1ccbdf582..835fd0258243 100644
+--- a/sound/soc/generic/simple-card.c
++++ b/sound/soc/generic/simple-card.c
+@@ -121,7 +121,7 @@ asoc_simple_card_sub_parse_of(struct device_node *np,
+ * bitclock-master, frame-master
+ * and specific "format" if it has
+ */
+- dai->fmt = snd_soc_of_parse_daifmt(np, NULL);
++ dai->fmt = snd_soc_of_parse_daifmt(np, NULL, NULL, NULL);
+ dai->fmt |= daifmt;
+
+ /*
+@@ -201,7 +201,8 @@ static int asoc_simple_card_parse_of(struct device_node *node,
+ snd_soc_of_parse_card_name(&priv->snd_card, "simple-audio-card,name");
+
+ /* get CPU/CODEC common format via simple-audio-card,format */
+- daifmt = snd_soc_of_parse_daifmt(node, "simple-audio-card,") &
++ daifmt = snd_soc_of_parse_daifmt(node, "simple-audio-card,", NULL,
++ NULL) &
+ (SND_SOC_DAIFMT_FORMAT_MASK | SND_SOC_DAIFMT_INV_MASK);
+
+ /* off-codec widgets */
+diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
+index 5b7d3ba87c7a..c75d008393d9 100644
+--- a/sound/soc/soc-core.c
++++ b/sound/soc/soc-core.c
+@@ -4620,7 +4620,9 @@ int snd_soc_of_parse_audio_routing(struct snd_soc_card *card,
+ EXPORT_SYMBOL_GPL(snd_soc_of_parse_audio_routing);
+
+ unsigned int snd_soc_of_parse_daifmt(struct device_node *np,
+- const char *prefix)
++ const char *prefix,
++ struct device_node **bitclkmaster,
++ struct device_node **framemaster)
+ {
+ int ret, i;
+ char prop[128];
+@@ -4703,9 +4705,13 @@ unsigned int snd_soc_of_parse_daifmt(struct device_node *np,
+ */
+ snprintf(prop, sizeof(prop), "%sbitclock-master", prefix);
+ bit = !!of_get_property(np, prop, NULL);
++ if (bit && bitclkmaster)
++ *bitclkmaster = of_parse_phandle(np, prop, 0);
+
+ snprintf(prop, sizeof(prop), "%sframe-master", prefix);
+ frame = !!of_get_property(np, prop, NULL);
++ if (frame && framemaster)
++ *framemaster = of_parse_phandle(np, prop, 0);
+
+ switch ((bit << 4) + frame) {
+ case 0x11:
+--
+2.1.2
+
--- /dev/null
+From d8dffe29e138b64456e677f2f87e5707d041fc7f Mon Sep 17 00:00:00 2001
+From: Jyri Sarha <jsarha@ti.com>
+Date: Mon, 24 Mar 2014 12:15:25 +0200
+Subject: ASoC: simple-card: Move dai-link level properties away from dai
+ subnodes
+
+The properties like format, bitclock-master, frame-master,
+bitclock-inversion, and frame-inversion should be common to the dais
+connected with a dai-link. For bitclock-master and frame-master
+properties to be unambiguous they need to indicate the mastering dai
+node with a phandle.
+
+Signed-off-by: Jyri Sarha <jsarha@ti.com>
+Acked-by: Jean-Francois Moine <moinejf@free.fr>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit b3ca11ff59bc5842b01f13421a17e6d9a8936784)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ .../devicetree/bindings/sound/simple-card.txt | 88 ++++----
+ sound/soc/generic/simple-card.c | 239 ++++++++++++---------
+ 2 files changed, 190 insertions(+), 137 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/sound/simple-card.txt b/Documentation/devicetree/bindings/sound/simple-card.txt
+index 131aa2ad7f1a..9b9df146fd1a 100644
+--- a/Documentation/devicetree/bindings/sound/simple-card.txt
++++ b/Documentation/devicetree/bindings/sound/simple-card.txt
+@@ -1,6 +1,6 @@
+ Simple-Card:
+
+-Simple-Card specifies audio DAI connection of SoC <-> codec.
++Simple-Card specifies audio DAI connections of SoC <-> codec.
+
+ Required properties:
+
+@@ -10,26 +10,51 @@ Optional properties:
+
+ - simple-audio-card,name : User specified audio sound card name, one string
+ property.
+-- simple-audio-card,format : CPU/CODEC common audio format.
+- "i2s", "right_j", "left_j" , "dsp_a"
+- "dsp_b", "ac97", "pdm", "msb", "lsb"
+ - simple-audio-card,widgets : Please refer to widgets.txt.
+ - simple-audio-card,routing : A list of the connections between audio components.
+ Each entry is a pair of strings, the first being the
+ connection's sink, the second being the connection's
+ source.
+-- dai-tdm-slot-num : Please refer to tdm-slot.txt.
+-- dai-tdm-slot-width : Please refer to tdm-slot.txt.
++Optional subnodes:
++
++- simple-audio-card,dai-link : Container for dai-link level
++ properties and the CPU and CODEC
++ sub-nodes. This container may be
++ omitted when the card has only one
++ DAI link. See the examples and the
++ section bellow.
++
++Dai-link subnode properties and subnodes:
++
++If dai-link subnode is omitted and the subnode properties are directly
++under "sound"-node the subnode property and subnode names have to be
++prefixed with "simple-audio-card,"-prefix.
+
+-Required subnodes:
++Required dai-link subnodes:
+
+-- simple-audio-card,dai-link : container for the CPU and CODEC sub-nodes
+- This container may be omitted when the
+- card has only one DAI link.
+- See the examples.
++- cpu : CPU sub-node
++- codec : CODEC sub-node
+
+-- simple-audio-card,cpu : CPU sub-node
+-- simple-audio-card,codec : CODEC sub-node
++Optional dai-link subnode properties:
++
++- format : CPU/CODEC common audio format.
++ "i2s", "right_j", "left_j" , "dsp_a"
++ "dsp_b", "ac97", "pdm", "msb", "lsb"
++- frame-master : Indicates dai-link frame master.
++ phandle to a cpu or codec subnode.
++- bitclock-master : Indicates dai-link bit clock master.
++ phandle to a cpu or codec subnode.
++- bitclock-inversion : bool property. Add this if the
++ dai-link uses bit clock inversion.
++- frame-inversion : bool property. Add this if the
++ dai-link uses frame clock inversion.
++
++For backward compatibility the frame-master and bitclock-master
++properties can be used as booleans in codec subnode to indicate if the
++codec is the dai-link frame or bit clock master. In this case there
++should be no dai-link node, the same properties should not be present
++at sound-node level, and the bitclock-inversion and frame-inversion
++properties should also be placed in the codec node if needed.
+
+ Required CPU/CODEC subnodes properties:
+
+@@ -37,29 +62,21 @@ Required CPU/CODEC subnodes properties:
+
+ Optional CPU/CODEC subnodes properties:
+
+-- format : CPU/CODEC specific audio format if needed.
+- see simple-audio-card,format
+-- frame-master : bool property. add this if subnode is frame master
+-- bitclock-master : bool property. add this if subnode is bitclock master
+-- bitclock-inversion : bool property. add this if subnode has clock inversion
+-- frame-inversion : bool property. add this if subnode has frame inversion
++- dai-tdm-slot-num : Please refer to tdm-slot.txt.
++- dai-tdm-slot-width : Please refer to tdm-slot.txt.
+ - clocks / system-clock-frequency : specify subnode's clock if needed.
+ it can be specified via "clocks" if system has
+ clock node (= common clock), or "system-clock-frequency"
+ (if system doens't support common clock)
+
+-Note:
+- * For 'format', 'frame-master', 'bitclock-master', 'bitclock-inversion' and
+- 'frame-inversion', the simple card will use the settings of CODEC for both
+- CPU and CODEC sides as we need to keep the settings identical for both ends
+- of the link.
+-
+ Example 1 - single DAI link:
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "VF610-Tower-Sound-Card";
+ simple-audio-card,format = "left_j";
++ simple-audio-card,bitclock-master = <&dailink0_master>;
++ simple-audio-card,frame-master = <&dailink0_master>;
+ simple-audio-card,widgets =
+ "Microphone", "Microphone Jack",
+ "Headphone", "Headphone Jack",
+@@ -69,17 +86,12 @@ sound {
+ "Headphone Jack", "HP_OUT",
+ "External Speaker", "LINE_OUT";
+
+- dai-tdm-slot-num = <2>;
+- dai-tdm-slot-width = <8>;
+-
+ simple-audio-card,cpu {
+ sound-dai = <&sh_fsi2 0>;
+ };
+
+- simple-audio-card,codec {
++ dailink0_master: simple-audio-card,codec {
+ sound-dai = <&ak4648>;
+- bitclock-master;
+- frame-master;
+ clocks = <&osc>;
+ };
+ };
+@@ -105,31 +117,31 @@ Example 2 - many DAI links:
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "Cubox Audio";
+- simple-audio-card,format = "i2s";
+
+ simple-audio-card,dai-link@0 { /* I2S - HDMI */
+- simple-audio-card,cpu {
++ format = "i2s";
++ cpu {
+ sound-dai = <&audio1 0>;
+ };
+- simple-audio-card,codec {
++ codec {
+ sound-dai = <&tda998x 0>;
+ };
+ };
+
+ simple-audio-card,dai-link@1 { /* S/PDIF - HDMI */
+- simple-audio-card,cpu {
++ cpu {
+ sound-dai = <&audio1 1>;
+ };
+- simple-audio-card,codec {
++ codec {
+ sound-dai = <&tda998x 1>;
+ };
+ };
+
+ simple-audio-card,dai-link@2 { /* S/PDIF - S/PDIF */
+- simple-audio-card,cpu {
++ cpu {
+ sound-dai = <&audio1 1>;
+ };
+- simple-audio-card,codec {
++ codec {
+ sound-dai = <&spdif_codec>;
+ };
+ };
+diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c
+index 835fd0258243..3f2e5807d7eb 100644
+--- a/sound/soc/generic/simple-card.c
++++ b/sound/soc/generic/simple-card.c
+@@ -88,7 +88,6 @@ static int asoc_simple_card_dai_init(struct snd_soc_pcm_runtime *rtd)
+
+ static int
+ asoc_simple_card_sub_parse_of(struct device_node *np,
+- unsigned int daifmt,
+ struct asoc_simple_dai *dai,
+ const struct device_node **p_node,
+ const char **name)
+@@ -117,14 +116,6 @@ asoc_simple_card_sub_parse_of(struct device_node *np,
+ return ret;
+
+ /*
+- * bitclock-inversion, frame-inversion
+- * bitclock-master, frame-master
+- * and specific "format" if it has
+- */
+- dai->fmt = snd_soc_of_parse_daifmt(np, NULL, NULL, NULL);
+- dai->fmt |= daifmt;
+-
+- /*
+ * dai->sysclk come from
+ * "clocks = <&xxx>" (if system has common clock)
+ * or "system-clock-frequency = <xxx>"
+@@ -151,37 +142,135 @@ asoc_simple_card_sub_parse_of(struct device_node *np,
+ return 0;
+ }
+
+-static int simple_card_cpu_codec_of(struct device_node *node,
+- int daifmt,
+- struct snd_soc_dai_link *dai_link,
+- struct simple_dai_props *dai_props)
++static int simple_card_dai_link_of(struct device_node *node,
++ struct device *dev,
++ struct snd_soc_dai_link *dai_link,
++ struct simple_dai_props *dai_props)
+ {
+- struct device_node *np;
++ struct device_node *np = NULL;
++ struct device_node *bitclkmaster = NULL;
++ struct device_node *framemaster = NULL;
++ unsigned int daifmt;
++ char *name;
++ char prop[128];
++ char *prefix = "";
+ int ret;
+
+- /* CPU sub-node */
+- ret = -EINVAL;
+- np = of_get_child_by_name(node, "simple-audio-card,cpu");
+- if (np) {
+- ret = asoc_simple_card_sub_parse_of(np, daifmt,
+- &dai_props->cpu_dai,
+- &dai_link->cpu_of_node,
+- &dai_link->cpu_dai_name);
+- of_node_put(np);
++ if (!strcmp("sound", node->name))
++ prefix = "simple-audio-card,";
++
++ daifmt = snd_soc_of_parse_daifmt(node, prefix,
++ &bitclkmaster, &framemaster);
++ daifmt &= ~SND_SOC_DAIFMT_MASTER_MASK;
++
++ snprintf(prop, sizeof(prop), "%scpu", prefix);
++ np = of_get_child_by_name(node, prop);
++ if (!np) {
++ ret = -EINVAL;
++ dev_err(dev, "%s: Can't find simple-audio-card,cpu DT node\n",
++ __func__);
++ goto dai_link_of_err;
+ }
++
++ ret = asoc_simple_card_sub_parse_of(np, &dai_props->cpu_dai,
++ &dai_link->cpu_of_node,
++ &dai_link->cpu_dai_name);
+ if (ret < 0)
+- return ret;
++ goto dai_link_of_err;
++
++ dai_props->cpu_dai.fmt = daifmt;
++ switch (((np == bitclkmaster)<<4)|(np == framemaster)) {
++ case 0x11:
++ dai_props->cpu_dai.fmt |= SND_SOC_DAIFMT_CBS_CFS;
++ break;
++ case 0x10:
++ dai_props->cpu_dai.fmt |= SND_SOC_DAIFMT_CBS_CFM;
++ break;
++ case 0x01:
++ dai_props->cpu_dai.fmt |= SND_SOC_DAIFMT_CBM_CFS;
++ break;
++ default:
++ dai_props->cpu_dai.fmt |= SND_SOC_DAIFMT_CBM_CFM;
++ break;
++ }
+
+- /* CODEC sub-node */
+- ret = -EINVAL;
+- np = of_get_child_by_name(node, "simple-audio-card,codec");
+- if (np) {
+- ret = asoc_simple_card_sub_parse_of(np, daifmt,
+- &dai_props->codec_dai,
+- &dai_link->codec_of_node,
+- &dai_link->codec_dai_name);
+- of_node_put(np);
++ of_node_put(np);
++ snprintf(prop, sizeof(prop), "%scodec", prefix);
++ np = of_get_child_by_name(node, prop);
++ if (!np) {
++ ret = -EINVAL;
++ dev_err(dev, "%s: Can't find simple-audio-card,codec DT node\n",
++ __func__);
++ goto dai_link_of_err;
++ }
++
++ ret = asoc_simple_card_sub_parse_of(np, &dai_props->codec_dai,
++ &dai_link->codec_of_node,
++ &dai_link->codec_dai_name);
++ if (ret < 0)
++ goto dai_link_of_err;
++
++ if (strlen(prefix) && !bitclkmaster && !framemaster) {
++ /* No dai-link level and master setting was not found from
++ sound node level, revert back to legacy DT parsing and
++ take the settings from codec node. */
++ dev_dbg(dev, "%s: Revert to legacy daifmt parsing\n",
++ __func__);
++ dai_props->cpu_dai.fmt = dai_props->codec_dai.fmt =
++ snd_soc_of_parse_daifmt(np, NULL, NULL, NULL) |
++ (daifmt & ~SND_SOC_DAIFMT_CLOCK_MASK);
++ } else {
++ dai_props->codec_dai.fmt = daifmt;
++ switch (((np == bitclkmaster)<<4)|(np == framemaster)) {
++ case 0x11:
++ dai_props->codec_dai.fmt |= SND_SOC_DAIFMT_CBM_CFM;
++ break;
++ case 0x10:
++ dai_props->codec_dai.fmt |= SND_SOC_DAIFMT_CBM_CFS;
++ break;
++ case 0x01:
++ dai_props->codec_dai.fmt |= SND_SOC_DAIFMT_CBS_CFM;
++ break;
++ default:
++ dai_props->codec_dai.fmt |= SND_SOC_DAIFMT_CBS_CFS;
++ break;
++ }
++ }
++
++ if (!dai_link->cpu_dai_name || !dai_link->codec_dai_name) {
++ ret = -EINVAL;
++ goto dai_link_of_err;
+ }
++
++ /* simple-card assumes platform == cpu */
++ dai_link->platform_of_node = dai_link->cpu_of_node;
++
++ /* Link name is created from CPU/CODEC dai name */
++ name = devm_kzalloc(dev,
++ strlen(dai_link->cpu_dai_name) +
++ strlen(dai_link->codec_dai_name) + 2,
++ GFP_KERNEL);
++ sprintf(name, "%s-%s", dai_link->cpu_dai_name,
++ dai_link->codec_dai_name);
++ dai_link->name = dai_link->stream_name = name;
++
++ dev_dbg(dev, "\tname : %s\n", dai_link->stream_name);
++ dev_dbg(dev, "\tcpu : %s / %04x / %d\n",
++ dai_link->cpu_dai_name,
++ dai_props->cpu_dai.fmt,
++ dai_props->cpu_dai.sysclk);
++ dev_dbg(dev, "\tcodec : %s / %04x / %d\n",
++ dai_link->codec_dai_name,
++ dai_props->codec_dai.fmt,
++ dai_props->codec_dai.sysclk);
++
++dai_link_of_err:
++ if (np)
++ of_node_put(np);
++ if (bitclkmaster)
++ of_node_put(bitclkmaster);
++ if (framemaster)
++ of_node_put(framemaster);
+ return ret;
+ }
+
+@@ -192,19 +281,11 @@ static int asoc_simple_card_parse_of(struct device_node *node,
+ {
+ struct snd_soc_dai_link *dai_link = priv->snd_card.dai_link;
+ struct simple_dai_props *dai_props = priv->dai_props;
+- struct device_node *np;
+- char *name;
+- unsigned int daifmt;
+ int ret;
+
+ /* parsing the card name from DT */
+ snd_soc_of_parse_card_name(&priv->snd_card, "simple-audio-card,name");
+
+- /* get CPU/CODEC common format via simple-audio-card,format */
+- daifmt = snd_soc_of_parse_daifmt(node, "simple-audio-card,", NULL,
+- NULL) &
+- (SND_SOC_DAIFMT_FORMAT_MASK | SND_SOC_DAIFMT_INV_MASK);
+-
+ /* off-codec widgets */
+ if (of_property_read_bool(node, "simple-audio-card,widgets")) {
+ ret = snd_soc_of_parse_audio_simple_widgets(&priv->snd_card,
+@@ -221,71 +302,31 @@ static int asoc_simple_card_parse_of(struct device_node *node,
+ return ret;
+ }
+
+- /* loop on the DAI links */
+- np = NULL;
+- for (;;) {
+- if (multi) {
+- np = of_get_next_child(node, np);
+- if (!np)
+- break;
++ dev_dbg(dev, "New simple-card: %s\n", priv->snd_card.name ?
++ priv->snd_card.name : "");
++
++ if (multi) {
++ struct device_node *np = NULL;
++ int i;
++ for (i = 0; (np = of_get_next_child(node, np)); i++) {
++ dev_dbg(dev, "\tlink %d:\n", i);
++ ret = simple_card_dai_link_of(np, dev, dai_link + i,
++ dai_props + i);
++ if (ret < 0) {
++ of_node_put(np);
++ return ret;
++ }
+ }
+-
+- ret = simple_card_cpu_codec_of(multi ? np : node,
+- daifmt, dai_link, dai_props);
++ } else {
++ ret = simple_card_dai_link_of(node, dev, dai_link, dai_props);
+ if (ret < 0)
+- goto err;
+-
+- /*
+- * overwrite cpu_dai->fmt as its DAIFMT_MASTER bit is based on CODEC
+- * while the other bits should be identical unless buggy SW/HW design.
+- */
+- dai_props->cpu_dai.fmt = dai_props->codec_dai.fmt;
+-
+- if (!dai_link->cpu_dai_name || !dai_link->codec_dai_name) {
+- ret = -EINVAL;
+- goto err;
+- }
+-
+- /* simple-card assumes platform == cpu */
+- dai_link->platform_of_node = dai_link->cpu_of_node;
+-
+- name = devm_kzalloc(dev,
+- strlen(dai_link->cpu_dai_name) +
+- strlen(dai_link->codec_dai_name) + 2,
+- GFP_KERNEL);
+- sprintf(name, "%s-%s", dai_link->cpu_dai_name,
+- dai_link->codec_dai_name);
+- dai_link->name = dai_link->stream_name = name;
+-
+- if (!multi)
+- break;
+-
+- dai_link++;
+- dai_props++;
++ return ret;
+ }
+
+- /* card name is created from CPU/CODEC dai name */
+- dai_link = priv->snd_card.dai_link;
+ if (!priv->snd_card.name)
+- priv->snd_card.name = dai_link->name;
+-
+- dev_dbg(dev, "card-name : %s\n", priv->snd_card.name);
+- dev_dbg(dev, "platform : %04x\n", daifmt);
+- dai_props = priv->dai_props;
+- dev_dbg(dev, "cpu : %s / %04x / %d\n",
+- dai_link->cpu_dai_name,
+- dai_props->cpu_dai.fmt,
+- dai_props->cpu_dai.sysclk);
+- dev_dbg(dev, "codec : %s / %04x / %d\n",
+- dai_link->codec_dai_name,
+- dai_props->codec_dai.fmt,
+- dai_props->codec_dai.sysclk);
++ priv->snd_card.name = priv->snd_card.dai_link->name;
+
+ return 0;
+-
+-err:
+- of_node_put(np);
+- return ret;
+ }
+
+ /* update the reference count of the devices nodes at end of probe */
+--
+2.1.2
+
--- /dev/null
+From 5cef99e5e5b1b91bdfbd201c0c5e2fe0ed755053 Mon Sep 17 00:00:00 2001
+From: Nicolin Chen <Guangyu.Chen@freescale.com>
+Date: Thu, 24 Apr 2014 19:13:58 +0800
+Subject: ASoC: simple-card: Drop node->name checking
+
+The current simple-card driver limits the DT node name to "sound".
+Any of other names is forbidden while actually we should allow DT
+to pass other node names.
+
+And if this function is being called, the node must already have
+the compatible "simple-audio-card" in DTB. So there should be no
+need to check the name here.
+
+Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 50e6c718a1eb2ae6d05f22615d8268b026175a4a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/generic/simple-card.c | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c
+index 3f2e5807d7eb..383a4a18d51f 100644
+--- a/sound/soc/generic/simple-card.c
++++ b/sound/soc/generic/simple-card.c
+@@ -156,8 +156,7 @@ static int simple_card_dai_link_of(struct device_node *node,
+ char *prefix = "";
+ int ret;
+
+- if (!strcmp("sound", node->name))
+- prefix = "simple-audio-card,";
++ prefix = "simple-audio-card,";
+
+ daifmt = snd_soc_of_parse_daifmt(node, prefix,
+ &bitclkmaster, &framemaster);
+--
+2.1.2
+
--- /dev/null
+From 76c29f42ffd4b249f4c445609caa07be4f4c76f2 Mon Sep 17 00:00:00 2001
+From: Nicolin Chen <Guangyu.Chen@freescale.com>
+Date: Thu, 24 Apr 2014 19:13:59 +0800
+Subject: ASoC: simple-card: Simplify error msg in simple_card_dai_link_of()
+
+It would look better to use prop instead.
+
+Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 966b8063607fbf43c8fdeef579fd8de8a35ca45d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/generic/simple-card.c | 6 ++----
+ 1 file changed, 2 insertions(+), 4 deletions(-)
+
+diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c
+index 383a4a18d51f..c091557666d5 100644
+--- a/sound/soc/generic/simple-card.c
++++ b/sound/soc/generic/simple-card.c
+@@ -166,8 +166,7 @@ static int simple_card_dai_link_of(struct device_node *node,
+ np = of_get_child_by_name(node, prop);
+ if (!np) {
+ ret = -EINVAL;
+- dev_err(dev, "%s: Can't find simple-audio-card,cpu DT node\n",
+- __func__);
++ dev_err(dev, "%s: Can't find %s DT node\n", __func__, prop);
+ goto dai_link_of_err;
+ }
+
+@@ -198,8 +197,7 @@ static int simple_card_dai_link_of(struct device_node *node,
+ np = of_get_child_by_name(node, prop);
+ if (!np) {
+ ret = -EINVAL;
+- dev_err(dev, "%s: Can't find simple-audio-card,codec DT node\n",
+- __func__);
++ dev_err(dev, "%s: Can't find %s DT node\n", __func__, prop);
+ goto dai_link_of_err;
+ }
+
+--
+2.1.2
+
--- /dev/null
+From e9dfbc63375191f9add9b96b1cd5a7dd2db3ef13 Mon Sep 17 00:00:00 2001
+From: Nicolin Chen <Guangyu.Chen@freescale.com>
+Date: Thu, 24 Apr 2014 19:14:00 +0800
+Subject: ASoC: simple-card: Improve coding style
+
+Improve indentation and space.
+
+Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 781cbebed750af26341e551b785048a1ea347c5e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/generic/simple-card.c | 23 +++++++++++------------
+ 1 file changed, 11 insertions(+), 12 deletions(-)
+
+diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c
+index c091557666d5..98f97e543c29 100644
+--- a/sound/soc/generic/simple-card.c
++++ b/sound/soc/generic/simple-card.c
+@@ -66,8 +66,7 @@ err:
+
+ static int asoc_simple_card_dai_init(struct snd_soc_pcm_runtime *rtd)
+ {
+- struct simple_card_data *priv =
+- snd_soc_card_get_drvdata(rtd->card);
++ struct simple_card_data *priv = snd_soc_card_get_drvdata(rtd->card);
+ struct snd_soc_dai *codec = rtd->codec_dai;
+ struct snd_soc_dai *cpu = rtd->cpu_dai;
+ struct simple_dai_props *dai_props;
+@@ -177,7 +176,7 @@ static int simple_card_dai_link_of(struct device_node *node,
+ goto dai_link_of_err;
+
+ dai_props->cpu_dai.fmt = daifmt;
+- switch (((np == bitclkmaster)<<4)|(np == framemaster)) {
++ switch (((np == bitclkmaster) << 4) | (np == framemaster)) {
+ case 0x11:
+ dai_props->cpu_dai.fmt |= SND_SOC_DAIFMT_CBS_CFS;
+ break;
+@@ -218,7 +217,7 @@ static int simple_card_dai_link_of(struct device_node *node,
+ (daifmt & ~SND_SOC_DAIFMT_CLOCK_MASK);
+ } else {
+ dai_props->codec_dai.fmt = daifmt;
+- switch (((np == bitclkmaster)<<4)|(np == framemaster)) {
++ switch (((np == bitclkmaster) << 4) | (np == framemaster)) {
+ case 0x11:
+ dai_props->codec_dai.fmt |= SND_SOC_DAIFMT_CBM_CFM;
+ break;
+@@ -235,8 +234,8 @@ static int simple_card_dai_link_of(struct device_node *node,
+ }
+
+ if (!dai_link->cpu_dai_name || !dai_link->codec_dai_name) {
+- ret = -EINVAL;
+- goto dai_link_of_err;
++ ret = -EINVAL;
++ goto dai_link_of_err;
+ }
+
+ /* simple-card assumes platform == cpu */
+@@ -417,10 +416,10 @@ static int asoc_simple_card_probe(struct platform_device *pdev)
+ return -EINVAL;
+ }
+
+- if (!cinfo->name ||
+- !cinfo->codec_dai.name ||
+- !cinfo->codec ||
+- !cinfo->platform ||
++ if (!cinfo->name ||
++ !cinfo->codec_dai.name ||
++ !cinfo->codec ||
++ !cinfo->platform ||
+ !cinfo->cpu_dai.name) {
+ dev_err(dev, "insufficient asoc_simple_card_info settings\n");
+ return -EINVAL;
+@@ -464,11 +463,11 @@ MODULE_DEVICE_TABLE(of, asoc_simple_of_match);
+
+ static struct platform_driver asoc_simple_card = {
+ .driver = {
+- .name = "asoc-simple-card",
++ .name = "asoc-simple-card",
+ .owner = THIS_MODULE,
+ .of_match_table = asoc_simple_of_match,
+ },
+- .probe = asoc_simple_card_probe,
++ .probe = asoc_simple_card_probe,
+ };
+
+ module_platform_driver(asoc_simple_card);
+--
+2.1.2
+
--- /dev/null
+From bd5bad45d1376564ebe943609356cbfe45c80c49 Mon Sep 17 00:00:00 2001
+From: Jyri Sarha <jsarha@ti.com>
+Date: Thu, 24 Apr 2014 19:42:00 +0300
+Subject: ASoC: simple-card: is_top_level_node parameter to
+ simple_card_dai_link_of()
+
+Restore correct parsing of dai-link subnodes with more explicit
+implementation for applying the "simple-audio-card,"-prefix to
+dai-link property and subnode names.
+
+Signed-off-by: Jyri Sarha <jsarha@ti.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 648722155dc081b019ab0ef548bbebde760a2b83)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/generic/simple-card.c | 11 +++++++----
+ 1 file changed, 7 insertions(+), 4 deletions(-)
+
+diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c
+index 98f97e543c29..06fe0e22b267 100644
+--- a/sound/soc/generic/simple-card.c
++++ b/sound/soc/generic/simple-card.c
+@@ -144,7 +144,8 @@ asoc_simple_card_sub_parse_of(struct device_node *np,
+ static int simple_card_dai_link_of(struct device_node *node,
+ struct device *dev,
+ struct snd_soc_dai_link *dai_link,
+- struct simple_dai_props *dai_props)
++ struct simple_dai_props *dai_props,
++ bool is_top_level_node)
+ {
+ struct device_node *np = NULL;
+ struct device_node *bitclkmaster = NULL;
+@@ -155,7 +156,8 @@ static int simple_card_dai_link_of(struct device_node *node,
+ char *prefix = "";
+ int ret;
+
+- prefix = "simple-audio-card,";
++ if (is_top_level_node)
++ prefix = "simple-audio-card,";
+
+ daifmt = snd_soc_of_parse_daifmt(node, prefix,
+ &bitclkmaster, &framemaster);
+@@ -307,14 +309,15 @@ static int asoc_simple_card_parse_of(struct device_node *node,
+ for (i = 0; (np = of_get_next_child(node, np)); i++) {
+ dev_dbg(dev, "\tlink %d:\n", i);
+ ret = simple_card_dai_link_of(np, dev, dai_link + i,
+- dai_props + i);
++ dai_props + i, false);
+ if (ret < 0) {
+ of_node_put(np);
+ return ret;
+ }
+ }
+ } else {
+- ret = simple_card_dai_link_of(node, dev, dai_link, dai_props);
++ ret = simple_card_dai_link_of(node, dev, dai_link, dai_props,
++ true);
+ if (ret < 0)
+ return ret;
+ }
+--
+2.1.2
+
--- /dev/null
+From 71c261c4d909a5449d51090675a137bea9851997 Mon Sep 17 00:00:00 2001
+From: Andrew Lunn <andrew@lunn.ch>
+Date: Thu, 22 May 2014 17:31:49 +0200
+Subject: ASoC: simple-card: Support setting mclk via a fixed factor
+
+Some platforms require that the codecs mclk is a fixed multiplication
+factor of the audio stream rate. Add a optional property to the
+binding to hold this factor and implement a hw_params() function to
+make use of it.
+
+Signed-off-by: Andrew Lunn <andrew@lunn.ch>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 2942a0e285c46587a1025f12597df63ec04d08c6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ .../devicetree/bindings/sound/simple-card.txt | 3 +++
+ sound/soc/generic/simple-card.c | 28 ++++++++++++++++++++++
+ 2 files changed, 31 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/sound/simple-card.txt b/Documentation/devicetree/bindings/sound/simple-card.txt
+index 9b9df146fd1a..c2e9841dfce4 100644
+--- a/Documentation/devicetree/bindings/sound/simple-card.txt
++++ b/Documentation/devicetree/bindings/sound/simple-card.txt
+@@ -15,6 +15,9 @@ Optional properties:
+ Each entry is a pair of strings, the first being the
+ connection's sink, the second being the connection's
+ source.
++- simple-audio-card,mclk-fs : Multiplication factor between stream rate and codec
++ mclk.
++
+ Optional subnodes:
+
+ - simple-audio-card,dai-link : Container for dai-link level
+diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c
+index 06fe0e22b267..03a7fdcdf114 100644
+--- a/sound/soc/generic/simple-card.c
++++ b/sound/soc/generic/simple-card.c
+@@ -24,9 +24,32 @@ struct simple_card_data {
+ struct asoc_simple_dai cpu_dai;
+ struct asoc_simple_dai codec_dai;
+ } *dai_props;
++ unsigned int mclk_fs;
+ struct snd_soc_dai_link dai_link[]; /* dynamically allocated */
+ };
+
++static int asoc_simple_card_hw_params(struct snd_pcm_substream *substream,
++ struct snd_pcm_hw_params *params)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_dai *codec_dai = rtd->codec_dai;
++ struct simple_card_data *priv = snd_soc_card_get_drvdata(rtd->card);
++ unsigned int mclk;
++ int ret = 0;
++
++ if (priv->mclk_fs) {
++ mclk = params_rate(params) * priv->mclk_fs;
++ ret = snd_soc_dai_set_sysclk(codec_dai, 0, mclk,
++ SND_SOC_CLOCK_IN);
++ }
++
++ return ret;
++}
++
++static struct snd_soc_ops asoc_simple_card_ops = {
++ .hw_params = asoc_simple_card_hw_params,
++};
++
+ static int __asoc_simple_card_dai_init(struct snd_soc_dai *dai,
+ struct asoc_simple_dai *set)
+ {
+@@ -251,6 +274,7 @@ static int simple_card_dai_link_of(struct device_node *node,
+ sprintf(name, "%s-%s", dai_link->cpu_dai_name,
+ dai_link->codec_dai_name);
+ dai_link->name = dai_link->stream_name = name;
++ dai_link->ops = &asoc_simple_card_ops;
+
+ dev_dbg(dev, "\tname : %s\n", dai_link->stream_name);
+ dev_dbg(dev, "\tcpu : %s / %04x / %d\n",
+@@ -300,6 +324,10 @@ static int asoc_simple_card_parse_of(struct device_node *node,
+ return ret;
+ }
+
++ /* Factor to mclk, used in hw_params() */
++ of_property_read_u32(node, "simple-audio-card,mclk-fs",
++ &priv->mclk_fs);
++
+ dev_dbg(dev, "New simple-card: %s\n", priv->snd_card.name ?
+ priv->snd_card.name : "");
+
+--
+2.1.2
+
--- /dev/null
+From d7b0142eae6e7e6e8b197e8c13192a093e5c4258 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Fri, 11 Jul 2014 11:11:08 +0200
+Subject: serial: sh-sci: Add device tree support for r8a7{778,740,3a4} and
+ sh73a0
+
+Simply document new compat strings.
+There appears to be no need for a driver updates.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 34c4eda809e1efb16c554c07bb5df4c8ace9424e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/serial/renesas,sci-serial.txt | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
+index 64fd7dec1bbc..b3556609a06f 100644
+--- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
++++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
+@@ -4,6 +4,13 @@ Required properties:
+
+ - compatible: Must contain one of the following:
+
++ - "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART.
++ - "renesas,scifb-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFB compatible UART.
++ - "renesas,scifa-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFA compatible UART.
++ - "renesas,scifb-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFB compatible UART.
++ - "renesas,scifa-r8a7740" for R8A7740 (R-Mobile A1) SCIFA compatible UART.
++ - "renesas,scifb-r8a7740" for R8A7740 (R-Mobile A1) SCIFB compatible UART.
++ - "renesas,scif-r8a7778" for R8A7778 (R-Car M1) SCIF compatible UART.
+ - "renesas,scif-r8a7779" for R8A7779 (R-Car H1) SCIF compatible UART.
+ - "renesas,scif-r8a7790" for R8A7790 (R-Car H2) SCIF compatible UART.
+ - "renesas,scifa-r8a7790" for R8A7790 (R-Car H2) SCIFA compatible UART.
+--
+2.1.2
+
--- /dev/null
+From 3ced2ffe9af02a62cf7f6c0482177de18fd6beed Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 17 Feb 2014 11:27:49 +0100
+Subject: clocksource: sh_tmu: Use request_irq() instead of setup_irq()
+
+The driver claims it needs to register an interrupt handler too early
+for request_irq(). This might have been true in the past, but the only
+meaningful difference between request_irq() and setup_irq() today is an
+additional kzalloc() call in request_irq(). As the driver calls
+kmalloc() itself we know that the slab allocator is available, we can
+thus switch to request_irq().
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 1c56cf6b048e1e1bbe08faf38b5592b373905ac5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_tmu.c | 22 ++++++++--------------
+ 1 file changed, 8 insertions(+), 14 deletions(-)
+
+diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
+index ecd7b60bfdfa..8613cc90bb74 100644
+--- a/drivers/clocksource/sh_tmu.c
++++ b/drivers/clocksource/sh_tmu.c
+@@ -38,7 +38,7 @@
+ struct sh_tmu_priv {
+ void __iomem *mapbase;
+ struct clk *clk;
+- struct irqaction irqaction;
++ int irq;
+ struct platform_device *pdev;
+ unsigned long rate;
+ unsigned long periodic;
+@@ -401,10 +401,11 @@ static void sh_tmu_register_clockevent(struct sh_tmu_priv *p,
+
+ clockevents_config_and_register(ced, 1, 0x300, 0xffffffff);
+
+- ret = setup_irq(p->irqaction.irq, &p->irqaction);
++ ret = request_irq(p->irq, sh_tmu_interrupt,
++ IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
++ dev_name(&p->pdev->dev), p);
+ if (ret) {
+- dev_err(&p->pdev->dev, "failed to request irq %d\n",
+- p->irqaction.irq);
++ dev_err(&p->pdev->dev, "failed to request irq %d\n", p->irq);
+ return;
+ }
+ }
+@@ -425,7 +426,7 @@ static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
+ {
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
+ struct resource *res;
+- int irq, ret;
++ int ret;
+ ret = -ENXIO;
+
+ memset(p, 0, sizeof(*p));
+@@ -444,8 +445,8 @@ static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
+ goto err0;
+ }
+
+- irq = platform_get_irq(p->pdev, 0);
+- if (irq < 0) {
++ p->irq = platform_get_irq(p->pdev, 0);
++ if (p->irq < 0) {
+ dev_err(&p->pdev->dev, "failed to get irq\n");
+ goto err0;
+ }
+@@ -457,13 +458,6 @@ static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
+ goto err0;
+ }
+
+- /* setup data for setup_irq() (too early for request_irq()) */
+- p->irqaction.name = dev_name(&p->pdev->dev);
+- p->irqaction.handler = sh_tmu_interrupt;
+- p->irqaction.dev_id = p;
+- p->irqaction.irq = irq;
+- p->irqaction.flags = IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING;
+-
+ /* get hold of clock */
+ p->clk = clk_get(&p->pdev->dev, "tmu_fck");
+ if (IS_ERR(p->clk)) {
+--
+2.1.2
+
--- /dev/null
+From 6adc6f8dacaeb4c83f9960cae6f84ffea42a3950 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 27 Jan 2014 15:29:19 +0100
+Subject: clocksource: sh_tmu: Split channel fields from sh_tmu_priv
+
+Create a new sh_tmu_channel structure to hold the channel-specific
+field in preparation for multiple channels per device support.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit de2d12c7e856f0fa59ea83275410a364d2b182c0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_tmu.c | 235 +++++++++++++++++++++++--------------------
+ 1 file changed, 125 insertions(+), 110 deletions(-)
+
+diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
+index 8613cc90bb74..26457e1fccbb 100644
+--- a/drivers/clocksource/sh_tmu.c
++++ b/drivers/clocksource/sh_tmu.c
+@@ -35,11 +35,13 @@
+ #include <linux/pm_domain.h>
+ #include <linux/pm_runtime.h>
+
+-struct sh_tmu_priv {
+- void __iomem *mapbase;
+- struct clk *clk;
++struct sh_tmu_priv;
++
++struct sh_tmu_channel {
++ struct sh_tmu_priv *tmu;
++
+ int irq;
+- struct platform_device *pdev;
++
+ unsigned long rate;
+ unsigned long periodic;
+ struct clock_event_device ced;
+@@ -48,6 +50,15 @@ struct sh_tmu_priv {
+ unsigned int enable_count;
+ };
+
++struct sh_tmu_priv {
++ struct platform_device *pdev;
++
++ void __iomem *mapbase;
++ struct clk *clk;
++
++ struct sh_tmu_channel channel;
++};
++
+ static DEFINE_RAW_SPINLOCK(sh_tmu_lock);
+
+ #define TSTR -1 /* shared register */
+@@ -55,10 +66,10 @@ static DEFINE_RAW_SPINLOCK(sh_tmu_lock);
+ #define TCNT 1 /* channel register */
+ #define TCR 2 /* channel register */
+
+-static inline unsigned long sh_tmu_read(struct sh_tmu_priv *p, int reg_nr)
++static inline unsigned long sh_tmu_read(struct sh_tmu_channel *ch, int reg_nr)
+ {
+- struct sh_timer_config *cfg = p->pdev->dev.platform_data;
+- void __iomem *base = p->mapbase;
++ struct sh_timer_config *cfg = ch->tmu->pdev->dev.platform_data;
++ void __iomem *base = ch->tmu->mapbase;
+ unsigned long offs;
+
+ if (reg_nr == TSTR)
+@@ -72,11 +83,11 @@ static inline unsigned long sh_tmu_read(struct sh_tmu_priv *p, int reg_nr)
+ return ioread32(base + offs);
+ }
+
+-static inline void sh_tmu_write(struct sh_tmu_priv *p, int reg_nr,
++static inline void sh_tmu_write(struct sh_tmu_channel *ch, int reg_nr,
+ unsigned long value)
+ {
+- struct sh_timer_config *cfg = p->pdev->dev.platform_data;
+- void __iomem *base = p->mapbase;
++ struct sh_timer_config *cfg = ch->tmu->pdev->dev.platform_data;
++ void __iomem *base = ch->tmu->mapbase;
+ unsigned long offs;
+
+ if (reg_nr == TSTR) {
+@@ -92,152 +103,152 @@ static inline void sh_tmu_write(struct sh_tmu_priv *p, int reg_nr,
+ iowrite32(value, base + offs);
+ }
+
+-static void sh_tmu_start_stop_ch(struct sh_tmu_priv *p, int start)
++static void sh_tmu_start_stop_ch(struct sh_tmu_channel *ch, int start)
+ {
+- struct sh_timer_config *cfg = p->pdev->dev.platform_data;
++ struct sh_timer_config *cfg = ch->tmu->pdev->dev.platform_data;
+ unsigned long flags, value;
+
+ /* start stop register shared by multiple timer channels */
+ raw_spin_lock_irqsave(&sh_tmu_lock, flags);
+- value = sh_tmu_read(p, TSTR);
++ value = sh_tmu_read(ch, TSTR);
+
+ if (start)
+ value |= 1 << cfg->timer_bit;
+ else
+ value &= ~(1 << cfg->timer_bit);
+
+- sh_tmu_write(p, TSTR, value);
++ sh_tmu_write(ch, TSTR, value);
+ raw_spin_unlock_irqrestore(&sh_tmu_lock, flags);
+ }
+
+-static int __sh_tmu_enable(struct sh_tmu_priv *p)
++static int __sh_tmu_enable(struct sh_tmu_channel *ch)
+ {
+ int ret;
+
+ /* enable clock */
+- ret = clk_enable(p->clk);
++ ret = clk_enable(ch->tmu->clk);
+ if (ret) {
+- dev_err(&p->pdev->dev, "cannot enable clock\n");
++ dev_err(&ch->tmu->pdev->dev, "cannot enable clock\n");
+ return ret;
+ }
+
+ /* make sure channel is disabled */
+- sh_tmu_start_stop_ch(p, 0);
++ sh_tmu_start_stop_ch(ch, 0);
+
+ /* maximum timeout */
+- sh_tmu_write(p, TCOR, 0xffffffff);
+- sh_tmu_write(p, TCNT, 0xffffffff);
++ sh_tmu_write(ch, TCOR, 0xffffffff);
++ sh_tmu_write(ch, TCNT, 0xffffffff);
+
+ /* configure channel to parent clock / 4, irq off */
+- p->rate = clk_get_rate(p->clk) / 4;
+- sh_tmu_write(p, TCR, 0x0000);
++ ch->rate = clk_get_rate(ch->tmu->clk) / 4;
++ sh_tmu_write(ch, TCR, 0x0000);
+
+ /* enable channel */
+- sh_tmu_start_stop_ch(p, 1);
++ sh_tmu_start_stop_ch(ch, 1);
+
+ return 0;
+ }
+
+-static int sh_tmu_enable(struct sh_tmu_priv *p)
++static int sh_tmu_enable(struct sh_tmu_channel *ch)
+ {
+- if (p->enable_count++ > 0)
++ if (ch->enable_count++ > 0)
+ return 0;
+
+- pm_runtime_get_sync(&p->pdev->dev);
+- dev_pm_syscore_device(&p->pdev->dev, true);
++ pm_runtime_get_sync(&ch->tmu->pdev->dev);
++ dev_pm_syscore_device(&ch->tmu->pdev->dev, true);
+
+- return __sh_tmu_enable(p);
++ return __sh_tmu_enable(ch);
+ }
+
+-static void __sh_tmu_disable(struct sh_tmu_priv *p)
++static void __sh_tmu_disable(struct sh_tmu_channel *ch)
+ {
+ /* disable channel */
+- sh_tmu_start_stop_ch(p, 0);
++ sh_tmu_start_stop_ch(ch, 0);
+
+ /* disable interrupts in TMU block */
+- sh_tmu_write(p, TCR, 0x0000);
++ sh_tmu_write(ch, TCR, 0x0000);
+
+ /* stop clock */
+- clk_disable(p->clk);
++ clk_disable(ch->tmu->clk);
+ }
+
+-static void sh_tmu_disable(struct sh_tmu_priv *p)
++static void sh_tmu_disable(struct sh_tmu_channel *ch)
+ {
+- if (WARN_ON(p->enable_count == 0))
++ if (WARN_ON(ch->enable_count == 0))
+ return;
+
+- if (--p->enable_count > 0)
++ if (--ch->enable_count > 0)
+ return;
+
+- __sh_tmu_disable(p);
++ __sh_tmu_disable(ch);
+
+- dev_pm_syscore_device(&p->pdev->dev, false);
+- pm_runtime_put(&p->pdev->dev);
++ dev_pm_syscore_device(&ch->tmu->pdev->dev, false);
++ pm_runtime_put(&ch->tmu->pdev->dev);
+ }
+
+-static void sh_tmu_set_next(struct sh_tmu_priv *p, unsigned long delta,
++static void sh_tmu_set_next(struct sh_tmu_channel *ch, unsigned long delta,
+ int periodic)
+ {
+ /* stop timer */
+- sh_tmu_start_stop_ch(p, 0);
++ sh_tmu_start_stop_ch(ch, 0);
+
+ /* acknowledge interrupt */
+- sh_tmu_read(p, TCR);
++ sh_tmu_read(ch, TCR);
+
+ /* enable interrupt */
+- sh_tmu_write(p, TCR, 0x0020);
++ sh_tmu_write(ch, TCR, 0x0020);
+
+ /* reload delta value in case of periodic timer */
+ if (periodic)
+- sh_tmu_write(p, TCOR, delta);
++ sh_tmu_write(ch, TCOR, delta);
+ else
+- sh_tmu_write(p, TCOR, 0xffffffff);
++ sh_tmu_write(ch, TCOR, 0xffffffff);
+
+- sh_tmu_write(p, TCNT, delta);
++ sh_tmu_write(ch, TCNT, delta);
+
+ /* start timer */
+- sh_tmu_start_stop_ch(p, 1);
++ sh_tmu_start_stop_ch(ch, 1);
+ }
+
+ static irqreturn_t sh_tmu_interrupt(int irq, void *dev_id)
+ {
+- struct sh_tmu_priv *p = dev_id;
++ struct sh_tmu_channel *ch = dev_id;
+
+ /* disable or acknowledge interrupt */
+- if (p->ced.mode == CLOCK_EVT_MODE_ONESHOT)
+- sh_tmu_write(p, TCR, 0x0000);
++ if (ch->ced.mode == CLOCK_EVT_MODE_ONESHOT)
++ sh_tmu_write(ch, TCR, 0x0000);
+ else
+- sh_tmu_write(p, TCR, 0x0020);
++ sh_tmu_write(ch, TCR, 0x0020);
+
+ /* notify clockevent layer */
+- p->ced.event_handler(&p->ced);
++ ch->ced.event_handler(&ch->ced);
+ return IRQ_HANDLED;
+ }
+
+-static struct sh_tmu_priv *cs_to_sh_tmu(struct clocksource *cs)
++static struct sh_tmu_channel *cs_to_sh_tmu(struct clocksource *cs)
+ {
+- return container_of(cs, struct sh_tmu_priv, cs);
++ return container_of(cs, struct sh_tmu_channel, cs);
+ }
+
+ static cycle_t sh_tmu_clocksource_read(struct clocksource *cs)
+ {
+- struct sh_tmu_priv *p = cs_to_sh_tmu(cs);
++ struct sh_tmu_channel *ch = cs_to_sh_tmu(cs);
+
+- return sh_tmu_read(p, TCNT) ^ 0xffffffff;
++ return sh_tmu_read(ch, TCNT) ^ 0xffffffff;
+ }
+
+ static int sh_tmu_clocksource_enable(struct clocksource *cs)
+ {
+- struct sh_tmu_priv *p = cs_to_sh_tmu(cs);
++ struct sh_tmu_channel *ch = cs_to_sh_tmu(cs);
+ int ret;
+
+- if (WARN_ON(p->cs_enabled))
++ if (WARN_ON(ch->cs_enabled))
+ return 0;
+
+- ret = sh_tmu_enable(p);
++ ret = sh_tmu_enable(ch);
+ if (!ret) {
+- __clocksource_updatefreq_hz(cs, p->rate);
+- p->cs_enabled = true;
++ __clocksource_updatefreq_hz(cs, ch->rate);
++ ch->cs_enabled = true;
+ }
+
+ return ret;
+@@ -245,45 +256,45 @@ static int sh_tmu_clocksource_enable(struct clocksource *cs)
+
+ static void sh_tmu_clocksource_disable(struct clocksource *cs)
+ {
+- struct sh_tmu_priv *p = cs_to_sh_tmu(cs);
++ struct sh_tmu_channel *ch = cs_to_sh_tmu(cs);
+
+- if (WARN_ON(!p->cs_enabled))
++ if (WARN_ON(!ch->cs_enabled))
+ return;
+
+- sh_tmu_disable(p);
+- p->cs_enabled = false;
++ sh_tmu_disable(ch);
++ ch->cs_enabled = false;
+ }
+
+ static void sh_tmu_clocksource_suspend(struct clocksource *cs)
+ {
+- struct sh_tmu_priv *p = cs_to_sh_tmu(cs);
++ struct sh_tmu_channel *ch = cs_to_sh_tmu(cs);
+
+- if (!p->cs_enabled)
++ if (!ch->cs_enabled)
+ return;
+
+- if (--p->enable_count == 0) {
+- __sh_tmu_disable(p);
+- pm_genpd_syscore_poweroff(&p->pdev->dev);
++ if (--ch->enable_count == 0) {
++ __sh_tmu_disable(ch);
++ pm_genpd_syscore_poweroff(&ch->tmu->pdev->dev);
+ }
+ }
+
+ static void sh_tmu_clocksource_resume(struct clocksource *cs)
+ {
+- struct sh_tmu_priv *p = cs_to_sh_tmu(cs);
++ struct sh_tmu_channel *ch = cs_to_sh_tmu(cs);
+
+- if (!p->cs_enabled)
++ if (!ch->cs_enabled)
+ return;
+
+- if (p->enable_count++ == 0) {
+- pm_genpd_syscore_poweron(&p->pdev->dev);
+- __sh_tmu_enable(p);
++ if (ch->enable_count++ == 0) {
++ pm_genpd_syscore_poweron(&ch->tmu->pdev->dev);
++ __sh_tmu_enable(ch);
+ }
+ }
+
+-static int sh_tmu_register_clocksource(struct sh_tmu_priv *p,
++static int sh_tmu_register_clocksource(struct sh_tmu_channel *ch,
+ char *name, unsigned long rating)
+ {
+- struct clocksource *cs = &p->cs;
++ struct clocksource *cs = &ch->cs;
+
+ cs->name = name;
+ cs->rating = rating;
+@@ -295,43 +306,43 @@ static int sh_tmu_register_clocksource(struct sh_tmu_priv *p,
+ cs->mask = CLOCKSOURCE_MASK(32);
+ cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
+
+- dev_info(&p->pdev->dev, "used as clock source\n");
++ dev_info(&ch->tmu->pdev->dev, "used as clock source\n");
+
+ /* Register with dummy 1 Hz value, gets updated in ->enable() */
+ clocksource_register_hz(cs, 1);
+ return 0;
+ }
+
+-static struct sh_tmu_priv *ced_to_sh_tmu(struct clock_event_device *ced)
++static struct sh_tmu_channel *ced_to_sh_tmu(struct clock_event_device *ced)
+ {
+- return container_of(ced, struct sh_tmu_priv, ced);
++ return container_of(ced, struct sh_tmu_channel, ced);
+ }
+
+-static void sh_tmu_clock_event_start(struct sh_tmu_priv *p, int periodic)
++static void sh_tmu_clock_event_start(struct sh_tmu_channel *ch, int periodic)
+ {
+- struct clock_event_device *ced = &p->ced;
++ struct clock_event_device *ced = &ch->ced;
+
+- sh_tmu_enable(p);
++ sh_tmu_enable(ch);
+
+- clockevents_config(ced, p->rate);
++ clockevents_config(ced, ch->rate);
+
+ if (periodic) {
+- p->periodic = (p->rate + HZ/2) / HZ;
+- sh_tmu_set_next(p, p->periodic, 1);
++ ch->periodic = (ch->rate + HZ/2) / HZ;
++ sh_tmu_set_next(ch, ch->periodic, 1);
+ }
+ }
+
+ static void sh_tmu_clock_event_mode(enum clock_event_mode mode,
+ struct clock_event_device *ced)
+ {
+- struct sh_tmu_priv *p = ced_to_sh_tmu(ced);
++ struct sh_tmu_channel *ch = ced_to_sh_tmu(ced);
+ int disabled = 0;
+
+ /* deal with old setting first */
+ switch (ced->mode) {
+ case CLOCK_EVT_MODE_PERIODIC:
+ case CLOCK_EVT_MODE_ONESHOT:
+- sh_tmu_disable(p);
++ sh_tmu_disable(ch);
+ disabled = 1;
+ break;
+ default:
+@@ -340,16 +351,18 @@ static void sh_tmu_clock_event_mode(enum clock_event_mode mode,
+
+ switch (mode) {
+ case CLOCK_EVT_MODE_PERIODIC:
+- dev_info(&p->pdev->dev, "used for periodic clock events\n");
+- sh_tmu_clock_event_start(p, 1);
++ dev_info(&ch->tmu->pdev->dev,
++ "used for periodic clock events\n");
++ sh_tmu_clock_event_start(ch, 1);
+ break;
+ case CLOCK_EVT_MODE_ONESHOT:
+- dev_info(&p->pdev->dev, "used for oneshot clock events\n");
+- sh_tmu_clock_event_start(p, 0);
++ dev_info(&ch->tmu->pdev->dev,
++ "used for oneshot clock events\n");
++ sh_tmu_clock_event_start(ch, 0);
+ break;
+ case CLOCK_EVT_MODE_UNUSED:
+ if (!disabled)
+- sh_tmu_disable(p);
++ sh_tmu_disable(ch);
+ break;
+ case CLOCK_EVT_MODE_SHUTDOWN:
+ default:
+@@ -360,29 +373,29 @@ static void sh_tmu_clock_event_mode(enum clock_event_mode mode,
+ static int sh_tmu_clock_event_next(unsigned long delta,
+ struct clock_event_device *ced)
+ {
+- struct sh_tmu_priv *p = ced_to_sh_tmu(ced);
++ struct sh_tmu_channel *ch = ced_to_sh_tmu(ced);
+
+ BUG_ON(ced->mode != CLOCK_EVT_MODE_ONESHOT);
+
+ /* program new delta value */
+- sh_tmu_set_next(p, delta, 0);
++ sh_tmu_set_next(ch, delta, 0);
+ return 0;
+ }
+
+ static void sh_tmu_clock_event_suspend(struct clock_event_device *ced)
+ {
+- pm_genpd_syscore_poweroff(&ced_to_sh_tmu(ced)->pdev->dev);
++ pm_genpd_syscore_poweroff(&ced_to_sh_tmu(ced)->tmu->pdev->dev);
+ }
+
+ static void sh_tmu_clock_event_resume(struct clock_event_device *ced)
+ {
+- pm_genpd_syscore_poweron(&ced_to_sh_tmu(ced)->pdev->dev);
++ pm_genpd_syscore_poweron(&ced_to_sh_tmu(ced)->tmu->pdev->dev);
+ }
+
+-static void sh_tmu_register_clockevent(struct sh_tmu_priv *p,
++static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch,
+ char *name, unsigned long rating)
+ {
+- struct clock_event_device *ced = &p->ced;
++ struct clock_event_device *ced = &ch->ced;
+ int ret;
+
+ memset(ced, 0, sizeof(*ced));
+@@ -397,27 +410,28 @@ static void sh_tmu_register_clockevent(struct sh_tmu_priv *p,
+ ced->suspend = sh_tmu_clock_event_suspend;
+ ced->resume = sh_tmu_clock_event_resume;
+
+- dev_info(&p->pdev->dev, "used for clock events\n");
++ dev_info(&ch->tmu->pdev->dev, "used for clock events\n");
+
+ clockevents_config_and_register(ced, 1, 0x300, 0xffffffff);
+
+- ret = request_irq(p->irq, sh_tmu_interrupt,
++ ret = request_irq(ch->irq, sh_tmu_interrupt,
+ IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
+- dev_name(&p->pdev->dev), p);
++ dev_name(&ch->tmu->pdev->dev), ch);
+ if (ret) {
+- dev_err(&p->pdev->dev, "failed to request irq %d\n", p->irq);
++ dev_err(&ch->tmu->pdev->dev, "failed to request irq %d\n",
++ ch->irq);
+ return;
+ }
+ }
+
+-static int sh_tmu_register(struct sh_tmu_priv *p, char *name,
++static int sh_tmu_register(struct sh_tmu_channel *ch, char *name,
+ unsigned long clockevent_rating,
+ unsigned long clocksource_rating)
+ {
+ if (clockevent_rating)
+- sh_tmu_register_clockevent(p, name, clockevent_rating);
++ sh_tmu_register_clockevent(ch, name, clockevent_rating);
+ else if (clocksource_rating)
+- sh_tmu_register_clocksource(p, name, clocksource_rating);
++ sh_tmu_register_clocksource(ch, name, clocksource_rating);
+
+ return 0;
+ }
+@@ -445,8 +459,8 @@ static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
+ goto err0;
+ }
+
+- p->irq = platform_get_irq(p->pdev, 0);
+- if (p->irq < 0) {
++ p->channel.irq = platform_get_irq(p->pdev, 0);
++ if (p->channel.irq < 0) {
+ dev_err(&p->pdev->dev, "failed to get irq\n");
+ goto err0;
+ }
+@@ -470,10 +484,11 @@ static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
+ if (ret < 0)
+ goto err2;
+
+- p->cs_enabled = false;
+- p->enable_count = 0;
++ p->channel.cs_enabled = false;
++ p->channel.enable_count = 0;
++ p->channel.tmu = p;
+
+- ret = sh_tmu_register(p, (char *)dev_name(&p->pdev->dev),
++ ret = sh_tmu_register(&p->channel, (char *)dev_name(&p->pdev->dev),
+ cfg->clockevent_rating,
+ cfg->clocksource_rating);
+ if (ret < 0)
+--
+2.1.2
+
--- /dev/null
+From 81d82668b10ef70575203f3ff454060601b9ca2e Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 27 Jan 2014 22:04:17 +0100
+Subject: clocksource: sh_tmu: Rename struct sh_tmu_priv to sh_tmu_device
+
+Channel data is private as well, rename priv to device to make the
+distrinction between the core device and the channels clearer.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 0a72aa39cc105fbf6971feb8928a63530a4a446b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_tmu.c | 68 ++++++++++++++++++++++----------------------
+ 1 file changed, 34 insertions(+), 34 deletions(-)
+
+diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
+index 26457e1fccbb..70137906b8c0 100644
+--- a/drivers/clocksource/sh_tmu.c
++++ b/drivers/clocksource/sh_tmu.c
+@@ -35,10 +35,10 @@
+ #include <linux/pm_domain.h>
+ #include <linux/pm_runtime.h>
+
+-struct sh_tmu_priv;
++struct sh_tmu_device;
+
+ struct sh_tmu_channel {
+- struct sh_tmu_priv *tmu;
++ struct sh_tmu_device *tmu;
+
+ int irq;
+
+@@ -50,7 +50,7 @@ struct sh_tmu_channel {
+ unsigned int enable_count;
+ };
+
+-struct sh_tmu_priv {
++struct sh_tmu_device {
+ struct platform_device *pdev;
+
+ void __iomem *mapbase;
+@@ -436,59 +436,59 @@ static int sh_tmu_register(struct sh_tmu_channel *ch, char *name,
+ return 0;
+ }
+
+-static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
++static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
+ {
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
+ struct resource *res;
+ int ret;
+ ret = -ENXIO;
+
+- memset(p, 0, sizeof(*p));
+- p->pdev = pdev;
++ memset(tmu, 0, sizeof(*tmu));
++ tmu->pdev = pdev;
+
+ if (!cfg) {
+- dev_err(&p->pdev->dev, "missing platform data\n");
++ dev_err(&tmu->pdev->dev, "missing platform data\n");
+ goto err0;
+ }
+
+- platform_set_drvdata(pdev, p);
++ platform_set_drvdata(pdev, tmu);
+
+- res = platform_get_resource(p->pdev, IORESOURCE_MEM, 0);
++ res = platform_get_resource(tmu->pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+- dev_err(&p->pdev->dev, "failed to get I/O memory\n");
++ dev_err(&tmu->pdev->dev, "failed to get I/O memory\n");
+ goto err0;
+ }
+
+- p->channel.irq = platform_get_irq(p->pdev, 0);
+- if (p->channel.irq < 0) {
+- dev_err(&p->pdev->dev, "failed to get irq\n");
++ tmu->channel.irq = platform_get_irq(tmu->pdev, 0);
++ if (tmu->channel.irq < 0) {
++ dev_err(&tmu->pdev->dev, "failed to get irq\n");
+ goto err0;
+ }
+
+ /* map memory, let mapbase point to our channel */
+- p->mapbase = ioremap_nocache(res->start, resource_size(res));
+- if (p->mapbase == NULL) {
+- dev_err(&p->pdev->dev, "failed to remap I/O memory\n");
++ tmu->mapbase = ioremap_nocache(res->start, resource_size(res));
++ if (tmu->mapbase == NULL) {
++ dev_err(&tmu->pdev->dev, "failed to remap I/O memory\n");
+ goto err0;
+ }
+
+ /* get hold of clock */
+- p->clk = clk_get(&p->pdev->dev, "tmu_fck");
+- if (IS_ERR(p->clk)) {
+- dev_err(&p->pdev->dev, "cannot get clock\n");
+- ret = PTR_ERR(p->clk);
++ tmu->clk = clk_get(&tmu->pdev->dev, "tmu_fck");
++ if (IS_ERR(tmu->clk)) {
++ dev_err(&tmu->pdev->dev, "cannot get clock\n");
++ ret = PTR_ERR(tmu->clk);
+ goto err1;
+ }
+
+- ret = clk_prepare(p->clk);
++ ret = clk_prepare(tmu->clk);
+ if (ret < 0)
+ goto err2;
+
+- p->channel.cs_enabled = false;
+- p->channel.enable_count = 0;
+- p->channel.tmu = p;
++ tmu->channel.cs_enabled = false;
++ tmu->channel.enable_count = 0;
++ tmu->channel.tmu = tmu;
+
+- ret = sh_tmu_register(&p->channel, (char *)dev_name(&p->pdev->dev),
++ ret = sh_tmu_register(&tmu->channel, (char *)dev_name(&tmu->pdev->dev),
+ cfg->clockevent_rating,
+ cfg->clocksource_rating);
+ if (ret < 0)
+@@ -497,18 +497,18 @@ static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
+ return 0;
+
+ err3:
+- clk_unprepare(p->clk);
++ clk_unprepare(tmu->clk);
+ err2:
+- clk_put(p->clk);
++ clk_put(tmu->clk);
+ err1:
+- iounmap(p->mapbase);
++ iounmap(tmu->mapbase);
+ err0:
+ return ret;
+ }
+
+ static int sh_tmu_probe(struct platform_device *pdev)
+ {
+- struct sh_tmu_priv *p = platform_get_drvdata(pdev);
++ struct sh_tmu_device *tmu = platform_get_drvdata(pdev);
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
+ int ret;
+
+@@ -517,20 +517,20 @@ static int sh_tmu_probe(struct platform_device *pdev)
+ pm_runtime_enable(&pdev->dev);
+ }
+
+- if (p) {
++ if (tmu) {
+ dev_info(&pdev->dev, "kept as earlytimer\n");
+ goto out;
+ }
+
+- p = kmalloc(sizeof(*p), GFP_KERNEL);
+- if (p == NULL) {
++ tmu = kmalloc(sizeof(*tmu), GFP_KERNEL);
++ if (tmu == NULL) {
+ dev_err(&pdev->dev, "failed to allocate driver data\n");
+ return -ENOMEM;
+ }
+
+- ret = sh_tmu_setup(p, pdev);
++ ret = sh_tmu_setup(tmu, pdev);
+ if (ret) {
+- kfree(p);
++ kfree(tmu);
+ pm_runtime_idle(&pdev->dev);
+ return ret;
+ }
+--
+2.1.2
+
--- /dev/null
+From 806731c1d3f6e43b1f372c698b14876ae4a34b72 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 27 Jan 2014 22:04:17 +0100
+Subject: clocksource: sh_tmu: Split channel setup to separate function
+
+Move the channel setup code from sh_tmu_setup to a new
+sh_tmu_setup_channel function and call it from sh_tmu_setup.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit a94ddaa6fcd46e168736027535b2d81b6a18883f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_tmu.c | 36 +++++++++++++++++++++++-------------
+ 1 file changed, 23 insertions(+), 13 deletions(-)
+
+diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
+index 70137906b8c0..4779c97bb2ee 100644
+--- a/drivers/clocksource/sh_tmu.c
++++ b/drivers/clocksource/sh_tmu.c
+@@ -436,6 +436,28 @@ static int sh_tmu_register(struct sh_tmu_channel *ch, char *name,
+ return 0;
+ }
+
++static int sh_tmu_channel_setup(struct sh_tmu_channel *ch,
++ struct sh_tmu_device *tmu)
++{
++ struct sh_timer_config *cfg = tmu->pdev->dev.platform_data;
++
++ memset(ch, 0, sizeof(*ch));
++ ch->tmu = tmu;
++
++ ch->irq = platform_get_irq(tmu->pdev, 0);
++ if (ch->irq < 0) {
++ dev_err(&tmu->pdev->dev, "failed to get irq\n");
++ return ch->irq;
++ }
++
++ ch->cs_enabled = false;
++ ch->enable_count = 0;
++
++ return sh_tmu_register(ch, (char *)dev_name(&tmu->pdev->dev),
++ cfg->clockevent_rating,
++ cfg->clocksource_rating);
++}
++
+ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
+ {
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
+@@ -459,12 +481,6 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
+ goto err0;
+ }
+
+- tmu->channel.irq = platform_get_irq(tmu->pdev, 0);
+- if (tmu->channel.irq < 0) {
+- dev_err(&tmu->pdev->dev, "failed to get irq\n");
+- goto err0;
+- }
+-
+ /* map memory, let mapbase point to our channel */
+ tmu->mapbase = ioremap_nocache(res->start, resource_size(res));
+ if (tmu->mapbase == NULL) {
+@@ -484,13 +500,7 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
+ if (ret < 0)
+ goto err2;
+
+- tmu->channel.cs_enabled = false;
+- tmu->channel.enable_count = 0;
+- tmu->channel.tmu = tmu;
+-
+- ret = sh_tmu_register(&tmu->channel, (char *)dev_name(&tmu->pdev->dev),
+- cfg->clockevent_rating,
+- cfg->clocksource_rating);
++ ret = sh_tmu_channel_setup(&tmu->channel, tmu);
+ if (ret < 0)
+ goto err3;
+
+--
+2.1.2
+
--- /dev/null
+From 04f00643bc7ef59810858408a1c642a179271aaa Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 17 Feb 2014 16:04:16 +0100
+Subject: clocksource: sh_tmu: Constify name argument to sh_tmu_register()
+
+The name argument is assigned to const structure fields only, constify
+it.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 84876d0505b15a2907696566a80a365993feab44)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_tmu.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
+index 4779c97bb2ee..2c64e3f93f16 100644
+--- a/drivers/clocksource/sh_tmu.c
++++ b/drivers/clocksource/sh_tmu.c
+@@ -292,7 +292,7 @@ static void sh_tmu_clocksource_resume(struct clocksource *cs)
+ }
+
+ static int sh_tmu_register_clocksource(struct sh_tmu_channel *ch,
+- char *name, unsigned long rating)
++ const char *name, unsigned long rating)
+ {
+ struct clocksource *cs = &ch->cs;
+
+@@ -393,7 +393,7 @@ static void sh_tmu_clock_event_resume(struct clock_event_device *ced)
+ }
+
+ static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch,
+- char *name, unsigned long rating)
++ const char *name, unsigned long rating)
+ {
+ struct clock_event_device *ced = &ch->ced;
+ int ret;
+@@ -424,7 +424,7 @@ static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch,
+ }
+ }
+
+-static int sh_tmu_register(struct sh_tmu_channel *ch, char *name,
++static int sh_tmu_register(struct sh_tmu_channel *ch, const char *name,
+ unsigned long clockevent_rating,
+ unsigned long clocksource_rating)
+ {
+@@ -453,7 +453,7 @@ static int sh_tmu_channel_setup(struct sh_tmu_channel *ch,
+ ch->cs_enabled = false;
+ ch->enable_count = 0;
+
+- return sh_tmu_register(ch, (char *)dev_name(&tmu->pdev->dev),
++ return sh_tmu_register(ch, dev_name(&tmu->pdev->dev),
+ cfg->clockevent_rating,
+ cfg->clocksource_rating);
+ }
+--
+2.1.2
+
--- /dev/null
+From e79892fd4a29e61e6db50a4fa6621f0755024712 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 27 Jan 2014 22:04:17 +0100
+Subject: clocksource: sh_tmu: Add memory base to sh_tmu_channel structure
+
+The channel memory base is channel-specific, add it to the channel
+structure in preparation for support of multiple channels per device.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit de693461bf9624ec12808f8c5524510364cc2a43)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_tmu.c | 30 ++++++++++++++++--------------
+ 1 file changed, 16 insertions(+), 14 deletions(-)
+
+diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
+index 2c64e3f93f16..a464ed868a68 100644
+--- a/drivers/clocksource/sh_tmu.c
++++ b/drivers/clocksource/sh_tmu.c
+@@ -40,6 +40,7 @@ struct sh_tmu_device;
+ struct sh_tmu_channel {
+ struct sh_tmu_device *tmu;
+
++ void __iomem *base;
+ int irq;
+
+ unsigned long rate;
+@@ -68,39 +69,35 @@ static DEFINE_RAW_SPINLOCK(sh_tmu_lock);
+
+ static inline unsigned long sh_tmu_read(struct sh_tmu_channel *ch, int reg_nr)
+ {
+- struct sh_timer_config *cfg = ch->tmu->pdev->dev.platform_data;
+- void __iomem *base = ch->tmu->mapbase;
+ unsigned long offs;
+
+ if (reg_nr == TSTR)
+- return ioread8(base - cfg->channel_offset);
++ return ioread8(ch->tmu->mapbase);
+
+ offs = reg_nr << 2;
+
+ if (reg_nr == TCR)
+- return ioread16(base + offs);
++ return ioread16(ch->base + offs);
+ else
+- return ioread32(base + offs);
++ return ioread32(ch->base + offs);
+ }
+
+ static inline void sh_tmu_write(struct sh_tmu_channel *ch, int reg_nr,
+ unsigned long value)
+ {
+- struct sh_timer_config *cfg = ch->tmu->pdev->dev.platform_data;
+- void __iomem *base = ch->tmu->mapbase;
+ unsigned long offs;
+
+ if (reg_nr == TSTR) {
+- iowrite8(value, base - cfg->channel_offset);
++ iowrite8(value, ch->tmu->mapbase);
+ return;
+ }
+
+ offs = reg_nr << 2;
+
+ if (reg_nr == TCR)
+- iowrite16(value, base + offs);
++ iowrite16(value, ch->base + offs);
+ else
+- iowrite32(value, base + offs);
++ iowrite32(value, ch->base + offs);
+ }
+
+ static void sh_tmu_start_stop_ch(struct sh_tmu_channel *ch, int start)
+@@ -481,13 +478,18 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
+ goto err0;
+ }
+
+- /* map memory, let mapbase point to our channel */
+- tmu->mapbase = ioremap_nocache(res->start, resource_size(res));
+- if (tmu->mapbase == NULL) {
++ /*
++ * Map memory, let channel.base point to our channel and mapbase to the
++ * start/stop shared register.
++ */
++ tmu->channel.base = ioremap_nocache(res->start, resource_size(res));
++ if (tmu->channel.base == NULL) {
+ dev_err(&tmu->pdev->dev, "failed to remap I/O memory\n");
+ goto err0;
+ }
+
++ tmu->mapbase = tmu->channel.base - cfg->channel_offset;
++
+ /* get hold of clock */
+ tmu->clk = clk_get(&tmu->pdev->dev, "tmu_fck");
+ if (IS_ERR(tmu->clk)) {
+@@ -511,7 +513,7 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
+ err2:
+ clk_put(tmu->clk);
+ err1:
+- iounmap(tmu->mapbase);
++ iounmap(tmu->channel.base);
+ err0:
+ return ret;
+ }
+--
+2.1.2
+
--- /dev/null
+From 9594c1f33bead5240bf498ad53cfc7a16fa75181 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 27 Jan 2014 22:04:17 +0100
+Subject: clocksource: sh_tmu: Add index to struct sh_tmu_channel
+
+Use the index as the timer start/stop bit and when printing messages to
+identify the channel.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit fe68eb802ef8bf034735f37cb561ab814fb3b0d6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_tmu.c | 35 ++++++++++++++++++++++++-----------
+ 1 file changed, 24 insertions(+), 11 deletions(-)
+
+diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
+index a464ed868a68..e30430439bb1 100644
+--- a/drivers/clocksource/sh_tmu.c
++++ b/drivers/clocksource/sh_tmu.c
+@@ -39,6 +39,7 @@ struct sh_tmu_device;
+
+ struct sh_tmu_channel {
+ struct sh_tmu_device *tmu;
++ unsigned int index;
+
+ void __iomem *base;
+ int irq;
+@@ -102,7 +103,6 @@ static inline void sh_tmu_write(struct sh_tmu_channel *ch, int reg_nr,
+
+ static void sh_tmu_start_stop_ch(struct sh_tmu_channel *ch, int start)
+ {
+- struct sh_timer_config *cfg = ch->tmu->pdev->dev.platform_data;
+ unsigned long flags, value;
+
+ /* start stop register shared by multiple timer channels */
+@@ -110,9 +110,9 @@ static void sh_tmu_start_stop_ch(struct sh_tmu_channel *ch, int start)
+ value = sh_tmu_read(ch, TSTR);
+
+ if (start)
+- value |= 1 << cfg->timer_bit;
++ value |= 1 << ch->index;
+ else
+- value &= ~(1 << cfg->timer_bit);
++ value &= ~(1 << ch->index);
+
+ sh_tmu_write(ch, TSTR, value);
+ raw_spin_unlock_irqrestore(&sh_tmu_lock, flags);
+@@ -125,7 +125,8 @@ static int __sh_tmu_enable(struct sh_tmu_channel *ch)
+ /* enable clock */
+ ret = clk_enable(ch->tmu->clk);
+ if (ret) {
+- dev_err(&ch->tmu->pdev->dev, "cannot enable clock\n");
++ dev_err(&ch->tmu->pdev->dev, "ch%u: cannot enable clock\n",
++ ch->index);
+ return ret;
+ }
+
+@@ -303,7 +304,8 @@ static int sh_tmu_register_clocksource(struct sh_tmu_channel *ch,
+ cs->mask = CLOCKSOURCE_MASK(32);
+ cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
+
+- dev_info(&ch->tmu->pdev->dev, "used as clock source\n");
++ dev_info(&ch->tmu->pdev->dev, "ch%u: used as clock source\n",
++ ch->index);
+
+ /* Register with dummy 1 Hz value, gets updated in ->enable() */
+ clocksource_register_hz(cs, 1);
+@@ -349,12 +351,12 @@ static void sh_tmu_clock_event_mode(enum clock_event_mode mode,
+ switch (mode) {
+ case CLOCK_EVT_MODE_PERIODIC:
+ dev_info(&ch->tmu->pdev->dev,
+- "used for periodic clock events\n");
++ "ch%u: used for periodic clock events\n", ch->index);
+ sh_tmu_clock_event_start(ch, 1);
+ break;
+ case CLOCK_EVT_MODE_ONESHOT:
+ dev_info(&ch->tmu->pdev->dev,
+- "used for oneshot clock events\n");
++ "ch%u: used for oneshot clock events\n", ch->index);
+ sh_tmu_clock_event_start(ch, 0);
+ break;
+ case CLOCK_EVT_MODE_UNUSED:
+@@ -407,7 +409,8 @@ static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch,
+ ced->suspend = sh_tmu_clock_event_suspend;
+ ced->resume = sh_tmu_clock_event_resume;
+
+- dev_info(&ch->tmu->pdev->dev, "used for clock events\n");
++ dev_info(&ch->tmu->pdev->dev, "ch%u: used for clock events\n",
++ ch->index);
+
+ clockevents_config_and_register(ced, 1, 0x300, 0xffffffff);
+
+@@ -415,8 +418,8 @@ static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch,
+ IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
+ dev_name(&ch->tmu->pdev->dev), ch);
+ if (ret) {
+- dev_err(&ch->tmu->pdev->dev, "failed to request irq %d\n",
+- ch->irq);
++ dev_err(&ch->tmu->pdev->dev, "ch%u: failed to request irq %d\n",
++ ch->index, ch->irq);
+ return;
+ }
+ }
+@@ -441,9 +444,19 @@ static int sh_tmu_channel_setup(struct sh_tmu_channel *ch,
+ memset(ch, 0, sizeof(*ch));
+ ch->tmu = tmu;
+
++ /*
++ * The SH3 variant (SH770x, SH7705, SH7710 and SH7720) maps channel
++ * registers blocks at base + 2 + 12 * index, while all other variants
++ * map them at base + 4 + 12 * index. We can compute the index by just
++ * dividing by 12, the 2 bytes or 4 bytes offset being hidden by the
++ * integer division.
++ */
++ ch->index = cfg->channel_offset / 12;
++
+ ch->irq = platform_get_irq(tmu->pdev, 0);
+ if (ch->irq < 0) {
+- dev_err(&tmu->pdev->dev, "failed to get irq\n");
++ dev_err(&tmu->pdev->dev, "ch%u: failed to get irq\n",
++ ch->index);
+ return ch->irq;
+ }
+
+--
+2.1.2
+
--- /dev/null
+From 3898ef34de4f2a6a180b67994bbc4e0ed806e4ec Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 27 Jan 2014 22:04:17 +0100
+Subject: clocksource: sh_tmu: Replace kmalloc + memset with kzalloc
+
+One kzalloc a day keeps the bugs away.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 3b77a83eeabb885c5fff02756eba50f446a2d83c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_tmu.c | 6 +-----
+ 1 file changed, 1 insertion(+), 5 deletions(-)
+
+diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
+index e30430439bb1..26a9f7dadfbc 100644
+--- a/drivers/clocksource/sh_tmu.c
++++ b/drivers/clocksource/sh_tmu.c
+@@ -397,8 +397,6 @@ static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch,
+ struct clock_event_device *ced = &ch->ced;
+ int ret;
+
+- memset(ced, 0, sizeof(*ced));
+-
+ ced->name = name;
+ ced->features = CLOCK_EVT_FEAT_PERIODIC;
+ ced->features |= CLOCK_EVT_FEAT_ONESHOT;
+@@ -441,7 +439,6 @@ static int sh_tmu_channel_setup(struct sh_tmu_channel *ch,
+ {
+ struct sh_timer_config *cfg = tmu->pdev->dev.platform_data;
+
+- memset(ch, 0, sizeof(*ch));
+ ch->tmu = tmu;
+
+ /*
+@@ -475,7 +472,6 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
+ int ret;
+ ret = -ENXIO;
+
+- memset(tmu, 0, sizeof(*tmu));
+ tmu->pdev = pdev;
+
+ if (!cfg) {
+@@ -547,7 +543,7 @@ static int sh_tmu_probe(struct platform_device *pdev)
+ goto out;
+ }
+
+- tmu = kmalloc(sizeof(*tmu), GFP_KERNEL);
++ tmu = kzalloc(sizeof(*tmu), GFP_KERNEL);
+ if (tmu == NULL) {
+ dev_err(&pdev->dev, "failed to allocate driver data\n");
+ return -ENOMEM;
+--
+2.1.2
+
--- /dev/null
+From 2b3586eafc8fcf4a2122791d37cb73a2b160142a Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Mon, 27 Jan 2014 22:04:17 +0100
+Subject: clocksource: sh_tmu: Allocate channels dynamically
+
+This prepares the driver for multi-channel support.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit a5de49f436e2bc498c1d13f6f8a9afaf19cb5f95)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_tmu.c | 27 ++++++++++++++++++++-------
+ 1 file changed, 20 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
+index 26a9f7dadfbc..55b7a37f0c9b 100644
+--- a/drivers/clocksource/sh_tmu.c
++++ b/drivers/clocksource/sh_tmu.c
+@@ -58,7 +58,8 @@ struct sh_tmu_device {
+ void __iomem *mapbase;
+ struct clk *clk;
+
+- struct sh_tmu_channel channel;
++ struct sh_tmu_channel *channels;
++ unsigned int num_channels;
+ };
+
+ static DEFINE_RAW_SPINLOCK(sh_tmu_lock);
+@@ -469,6 +470,7 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
+ {
+ struct sh_timer_config *cfg = pdev->dev.platform_data;
+ struct resource *res;
++ void __iomem *base;
+ int ret;
+ ret = -ENXIO;
+
+@@ -488,16 +490,16 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
+ }
+
+ /*
+- * Map memory, let channel.base point to our channel and mapbase to the
++ * Map memory, let base point to our channel and mapbase to the
+ * start/stop shared register.
+ */
+- tmu->channel.base = ioremap_nocache(res->start, resource_size(res));
+- if (tmu->channel.base == NULL) {
++ base = ioremap_nocache(res->start, resource_size(res));
++ if (base == NULL) {
+ dev_err(&tmu->pdev->dev, "failed to remap I/O memory\n");
+ goto err0;
+ }
+
+- tmu->mapbase = tmu->channel.base - cfg->channel_offset;
++ tmu->mapbase = base - cfg->channel_offset;
+
+ /* get hold of clock */
+ tmu->clk = clk_get(&tmu->pdev->dev, "tmu_fck");
+@@ -511,18 +513,29 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
+ if (ret < 0)
+ goto err2;
+
+- ret = sh_tmu_channel_setup(&tmu->channel, tmu);
++ tmu->channels = kzalloc(sizeof(*tmu->channels), GFP_KERNEL);
++ if (tmu->channels == NULL) {
++ ret = -ENOMEM;
++ goto err3;
++ }
++
++ tmu->num_channels = 1;
++
++ tmu->channels[0].base = base;
++
++ ret = sh_tmu_channel_setup(&tmu->channels[0], tmu);
+ if (ret < 0)
+ goto err3;
+
+ return 0;
+
+ err3:
++ kfree(tmu->channels);
+ clk_unprepare(tmu->clk);
+ err2:
+ clk_put(tmu->clk);
+ err1:
+- iounmap(tmu->channel.base);
++ iounmap(base);
+ err0:
+ return ret;
+ }
+--
+2.1.2
+
--- /dev/null
+From d2a781b24462193dffeb91ad7865348dede758f4 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 29 Jan 2014 00:33:08 +0100
+Subject: clocksource: sh_tmu: Replace hardcoded register values with macros
+
+Define symbolic macros for all used registers bits.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 5cfe2d151f8f55052f5463e725d3d3a4aa51335d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_tmu.c | 19 ++++++++++++++-----
+ 1 file changed, 14 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
+index 55b7a37f0c9b..63ed92d56c8f 100644
+--- a/drivers/clocksource/sh_tmu.c
++++ b/drivers/clocksource/sh_tmu.c
+@@ -69,6 +69,15 @@ static DEFINE_RAW_SPINLOCK(sh_tmu_lock);
+ #define TCNT 1 /* channel register */
+ #define TCR 2 /* channel register */
+
++#define TCR_UNF (1 << 8)
++#define TCR_UNIE (1 << 5)
++#define TCR_TPSC_CLK4 (0 << 0)
++#define TCR_TPSC_CLK16 (1 << 0)
++#define TCR_TPSC_CLK64 (2 << 0)
++#define TCR_TPSC_CLK256 (3 << 0)
++#define TCR_TPSC_CLK1024 (4 << 0)
++#define TCR_TPSC_MASK (7 << 0)
++
+ static inline unsigned long sh_tmu_read(struct sh_tmu_channel *ch, int reg_nr)
+ {
+ unsigned long offs;
+@@ -140,7 +149,7 @@ static int __sh_tmu_enable(struct sh_tmu_channel *ch)
+
+ /* configure channel to parent clock / 4, irq off */
+ ch->rate = clk_get_rate(ch->tmu->clk) / 4;
+- sh_tmu_write(ch, TCR, 0x0000);
++ sh_tmu_write(ch, TCR, TCR_TPSC_CLK4);
+
+ /* enable channel */
+ sh_tmu_start_stop_ch(ch, 1);
+@@ -165,7 +174,7 @@ static void __sh_tmu_disable(struct sh_tmu_channel *ch)
+ sh_tmu_start_stop_ch(ch, 0);
+
+ /* disable interrupts in TMU block */
+- sh_tmu_write(ch, TCR, 0x0000);
++ sh_tmu_write(ch, TCR, TCR_TPSC_CLK4);
+
+ /* stop clock */
+ clk_disable(ch->tmu->clk);
+@@ -195,7 +204,7 @@ static void sh_tmu_set_next(struct sh_tmu_channel *ch, unsigned long delta,
+ sh_tmu_read(ch, TCR);
+
+ /* enable interrupt */
+- sh_tmu_write(ch, TCR, 0x0020);
++ sh_tmu_write(ch, TCR, TCR_UNIE | TCR_TPSC_CLK4);
+
+ /* reload delta value in case of periodic timer */
+ if (periodic)
+@@ -215,9 +224,9 @@ static irqreturn_t sh_tmu_interrupt(int irq, void *dev_id)
+
+ /* disable or acknowledge interrupt */
+ if (ch->ced.mode == CLOCK_EVT_MODE_ONESHOT)
+- sh_tmu_write(ch, TCR, 0x0000);
++ sh_tmu_write(ch, TCR, TCR_TPSC_CLK4);
+ else
+- sh_tmu_write(ch, TCR, 0x0020);
++ sh_tmu_write(ch, TCR, TCR_UNIE | TCR_TPSC_CLK4);
+
+ /* notify clockevent layer */
+ ch->ced.event_handler(&ch->ced);
+--
+2.1.2
+
--- /dev/null
+From 036d819ea9b8fa37356813a4eaecc67078d08550 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 19 Feb 2014 17:00:31 +0100
+Subject: clocksource: sh_tmu: Hardcode TMU clock event and source ratings to
+ 200
+
+All boards use clock event and clock source ratings of 200 for the TMU,
+hardcode it in the driver.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit f1010ed1a13ea38f495ebfa2fdb1f38b7f87301f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_tmu.c | 23 +++++++++++------------
+ 1 file changed, 11 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
+index 63ed92d56c8f..fec9bedb8f45 100644
+--- a/drivers/clocksource/sh_tmu.c
++++ b/drivers/clocksource/sh_tmu.c
+@@ -300,12 +300,12 @@ static void sh_tmu_clocksource_resume(struct clocksource *cs)
+ }
+
+ static int sh_tmu_register_clocksource(struct sh_tmu_channel *ch,
+- const char *name, unsigned long rating)
++ const char *name)
+ {
+ struct clocksource *cs = &ch->cs;
+
+ cs->name = name;
+- cs->rating = rating;
++ cs->rating = 200;
+ cs->read = sh_tmu_clocksource_read;
+ cs->enable = sh_tmu_clocksource_enable;
+ cs->disable = sh_tmu_clocksource_disable;
+@@ -402,7 +402,7 @@ static void sh_tmu_clock_event_resume(struct clock_event_device *ced)
+ }
+
+ static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch,
+- const char *name, unsigned long rating)
++ const char *name)
+ {
+ struct clock_event_device *ced = &ch->ced;
+ int ret;
+@@ -410,7 +410,7 @@ static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch,
+ ced->name = name;
+ ced->features = CLOCK_EVT_FEAT_PERIODIC;
+ ced->features |= CLOCK_EVT_FEAT_ONESHOT;
+- ced->rating = rating;
++ ced->rating = 200;
+ ced->cpumask = cpumask_of(0);
+ ced->set_next_event = sh_tmu_clock_event_next;
+ ced->set_mode = sh_tmu_clock_event_mode;
+@@ -433,13 +433,12 @@ static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch,
+ }
+
+ static int sh_tmu_register(struct sh_tmu_channel *ch, const char *name,
+- unsigned long clockevent_rating,
+- unsigned long clocksource_rating)
++ bool clockevent, bool clocksource)
+ {
+- if (clockevent_rating)
+- sh_tmu_register_clockevent(ch, name, clockevent_rating);
+- else if (clocksource_rating)
+- sh_tmu_register_clocksource(ch, name, clocksource_rating);
++ if (clockevent)
++ sh_tmu_register_clockevent(ch, name);
++ else if (clocksource)
++ sh_tmu_register_clocksource(ch, name);
+
+ return 0;
+ }
+@@ -471,8 +470,8 @@ static int sh_tmu_channel_setup(struct sh_tmu_channel *ch,
+ ch->enable_count = 0;
+
+ return sh_tmu_register(ch, dev_name(&tmu->pdev->dev),
+- cfg->clockevent_rating,
+- cfg->clocksource_rating);
++ cfg->clockevent_rating != 0,
++ cfg->clocksource_rating != 0);
+ }
+
+ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
+--
+2.1.2
+
--- /dev/null
+From f25934f9893e230df59b255e42b2302b93d527c5 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 28 Jan 2014 12:36:48 +0100
+Subject: clocksource: sh_tmu: Add support for multiple channels per device
+
+TMU hardware devices can support multiple channels, with global
+registers and per-channel registers. The sh_tmu driver currently models
+the hardware with one Linux device per channel. This model makes it
+difficult to handle global registers in a clean way.
+
+Add support for a new model that uses one Linux device per timer with
+multiple channels per device. This requires changes to platform data,
+add new channel configuration fields.
+
+Support for the legacy model is kept and will be removed after all
+platforms switch to the new model.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 8c7f21e6739ad836f30561d641393a8417abdad3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_tmu.c | 213 ++++++++++++++++++++++++++++++-------------
+ 1 file changed, 152 insertions(+), 61 deletions(-)
+
+diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
+index fec9bedb8f45..0306d31e9f1d 100644
+--- a/drivers/clocksource/sh_tmu.c
++++ b/drivers/clocksource/sh_tmu.c
+@@ -35,6 +35,12 @@
+ #include <linux/pm_domain.h>
+ #include <linux/pm_runtime.h>
+
++enum sh_tmu_model {
++ SH_TMU_LEGACY,
++ SH_TMU,
++ SH_TMU_SH3,
++};
++
+ struct sh_tmu_device;
+
+ struct sh_tmu_channel {
+@@ -58,8 +64,13 @@ struct sh_tmu_device {
+ void __iomem *mapbase;
+ struct clk *clk;
+
++ enum sh_tmu_model model;
++
+ struct sh_tmu_channel *channels;
+ unsigned int num_channels;
++
++ bool has_clockevent;
++ bool has_clocksource;
+ };
+
+ static DEFINE_RAW_SPINLOCK(sh_tmu_lock);
+@@ -82,8 +93,16 @@ static inline unsigned long sh_tmu_read(struct sh_tmu_channel *ch, int reg_nr)
+ {
+ unsigned long offs;
+
+- if (reg_nr == TSTR)
+- return ioread8(ch->tmu->mapbase);
++ if (reg_nr == TSTR) {
++ switch (ch->tmu->model) {
++ case SH_TMU_LEGACY:
++ return ioread8(ch->tmu->mapbase);
++ case SH_TMU_SH3:
++ return ioread8(ch->tmu->mapbase + 2);
++ case SH_TMU:
++ return ioread8(ch->tmu->mapbase + 4);
++ }
++ }
+
+ offs = reg_nr << 2;
+
+@@ -99,8 +118,14 @@ static inline void sh_tmu_write(struct sh_tmu_channel *ch, int reg_nr,
+ unsigned long offs;
+
+ if (reg_nr == TSTR) {
+- iowrite8(value, ch->tmu->mapbase);
+- return;
++ switch (ch->tmu->model) {
++ case SH_TMU_LEGACY:
++ return iowrite8(value, ch->tmu->mapbase);
++ case SH_TMU_SH3:
++ return iowrite8(value, ch->tmu->mapbase + 2);
++ case SH_TMU:
++ return iowrite8(value, ch->tmu->mapbase + 4);
++ }
+ }
+
+ offs = reg_nr << 2;
+@@ -435,31 +460,49 @@ static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch,
+ static int sh_tmu_register(struct sh_tmu_channel *ch, const char *name,
+ bool clockevent, bool clocksource)
+ {
+- if (clockevent)
++ if (clockevent) {
++ ch->tmu->has_clockevent = true;
+ sh_tmu_register_clockevent(ch, name);
+- else if (clocksource)
++ } else if (clocksource) {
++ ch->tmu->has_clocksource = true;
+ sh_tmu_register_clocksource(ch, name);
++ }
+
+ return 0;
+ }
+
+-static int sh_tmu_channel_setup(struct sh_tmu_channel *ch,
++static int sh_tmu_channel_setup(struct sh_tmu_channel *ch, unsigned int index,
++ bool clockevent, bool clocksource,
+ struct sh_tmu_device *tmu)
+ {
+- struct sh_timer_config *cfg = tmu->pdev->dev.platform_data;
++ /* Skip unused channels. */
++ if (!clockevent && !clocksource)
++ return 0;
+
+ ch->tmu = tmu;
+
+- /*
+- * The SH3 variant (SH770x, SH7705, SH7710 and SH7720) maps channel
+- * registers blocks at base + 2 + 12 * index, while all other variants
+- * map them at base + 4 + 12 * index. We can compute the index by just
+- * dividing by 12, the 2 bytes or 4 bytes offset being hidden by the
+- * integer division.
+- */
+- ch->index = cfg->channel_offset / 12;
++ if (tmu->model == SH_TMU_LEGACY) {
++ struct sh_timer_config *cfg = tmu->pdev->dev.platform_data;
++
++ /*
++ * The SH3 variant (SH770x, SH7705, SH7710 and SH7720) maps
++ * channel registers blocks at base + 2 + 12 * index, while all
++ * other variants map them at base + 4 + 12 * index. We can
++ * compute the index by just dividing by 12, the 2 bytes or 4
++ * bytes offset being hidden by the integer division.
++ */
++ ch->index = cfg->channel_offset / 12;
++ ch->base = tmu->mapbase + cfg->channel_offset;
++ } else {
++ ch->index = index;
++
++ if (tmu->model == SH_TMU_SH3)
++ ch->base = tmu->mapbase + 4 + ch->index * 12;
++ else
++ ch->base = tmu->mapbase + 8 + ch->index * 12;
++ }
+
+- ch->irq = platform_get_irq(tmu->pdev, 0);
++ ch->irq = platform_get_irq(tmu->pdev, ch->index);
+ if (ch->irq < 0) {
+ dev_err(&tmu->pdev->dev, "ch%u: failed to get irq\n",
+ ch->index);
+@@ -470,88 +513,127 @@ static int sh_tmu_channel_setup(struct sh_tmu_channel *ch,
+ ch->enable_count = 0;
+
+ return sh_tmu_register(ch, dev_name(&tmu->pdev->dev),
+- cfg->clockevent_rating != 0,
+- cfg->clocksource_rating != 0);
++ clockevent, clocksource);
+ }
+
+-static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
++static int sh_tmu_map_memory(struct sh_tmu_device *tmu)
+ {
+- struct sh_timer_config *cfg = pdev->dev.platform_data;
+ struct resource *res;
+- void __iomem *base;
+- int ret;
+- ret = -ENXIO;
+-
+- tmu->pdev = pdev;
+-
+- if (!cfg) {
+- dev_err(&tmu->pdev->dev, "missing platform data\n");
+- goto err0;
+- }
+-
+- platform_set_drvdata(pdev, tmu);
+
+ res = platform_get_resource(tmu->pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&tmu->pdev->dev, "failed to get I/O memory\n");
+- goto err0;
++ return -ENXIO;
+ }
+
++ tmu->mapbase = ioremap_nocache(res->start, resource_size(res));
++ if (tmu->mapbase == NULL)
++ return -ENXIO;
++
+ /*
+- * Map memory, let base point to our channel and mapbase to the
+- * start/stop shared register.
++ * In legacy platform device configuration (with one device per channel)
++ * the resource points to the channel base address.
+ */
+- base = ioremap_nocache(res->start, resource_size(res));
+- if (base == NULL) {
+- dev_err(&tmu->pdev->dev, "failed to remap I/O memory\n");
+- goto err0;
++ if (tmu->model == SH_TMU_LEGACY) {
++ struct sh_timer_config *cfg = tmu->pdev->dev.platform_data;
++ tmu->mapbase -= cfg->channel_offset;
+ }
+
+- tmu->mapbase = base - cfg->channel_offset;
++ return 0;
++}
+
+- /* get hold of clock */
++static void sh_tmu_unmap_memory(struct sh_tmu_device *tmu)
++{
++ if (tmu->model == SH_TMU_LEGACY) {
++ struct sh_timer_config *cfg = tmu->pdev->dev.platform_data;
++ tmu->mapbase += cfg->channel_offset;
++ }
++
++ iounmap(tmu->mapbase);
++}
++
++static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
++{
++ struct sh_timer_config *cfg = pdev->dev.platform_data;
++ const struct platform_device_id *id = pdev->id_entry;
++ unsigned int i;
++ int ret;
++
++ if (!cfg) {
++ dev_err(&tmu->pdev->dev, "missing platform data\n");
++ return -ENXIO;
++ }
++
++ tmu->pdev = pdev;
++ tmu->model = id->driver_data;
++
++ /* Get hold of clock. */
+ tmu->clk = clk_get(&tmu->pdev->dev, "tmu_fck");
+ if (IS_ERR(tmu->clk)) {
+ dev_err(&tmu->pdev->dev, "cannot get clock\n");
+- ret = PTR_ERR(tmu->clk);
+- goto err1;
++ return PTR_ERR(tmu->clk);
+ }
+
+ ret = clk_prepare(tmu->clk);
+ if (ret < 0)
+- goto err2;
++ goto err_clk_put;
++
++ /* Map the memory resource. */
++ ret = sh_tmu_map_memory(tmu);
++ if (ret < 0) {
++ dev_err(&tmu->pdev->dev, "failed to remap I/O memory\n");
++ goto err_clk_unprepare;
++ }
+
+- tmu->channels = kzalloc(sizeof(*tmu->channels), GFP_KERNEL);
++ /* Allocate and setup the channels. */
++ if (tmu->model == SH_TMU_LEGACY)
++ tmu->num_channels = 1;
++ else
++ tmu->num_channels = hweight8(cfg->channels_mask);
++
++ tmu->channels = kzalloc(sizeof(*tmu->channels) * tmu->num_channels,
++ GFP_KERNEL);
+ if (tmu->channels == NULL) {
+ ret = -ENOMEM;
+- goto err3;
++ goto err_unmap;
+ }
+
+- tmu->num_channels = 1;
+-
+- tmu->channels[0].base = base;
++ if (tmu->model == SH_TMU_LEGACY) {
++ ret = sh_tmu_channel_setup(&tmu->channels[0], 0,
++ cfg->clockevent_rating != 0,
++ cfg->clocksource_rating != 0, tmu);
++ if (ret < 0)
++ goto err_unmap;
++ } else {
++ /*
++ * Use the first channel as a clock event device and the second
++ * channel as a clock source.
++ */
++ for (i = 0; i < tmu->num_channels; ++i) {
++ ret = sh_tmu_channel_setup(&tmu->channels[i], i,
++ i == 0, i == 1, tmu);
++ if (ret < 0)
++ goto err_unmap;
++ }
++ }
+
+- ret = sh_tmu_channel_setup(&tmu->channels[0], tmu);
+- if (ret < 0)
+- goto err3;
++ platform_set_drvdata(pdev, tmu);
+
+ return 0;
+
+- err3:
++err_unmap:
+ kfree(tmu->channels);
++ sh_tmu_unmap_memory(tmu);
++err_clk_unprepare:
+ clk_unprepare(tmu->clk);
+- err2:
++err_clk_put:
+ clk_put(tmu->clk);
+- err1:
+- iounmap(base);
+- err0:
+ return ret;
+ }
+
+ static int sh_tmu_probe(struct platform_device *pdev)
+ {
+ struct sh_tmu_device *tmu = platform_get_drvdata(pdev);
+- struct sh_timer_config *cfg = pdev->dev.platform_data;
+ int ret;
+
+ if (!is_early_platform_device(pdev)) {
+@@ -580,7 +662,7 @@ static int sh_tmu_probe(struct platform_device *pdev)
+ return 0;
+
+ out:
+- if (cfg->clockevent_rating || cfg->clocksource_rating)
++ if (tmu->has_clockevent || tmu->has_clocksource)
+ pm_runtime_irq_safe(&pdev->dev);
+ else
+ pm_runtime_idle(&pdev->dev);
+@@ -593,12 +675,21 @@ static int sh_tmu_remove(struct platform_device *pdev)
+ return -EBUSY; /* cannot unregister clockevent and clocksource */
+ }
+
++static const struct platform_device_id sh_tmu_id_table[] = {
++ { "sh_tmu", SH_TMU_LEGACY },
++ { "sh-tmu", SH_TMU },
++ { "sh-tmu-sh3", SH_TMU_SH3 },
++ { }
++};
++MODULE_DEVICE_TABLE(platform, sh_tmu_id_table);
++
+ static struct platform_driver sh_tmu_device_driver = {
+ .probe = sh_tmu_probe,
+ .remove = sh_tmu_remove,
+ .driver = {
+ .name = "sh_tmu",
+- }
++ },
++ .id_table = sh_tmu_id_table,
+ };
+
+ static int __init sh_tmu_init(void)
+--
+2.1.2
+
--- /dev/null
+From 5b01481271f3ced5d49d0118750a36572124b9c9 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 14 Feb 2014 00:35:18 +0100
+Subject: clocksource: sh_tmu: Rename clock to "fck" in the non-legacy case
+
+The sh_tmu driver gets the TMU functional clock using a connection ID of
+"tmu_fck". While all SH SoCs create clock lookup entries with a NULL
+device ID and a "tmu_fck" connection ID, the ARM SoCs use the device ID
+only with a NULL connection ID. This works on legacy platforms but will
+break on ARM with DT boot.
+
+Fix the situation by using a connection ID of "fck" in the non-legacy
+platform data case. Clock lookup entries will be renamed to use the
+device ID as well as the connection ID as platforms get moved to new
+platform data. The legacy code will eventually be dropped, leaving us
+with device ID based clock lookup, compatible with DT boot.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit a27d922749f3be0a88f7e0aeb507c373703c08ee)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_tmu.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
+index 0306d31e9f1d..cf07797dbcf3 100644
+--- a/drivers/clocksource/sh_tmu.c
++++ b/drivers/clocksource/sh_tmu.c
+@@ -568,7 +568,8 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev)
+ tmu->model = id->driver_data;
+
+ /* Get hold of clock. */
+- tmu->clk = clk_get(&tmu->pdev->dev, "tmu_fck");
++ tmu->clk = clk_get(&tmu->pdev->dev,
++ tmu->model == SH_TMU_LEGACY ? "tmu_fck" : "fck");
+ if (IS_ERR(tmu->clk)) {
+ dev_err(&tmu->pdev->dev, "cannot get clock\n");
+ return PTR_ERR(tmu->clk);
+--
+2.1.2
+
--- /dev/null
+From 06645a24a027234eb838922854f11d24ef8ddd98 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 14 Feb 2014 01:25:50 +0100
+Subject: clocksource: sh_tmu: Remove FSF mail address from GPL notice
+
+Do not include the paragraph about writing to the Free Software
+Foundation's mailing address from the sample GPL notice. The FSF has
+changed addresses in the past, and may do so again. Linux already
+includes a copy of the GPL.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 6b96c15b034813ec0b46e5bebbf8cffae0ac72d0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_tmu.c | 4 ----
+ 1 file changed, 4 deletions(-)
+
+diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
+index cf07797dbcf3..981f8d302a2a 100644
+--- a/drivers/clocksource/sh_tmu.c
++++ b/drivers/clocksource/sh_tmu.c
+@@ -11,10 +11,6 @@
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+ #include <linux/init.h>
+--
+2.1.2
+
--- /dev/null
+From 023dd9a346ba3d6d929718494268821f20f1cd3e Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 12 Feb 2014 16:56:44 +0100
+Subject: clocksource: sh_tmu: Sort headers alphabetically
+
+This helps locating duplicates and inserting new headers.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+(cherry picked from commit 13931f8065fabff117828999e007f62a5cabea34)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_tmu.c | 20 ++++++++++----------
+ 1 file changed, 10 insertions(+), 10 deletions(-)
+
+diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
+index 981f8d302a2a..4ba2c0fea580 100644
+--- a/drivers/clocksource/sh_tmu.c
++++ b/drivers/clocksource/sh_tmu.c
+@@ -13,23 +13,23 @@
+ * GNU General Public License for more details.
+ */
+
++#include <linux/clk.h>
++#include <linux/clockchips.h>
++#include <linux/clocksource.h>
++#include <linux/delay.h>
++#include <linux/err.h>
+ #include <linux/init.h>
+-#include <linux/platform_device.h>
+-#include <linux/spinlock.h>
+ #include <linux/interrupt.h>
+-#include <linux/ioport.h>
+-#include <linux/delay.h>
+ #include <linux/io.h>
+-#include <linux/clk.h>
++#include <linux/ioport.h>
+ #include <linux/irq.h>
+-#include <linux/err.h>
+-#include <linux/clocksource.h>
+-#include <linux/clockchips.h>
+-#include <linux/sh_timer.h>
+-#include <linux/slab.h>
+ #include <linux/module.h>
++#include <linux/platform_device.h>
+ #include <linux/pm_domain.h>
+ #include <linux/pm_runtime.h>
++#include <linux/sh_timer.h>
++#include <linux/slab.h>
++#include <linux/spinlock.h>
+
+ enum sh_tmu_model {
+ SH_TMU_LEGACY,
+--
+2.1.2
+
--- /dev/null
+From f877ffb3d7b3da83cd721382f60cf0f2602e5437 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 16 May 2014 14:44:23 +0200
+Subject: clocksource: sh_tmu: Fix channel IRQ retrieval in legacy case
+
+In the legacy platform data case each TMU platform device handles a
+single channel with a single IRQ for the platform device. Retrieve the
+IRQ using the logical channel number instead of the hardware channel
+number.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+(cherry picked from commit c54697ae180e652a96db8bc71f0c7c7baee2bf16)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_tmu.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
+index 4ba2c0fea580..ec340955e852 100644
+--- a/drivers/clocksource/sh_tmu.c
++++ b/drivers/clocksource/sh_tmu.c
+@@ -498,7 +498,7 @@ static int sh_tmu_channel_setup(struct sh_tmu_channel *ch, unsigned int index,
+ ch->base = tmu->mapbase + 8 + ch->index * 12;
+ }
+
+- ch->irq = platform_get_irq(tmu->pdev, ch->index);
++ ch->irq = platform_get_irq(tmu->pdev, index);
+ if (ch->irq < 0) {
+ dev_err(&tmu->pdev->dev, "ch%u: failed to get irq\n",
+ ch->index);
+--
+2.1.2
+
--- /dev/null
+From f754914142ff26a41d5c0d21f350409312edebf2 Mon Sep 17 00:00:00 2001
+From: Jingoo Han <jg1.han@samsung.com>
+Date: Thu, 22 May 2014 14:05:07 +0200
+Subject: clocksource: sh_tmu: Remove unnecessary OOM messages
+
+The site-specific OOM messages are unnecessary, because they
+duplicate the MM subsystem generic OOM message.
+
+[dlezcano] : refreshed against latest modifications: kmalloc -> kzalloc
+
+Signed-off-by: Jingoo Han <jg1.han@samsung.com>
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+(cherry picked from commit 814876b0b00ae98a8568d1b989bc98ca5389b98a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clocksource/sh_tmu.c | 4 +---
+ 1 file changed, 1 insertion(+), 3 deletions(-)
+
+diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
+index ec340955e852..6bd17a8f3dd4 100644
+--- a/drivers/clocksource/sh_tmu.c
++++ b/drivers/clocksource/sh_tmu.c
+@@ -644,10 +644,8 @@ static int sh_tmu_probe(struct platform_device *pdev)
+ }
+
+ tmu = kzalloc(sizeof(*tmu), GFP_KERNEL);
+- if (tmu == NULL) {
+- dev_err(&pdev->dev, "failed to allocate driver data\n");
++ if (tmu == NULL)
+ return -ENOMEM;
+- }
+
+ ret = sh_tmu_setup(tmu, pdev);
+ if (ret) {
+--
+2.1.2
+
--- /dev/null
+From 7f89b0c6381a6ba5d095b186c3acc81ba33ca8aa Mon Sep 17 00:00:00 2001
+From: Jingoo Han <jg1.han@samsung.com>
+Date: Tue, 29 Apr 2014 17:21:25 +0900
+Subject: spi: sh-msiof: remove unnecessary OOM messages
+
+The site-specific OOM messages are unnecessary, because they
+duplicate the MM subsystem generic OOM message.
+
+Signed-off-by: Jingoo Han <jg1.han@samsung.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 1e8231b79ccbb3e6e7b3f6af9f998dca16b00efe)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/spi/spi-sh-msiof.c | 4 +---
+ 1 file changed, 1 insertion(+), 3 deletions(-)
+
+diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c
+index e850d03e7190..45b09142afe2 100644
+--- a/drivers/spi/spi-sh-msiof.c
++++ b/drivers/spi/spi-sh-msiof.c
+@@ -642,10 +642,8 @@ static struct sh_msiof_spi_info *sh_msiof_spi_parse_dt(struct device *dev)
+ u32 num_cs = 1;
+
+ info = devm_kzalloc(dev, sizeof(struct sh_msiof_spi_info), GFP_KERNEL);
+- if (!info) {
+- dev_err(dev, "failed to allocate setup data\n");
++ if (!info)
+ return NULL;
+- }
+
+ /* Parse the MSIOF properties */
+ of_property_read_u32(np, "num-cs", &num_cs);
+--
+2.1.2
+
--- /dev/null
+From cf440657d4d134517dc3373b5e0c22d326644c2f Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 8 Apr 2014 13:39:59 -0300
+Subject: [media] v4l: vsp1: Add DT bindings documentation
+
+All parameters supplied through platform data can now be passed through
+the device tree.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
+Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
+(cherry picked from commit 34d1cbdafd5b27bc06f47f557e0581b7b85d6f07)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ .../devicetree/bindings/media/renesas,vsp1.txt | 43 ++++++++++++++++++++++
+ 1 file changed, 43 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/media/renesas,vsp1.txt
+
+diff --git a/Documentation/devicetree/bindings/media/renesas,vsp1.txt b/Documentation/devicetree/bindings/media/renesas,vsp1.txt
+new file mode 100644
+index 000000000000..87fe08abf36d
+--- /dev/null
++++ b/Documentation/devicetree/bindings/media/renesas,vsp1.txt
+@@ -0,0 +1,43 @@
++* Renesas VSP1 Video Processing Engine
++
++The VSP1 is a video processing engine that supports up-/down-scaling, alpha
++blending, color space conversion and various other image processing features.
++It can be found in the Renesas R-Car second generation SoCs.
++
++Required properties:
++
++ - compatible: Must contain "renesas,vsp1"
++
++ - reg: Base address and length of the registers block for the VSP1.
++ - interrupts: VSP1 interrupt specifier.
++ - clocks: A phandle + clock-specifier pair for the VSP1 functional clock.
++
++ - renesas,#rpf: Number of Read Pixel Formatter (RPF) modules in the VSP1.
++ - renesas,#uds: Number of Up Down Scaler (UDS) modules in the VSP1.
++ - renesas,#wpf: Number of Write Pixel Formatter (WPF) modules in the VSP1.
++
++
++Optional properties:
++
++ - renesas,has-lif: Boolean, indicates that the LCD Interface (LIF) module is
++ available.
++ - renesas,has-lut: Boolean, indicates that the Look Up Table (LUT) module is
++ available.
++ - renesas,has-sru: Boolean, indicates that the Super Resolution Unit (SRU)
++ module is available.
++
++
++Example: R8A7790 (R-Car H2) VSP1-S node
++
++ vsp1@fe928000 {
++ compatible = "renesas,vsp1";
++ reg = <0 0xfe928000 0 0x8000>;
++ interrupts = <0 267 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>;
++
++ renesas,has-lut;
++ renesas,has-sru;
++ renesas,#rpf = <5>;
++ renesas,#uds = <3>;
++ renesas,#wpf = <4>;
++ };
+--
+2.1.2
+
--- /dev/null
+From c75ff9cedac6f1954f2148c5a6c1f51e5ae5862c Mon Sep 17 00:00:00 2001
+From: Gregory CLEMENT <gregory.clement@free-electrons.com>
+Date: Thu, 15 May 2014 12:17:31 +0200
+Subject: usb: host: xhci-plat: sort the headers in alphabetic order
+
+Sorting the headers in alphabetic order will help to reduce the conflict
+when adding new headers later.
+
+Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
+Acked-by: Felipe Balbi <balbi@ti.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 48157bb97f074d21372bd3ae87e5988ed23c8972)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-plat.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
+index 8affef910782..706fe185fe4d 100644
+--- a/drivers/usb/host/xhci-plat.c
++++ b/drivers/usb/host/xhci-plat.c
+@@ -11,11 +11,11 @@
+ * version 2 as published by the Free Software Foundation.
+ */
+
+-#include <linux/platform_device.h>
++#include <linux/dma-mapping.h>
+ #include <linux/module.h>
+-#include <linux/slab.h>
+ #include <linux/of.h>
+-#include <linux/dma-mapping.h>
++#include <linux/platform_device.h>
++#include <linux/slab.h>
+
+ #include "xhci.h"
+
+--
+2.1.2
+
--- /dev/null
+From 87e26737255c516b108e281e921e784b2731fd5f Mon Sep 17 00:00:00 2001
+From: Gregory CLEMENT <gregory.clement@free-electrons.com>
+Date: Thu, 15 May 2014 12:17:32 +0200
+Subject: usb: host: xhci-plat: add clock support
+
+Some platforms (such as the Armada 38x ones) can gate the clock of
+their USB controller. This patch adds the support for one clock in
+xhci-plat, by enabling it during probe and disabling it on remove.
+
+To achieve this, it adds a 'struct clk *' member in xhci_hcd. While
+only used for now in xhci-plat, it might be used by other drivers in
+the future. Moreover, the xhci_hcd structure already holds other
+members such as msix_count and msix_entries, which are MSI-X specific,
+and therefore only used by xhci-pci.
+
+Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
+Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+Acked-by: Felipe Balbi <balbi@ti.com>
+Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 4718c177405112386a977fd9f1cba5fd6aa82315)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-plat.c | 24 +++++++++++++++++++++++-
+ drivers/usb/host/xhci.h | 2 ++
+ 2 files changed, 25 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
+index 706fe185fe4d..17465cce6d0d 100644
+--- a/drivers/usb/host/xhci-plat.c
++++ b/drivers/usb/host/xhci-plat.c
+@@ -11,6 +11,7 @@
+ * version 2 as published by the Free Software Foundation.
+ */
+
++#include <linux/clk.h>
+ #include <linux/dma-mapping.h>
+ #include <linux/module.h>
+ #include <linux/of.h>
+@@ -91,6 +92,7 @@ static int xhci_plat_probe(struct platform_device *pdev)
+ struct xhci_hcd *xhci;
+ struct resource *res;
+ struct usb_hcd *hcd;
++ struct clk *clk;
+ int ret;
+ int irq;
+
+@@ -137,14 +139,27 @@ static int xhci_plat_probe(struct platform_device *pdev)
+ goto release_mem_region;
+ }
+
++ /*
++ * Not all platforms have a clk so it is not an error if the
++ * clock does not exists.
++ */
++ clk = devm_clk_get(&pdev->dev, NULL);
++ if (!IS_ERR(clk)) {
++ ret = clk_prepare_enable(clk);
++ if (ret)
++ goto unmap_registers;
++ }
++
+ ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
+ if (ret)
+- goto unmap_registers;
++ goto disable_clk;
++
+ device_wakeup_enable(hcd->self.controller);
+
+ /* USB 2.0 roothub is stored in the platform_device now. */
+ hcd = platform_get_drvdata(pdev);
+ xhci = hcd_to_xhci(hcd);
++ xhci->clk = clk;
+ xhci->shared_hcd = usb_create_shared_hcd(driver, &pdev->dev,
+ dev_name(&pdev->dev), hcd);
+ if (!xhci->shared_hcd) {
+@@ -170,6 +185,10 @@ put_usb3_hcd:
+ dealloc_usb2_hcd:
+ usb_remove_hcd(hcd);
+
++disable_clk:
++ if (!IS_ERR(clk))
++ clk_disable_unprepare(clk);
++
+ unmap_registers:
+ iounmap(hcd->regs);
+
+@@ -186,11 +205,14 @@ static int xhci_plat_remove(struct platform_device *dev)
+ {
+ struct usb_hcd *hcd = platform_get_drvdata(dev);
+ struct xhci_hcd *xhci = hcd_to_xhci(hcd);
++ struct clk *clk = xhci->clk;
+
+ usb_remove_hcd(xhci->shared_hcd);
+ usb_put_hcd(xhci->shared_hcd);
+
+ usb_remove_hcd(hcd);
++ if (!IS_ERR(clk))
++ clk_disable_unprepare(clk);
+ iounmap(hcd->regs);
+ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
+ usb_put_hcd(hcd);
+diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
+index 8faef64371c6..1e60ab8f8f5b 100644
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -1473,6 +1473,8 @@ struct xhci_hcd {
+ /* msi-x vectors */
+ int msix_count;
+ struct msix_entry *msix_entries;
++ /* optional clock */
++ struct clk *clk;
+ /* data structures */
+ struct xhci_device_context_array *dcbaa;
+ struct xhci_ring *cmd_ring;
+--
+2.1.2
+
--- /dev/null
+From 6fe57263d7d2abe567e271cd313a7c1e03104294 Mon Sep 17 00:00:00 2001
+From: Gregory CLEMENT <gregory.clement@free-electrons.com>
+Date: Thu, 15 May 2014 12:17:33 +0200
+Subject: usb: host: xhci-plat: add support for the Armada 375/38x XHCI
+ controllers
+
+The Armada 375 and 38x SoCs come with an XHCI controller that requires
+some specific initialization related to the MBus windows
+configuration. This patch adds the support for this special
+configuration as an XHCI quirk executed during probe.
+
+Two new compatible strings are added to identify the Armada 375 and
+Armada 38x XHCI controllers, and therefore enable the relevant quirk.
+
+Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
+Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 973747928514bb636e3fe6a13b7ec6d6d73100f0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/Kconfig | 8 +++++
+ drivers/usb/host/Makefile | 3 ++
+ drivers/usb/host/xhci-mvebu.c | 72 +++++++++++++++++++++++++++++++++++++++++++
+ drivers/usb/host/xhci-mvebu.h | 21 +++++++++++++
+ drivers/usb/host/xhci-plat.c | 12 ++++++++
+ 5 files changed, 116 insertions(+)
+ create mode 100644 drivers/usb/host/xhci-mvebu.c
+ create mode 100644 drivers/usb/host/xhci-mvebu.h
+
+diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
+index a9707da7da0b..ed79c7abf226 100644
+--- a/drivers/usb/host/Kconfig
++++ b/drivers/usb/host/Kconfig
+@@ -29,6 +29,14 @@ if USB_XHCI_HCD
+ config USB_XHCI_PLATFORM
+ tristate
+
++config USB_XHCI_MVEBU
++ tristate "xHCI support for Marvell Armada 375/38x"
++ select USB_XHCI_PLATFORM
++ depends on ARCH_MVEBU || COMPILE_TEST
++ ---help---
++ Say 'Y' to enable the support for the xHCI host controller
++ found in Marvell Armada 375/38x ARM SOCs.
++
+ endif # USB_XHCI_HCD
+
+ config USB_EHCI_HCD
+diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
+index 7530468c9a4f..7c0886a35182 100644
+--- a/drivers/usb/host/Makefile
++++ b/drivers/usb/host/Makefile
+@@ -19,6 +19,9 @@ xhci-hcd-$(CONFIG_PCI) += xhci-pci.o
+
+ ifneq ($(CONFIG_USB_XHCI_PLATFORM), )
+ xhci-hcd-y += xhci-plat.o
++ifneq ($(CONFIG_USB_XHCI_MVEBU), )
++ xhci-hcd-y += xhci-mvebu.o
++endif
+ endif
+
+ obj-$(CONFIG_USB_WHCI_HCD) += whci/
+diff --git a/drivers/usb/host/xhci-mvebu.c b/drivers/usb/host/xhci-mvebu.c
+new file mode 100644
+index 000000000000..1eefc988192d
+--- /dev/null
++++ b/drivers/usb/host/xhci-mvebu.c
+@@ -0,0 +1,72 @@
++/*
++ * Copyright (C) 2014 Marvell
++ * Author: Gregory CLEMENT <gregory.clement@free-electrons.com>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * version 2 as published by the Free Software Foundation.
++ */
++
++#include <linux/io.h>
++#include <linux/mbus.h>
++#include <linux/of.h>
++#include <linux/platform_device.h>
++
++#include "xhci-mvebu.h"
++
++#define USB3_MAX_WINDOWS 4
++#define USB3_WIN_CTRL(w) (0x0 + ((w) * 8))
++#define USB3_WIN_BASE(w) (0x4 + ((w) * 8))
++
++static void xhci_mvebu_mbus_config(void __iomem *base,
++ const struct mbus_dram_target_info *dram)
++{
++ int win;
++
++ /* Clear all existing windows */
++ for (win = 0; win < USB3_MAX_WINDOWS; win++) {
++ writel(0, base + USB3_WIN_CTRL(win));
++ writel(0, base + USB3_WIN_BASE(win));
++ }
++
++ /* Program each DRAM CS in a seperate window */
++ for (win = 0; win < dram->num_cs; win++) {
++ const struct mbus_dram_window *cs = dram->cs + win;
++
++ writel(((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) |
++ (dram->mbus_dram_target_id << 4) | 1,
++ base + USB3_WIN_CTRL(win));
++
++ writel((cs->base & 0xffff0000), base + USB3_WIN_BASE(win));
++ }
++}
++
++int xhci_mvebu_mbus_init_quirk(struct platform_device *pdev)
++{
++ struct resource *res;
++ void __iomem *base;
++ const struct mbus_dram_target_info *dram;
++
++ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
++ if (!res)
++ return -ENODEV;
++
++ /*
++ * We don't use devm_ioremap() because this mapping should
++ * only exists for the duration of this probe function.
++ */
++ base = ioremap(res->start, resource_size(res));
++ if (!base)
++ return -ENODEV;
++
++ dram = mv_mbus_dram_info();
++ xhci_mvebu_mbus_config(base, dram);
++
++ /*
++ * This memory area was only needed to configure the MBus
++ * windows, and is therefore no longer useful.
++ */
++ iounmap(base);
++
++ return 0;
++}
+diff --git a/drivers/usb/host/xhci-mvebu.h b/drivers/usb/host/xhci-mvebu.h
+new file mode 100644
+index 000000000000..7ede92aa41f6
+--- /dev/null
++++ b/drivers/usb/host/xhci-mvebu.h
+@@ -0,0 +1,21 @@
++/*
++ * Copyright (C) 2014 Marvell
++ *
++ * Gregory Clement <gregory.clement@free-electrons.com>
++ *
++ * This file is licensed under the terms of the GNU General Public
++ * License version 2. This program is licensed "as is" without any
++ * warranty of any kind, whether express or implied.
++ */
++
++#ifndef __LINUX_XHCI_MVEBU_H
++#define __LINUX_XHCI_MVEBU_H
++#if IS_ENABLED(CONFIG_USB_XHCI_MVEBU)
++int xhci_mvebu_mbus_init_quirk(struct platform_device *pdev);
++#else
++static inline int xhci_mvebu_mbus_init_quirk(struct platform_device *pdev)
++{
++ return 0;
++}
++#endif
++#endif /* __LINUX_XHCI_MVEBU_H */
+diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
+index 17465cce6d0d..4010fc5bebaf 100644
+--- a/drivers/usb/host/xhci-plat.c
++++ b/drivers/usb/host/xhci-plat.c
+@@ -19,6 +19,7 @@
+ #include <linux/slab.h>
+
+ #include "xhci.h"
++#include "xhci-mvebu.h"
+
+ static void xhci_plat_quirks(struct device *dev, struct xhci_hcd *xhci)
+ {
+@@ -109,6 +110,15 @@ static int xhci_plat_probe(struct platform_device *pdev)
+ if (!res)
+ return -ENODEV;
+
++ if (of_device_is_compatible(pdev->dev.of_node,
++ "marvell,armada-375-xhci") ||
++ of_device_is_compatible(pdev->dev.of_node,
++ "marvell,armada-380-xhci")) {
++ ret = xhci_mvebu_mbus_init_quirk(pdev);
++ if (ret)
++ return ret;
++ }
++
+ /* Initialize dma_mask and coherent_dma_mask to 32-bits */
+ ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
+ if (ret)
+@@ -250,6 +260,8 @@ static const struct dev_pm_ops xhci_plat_pm_ops = {
+ static const struct of_device_id usb_xhci_of_match[] = {
+ { .compatible = "generic-xhci" },
+ { .compatible = "xhci-platform" },
++ { .compatible = "marvell,armada-375-xhci"},
++ { .compatible = "marvell,armada-380-xhci"},
+ { },
+ };
+ MODULE_DEVICE_TABLE(of, usb_xhci_of_match);
+--
+2.1.2
+
--- /dev/null
+From 60a7e2d700ce367c2f3bb20bf29a7718a7f67a59 Mon Sep 17 00:00:00 2001
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Thu, 8 May 2014 15:52:19 +0200
+Subject: usb: xhci: avoid warning for !PM_SLEEP
+
+If we build a kernel with PM_SUSPEND set and no PM_SLEEP,
+we get a build warning in the xhci-plat driver about unused
+functions.
+
+To fix this, use "#ifdef CONFIG_PM_SLEEP", like we do in most
+other drivers nowadays.
+
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+Cc: Mathias Nyman <mathias.nyman@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 274f6afa298791df97fd37b7bc9d8327f5cf6ee9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-plat.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
+index 4010fc5bebaf..20ee3ae21823 100644
+--- a/drivers/usb/host/xhci-plat.c
++++ b/drivers/usb/host/xhci-plat.c
+@@ -231,7 +231,7 @@ static int xhci_plat_remove(struct platform_device *dev)
+ return 0;
+ }
+
+-#ifdef CONFIG_PM
++#ifdef CONFIG_PM_SLEEP
+ static int xhci_plat_suspend(struct device *dev)
+ {
+ struct usb_hcd *hcd = dev_get_drvdata(dev);
+--
+2.1.2
+
--- /dev/null
+From 63a5e286029417ef52ea51e6d453ef67312e0023 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Wed, 28 May 2014 20:22:58 +0900
+Subject: usb: host: xhci-plat: add xhci_plat_start()
+
+Some platforms (such as the Renesas R-Car) need to initialize some specific
+registers after xhci driver calls usb_add_hcd() and before the driver calls
+xhci_run(). So, this patch adds the xhci_plat_start() function.
+
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 94adcdce0d340e06eb9187cad70555d2e8a201f3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/usb/host/xhci-plat.c | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
+index 20ee3ae21823..ea9e4a210c58 100644
+--- a/drivers/usb/host/xhci-plat.c
++++ b/drivers/usb/host/xhci-plat.c
+@@ -37,6 +37,11 @@ static int xhci_plat_setup(struct usb_hcd *hcd)
+ return xhci_gen_setup(hcd, xhci_plat_quirks);
+ }
+
++static int xhci_plat_start(struct usb_hcd *hcd)
++{
++ return xhci_run(hcd);
++}
++
+ static const struct hc_driver xhci_plat_xhci_driver = {
+ .description = "xhci-hcd",
+ .product_desc = "xHCI Host Controller",
+@@ -52,7 +57,7 @@ static const struct hc_driver xhci_plat_xhci_driver = {
+ * basic lifecycle operations
+ */
+ .reset = xhci_plat_setup,
+- .start = xhci_run,
++ .start = xhci_plat_start,
+ .stop = xhci_stop,
+ .shutdown = xhci_shutdown,
+
+--
+2.1.2
+
--- /dev/null
+From 5cfa3a32fc2fa8fc21e8ed96373e5f75ebddb75a Mon Sep 17 00:00:00 2001
+From: Jean Delvare <jdelvare@suse.de>
+Date: Mon, 26 May 2014 13:01:35 +0200
+Subject: drm/rcar-du: Add run-time dependencies
+
+The Renesas R-Car Display Unit driver is only useful on shmobile
+unless build testing. The LVDS output is useful on an even more
+reduced hardware set.
+
+Signed-off-by: Jean Delvare <jdelvare@suse.de>
+Acked-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+(cherry picked from commit 923d941990e90ed8ed768b5b6cf5b9d5202b8ff1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpu/drm/rcar-du/Kconfig | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/drivers/gpu/drm/rcar-du/Kconfig b/drivers/gpu/drm/rcar-du/Kconfig
+index d8e835ac2c5e..2e3d7b5b0ad7 100644
+--- a/drivers/gpu/drm/rcar-du/Kconfig
++++ b/drivers/gpu/drm/rcar-du/Kconfig
+@@ -1,6 +1,7 @@
+ config DRM_RCAR_DU
+ tristate "DRM Support for R-Car Display Unit"
+ depends on DRM && ARM
++ depends on ARCH_SHMOBILE || COMPILE_TEST
+ select DRM_KMS_HELPER
+ select DRM_KMS_CMA_HELPER
+ select DRM_GEM_CMA_HELPER
+@@ -12,6 +13,7 @@ config DRM_RCAR_DU
+ config DRM_RCAR_LVDS
+ bool "R-Car DU LVDS Encoder Support"
+ depends on DRM_RCAR_DU
++ depends on ARCH_R8A7790 || ARCH_R8A7791 || COMPILE_TEST
+ help
+ Enable support the R-Car Display Unit embedded LVDS encoders
+ (currently only on R8A7790).
+--
+2.1.2
+
--- /dev/null
+From e00eb44415d8245b445633c6e631fff77ed777d3 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 8 Jul 2014 12:46:46 +0200
+Subject: gpio: rcar: Add support for DT IRQ flags
+
+The gpio-rcar driver has no IRQ domain OF xlate function and thus
+ignores IRQ flags specified in DT. Fix this by using the two-cell xlate
+function.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+(cherry picked from commit c058ee5a02c87710f3dc3831431abd1b9a58bd76)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/gpio/gpio-rcar.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
+index 0c9f803fc1ac..b6ae89ea8811 100644
+--- a/drivers/gpio/gpio-rcar.c
++++ b/drivers/gpio/gpio-rcar.c
+@@ -284,6 +284,7 @@ static int gpio_rcar_irq_domain_map(struct irq_domain *h, unsigned int irq,
+
+ static struct irq_domain_ops gpio_rcar_irq_domain_ops = {
+ .map = gpio_rcar_irq_domain_map,
++ .xlate = irq_domain_xlate_twocell,
+ };
+
+ struct gpio_rcar_info {
+--
+2.1.2
+
--- /dev/null
+From 134dde9d66ecdc8f446fe17b2b16df4875da611d Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 13 May 2014 01:02:16 +0200
+Subject: dmaengine: shdma: Enable driver compilation with COMPILE_TEST
+
+This helps increasing build testing coverage.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Simon Horman <horms@verge.net.au>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+(cherry picked from commit ebc6d2d9c8cd48c351da84dd467c0edddc149ded)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/dma/sh/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/dma/sh/Kconfig b/drivers/dma/sh/Kconfig
+index b4c813831006..0f719816c91b 100644
+--- a/drivers/dma/sh/Kconfig
++++ b/drivers/dma/sh/Kconfig
+@@ -4,7 +4,7 @@
+
+ config SH_DMAE_BASE
+ bool "Renesas SuperH DMA Engine support"
+- depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
++ depends on (SUPERH && SH_DMA) || ARCH_SHMOBILE || COMPILE_TEST
+ depends on !SH_DMA_API
+ default y
+ select DMA_ENGINE
+--
+2.1.2
+
--- /dev/null
+From 320aec7d7926cfbba1b254754890e7494b9acfe0 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 2 Apr 2014 16:31:46 +0200
+Subject: ARM: shmobile: r8a7790: Rename VSP1_(SY|RT) clocks to VSP1_(S|R)
+
+The r8a7790 has four VSP1 instances, two of them being named VSPS (which
+stands for "VSP Standard") and VSPR (which stands for "VSP for
+Resizing"). The clock section in the SoC datasheet misunderstood the
+abbreviations as meaning VSP System and VSP Realtime, and named the
+corresponding clocks VSP1(SY) and VSP1(RT). This mistake has been
+carried over to the kernel code.
+
+Fix this by renaming the VSP1_SY and VSP1_RT clocks to VSP1_S and VSP1_R.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 79ea9934b8df700fa306c8ced2d3bbf94ff276a8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 2 +-
+ include/dt-bindings/clock/r8a7790-clock.h | 4 ++--
+ 2 files changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index 618e5b537eaf..10b326bdf831 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -673,7 +673,7 @@
+ renesas,clock-indices = <
+ R8A7790_CLK_TMU1 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2
+ R8A7790_CLK_CMT0 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1
+- R8A7790_CLK_VSP1_DU0 R8A7790_CLK_VSP1_RT R8A7790_CLK_VSP1_SY
++ R8A7790_CLK_VSP1_DU0 R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S
+ >;
+ clock-output-names =
+ "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
+diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
+index 6548a5fbcf4a..9a7c4c5a35d1 100644
+--- a/include/dt-bindings/clock/r8a7790-clock.h
++++ b/include/dt-bindings/clock/r8a7790-clock.h
+@@ -33,8 +33,8 @@
+ #define R8A7790_CLK_TMU0 25
+ #define R8A7790_CLK_VSP1_DU1 27
+ #define R8A7790_CLK_VSP1_DU0 28
+-#define R8A7790_CLK_VSP1_RT 30
+-#define R8A7790_CLK_VSP1_SY 31
++#define R8A7790_CLK_VSP1_R 30
++#define R8A7790_CLK_VSP1_S 31
+
+ /* MSTP2 */
+ #define R8A7790_CLK_SCIFA2 2
+--
+2.1.2
+
--- /dev/null
+From 13a505c9d4cdf2ca84f7cfe90cfcd6ce80447807 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 2 Apr 2014 16:31:47 +0200
+Subject: ARM: shmobile: r8a7791: Rename VSP1_SY clocks to VSP1_S
+
+The r8a7791 has three VSP1 instances, one of them being named VSPS (which
+stands for "VSP Standard"). The clock section in the SoC datasheet
+misunderstood the abbreviation as meaning VSP System, and named the
+corresponding clock VSP1(SY). This mistake has been carried over to the
+kernel code.
+
+Fix this by renaming the VSP1_SY clock to VSP1_S.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 58ea1d53ba93620ac50fef9d9720b2323971f243)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 2 +-
+ include/dt-bindings/clock/r8a7791-clock.h | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index 46181708e59c..aa1cba94196c 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -688,7 +688,7 @@
+ renesas,clock-indices = <
+ R8A7791_CLK_TMU1 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2
+ R8A7791_CLK_CMT0 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1
+- R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_SY
++ R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_S
+ >;
+ clock-output-names =
+ "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
+diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
+index 30f82f286e29..f069bc6627cb 100644
+--- a/include/dt-bindings/clock/r8a7791-clock.h
++++ b/include/dt-bindings/clock/r8a7791-clock.h
+@@ -32,7 +32,7 @@
+ #define R8A7791_CLK_TMU0 25
+ #define R8A7791_CLK_VSP1_DU1 27
+ #define R8A7791_CLK_VSP1_DU0 28
+-#define R8A7791_CLK_VSP1_SY 31
++#define R8A7791_CLK_VSP1_S 31
+
+ /* MSTP2 */
+ #define R8A7791_CLK_SCIFA2 2
+--
+2.1.2
+
--- /dev/null
+From 6aaa31b0f60651bc3cfcb698c371d8d455932371 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa@sang-engineering.com>
+Date: Mon, 10 Mar 2014 12:26:56 +0100
+Subject: ARM: shmobile: r8a7791: add IIC0/1 clock macros
+
+Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c6e8f325e769aabd059f8ff7d29e406345f83929)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ include/dt-bindings/clock/r8a7791-clock.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
+index f069bc6627cb..729dc5f07690 100644
+--- a/include/dt-bindings/clock/r8a7791-clock.h
++++ b/include/dt-bindings/clock/r8a7791-clock.h
+@@ -51,6 +51,8 @@
+ #define R8A7791_CLK_SDHI1 12
+ #define R8A7791_CLK_SDHI0 14
+ #define R8A7791_CLK_MMCIF0 15
++#define R8A7791_CLK_IIC0 18
++#define R8A7791_CLK_IIC1 23
+ #define R8A7791_CLK_SSUSB 28
+ #define R8A7791_CLK_CMT1 29
+ #define R8A7791_CLK_USBDMAC0 30
+--
+2.1.2
+
--- /dev/null
+From c64860667520ab78e720a529b8e81478fff64262 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Mon, 7 Apr 2014 15:04:21 +0900
+Subject: ARM: shmobile: r8a7791: Add EHCI MSTP clock
+
+Add support for EHCI clock gating via the MSTP703 bit on r8a7791.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6225b99aa620d6e260228a30cc5d24cde60cb1e7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 6 +++---
+ include/dt-bindings/clock/r8a7791-clock.h | 1 +
+ 2 files changed, 4 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index aa1cba94196c..52346051f6f9 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -733,19 +733,19 @@
+ mstp7_clks: mstp7_clks@e615014c {
+ compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
+ reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
+- clocks = <&mp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
++ clocks = <&mp_clk>, <&mp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
+ <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
+ <&zx_clk>, <&zx_clk>, <&zx_clk>;
+ #clock-cells = <1>;
+ renesas,clock-indices = <
+- R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5
++ R8A7791_CLK_EHCI R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5
+ R8A7791_CLK_SCIF4 R8A7791_CLK_HSCIF1 R8A7791_CLK_HSCIF0
+ R8A7791_CLK_SCIF3 R8A7791_CLK_SCIF2 R8A7791_CLK_SCIF1
+ R8A7791_CLK_SCIF0 R8A7791_CLK_DU1 R8A7791_CLK_DU0
+ R8A7791_CLK_LVDS0
+ >;
+ clock-output-names =
+- "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0",
++ "ehci", "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0",
+ "scif3", "scif2", "scif1", "scif0", "du1", "du0", "lvds0";
+ };
+ mstp8_clks: mstp8_clks@e6150990 {
+diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
+index 729dc5f07690..29b0f3355ffb 100644
+--- a/include/dt-bindings/clock/r8a7791-clock.h
++++ b/include/dt-bindings/clock/r8a7791-clock.h
+@@ -63,6 +63,7 @@
+ #define R8A7791_CLK_PWM 23
+
+ /* MSTP7 */
++#define R8A7791_CLK_EHCI 3
+ #define R8A7791_CLK_HSUSB 4
+ #define R8A7791_CLK_HSCIF2 13
+ #define R8A7791_CLK_SCIF5 14
+--
+2.1.2
+
--- /dev/null
+From b14b2377113da68183b06b9d7948c4f48f57e921 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa@sang-engineering.com>
+Date: Tue, 11 Mar 2014 22:24:36 +0100
+Subject: ARM: shmobile: r8a7790: add IIC0-2 clock macros
+
+Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 01d968e905968602c4958c416cfed7ad84b7489f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ include/dt-bindings/clock/r8a7790-clock.h | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
+index 9a7c4c5a35d1..1118f7a4bca6 100644
+--- a/include/dt-bindings/clock/r8a7790-clock.h
++++ b/include/dt-bindings/clock/r8a7790-clock.h
+@@ -50,6 +50,7 @@
+ #define R8A7790_CLK_SYS_DMAC0 19
+
+ /* MSTP3 */
++#define R8A7790_CLK_IIC2 0
+ #define R8A7790_CLK_TPU0 4
+ #define R8A7790_CLK_MMCIF1 5
+ #define R8A7790_CLK_SDHI3 11
+@@ -57,6 +58,8 @@
+ #define R8A7790_CLK_SDHI1 13
+ #define R8A7790_CLK_SDHI0 14
+ #define R8A7790_CLK_MMCIF0 15
++#define R8A7790_CLK_IIC0 18
++#define R8A7790_CLK_IIC1 23
+ #define R8A7790_CLK_SSUSB 28
+ #define R8A7790_CLK_CMT1 29
+ #define R8A7790_CLK_USBDMAC0 30
+--
+2.1.2
+
--- /dev/null
+From cef47a96f1c0f6cc6f031401c8af2e7ab8957e1c Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 12 May 2014 20:49:33 +0200
+Subject: ARM: shmobile: r8a7791: Correct SYS-DMAC clock defines
+
+R-Car M2 has two MSTP bits for SYS-DMAC, not one.
+Also bring the naming in sync with the documentation.
+
+This issue was introduced in v3.14, in commit
+4d8864c9e94ec727f1c675b9f6921525c360334b ("ARM: shmobile: r8a7791: Add
+clock index macros for DT sources").
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a505daa501dc3f02b08d0b48b049bce719299b74)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ include/dt-bindings/clock/r8a7791-clock.h | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
+index 29b0f3355ffb..b050d18437ce 100644
+--- a/include/dt-bindings/clock/r8a7791-clock.h
++++ b/include/dt-bindings/clock/r8a7791-clock.h
+@@ -43,7 +43,8 @@
+ #define R8A7791_CLK_SCIFB1 7
+ #define R8A7791_CLK_MSIOF1 8
+ #define R8A7791_CLK_SCIFB2 16
+-#define R8A7791_CLK_DMAC 18
++#define R8A7791_CLK_SYS_DMAC1 18
++#define R8A7791_CLK_SYS_DMAC0 19
+
+ /* MSTP3 */
+ #define R8A7791_CLK_TPU0 4
+--
+2.1.2
+
--- /dev/null
+From dd3719f6cdd6405fd9b9d508deeb62bb6e997636 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Fri, 18 Apr 2014 08:05:50 +0900
+Subject: clk: shmobile: r8a7779: Add clocks support
+
+The R8A7779 SoC has several clocks that are too custom to be supported in a
+generic driver. Those clocks are all fixed rate clocks with multiplier and
+divisor set according to boot mode configuration.
+
+Based on work for R-Car Gen2 SoCs by Laurent Pinchart.
+
+Cc: devicetree@vger.kernel.org
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Mike Turquette <mturquette@linaro.org>
+(cherry picked from commit 7b42a997bfb93c6ae0709f34ec8e2860757804b5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ .../bindings/clock/renesas,r8a7779-cpg-clocks.txt | 27 ++++
+ drivers/clk/shmobile/Makefile | 1 +
+ drivers/clk/shmobile/clk-r8a7779.c | 180 +++++++++++++++++++++
+ include/linux/clk/shmobile.h | 3 +
+ 4 files changed, 211 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/clock/renesas,r8a7779-cpg-clocks.txt
+ create mode 100644 drivers/clk/shmobile/clk-r8a7779.c
+
+diff --git a/Documentation/devicetree/bindings/clock/renesas,r8a7779-cpg-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,r8a7779-cpg-clocks.txt
+new file mode 100644
+index 000000000000..ed3c8cb12f4e
+--- /dev/null
++++ b/Documentation/devicetree/bindings/clock/renesas,r8a7779-cpg-clocks.txt
+@@ -0,0 +1,27 @@
++* Renesas R8A7779 Clock Pulse Generator (CPG)
++
++The CPG generates core clocks for the R8A7779. It includes one PLL and
++several fixed ratio dividers
++
++Required Properties:
++
++ - compatible: Must be "renesas,r8a7779-cpg-clocks"
++ - reg: Base address and length of the memory resource used by the CPG
++
++ - clocks: Reference to the parent clock
++ - #clock-cells: Must be 1
++ - clock-output-names: The names of the clocks. Supported clocks are "plla",
++ "z", "zs", "s", "s1", "p", "b", "out".
++
++
++Example
++-------
++
++ cpg_clocks: cpg_clocks@ffc80000 {
++ compatible = "renesas,r8a7779-cpg-clocks";
++ reg = <0 0xffc80000 0 0x30>;
++ clocks = <&extal_clk>;
++ #clock-cells = <1>;
++ clock-output-names = "plla", "z", "zs", "s", "s1", "p",
++ "b", "out";
++ };
+diff --git a/drivers/clk/shmobile/Makefile b/drivers/clk/shmobile/Makefile
+index 5404cb931ebf..bdf342daefa5 100644
+--- a/drivers/clk/shmobile/Makefile
++++ b/drivers/clk/shmobile/Makefile
+@@ -1,5 +1,6 @@
+ obj-$(CONFIG_ARCH_EMEV2) += clk-emev2.o
+ obj-$(CONFIG_ARCH_R7S72100) += clk-rz.o
++obj-$(CONFIG_ARCH_R8A7779) += clk-r8a7779.o
+ obj-$(CONFIG_ARCH_R8A7790) += clk-rcar-gen2.o
+ obj-$(CONFIG_ARCH_R8A7791) += clk-rcar-gen2.o
+ obj-$(CONFIG_ARCH_SHMOBILE_MULTI) += clk-div6.o
+diff --git a/drivers/clk/shmobile/clk-r8a7779.c b/drivers/clk/shmobile/clk-r8a7779.c
+new file mode 100644
+index 000000000000..652ecacb6daf
+--- /dev/null
++++ b/drivers/clk/shmobile/clk-r8a7779.c
+@@ -0,0 +1,180 @@
++/*
++ * r8a7779 Core CPG Clocks
++ *
++ * Copyright (C) 2013, 2014 Horms Solutions Ltd.
++ *
++ * Contact: Simon Horman <horms@verge.net.au>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; version 2 of the License.
++ */
++
++#include <linux/clk-provider.h>
++#include <linux/clkdev.h>
++#include <linux/clk/shmobile.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/of.h>
++#include <linux/of_address.h>
++#include <linux/spinlock.h>
++
++#include <dt-bindings/clock/r8a7779-clock.h>
++
++#define CPG_NUM_CLOCKS (R8A7779_CLK_OUT + 1)
++
++struct r8a7779_cpg {
++ struct clk_onecell_data data;
++ spinlock_t lock;
++ void __iomem *reg;
++};
++
++/* -----------------------------------------------------------------------------
++ * CPG Clock Data
++ */
++
++/*
++ * MD1 = 1 MD1 = 0
++ * (PLLA = 1500) (PLLA = 1600)
++ * (MHz) (MHz)
++ *------------------------------------------------+--------------------
++ * clkz 1000 (2/3) 800 (1/2)
++ * clkzs 250 (1/6) 200 (1/8)
++ * clki 750 (1/2) 800 (1/2)
++ * clks 250 (1/6) 200 (1/8)
++ * clks1 125 (1/12) 100 (1/16)
++ * clks3 187.5 (1/8) 200 (1/8)
++ * clks4 93.7 (1/16) 100 (1/16)
++ * clkp 62.5 (1/24) 50 (1/32)
++ * clkg 62.5 (1/24) 66.6 (1/24)
++ * clkb, CLKOUT
++ * (MD2 = 0) 62.5 (1/24) 66.6 (1/24)
++ * (MD2 = 1) 41.6 (1/36) 50 (1/32)
++ */
++
++#define CPG_CLK_CONFIG_INDEX(md) (((md) & (BIT(2)|BIT(1))) >> 1)
++
++struct cpg_clk_config {
++ unsigned int z_mult;
++ unsigned int z_div;
++ unsigned int zs_and_s_div;
++ unsigned int s1_div;
++ unsigned int p_div;
++ unsigned int b_and_out_div;
++};
++
++static const struct cpg_clk_config cpg_clk_configs[4] __initconst = {
++ { 1, 2, 8, 16, 32, 24 },
++ { 2, 3, 6, 12, 24, 24 },
++ { 1, 2, 8, 16, 32, 32 },
++ { 2, 3, 6, 12, 24, 36 },
++};
++
++/*
++ * MD PLLA Ratio
++ * 12 11
++ *------------------------
++ * 0 0 x42
++ * 0 1 x48
++ * 1 0 x56
++ * 1 1 x64
++ */
++
++#define CPG_PLLA_MULT_INDEX(md) (((md) & (BIT(12)|BIT(11))) >> 11)
++
++static const unsigned int cpg_plla_mult[4] __initconst = { 42, 48, 56, 64 };
++
++/* -----------------------------------------------------------------------------
++ * Initialization
++ */
++
++static u32 cpg_mode __initdata;
++
++static struct clk * __init
++r8a7779_cpg_register_clock(struct device_node *np, struct r8a7779_cpg *cpg,
++ const struct cpg_clk_config *config,
++ unsigned int plla_mult, const char *name)
++{
++ const char *parent_name = "plla";
++ unsigned int mult = 1;
++ unsigned int div = 1;
++
++ if (!strcmp(name, "plla")) {
++ parent_name = of_clk_get_parent_name(np, 0);
++ mult = plla_mult;
++ } else if (!strcmp(name, "z")) {
++ div = config->z_div;
++ mult = config->z_mult;
++ } else if (!strcmp(name, "zs") || !strcmp(name, "s")) {
++ div = config->zs_and_s_div;
++ } else if (!strcmp(name, "s1")) {
++ div = config->s1_div;
++ } else if (!strcmp(name, "p")) {
++ div = config->p_div;
++ } else if (!strcmp(name, "b") || !strcmp(name, "out")) {
++ div = config->b_and_out_div;
++ } else {
++ return ERR_PTR(-EINVAL);
++ }
++
++ return clk_register_fixed_factor(NULL, name, parent_name, 0, mult, div);
++}
++
++static void __init r8a7779_cpg_clocks_init(struct device_node *np)
++{
++ const struct cpg_clk_config *config;
++ struct r8a7779_cpg *cpg;
++ struct clk **clks;
++ unsigned int i, plla_mult;
++ int num_clks;
++
++ num_clks = of_property_count_strings(np, "clock-output-names");
++ if (num_clks < 0) {
++ pr_err("%s: failed to count clocks\n", __func__);
++ return;
++ }
++
++ cpg = kzalloc(sizeof(*cpg), GFP_KERNEL);
++ clks = kzalloc(CPG_NUM_CLOCKS * sizeof(*clks), GFP_KERNEL);
++ if (cpg == NULL || clks == NULL) {
++ /* We're leaking memory on purpose, there's no point in cleaning
++ * up as the system won't boot anyway.
++ */
++ return;
++ }
++
++ spin_lock_init(&cpg->lock);
++
++ cpg->data.clks = clks;
++ cpg->data.clk_num = num_clks;
++
++ config = &cpg_clk_configs[CPG_CLK_CONFIG_INDEX(cpg_mode)];
++ plla_mult = cpg_plla_mult[CPG_PLLA_MULT_INDEX(cpg_mode)];
++
++ for (i = 0; i < num_clks; ++i) {
++ const char *name;
++ struct clk *clk;
++
++ of_property_read_string_index(np, "clock-output-names", i,
++ &name);
++
++ clk = r8a7779_cpg_register_clock(np, cpg, config,
++ plla_mult, name);
++ if (IS_ERR(clk))
++ pr_err("%s: failed to register %s %s clock (%ld)\n",
++ __func__, np->name, name, PTR_ERR(clk));
++ else
++ cpg->data.clks[i] = clk;
++ }
++
++ of_clk_add_provider(np, of_clk_src_onecell_get, &cpg->data);
++}
++CLK_OF_DECLARE(r8a7779_cpg_clks, "renesas,r8a7779-cpg-clocks",
++ r8a7779_cpg_clocks_init);
++
++void __init r8a7779_clocks_init(u32 mode)
++{
++ cpg_mode = mode;
++
++ of_clk_init(NULL);
++}
+diff --git a/include/linux/clk/shmobile.h b/include/linux/clk/shmobile.h
+index f9bf080a1123..9f8a14041dd5 100644
+--- a/include/linux/clk/shmobile.h
++++ b/include/linux/clk/shmobile.h
+@@ -1,7 +1,9 @@
+ /*
+ * Copyright 2013 Ideas On Board SPRL
++ * Copyright 2013, 2014 Horms Solutions Ltd.
+ *
+ * Contact: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
++ * Contact: Simon Horman <horms@verge.net.au>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+@@ -14,6 +16,7 @@
+
+ #include <linux/types.h>
+
++void r8a7779_clocks_init(u32 mode);
+ void rcar_gen2_clocks_init(u32 mode);
+
+ #endif
+--
+2.1.2
+
--- /dev/null
+From da3bebbe0cde7483fff2835efd717696f6df24ac Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Fri, 18 Apr 2014 08:05:51 +0900
+Subject: clk: shmobile: r8a7779: Add MSTP clock support
+
+Add MSTP clock support for the r8a7779 SoC
+
+The only change required appears to be to note a new
+compatibility string in the bindings.
+
+Cc: devicetree@vger.kernel.org
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Mike Turquette <mturquette@linaro.org>
+(cherry picked from commit 5483bf698f42a6f0467463b064084eb888298232)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
+index 02a25d99ca61..30df825d72ef 100644
+--- a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
++++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
+@@ -10,6 +10,7 @@ index in the group, from 0 to 31.
+ Required Properties:
+
+ - compatible: Must be one of the following
++ - "renesas,r8a7779-mstp-clocks" for R8A7779 (R-Car H1) MSTP gate clocks
+ - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks
+ - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks
+ - "renesas,cpg-mstp-clock" for generic MSTP gate clocks
+--
+2.1.2
+
--- /dev/null
+From 3d2e6c20afb88b755364bf5f76cc5797d8ae9f22 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 14 May 2014 03:10:05 +0200
+Subject: ARM: shmobile: r7s72100: document MSTP clock support
+
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Acked-by: Mike Turquette <mturquette@linaro.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b557deadc5cca47aff93781b21fef468233c2ea8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+Conflicts:
+ Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
+---
+ Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
+index 30df825d72ef..8a92b5fb3540 100644
+--- a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
++++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
+@@ -10,6 +10,7 @@ index in the group, from 0 to 31.
+ Required Properties:
+
+ - compatible: Must be one of the following
++ - "renesas,r7s72100-mstp-clocks" for R7S72100 (RZ) MSTP gate clocks
+ - "renesas,r8a7779-mstp-clocks" for R8A7779 (R-Car H1) MSTP gate clocks
+ - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks
+ - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks
+--
+2.1.2
+
--- /dev/null
+From cdea2a78adecef5205453c59408bb43d714c974e Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Thu, 22 May 2014 20:02:14 +0200
+Subject: clk: shmobile: mstp: Fix the is_enabled() operation
+
+The MSTP[SC]R registers have clock stop bits, not clock enable bits. The
+bit value should thus be inverted in the is_enabled() operation.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Mike Turquette <mturquette@linaro.org>
+(cherry picked from commit bb178da701382a230e26d90cf94e8a24b280e0d9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ drivers/clk/shmobile/clk-mstp.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/clk/shmobile/clk-mstp.c b/drivers/clk/shmobile/clk-mstp.c
+index 1f6324e29a80..2d2fe773ac81 100644
+--- a/drivers/clk/shmobile/clk-mstp.c
++++ b/drivers/clk/shmobile/clk-mstp.c
+@@ -112,7 +112,7 @@ static int cpg_mstp_clock_is_enabled(struct clk_hw *hw)
+ else
+ value = clk_readl(group->smstpcr);
+
+- return !!(value & BIT(clock->bit_index));
++ return !(value & BIT(clock->bit_index));
+ }
+
+ static const struct clk_ops cpg_mstp_clock_ops = {
+--
+2.1.2
+
--- /dev/null
+From 52376b3dbf6d3143a21dfa7eddb0f3905959b9d7 Mon Sep 17 00:00:00 2001
+From: Ulrich Hecht <ulrich.hecht@gmail.com>
+Date: Fri, 23 May 2014 15:27:15 +0200
+Subject: clk: shmobile: Add R8A7740-specific clock support
+
+Driver for the R8A7740's clocks that are too specific to be supported by a
+generic driver.
+
+Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Mike Turquette <mturquette@linaro.org>
+(cherry picked from commit 1923ca92a618b6107d3a44b5c9f9360b104dcddb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ .../bindings/clock/renesas,r8a7740-cpg-clocks.txt | 41 +++++
+ drivers/clk/shmobile/Makefile | 1 +
+ drivers/clk/shmobile/clk-r8a7740.c | 199 +++++++++++++++++++++
+ 3 files changed, 241 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/clock/renesas,r8a7740-cpg-clocks.txt
+ create mode 100644 drivers/clk/shmobile/clk-r8a7740.c
+
+diff --git a/Documentation/devicetree/bindings/clock/renesas,r8a7740-cpg-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,r8a7740-cpg-clocks.txt
+new file mode 100644
+index 000000000000..2c03302f86ed
+--- /dev/null
++++ b/Documentation/devicetree/bindings/clock/renesas,r8a7740-cpg-clocks.txt
+@@ -0,0 +1,41 @@
++These bindings should be considered EXPERIMENTAL for now.
++
++* Renesas R8A7740 Clock Pulse Generator (CPG)
++
++The CPG generates core clocks for the R8A7740 SoC. It includes three PLLs
++and several fixed ratio and variable ratio dividers.
++
++Required Properties:
++
++ - compatible: Must be "renesas,r8a7740-cpg-clocks"
++
++ - reg: Base address and length of the memory resource used by the CPG
++
++ - clocks: Reference to the three parent clocks
++ - #clock-cells: Must be 1
++ - clock-output-names: The names of the clocks. Supported clocks are
++ "system", "pllc0", "pllc1", "pllc2", "r", "usb24s", "i", "zg", "b",
++ "m1", "hp", "hpp", "usbp", "s", "zb", "m3", and "cp".
++
++ - renesas,mode: board-specific settings of the MD_CK* bits
++
++
++Example
++-------
++
++cpg_clocks: cpg_clocks@e6150000 {
++ compatible = "renesas,r8a7740-cpg-clocks";
++ reg = <0xe6150000 0x10000>;
++ clocks = <&extal1_clk>, <&extal2_clk>, <&extalr_clk>;
++ #clock-cells = <1>;
++ clock-output-names = "system", "pllc0", "pllc1",
++ "pllc2", "r",
++ "usb24s",
++ "i", "zg", "b", "m1", "hp",
++ "hpp", "usbp", "s", "zb", "m3",
++ "cp";
++};
++
++&cpg_clocks {
++ renesas,mode = <0x05>;
++};
+diff --git a/drivers/clk/shmobile/Makefile b/drivers/clk/shmobile/Makefile
+index bdf342daefa5..e0029237827a 100644
+--- a/drivers/clk/shmobile/Makefile
++++ b/drivers/clk/shmobile/Makefile
+@@ -1,5 +1,6 @@
+ obj-$(CONFIG_ARCH_EMEV2) += clk-emev2.o
+ obj-$(CONFIG_ARCH_R7S72100) += clk-rz.o
++obj-$(CONFIG_ARCH_R8A7740) += clk-r8a7740.o
+ obj-$(CONFIG_ARCH_R8A7779) += clk-r8a7779.o
+ obj-$(CONFIG_ARCH_R8A7790) += clk-rcar-gen2.o
+ obj-$(CONFIG_ARCH_R8A7791) += clk-rcar-gen2.o
+diff --git a/drivers/clk/shmobile/clk-r8a7740.c b/drivers/clk/shmobile/clk-r8a7740.c
+new file mode 100644
+index 000000000000..1e2eaae21e01
+--- /dev/null
++++ b/drivers/clk/shmobile/clk-r8a7740.c
+@@ -0,0 +1,199 @@
++/*
++ * r8a7740 Core CPG Clocks
++ *
++ * Copyright (C) 2014 Ulrich Hecht
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; version 2 of the License.
++ */
++
++#include <linux/clk-provider.h>
++#include <linux/clkdev.h>
++#include <linux/clk/shmobile.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/of.h>
++#include <linux/of_address.h>
++#include <linux/spinlock.h>
++
++struct r8a7740_cpg {
++ struct clk_onecell_data data;
++ spinlock_t lock;
++ void __iomem *reg;
++};
++
++#define CPG_FRQCRA 0x00
++#define CPG_FRQCRB 0x04
++#define CPG_PLLC2CR 0x2c
++#define CPG_USBCKCR 0x8c
++#define CPG_FRQCRC 0xe0
++
++#define CLK_ENABLE_ON_INIT BIT(0)
++
++struct div4_clk {
++ const char *name;
++ unsigned int reg;
++ unsigned int shift;
++ int flags;
++};
++
++static struct div4_clk div4_clks[] = {
++ { "i", CPG_FRQCRA, 20, CLK_ENABLE_ON_INIT },
++ { "zg", CPG_FRQCRA, 16, CLK_ENABLE_ON_INIT },
++ { "b", CPG_FRQCRA, 8, CLK_ENABLE_ON_INIT },
++ { "m1", CPG_FRQCRA, 4, CLK_ENABLE_ON_INIT },
++ { "hp", CPG_FRQCRB, 4, 0 },
++ { "hpp", CPG_FRQCRC, 20, 0 },
++ { "usbp", CPG_FRQCRC, 16, 0 },
++ { "s", CPG_FRQCRC, 12, 0 },
++ { "zb", CPG_FRQCRC, 8, 0 },
++ { "m3", CPG_FRQCRC, 4, 0 },
++ { "cp", CPG_FRQCRC, 0, 0 },
++ { NULL, 0, 0, 0 },
++};
++
++static const struct clk_div_table div4_div_table[] = {
++ { 0, 2 }, { 1, 3 }, { 2, 4 }, { 3, 6 }, { 4, 8 }, { 5, 12 },
++ { 6, 16 }, { 7, 18 }, { 8, 24 }, { 9, 32 }, { 10, 36 }, { 11, 48 },
++ { 13, 72 }, { 14, 96 }, { 0, 0 }
++};
++
++static u32 cpg_mode __initdata;
++
++static struct clk * __init
++r8a7740_cpg_register_clock(struct device_node *np, struct r8a7740_cpg *cpg,
++ const char *name)
++{
++ const struct clk_div_table *table = NULL;
++ const char *parent_name;
++ unsigned int shift, reg;
++ unsigned int mult = 1;
++ unsigned int div = 1;
++
++ if (!strcmp(name, "r")) {
++ switch (cpg_mode & (BIT(2) | BIT(1))) {
++ case BIT(1) | BIT(2):
++ /* extal1 */
++ parent_name = of_clk_get_parent_name(np, 0);
++ div = 2048;
++ break;
++ case BIT(2):
++ /* extal1 */
++ parent_name = of_clk_get_parent_name(np, 0);
++ div = 1024;
++ break;
++ default:
++ /* extalr */
++ parent_name = of_clk_get_parent_name(np, 2);
++ break;
++ }
++ } else if (!strcmp(name, "system")) {
++ parent_name = of_clk_get_parent_name(np, 0);
++ if (cpg_mode & BIT(1))
++ div = 2;
++ } else if (!strcmp(name, "pllc0")) {
++ /* PLLC0/1 are configurable multiplier clocks. Register them as
++ * fixed factor clocks for now as there's no generic multiplier
++ * clock implementation and we currently have no need to change
++ * the multiplier value.
++ */
++ u32 value = clk_readl(cpg->reg + CPG_FRQCRC);
++ parent_name = "system";
++ mult = ((value >> 24) & 0x7f) + 1;
++ } else if (!strcmp(name, "pllc1")) {
++ u32 value = clk_readl(cpg->reg + CPG_FRQCRA);
++ parent_name = "system";
++ mult = ((value >> 24) & 0x7f) + 1;
++ div = 2;
++ } else if (!strcmp(name, "pllc2")) {
++ u32 value = clk_readl(cpg->reg + CPG_PLLC2CR);
++ parent_name = "system";
++ mult = ((value >> 24) & 0x3f) + 1;
++ } else if (!strcmp(name, "usb24s")) {
++ u32 value = clk_readl(cpg->reg + CPG_USBCKCR);
++ if (value & BIT(7))
++ /* extal2 */
++ parent_name = of_clk_get_parent_name(np, 1);
++ else
++ parent_name = "system";
++ if (!(value & BIT(6)))
++ div = 2;
++ } else {
++ struct div4_clk *c;
++ for (c = div4_clks; c->name; c++) {
++ if (!strcmp(name, c->name)) {
++ parent_name = "pllc1";
++ table = div4_div_table;
++ reg = c->reg;
++ shift = c->shift;
++ break;
++ }
++ }
++ if (!c->name)
++ return ERR_PTR(-EINVAL);
++ }
++
++ if (!table) {
++ return clk_register_fixed_factor(NULL, name, parent_name, 0,
++ mult, div);
++ } else {
++ return clk_register_divider_table(NULL, name, parent_name, 0,
++ cpg->reg + reg, shift, 4, 0,
++ table, &cpg->lock);
++ }
++}
++
++static void __init r8a7740_cpg_clocks_init(struct device_node *np)
++{
++ struct r8a7740_cpg *cpg;
++ struct clk **clks;
++ unsigned int i;
++ int num_clks;
++
++ if (of_property_read_u32(np, "renesas,mode", &cpg_mode))
++ pr_warn("%s: missing renesas,mode property\n", __func__);
++
++ num_clks = of_property_count_strings(np, "clock-output-names");
++ if (num_clks < 0) {
++ pr_err("%s: failed to count clocks\n", __func__);
++ return;
++ }
++
++ cpg = kzalloc(sizeof(*cpg), GFP_KERNEL);
++ clks = kzalloc(num_clks * sizeof(*clks), GFP_KERNEL);
++ if (cpg == NULL || clks == NULL) {
++ /* We're leaking memory on purpose, there's no point in cleaning
++ * up as the system won't boot anyway.
++ */
++ return;
++ }
++
++ spin_lock_init(&cpg->lock);
++
++ cpg->data.clks = clks;
++ cpg->data.clk_num = num_clks;
++
++ cpg->reg = of_iomap(np, 0);
++ if (WARN_ON(cpg->reg == NULL))
++ return;
++
++ for (i = 0; i < num_clks; ++i) {
++ const char *name;
++ struct clk *clk;
++
++ of_property_read_string_index(np, "clock-output-names", i,
++ &name);
++
++ clk = r8a7740_cpg_register_clock(np, cpg, name);
++ if (IS_ERR(clk))
++ pr_err("%s: failed to register %s %s clock (%ld)\n",
++ __func__, np->name, name, PTR_ERR(clk));
++ else
++ cpg->data.clks[i] = clk;
++ }
++
++ of_clk_add_provider(np, of_clk_src_onecell_get, &cpg->data);
++}
++CLK_OF_DECLARE(r8a7740_cpg_clks, "renesas,r8a7740-cpg-clocks",
++ r8a7740_cpg_clocks_init);
+--
+2.1.2
+
--- /dev/null
+From 0bcf3166388a4053a04ef66dbeac4779536e1822 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Date: Tue, 18 Mar 2014 10:39:23 +0100
+Subject: ARM: shmobile: armadillo800eva: Spelling and grammar
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 1668a7a699f8c96bc99a50e94aadfe328adf9b76)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/Kconfig | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index c655ec642d6c..232d1a051f07 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -205,8 +205,8 @@ config MACH_ARMADILLO800EVA_REFERENCE
+ select SND_SOC_WM8978 if SND_SIMPLE_CARD
+ select USE_OF
+ ---help---
+- Use reference implementation of Aramdillo800 EVA board support
+- which makes a greater use of device tree at the expense
++ Use reference implementation of Armadillo800 EVA board support
++ which makes greater use of device tree at the expense
+ of not supporting a number of devices.
+
+ This is intended to aid developers
+--
+2.1.2
+
--- /dev/null
+From dec7f01dd1fd1abec46f086a2a0dc5fa10b355b7 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Date: Tue, 25 Feb 2014 11:30:19 +0100
+Subject: ARM: shmobile: multiplatform: Enable MSIOF in defconfig
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d477a4a2fcbf59feb617de9502ae8b862e1578ed)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/shmobile_defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig
+index 83b07258a385..2a27d4622cc9 100644
+--- a/arch/arm/configs/shmobile_defconfig
++++ b/arch/arm/configs/shmobile_defconfig
+@@ -78,6 +78,7 @@ CONFIG_I2C_GPIO=y
+ CONFIG_I2C_RCAR=y
+ CONFIG_SPI=y
+ CONFIG_SPI_RSPI=y
++CONFIG_SPI_SH_MSIOF=y
+ CONFIG_GPIO_EM=y
+ CONFIG_GPIO_RCAR=y
+ # CONFIG_HWMON is not set
+--
+2.1.2
+
--- /dev/null
+From f90b7b05b06859429b0bc3c6187c3390acfaa574 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 26 Mar 2014 14:16:19 +0900
+Subject: ARM: shmobile: Include i2c-shmobile.c in shmobile_defconfig
+
+Many SoCs include I2C controller instances compatible with
+the i2c-shmobile.c driver. To increase hardware support enable
+the driver in the shmobile_defconfig multiplatform configuration.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Acked-by: Wolfram Sang <wsa@the-dreams.de>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c2e90c4b7c15fbb2215b47a23b446ba53e6dbf59)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/shmobile_defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig
+index 2a27d4622cc9..d96133a686e5 100644
+--- a/arch/arm/configs/shmobile_defconfig
++++ b/arch/arm/configs/shmobile_defconfig
+@@ -75,6 +75,7 @@ CONFIG_SERIAL_SH_SCI=y
+ CONFIG_SERIAL_SH_SCI_NR_UARTS=20
+ CONFIG_SERIAL_SH_SCI_CONSOLE=y
+ CONFIG_I2C_GPIO=y
++CONFIG_I2C_SH_MOBILE=y
+ CONFIG_I2C_RCAR=y
+ CONFIG_SPI=y
+ CONFIG_SPI_RSPI=y
+--
+2.1.2
+
--- /dev/null
+From 461799c5eb4015868179d16eb2ff542fa1f7a028 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 26 Mar 2014 14:19:11 +0900
+Subject: ARM: shmobile: Include at24.c in shmobile_defconfig
+
+The Koelsch board includes an at24-compatible EEPROM hooked up via I2C.
+To increase hardware support enable the driver in the shmobile_defconfig
+multiplatform configuration.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Acked-by: Wolfram Sang <wsa@the-dreams.de>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f5e1367f8f94293f098cab3e906934e535df1a94)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/shmobile_defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig
+index d96133a686e5..146ee70dd459 100644
+--- a/arch/arm/configs/shmobile_defconfig
++++ b/arch/arm/configs/shmobile_defconfig
+@@ -43,6 +43,7 @@ CONFIG_DEVTMPFS=y
+ CONFIG_DEVTMPFS_MOUNT=y
+ CONFIG_MTD=y
+ CONFIG_MTD_M25P80=y
++CONFIG_EEPROM_AT24=y
+ CONFIG_BLK_DEV_SD=y
+ CONFIG_ATA=y
+ CONFIG_SATA_RCAR=y
+--
+2.1.2
+
--- /dev/null
+From 1c8f83a3cd747c2a513ff2b26e3f67d813bd9a91 Mon Sep 17 00:00:00 2001
+From: Ulrich Hecht <ulrich.hecht@gmail.com>
+Date: Fri, 28 Mar 2014 17:54:01 +0100
+Subject: ARM: shmobile: Enable USBHS gadget support in shmobile_defconfig
+
+The renesas_usbhs driver provides USB gadget support for most Renesas
+platforms. To increase hardware support enable the driver in the
+shmobile_defconfig multiplatform configuration.
+
+Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 41551f3d7d9a37b55a6f84d77200bfe29d42c466)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/shmobile_defconfig | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig
+index 146ee70dd459..c10e626e8510 100644
+--- a/arch/arm/configs/shmobile_defconfig
++++ b/arch/arm/configs/shmobile_defconfig
+@@ -103,7 +103,11 @@ CONFIG_SOUND=y
+ CONFIG_SND=y
+ CONFIG_SND_SOC=y
+ CONFIG_SND_SOC_RCAR=y
++CONFIG_USB=y
+ CONFIG_USB_RCAR_GEN2_PHY=y
++CONFIG_USB_RENESAS_USBHS=y
++CONFIG_USB_GADGET=y
++CONFIG_USB_RENESAS_USBHS_UDC=y
+ CONFIG_MMC=y
+ CONFIG_MMC_SDHI=y
+ CONFIG_MMC_SH_MMCIF=y
+--
+2.1.2
+
--- /dev/null
+From db067a27fd06c6f1432762c8207502ca62e04f1b Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 2 Apr 2014 18:06:24 +0900
+Subject: ARM: shmobile: Enable HIGHMEM in shmobile_defconfig
+
+Many mach-shmobile hardware platforms include support for more
+than 1GiB of RAM. Enable HIGHMEM by default to allow use of
+larger amounts of memory.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 667d0f7b0e940bf36e8d12bd7d64aa0f9217b3ac)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/shmobile_defconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig
+index c10e626e8510..b73a0380bb03 100644
+--- a/arch/arm/configs/shmobile_defconfig
++++ b/arch/arm/configs/shmobile_defconfig
+@@ -25,6 +25,7 @@ CONFIG_SCHED_MC=y
+ CONFIG_HAVE_ARM_ARCH_TIMER=y
+ CONFIG_NR_CPUS=8
+ CONFIG_AEABI=y
++CONFIG_HIGHMEM=y
+ CONFIG_ZBOOT_ROM_TEXT=0x0
+ CONFIG_ZBOOT_ROM_BSS=0x0
+ CONFIG_ARM_APPENDED_DTB=y
+--
+2.1.2
+
--- /dev/null
+From f6fe435a21eb3defcf8f6843983fb285358386ee Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Tue, 8 Apr 2014 21:37:58 +0900
+Subject: ARM: shmobile: Enable VSP1 in shmobile_defconfig
+
+Both r8a7790 and r8a7791 have multiple on-chip VSP1 devices, so
+enable the VSP1 driver by default in the shmobile_defconfig.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e4224fe8bfd955d1aea5f89f2f3ac38dc4a590fc)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/shmobile_defconfig | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig
+index b73a0380bb03..8fb30b09f960 100644
+--- a/arch/arm/configs/shmobile_defconfig
++++ b/arch/arm/configs/shmobile_defconfig
+@@ -92,10 +92,14 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y
+ CONFIG_REGULATOR_GPIO=y
+ CONFIG_MEDIA_SUPPORT=y
+ CONFIG_MEDIA_CAMERA_SUPPORT=y
++CONFIG_MEDIA_CONTROLLER=y
++CONFIG_VIDEO_V4L2_SUBDEV_API=y
+ CONFIG_V4L_PLATFORM_DRIVERS=y
+ CONFIG_SOC_CAMERA=y
+ CONFIG_SOC_CAMERA_PLATFORM=y
+ CONFIG_VIDEO_RCAR_VIN=y
++CONFIG_V4L_MEM2MEM_DRIVERS=y
++CONFIG_VIDEO_RENESAS_VSP1=y
+ # CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
+ CONFIG_VIDEO_ADV7180=y
+ CONFIG_DRM=y
+--
+2.1.2
+
--- /dev/null
+From 84557bdec628d20185bed2b31016fe60ace95908 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 10 Apr 2014 16:12:45 +0900
+Subject: ARM: shmobile: Enable USB [EO]HCI HCD support in shmobile_defconfig
+
+The USB [EO]HCI HCD drivers provide USB host support for Renesas
+R-Car Gen2 platforms. To increase hardware support enable the driver in the
+shmobile_defconfig multiplatform configuration.
+
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 1d59eb190e3dc575c7bbee4a163c3facd0de2ed9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/shmobile_defconfig | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig
+index 8fb30b09f960..6d6437cbbc52 100644
+--- a/arch/arm/configs/shmobile_defconfig
++++ b/arch/arm/configs/shmobile_defconfig
+@@ -110,6 +110,8 @@ CONFIG_SND_SOC=y
+ CONFIG_SND_SOC_RCAR=y
+ CONFIG_USB=y
+ CONFIG_USB_RCAR_GEN2_PHY=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_OHCI_HCD=y
+ CONFIG_USB_RENESAS_USBHS=y
+ CONFIG_USB_GADGET=y
+ CONFIG_USB_RENESAS_USBHS_UDC=y
+--
+2.1.2
+
--- /dev/null
+From 7921fc7ce52297a1672943a5e13ba2846b235aef Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 6 Mar 2014 12:16:58 +0900
+Subject: ARM: shmobile: Update r8a7791 CPU freq to 1500MHz in C
+
+The correct maximum CPU frequency for r8a7791 is 1500 MHz
+so update the r8a7791 SoC C code to reflect this.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ce4b6a04c49b0b414d537b45ededd9dfd4e48336)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7791.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
+index e28404e43860..a7e4966f5e18 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7791.c
++++ b/arch/arm/mach-shmobile/setup-r8a7791.c
+@@ -213,7 +213,7 @@ void __init r8a7791_add_standard_devices(void)
+ void __init r8a7791_init_early(void)
+ {
+ #ifndef CONFIG_ARM_ARCH_TIMER
+- shmobile_setup_delay(1300, 2, 4); /* Cortex-A15 @ 1300MHz */
++ shmobile_setup_delay(1500, 2, 4); /* Cortex-A15 @ 1500MHz */
+ #endif
+ }
+
+--
+2.1.2
+
--- /dev/null
+From 1b5975c8593b8f8cefbdccd4c2a1268a3aec1ae8 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 6 Mar 2014 12:28:24 +0900
+Subject: ARM: shmobile: Add shared shmobile_init_delay()
+
+Introduce shmobile_init_delay() that gets CPU specific
+parameters from DT and sets up the early delay from
+there. This allows us to both remove frequency information
+from the C code and consolidate existing code.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c39dae380b4a11f1050a2ef6607598dcbe0541be)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/include/mach/common.h | 1 +
+ arch/arm/mach-shmobile/timer.c | 28 ++++++++++++++++++++++++++++
+ 2 files changed, 29 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
+index cb8e32deb2a3..f7a360edcc35 100644
+--- a/arch/arm/mach-shmobile/include/mach/common.h
++++ b/arch/arm/mach-shmobile/include/mach/common.h
+@@ -4,6 +4,7 @@
+ extern void shmobile_earlytimer_init(void);
+ extern void shmobile_setup_delay(unsigned int max_cpu_core_mhz,
+ unsigned int mult, unsigned int div);
++extern void shmobile_init_delay(void);
+ struct twd_local_timer;
+ extern void shmobile_setup_console(void);
+ extern void shmobile_boot_vector(void);
+diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
+index 62d7052d6f21..ccecde9a3362 100644
+--- a/arch/arm/mach-shmobile/timer.c
++++ b/arch/arm/mach-shmobile/timer.c
+@@ -21,6 +21,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/clocksource.h>
+ #include <linux/delay.h>
++#include <linux/of_address.h>
+
+ void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz,
+ unsigned int mult, unsigned int div)
+@@ -39,6 +40,33 @@ void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz,
+ preset_lpj = max_cpu_core_mhz * value;
+ }
+
++void __init shmobile_init_delay(void)
++{
++ struct device_node *np, *parent;
++ u32 max_freq, freq;
++
++ max_freq = 0;
++
++ parent = of_find_node_by_path("/cpus");
++ if (parent) {
++ for_each_child_of_node(parent, np) {
++ if (!of_property_read_u32(np, "clock-frequency", &freq))
++ max_freq = max(max_freq, freq);
++ }
++ of_node_put(parent);
++ }
++
++ if (max_freq) {
++ if (of_find_compatible_node(NULL, NULL, "arm,cortex-a8"))
++ shmobile_setup_delay(max_freq, 1, 3);
++ else if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
++ shmobile_setup_delay(max_freq, 1, 3);
++ else if (of_find_compatible_node(NULL, NULL, "arm,cortex-a15"))
++ if (!IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
++ shmobile_setup_delay(max_freq, 2, 4);
++ }
++}
++
+ static void __init shmobile_late_time_init(void)
+ {
+ /*
+--
+2.1.2
+
--- /dev/null
+From 0d5897cc9a1151617dc32b090b5d773c7317d20c Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 13 Feb 2014 17:26:08 +0900
+Subject: ARM: shmobile: Remove legacy EMEV2 SoC support
+
+Get rid of legacy EMEV2 SoC code including the legacy clock
+framework implementation. The multiplatform implementation
+together with DT board support shall be used instead.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 094c62c3313e1a1c7929a2f69c07ba3382c358e4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/Makefile | 3 +-
+ arch/arm/mach-shmobile/Kconfig | 10 --
+ arch/arm/mach-shmobile/Makefile | 1 -
+ arch/arm/mach-shmobile/clock-emev2.c | 231 ----------------------------
+ arch/arm/mach-shmobile/include/mach/emev2.h | 1 -
+ arch/arm/mach-shmobile/setup-emev2.c | 4 -
+ 6 files changed, 1 insertion(+), 249 deletions(-)
+ delete mode 100644 arch/arm/mach-shmobile/clock-emev2.c
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 032030361bef..41927cc4b0ee 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -244,8 +244,7 @@ dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
+ dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
+ dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \
+ s3c6410-smdk6410.dtb
+-dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
+- r7s72100-genmai.dtb \
++dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += r7s72100-genmai.dtb \
+ r7s72100-genmai-reference.dtb \
+ r8a7740-armadillo800eva.dtb \
+ r8a7778-bockw.dtb \
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index 232d1a051f07..d833fa4ea883 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -140,16 +140,6 @@ config ARCH_R8A7791
+ select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
+ select SYS_SUPPORTS_SH_CMT
+
+-config ARCH_EMEV2
+- bool "Emma Mobile EV2"
+- select ARCH_WANT_OPTIONAL_GPIOLIB
+- select ARM_GIC
+- select CPU_V7
+- select MIGHT_HAVE_PCI
+- select USE_OF
+- select AUTO_ZRELADDR
+- select SYS_SUPPORTS_EM_STI
+-
+ config ARCH_R7S72100
+ bool "RZ/A1H (R7S72100)"
+ select ARCH_WANT_OPTIONAL_GPIOLIB
+diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
+index 4caffc912a81..76053770aa04 100644
+--- a/arch/arm/mach-shmobile/Makefile
++++ b/arch/arm/mach-shmobile/Makefile
+@@ -31,7 +31,6 @@ obj-$(CONFIG_ARCH_R8A7778) += clock-r8a7778.o
+ obj-$(CONFIG_ARCH_R8A7779) += clock-r8a7779.o
+ obj-$(CONFIG_ARCH_R8A7790) += clock-r8a7790.o
+ obj-$(CONFIG_ARCH_R8A7791) += clock-r8a7791.o
+-obj-$(CONFIG_ARCH_EMEV2) += clock-emev2.o
+ obj-$(CONFIG_ARCH_R7S72100) += clock-r7s72100.o
+ endif
+
+diff --git a/arch/arm/mach-shmobile/clock-emev2.c b/arch/arm/mach-shmobile/clock-emev2.c
+deleted file mode 100644
+index 5ac13ba71d54..000000000000
+--- a/arch/arm/mach-shmobile/clock-emev2.c
++++ /dev/null
+@@ -1,231 +0,0 @@
+-/*
+- * Emma Mobile EV2 clock framework support
+- *
+- * Copyright (C) 2012 Magnus Damm
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; version 2 of the License.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+- */
+-#include <linux/init.h>
+-#include <linux/kernel.h>
+-#include <linux/io.h>
+-#include <linux/sh_clk.h>
+-#include <linux/clkdev.h>
+-#include <mach/common.h>
+-
+-#define EMEV2_SMU_BASE 0xe0110000
+-
+-/* EMEV2 SMU registers */
+-#define USIAU0_RSTCTRL 0x094
+-#define USIBU1_RSTCTRL 0x0ac
+-#define USIBU2_RSTCTRL 0x0b0
+-#define USIBU3_RSTCTRL 0x0b4
+-#define STI_RSTCTRL 0x124
+-#define USIAU0GCLKCTRL 0x4a0
+-#define USIBU1GCLKCTRL 0x4b8
+-#define USIBU2GCLKCTRL 0x4bc
+-#define USIBU3GCLKCTRL 0x04c0
+-#define STIGCLKCTRL 0x528
+-#define USIAU0SCLKDIV 0x61c
+-#define USIB2SCLKDIV 0x65c
+-#define USIB3SCLKDIV 0x660
+-#define STI_CLKSEL 0x688
+-
+-/* not pretty, but hey */
+-static void __iomem *smu_base;
+-
+-static void emev2_smu_write(unsigned long value, int offs)
+-{
+- BUG_ON(!smu_base || (offs >= PAGE_SIZE));
+- iowrite32(value, smu_base + offs);
+-}
+-
+-static struct clk_mapping smu_mapping = {
+- .phys = EMEV2_SMU_BASE,
+- .len = PAGE_SIZE,
+-};
+-
+-/* Fixed 32 KHz root clock from C32K pin */
+-static struct clk c32k_clk = {
+- .rate = 32768,
+- .mapping = &smu_mapping,
+-};
+-
+-/* PLL3 multiplies C32K with 7000 */
+-static unsigned long pll3_recalc(struct clk *clk)
+-{
+- return clk->parent->rate * 7000;
+-}
+-
+-static struct sh_clk_ops pll3_clk_ops = {
+- .recalc = pll3_recalc,
+-};
+-
+-static struct clk pll3_clk = {
+- .ops = &pll3_clk_ops,
+- .parent = &c32k_clk,
+-};
+-
+-static struct clk *main_clks[] = {
+- &c32k_clk,
+- &pll3_clk,
+-};
+-
+-enum { SCLKDIV_USIAU0, SCLKDIV_USIBU2, SCLKDIV_USIBU1, SCLKDIV_USIBU3,
+- SCLKDIV_NR };
+-
+-#define SCLKDIV(_reg, _shift) \
+-{ \
+- .parent = &pll3_clk, \
+- .enable_reg = IOMEM(EMEV2_SMU_BASE + (_reg)), \
+- .enable_bit = _shift, \
+-}
+-
+-static struct clk sclkdiv_clks[SCLKDIV_NR] = {
+- [SCLKDIV_USIAU0] = SCLKDIV(USIAU0SCLKDIV, 0),
+- [SCLKDIV_USIBU2] = SCLKDIV(USIB2SCLKDIV, 16),
+- [SCLKDIV_USIBU1] = SCLKDIV(USIB2SCLKDIV, 0),
+- [SCLKDIV_USIBU3] = SCLKDIV(USIB3SCLKDIV, 0),
+-};
+-
+-enum { GCLK_USIAU0_SCLK, GCLK_USIBU1_SCLK, GCLK_USIBU2_SCLK, GCLK_USIBU3_SCLK,
+- GCLK_STI_SCLK,
+- GCLK_NR };
+-
+-#define GCLK_SCLK(_parent, _reg) \
+-{ \
+- .parent = _parent, \
+- .enable_reg = IOMEM(EMEV2_SMU_BASE + (_reg)), \
+- .enable_bit = 1, /* SCLK_GCC */ \
+-}
+-
+-static struct clk gclk_clks[GCLK_NR] = {
+- [GCLK_USIAU0_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIAU0],
+- USIAU0GCLKCTRL),
+- [GCLK_USIBU1_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIBU1],
+- USIBU1GCLKCTRL),
+- [GCLK_USIBU2_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIBU2],
+- USIBU2GCLKCTRL),
+- [GCLK_USIBU3_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIBU3],
+- USIBU3GCLKCTRL),
+- [GCLK_STI_SCLK] = GCLK_SCLK(&c32k_clk, STIGCLKCTRL),
+-};
+-
+-static int emev2_gclk_enable(struct clk *clk)
+-{
+- iowrite32(ioread32(clk->mapped_reg) | (1 << clk->enable_bit),
+- clk->mapped_reg);
+- return 0;
+-}
+-
+-static void emev2_gclk_disable(struct clk *clk)
+-{
+- iowrite32(ioread32(clk->mapped_reg) & ~(1 << clk->enable_bit),
+- clk->mapped_reg);
+-}
+-
+-static struct sh_clk_ops emev2_gclk_clk_ops = {
+- .enable = emev2_gclk_enable,
+- .disable = emev2_gclk_disable,
+- .recalc = followparent_recalc,
+-};
+-
+-static int __init emev2_gclk_register(struct clk *clks, int nr)
+-{
+- struct clk *clkp;
+- int ret = 0;
+- int k;
+-
+- for (k = 0; !ret && (k < nr); k++) {
+- clkp = clks + k;
+- clkp->ops = &emev2_gclk_clk_ops;
+- ret |= clk_register(clkp);
+- }
+-
+- return ret;
+-}
+-
+-static unsigned long emev2_sclkdiv_recalc(struct clk *clk)
+-{
+- unsigned int sclk_div;
+-
+- sclk_div = (ioread32(clk->mapped_reg) >> clk->enable_bit) & 0xff;
+-
+- return clk->parent->rate / (sclk_div + 1);
+-}
+-
+-static struct sh_clk_ops emev2_sclkdiv_clk_ops = {
+- .recalc = emev2_sclkdiv_recalc,
+-};
+-
+-static int __init emev2_sclkdiv_register(struct clk *clks, int nr)
+-{
+- struct clk *clkp;
+- int ret = 0;
+- int k;
+-
+- for (k = 0; !ret && (k < nr); k++) {
+- clkp = clks + k;
+- clkp->ops = &emev2_sclkdiv_clk_ops;
+- ret |= clk_register(clkp);
+- }
+-
+- return ret;
+-}
+-
+-static struct clk_lookup lookups[] = {
+- CLKDEV_DEV_ID("serial8250-em.0", &gclk_clks[GCLK_USIAU0_SCLK]),
+- CLKDEV_DEV_ID("e1020000.uart", &gclk_clks[GCLK_USIAU0_SCLK]),
+- CLKDEV_DEV_ID("serial8250-em.1", &gclk_clks[GCLK_USIBU1_SCLK]),
+- CLKDEV_DEV_ID("e1030000.uart", &gclk_clks[GCLK_USIBU1_SCLK]),
+- CLKDEV_DEV_ID("serial8250-em.2", &gclk_clks[GCLK_USIBU2_SCLK]),
+- CLKDEV_DEV_ID("e1040000.uart", &gclk_clks[GCLK_USIBU2_SCLK]),
+- CLKDEV_DEV_ID("serial8250-em.3", &gclk_clks[GCLK_USIBU3_SCLK]),
+- CLKDEV_DEV_ID("e1050000.uart", &gclk_clks[GCLK_USIBU3_SCLK]),
+- CLKDEV_DEV_ID("em_sti.0", &gclk_clks[GCLK_STI_SCLK]),
+- CLKDEV_DEV_ID("e0180000.sti", &gclk_clks[GCLK_STI_SCLK]),
+-};
+-
+-void __init emev2_clock_init(void)
+-{
+- int k, ret = 0;
+-
+- smu_base = ioremap(EMEV2_SMU_BASE, PAGE_SIZE);
+- BUG_ON(!smu_base);
+-
+- /* setup STI timer to run on 32.768 kHz and deassert reset */
+- emev2_smu_write(0, STI_CLKSEL);
+- emev2_smu_write(1, STI_RSTCTRL);
+-
+- /* deassert reset for UART0->UART3 */
+- emev2_smu_write(2, USIAU0_RSTCTRL);
+- emev2_smu_write(2, USIBU1_RSTCTRL);
+- emev2_smu_write(2, USIBU2_RSTCTRL);
+- emev2_smu_write(2, USIBU3_RSTCTRL);
+-
+- for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
+- ret = clk_register(main_clks[k]);
+-
+- if (!ret)
+- ret = emev2_sclkdiv_register(sclkdiv_clks, SCLKDIV_NR);
+-
+- if (!ret)
+- ret = emev2_gclk_register(gclk_clks, GCLK_NR);
+-
+- clkdev_add_table(lookups, ARRAY_SIZE(lookups));
+-
+- if (!ret)
+- shmobile_clk_init();
+- else
+- panic("failed to setup emev2 clocks\n");
+-}
+diff --git a/arch/arm/mach-shmobile/include/mach/emev2.h b/arch/arm/mach-shmobile/include/mach/emev2.h
+index fcb142a14e07..d64e188a9755 100644
+--- a/arch/arm/mach-shmobile/include/mach/emev2.h
++++ b/arch/arm/mach-shmobile/include/mach/emev2.h
+@@ -3,7 +3,6 @@
+
+ extern void emev2_map_io(void);
+ extern void emev2_init_delay(void);
+-extern void emev2_clock_init(void);
+ extern struct smp_operations emev2_smp_ops;
+
+ #endif /* __ASM_EMEV2_H__ */
+diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
+index c71d667007b8..b15a0ed769fe 100644
+--- a/arch/arm/mach-shmobile/setup-emev2.c
++++ b/arch/arm/mach-shmobile/setup-emev2.c
+@@ -50,11 +50,7 @@ void __init emev2_init_delay(void)
+
+ static void __init emev2_add_standard_devices_dt(void)
+ {
+-#ifdef CONFIG_COMMON_CLK
+ of_clk_init(NULL);
+-#else
+- emev2_clock_init();
+-#endif
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ }
+
+--
+2.1.2
+
--- /dev/null
+From b0b0c5f518774d800fce4ae453adceba98556224 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Mon, 17 Feb 2014 16:35:08 +0900
+Subject: ARM: shmobile: Remove EMEV2 header file
+
+There is no C board code left for the EMEV2 SoC, so
+get rid of the emev2.h include file to save some lines.
+While at it make functions static.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+[horms+renesas@verge.net.au: Resolved conflict]
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+(cherry picked from commit 505891ec2558771cd84fe00fc1646275b4c069ed)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/include/mach/emev2.h | 8 --------
+ arch/arm/mach-shmobile/setup-emev2.c | 7 ++++---
+ arch/arm/mach-shmobile/smp-emev2.c | 1 -
+ 3 files changed, 4 insertions(+), 12 deletions(-)
+ delete mode 100644 arch/arm/mach-shmobile/include/mach/emev2.h
+
+diff --git a/arch/arm/mach-shmobile/include/mach/emev2.h b/arch/arm/mach-shmobile/include/mach/emev2.h
+deleted file mode 100644
+index d64e188a9755..000000000000
+--- a/arch/arm/mach-shmobile/include/mach/emev2.h
++++ /dev/null
+@@ -1,8 +0,0 @@
+-#ifndef __ASM_EMEV2_H__
+-#define __ASM_EMEV2_H__
+-
+-extern void emev2_map_io(void);
+-extern void emev2_init_delay(void);
+-extern struct smp_operations emev2_smp_ops;
+-
+-#endif /* __ASM_EMEV2_H__ */
+diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
+index b15a0ed769fe..d953ff6e78a2 100644
+--- a/arch/arm/mach-shmobile/setup-emev2.c
++++ b/arch/arm/mach-shmobile/setup-emev2.c
+@@ -21,7 +21,6 @@
+ #include <linux/init.h>
+ #include <linux/of_platform.h>
+ #include <mach/common.h>
+-#include <mach/emev2.h>
+ #include <asm/mach-types.h>
+ #include <asm/mach/arch.h>
+ #include <asm/mach/map.h>
+@@ -38,12 +37,12 @@ static struct map_desc emev2_io_desc[] __initdata = {
+ #endif
+ };
+
+-void __init emev2_map_io(void)
++static void __init emev2_map_io(void)
+ {
+ iotable_init(emev2_io_desc, ARRAY_SIZE(emev2_io_desc));
+ }
+
+-void __init emev2_init_delay(void)
++static void __init emev2_init_delay(void)
+ {
+ shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */
+ }
+@@ -59,6 +58,8 @@ static const char *emev2_boards_compat_dt[] __initconst = {
+ NULL,
+ };
+
++extern struct smp_operations emev2_smp_ops;
++
+ DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
+ .smp = smp_ops(emev2_smp_ops),
+ .map_io = emev2_map_io,
+diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
+index f2ca92308f75..2dfd748da7f3 100644
+--- a/arch/arm/mach-shmobile/smp-emev2.c
++++ b/arch/arm/mach-shmobile/smp-emev2.c
+@@ -24,7 +24,6 @@
+ #include <linux/io.h>
+ #include <linux/delay.h>
+ #include <mach/common.h>
+-#include <mach/emev2.h>
+ #include <asm/smp_plat.h>
+ #include <asm/smp_scu.h>
+
+--
+2.1.2
+
--- /dev/null
+From 79799ad71e9026269274b4121a62cdc947dd646f Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Mon, 24 Feb 2014 14:49:07 +0900
+Subject: ARM: shmobile: Make use of r8a7790_add_standard_devices()
+
+Move non-PFC and non-GPIO devices off from r8a7790_pinmux_init()
+and into r8a7790_add_standard_devices() which is the normal place
+to keep regular devices in the legacy case.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f05b4b52845a18e833644eb3a820a55e3278d2b4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7790.c | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
+index c4616f0698c6..a901d9ef53f6 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7790.c
++++ b/arch/arm/mach-shmobile/setup-r8a7790.c
+@@ -185,12 +185,6 @@ void __init r8a7790_pinmux_init(void)
+ r8a7790_register_gpio(3);
+ r8a7790_register_gpio(4);
+ r8a7790_register_gpio(5);
+- r8a7790_register_i2c(0);
+- r8a7790_register_i2c(1);
+- r8a7790_register_i2c(2);
+- r8a7790_register_i2c(3);
+- r8a7790_register_audio_dmac(0);
+- r8a7790_register_audio_dmac(1);
+ }
+
+ #define __R8A7790_SCIF(scif_type, _scscr, index, baseaddr, irq) \
+@@ -308,6 +302,12 @@ void __init r8a7790_add_standard_devices(void)
+ r8a7790_add_dt_devices();
+ r8a7790_register_irqc(0);
+ r8a7790_register_thermal();
++ r8a7790_register_i2c(0);
++ r8a7790_register_i2c(1);
++ r8a7790_register_i2c(2);
++ r8a7790_register_i2c(3);
++ r8a7790_register_audio_dmac(0);
++ r8a7790_register_audio_dmac(1);
+ }
+
+ void __init r8a7790_init_early(void)
+--
+2.1.2
+
--- /dev/null
+From 08dd877a443bdd0a95d9418b26f0a7a43c6cb63d Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Date: Wed, 12 Mar 2014 19:44:49 +0100
+Subject: ARM: shmobile: rcar-gen2: Cache Mode Monitor Register Value
+
+The MD pins are sampled at reset time, hence the read value will always be
+the same, and we can avoid the overhead of ioremapping the register on
+every read.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 835d737d664650d7f164a5b688271a424db4434c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-rcar-gen2.c | 16 ++++++++++------
+ 1 file changed, 10 insertions(+), 6 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
+index 10604480f325..542c5a47173f 100644
+--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
++++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
+@@ -30,12 +30,16 @@
+
+ u32 rcar_gen2_read_mode_pins(void)
+ {
+- void __iomem *modemr = ioremap_nocache(MODEMR, 4);
+- u32 mode;
+-
+- BUG_ON(!modemr);
+- mode = ioread32(modemr);
+- iounmap(modemr);
++ static u32 mode;
++ static bool mode_valid;
++
++ if (!mode_valid) {
++ void __iomem *modemr = ioremap_nocache(MODEMR, 4);
++ BUG_ON(!modemr);
++ mode = ioread32(modemr);
++ iounmap(modemr);
++ mode_valid = true;
++ }
+
+ return mode;
+ }
+--
+2.1.2
+
--- /dev/null
+From 3b637e2f9160e1fea82f7e22f8ac2c2c3a64d8c1 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Wed, 26 Feb 2014 18:59:16 +0900
+Subject: ARM: shmobile: Check r8a7791 MD21 at SMP boot
+
+On r8a7791 the hardware boot mode bit MD21 indicates if hardware
+debug mode is enabled or not. In case hardware debug mode is enabled
+print a warning and refrain from booting secondary CPU cores.
+
+Without this patch Koelsch with SW8-4 set to OFF will hang at SMP boot.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Tested-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 277efd30cfc72ec2f44a9bc95d93807b867bd9e9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/smp-r8a7791.c | 15 ++++++++++++++-
+ 1 file changed, 14 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c
+index 2df5bd190fe4..ec979529f30f 100644
+--- a/arch/arm/mach-shmobile/smp-r8a7791.c
++++ b/arch/arm/mach-shmobile/smp-r8a7791.c
+@@ -20,6 +20,7 @@
+ #include <asm/smp_plat.h>
+ #include <mach/common.h>
+ #include <mach/r8a7791.h>
++#include <mach/rcar-gen2.h>
+
+ #define RST 0xe6160000
+ #define CA15BAR 0x0020
+@@ -51,9 +52,21 @@ static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus)
+ iounmap(p);
+ }
+
++static int r8a7791_smp_boot_secondary(unsigned int cpu,
++ struct task_struct *idle)
++{
++ /* Error out when hardware debug mode is enabled */
++ if (rcar_gen2_read_mode_pins() & BIT(21)) {
++ pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
++ return -ENOTSUPP;
++ }
++
++ return shmobile_smp_apmu_boot_secondary(cpu, idle);
++}
++
+ struct smp_operations r8a7791_smp_ops __initdata = {
+ .smp_prepare_cpus = r8a7791_smp_prepare_cpus,
+- .smp_boot_secondary = shmobile_smp_apmu_boot_secondary,
++ .smp_boot_secondary = r8a7791_smp_boot_secondary,
+ #ifdef CONFIG_HOTPLUG_CPU
+ .cpu_disable = shmobile_smp_cpu_disable,
+ .cpu_die = shmobile_smp_apmu_cpu_die,
+--
+2.1.2
+
--- /dev/null
+From 04e83252db26ec9123e3a2f9095d0c8f066ccf85 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Date: Sun, 23 Mar 2014 20:36:18 +0100
+Subject: ARM: shmobile: r8a7778/bockw: Move "select RENESAS_INTC_IRQPIN" under
+ SoC
+
+Move the "select RENESAS_INTC_IRQPIN" from the two bockw-specific sections
+to the one r8a7778-specific section, like is done for the other SoCs.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+[horms+renesas@verge.net.au: Resolved conflict]
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+(cherry picked from commit e35db38d66d1e4007cfc1bb90a05e11b4aaee2a8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/Kconfig | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index d833fa4ea883..d19a06899e10 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -108,6 +108,7 @@ config ARCH_R8A7778
+ select SH_CLK_CPG
+ select ARM_GIC
+ select SYS_SUPPORTS_SH_TMU
++ select RENESAS_INTC_IRQPIN
+
+ config ARCH_R8A7779
+ bool "R-Car H1 (R8A77790)"
+@@ -206,7 +207,6 @@ config MACH_BOCKW
+ depends on ARCH_R8A7778
+ select ARCH_REQUIRE_GPIOLIB
+ select REGULATOR_FIXED_VOLTAGE if REGULATOR
+- select RENESAS_INTC_IRQPIN
+ select SND_SOC_AK4554 if SND_SIMPLE_CARD
+ select SND_SOC_AK4642 if SND_SIMPLE_CARD
+ select USE_OF
+@@ -215,7 +215,6 @@ config MACH_BOCKW_REFERENCE
+ bool "BOCK-W - Reference Device Tree Implementation"
+ depends on ARCH_R8A7778
+ select ARCH_REQUIRE_GPIOLIB
+- select RENESAS_INTC_IRQPIN
+ select REGULATOR_FIXED_VOLTAGE if REGULATOR
+ select USE_OF
+ ---help---
+--
+2.1.2
+
--- /dev/null
+From 5b1d7957b9a17a33a353897be2d9269395c6ad53 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Date: Wed, 12 Mar 2014 19:44:50 +0100
+Subject: ARM: shmobile: r8a7791: Use rcar_gen2_read_mode_pins() helper
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit edcf139081f501b1468ae6665217e8320d4c75e8)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7791.c | 11 ++---------
+ 1 file changed, 2 insertions(+), 9 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
+index 701383fe3267..36e57508d879 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7791.c
++++ b/arch/arm/mach-shmobile/clock-r8a7791.c
+@@ -25,6 +25,7 @@
+ #include <linux/clkdev.h>
+ #include <mach/clock.h>
+ #include <mach/common.h>
++#include <mach/rcar-gen2.h>
+
+ /*
+ * MD EXTAL PLL0 PLL1 PLL3
+@@ -43,8 +44,6 @@
+ * see "p1 / 2" on R8A7791_CLOCK_ROOT() below
+ */
+
+-#define MD(nr) (1 << nr)
+-
+ #define CPG_BASE 0xe6150000
+ #define CPG_LEN 0x1000
+
+@@ -68,7 +67,6 @@
+ #define MSTPSR9 IOMEM(0xe61509a4)
+ #define MSTPSR11 IOMEM(0xe61509ac)
+
+-#define MODEMR 0xE6160060
+ #define SDCKCR 0xE6150074
+ #define SD1CKCR 0xE6150078
+ #define SD2CKCR 0xE615026c
+@@ -295,14 +293,9 @@ static struct clk_lookup lookups[] = {
+
+ void __init r8a7791_clock_init(void)
+ {
+- void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE);
+- u32 mode;
++ u32 mode = rcar_gen2_read_mode_pins();
+ int k, ret = 0;
+
+- BUG_ON(!modemr);
+- mode = ioread32(modemr);
+- iounmap(modemr);
+-
+ switch (mode & (MD(14) | MD(13))) {
+ case 0:
+ R8A7791_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88);
+--
+2.1.2
+
--- /dev/null
+From cd4289779ab941fc8096ac9e8980eb6197b8b310 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 13 Mar 2014 08:36:17 +0900
+Subject: ARM: shmobile: Introduce shmobile_clk_workaround()
+
+Introduce a new clock workaround function used by DT reference
+code on the mach-shmobile subarchitecture. The new function
+shmobile_clk_workaround() is used to configure clkdev to
+allow DT and platform devices to coexist. It is possible for
+the DT reference board code to also request enabling of the clock
+in case the driver does not implement clock control.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+[horms+renesas@verge.net.au: Removed trailing blank line]
+Reviewed-by: Wolfram Sang <wsa@sang-engineering.com>
+Tested-by: Wolfram Sang <wsa@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+(cherry picked from commit 25f5550f5a4b18fd77a2e719ba63cb34931ab66a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/Makefile | 2 +-
+ arch/arm/mach-shmobile/clock.c | 28 ++++++++++++++++++++++++++++
+ arch/arm/mach-shmobile/include/mach/clock.h | 16 ++++++++++++++++
+ 3 files changed, 45 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
+index 76053770aa04..9c5cd8c53a85 100644
+--- a/arch/arm/mach-shmobile/Makefile
++++ b/arch/arm/mach-shmobile/Makefile
+@@ -21,8 +21,8 @@ obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o
+ obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o
+
+ # Clock objects
+-ifndef CONFIG_COMMON_CLK
+ obj-y += clock.o
++ifndef CONFIG_COMMON_CLK
+ obj-$(CONFIG_ARCH_SH7372) += clock-sh7372.o
+ obj-$(CONFIG_ARCH_SH73A0) += clock-sh73a0.o
+ obj-$(CONFIG_ARCH_R8A73A4) += clock-r8a73a4.o
+diff --git a/arch/arm/mach-shmobile/clock.c b/arch/arm/mach-shmobile/clock.c
+index ad7df629d995..e7232a0373b9 100644
+--- a/arch/arm/mach-shmobile/clock.c
++++ b/arch/arm/mach-shmobile/clock.c
+@@ -21,6 +21,32 @@
+ */
+ #include <linux/kernel.h>
+ #include <linux/init.h>
++
++#ifdef CONFIG_COMMON_CLK
++#include <linux/clk.h>
++#include <linux/clkdev.h>
++#include <mach/clock.h>
++
++void __init shmobile_clk_workaround(const struct clk_name *clks,
++ int nr_clks, bool enable)
++{
++ const struct clk_name *clkn;
++ struct clk *clk;
++ unsigned int i;
++
++ for (i = 0; i < nr_clks; ++i) {
++ clkn = clks + i;
++ clk = clk_get(NULL, clkn->clk);
++ if (!IS_ERR(clk)) {
++ clk_register_clkdev(clk, clkn->con_id, clkn->dev_id);
++ if (enable)
++ clk_prepare_enable(clk);
++ clk_put(clk);
++ }
++ }
++}
++
++#else /* CONFIG_COMMON_CLK */
+ #include <linux/sh_clk.h>
+ #include <linux/export.h>
+ #include <mach/clock.h>
+@@ -58,3 +84,5 @@ void __clk_put(struct clk *clk)
+ {
+ }
+ EXPORT_SYMBOL(__clk_put);
++
++#endif /* CONFIG_COMMON_CLK */
+diff --git a/arch/arm/mach-shmobile/include/mach/clock.h b/arch/arm/mach-shmobile/include/mach/clock.h
+index 03e56074928c..9a93cf924b9c 100644
+--- a/arch/arm/mach-shmobile/include/mach/clock.h
++++ b/arch/arm/mach-shmobile/include/mach/clock.h
+@@ -1,6 +1,21 @@
+ #ifndef CLOCK_H
+ #define CLOCK_H
+
++#ifdef CONFIG_COMMON_CLK
++/* temporary clock configuration helper for platform devices */
++
++struct clk_name {
++ const char *clk;
++ const char *con_id;
++ const char *dev_id;
++};
++
++void shmobile_clk_workaround(const struct clk_name *clks, int nr_clks,
++ bool enable);
++
++#else /* CONFIG_COMMON_CLK */
++/* legacy clock implementation */
++
+ unsigned long shmobile_fixed_ratio_clk_recalc(struct clk *clk);
+ extern struct sh_clk_ops shmobile_fixed_ratio_clk_ops;
+
+@@ -36,4 +51,5 @@ do { \
+ (p)->div = d; \
+ } while (0)
+
++#endif /* CONFIG_COMMON_CLK */
+ #endif
+--
+2.1.2
+
--- /dev/null
+From 97d838953cdd297f8048e059d53dfc1051169db3 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 1 Apr 2014 13:02:15 +0200
+Subject: ARM: shmobile: r8a7790: Fix the I2C clocks parents in legacy code
+
+All I2C clocks derive from the HP clock, not from the P clock. Fix them.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Reviewed-by: Wolfram Sang <wsa@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ab077bfdc4eaffa5328a9843d4d7970718ac0b8a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7790.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
+index 3f93503f5b96..331013995fe3 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7790.c
++++ b/arch/arm/mach-shmobile/clock-r8a7790.c
+@@ -249,10 +249,10 @@ static struct clk mstp_clks[MSTP_NR] = {
+ [MSTP1007] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 7, MSTPSR10, 0), /* SSI8 */
+ [MSTP1006] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 6, MSTPSR10, 0), /* SSI9 */
+ [MSTP1005] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 5, MSTPSR10, 0), /* SSI ALL */
+- [MSTP931] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */
+- [MSTP930] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */
+- [MSTP929] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */
+- [MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
++ [MSTP931] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */
++ [MSTP930] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */
++ [MSTP929] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */
++ [MSTP928] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
+ [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */
+ [MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */
+ [MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */
+--
+2.1.2
+
--- /dev/null
+From 14ab2a6cafeb1995d310fd8f9aaa9f4ee7946b7d Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 1 Apr 2014 13:02:16 +0200
+Subject: ARM: shmobile: r8a7791: Fix the I2C clocks parents in legacy code
+
+All I2C clocks derive from the HP clock, not from the P clock. Fix them.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Reviewed-by: Wolfram Sang <wsa@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 2b1b6e6865aeb236f759ad3f91db27b514e29023)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7791.c | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
+index 36e57508d879..3b26c7eee873 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7791.c
++++ b/arch/arm/mach-shmobile/clock-r8a7791.c
+@@ -188,12 +188,12 @@ static struct clk mstp_clks[MSTP_NR] = {
+ [MSTP1108] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 8, MSTPSR11, 0), /* SCIFA5 */
+ [MSTP1107] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 7, MSTPSR11, 0), /* SCIFA4 */
+ [MSTP1106] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 6, MSTPSR11, 0), /* SCIFA3 */
+- [MSTP931] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */
+- [MSTP930] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */
+- [MSTP929] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */
+- [MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
+- [MSTP927] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 27, MSTPSR9, 0), /* I2C4 */
+- [MSTP925] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 25, MSTPSR9, 0), /* I2C5 */
++ [MSTP931] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */
++ [MSTP930] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */
++ [MSTP929] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */
++ [MSTP928] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
++ [MSTP927] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 27, MSTPSR9, 0), /* I2C4 */
++ [MSTP925] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 25, MSTPSR9, 0), /* I2C5 */
+ [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */
+ [MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */
+ [MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */
+--
+2.1.2
+
--- /dev/null
+From cf84c64cd8b8f4fe4c6cb0abe4b4e96765b81a32 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 13 Mar 2014 08:36:26 +0900
+Subject: ARM: shmobile: Use shmobile_clk_workaround() on Lager
+
+Convert the Lager DT reference code to use the newly introduced
+function shmobile_clk_workaround().
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e6597e0e19bbabfdd1983dbe79892d8ba210a180)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-lager-reference.c | 65 ++++++++++----------------
+ 1 file changed, 25 insertions(+), 40 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
+index 440aac36d693..c76248b9a5e7 100644
+--- a/arch/arm/mach-shmobile/board-lager-reference.c
++++ b/arch/arm/mach-shmobile/board-lager-reference.c
+@@ -18,12 +18,11 @@
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+-#include <linux/clk.h>
+-#include <linux/clkdev.h>
+ #include <linux/dma-mapping.h>
+ #include <linux/init.h>
+ #include <linux/of_platform.h>
+ #include <linux/platform_data/rcar-du.h>
++#include <mach/clock.h>
+ #include <mach/common.h>
+ #include <mach/irqs.h>
+ #include <mach/rcar-gen2.h>
+@@ -86,46 +85,32 @@ static void __init lager_add_du_device(void)
+ platform_device_register_full(&info);
+ }
+
++/*
++ * This is a really crude hack to provide clkdev support to platform
++ * devices until they get moved to DT.
++ */
++static const struct clk_name clk_names[] = {
++ { "cmt0", NULL, "sh_cmt.0" },
++ { "scifa0", NULL, "sh-sci.0" },
++ { "scifa1", NULL, "sh-sci.1" },
++ { "scifb0", NULL, "sh-sci.2" },
++ { "scifb1", NULL, "sh-sci.3" },
++ { "scifb2", NULL, "sh-sci.4" },
++ { "scifa2", NULL, "sh-sci.5" },
++ { "scif0", NULL, "sh-sci.6" },
++ { "scif1", NULL, "sh-sci.7" },
++ { "hscif0", NULL, "sh-sci.8" },
++ { "hscif1", NULL, "sh-sci.9" },
++ { "du0", "du.0", "rcar-du-r8a7790" },
++ { "du1", "du.1", "rcar-du-r8a7790" },
++ { "du2", "du.2", "rcar-du-r8a7790" },
++ { "lvds0", "lvds.0", "rcar-du-r8a7790" },
++ { "lvds1", "lvds.1", "rcar-du-r8a7790" },
++};
++
+ static void __init lager_add_standard_devices(void)
+ {
+- /*
+- * This is a really crude hack to provide clkdev support to platform
+- * devices until they get moved to DT.
+- */
+- static const struct clk_name {
+- const char *clk;
+- const char *con_id;
+- const char *dev_id;
+- } clk_names[] = {
+- { "cmt0", NULL, "sh_cmt.0" },
+- { "scifa0", NULL, "sh-sci.0" },
+- { "scifa1", NULL, "sh-sci.1" },
+- { "scifb0", NULL, "sh-sci.2" },
+- { "scifb1", NULL, "sh-sci.3" },
+- { "scifb2", NULL, "sh-sci.4" },
+- { "scifa2", NULL, "sh-sci.5" },
+- { "scif0", NULL, "sh-sci.6" },
+- { "scif1", NULL, "sh-sci.7" },
+- { "hscif0", NULL, "sh-sci.8" },
+- { "hscif1", NULL, "sh-sci.9" },
+- { "du0", "du.0", "rcar-du-r8a7790" },
+- { "du1", "du.1", "rcar-du-r8a7790" },
+- { "du2", "du.2", "rcar-du-r8a7790" },
+- { "lvds0", "lvds.0", "rcar-du-r8a7790" },
+- { "lvds1", "lvds.1", "rcar-du-r8a7790" },
+- };
+- struct clk *clk;
+- unsigned int i;
+-
+- for (i = 0; i < ARRAY_SIZE(clk_names); ++i) {
+- clk = clk_get(NULL, clk_names[i].clk);
+- if (!IS_ERR(clk)) {
+- clk_register_clkdev(clk, clk_names[i].con_id,
+- clk_names[i].dev_id);
+- clk_put(clk);
+- }
+- }
+-
++ shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), false);
+ r8a7790_add_dt_devices();
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+
+--
+2.1.2
+
--- /dev/null
+From 303e7edecd5a9fa10a4b1403617dadb4ffe81871 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 13 Mar 2014 08:36:35 +0900
+Subject: ARM: shmobile: Use shmobile_clk_workaround() on Koelsch
+
+Convert the Koelsch DT reference code to use the newly introduced
+function shmobile_clk_workaround().
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 89aff406dbc3ea3dfc008e8472181532c0c0f4ea)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-koelsch-reference.c | 71 ++++++++++--------------
+ 1 file changed, 28 insertions(+), 43 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
+index a3fd30242bd8..a760f7f19bc9 100644
+--- a/arch/arm/mach-shmobile/board-koelsch-reference.c
++++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
+@@ -19,12 +19,11 @@
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+-#include <linux/clk.h>
+-#include <linux/clkdev.h>
+ #include <linux/dma-mapping.h>
+ #include <linux/kernel.h>
+ #include <linux/of_platform.h>
+ #include <linux/platform_data/rcar-du.h>
++#include <mach/clock.h>
+ #include <mach/common.h>
+ #include <mach/irqs.h>
+ #include <mach/rcar-gen2.h>
+@@ -82,49 +81,35 @@ static void __init koelsch_add_du_device(void)
+ platform_device_register_full(&info);
+ }
+
++/*
++ * This is a really crude hack to provide clkdev support to platform
++ * devices until they get moved to DT.
++ */
++static const struct clk_name clk_names[] = {
++ { "cmt0", NULL, "sh_cmt.0" },
++ { "scifa0", NULL, "sh-sci.0" },
++ { "scifa1", NULL, "sh-sci.1" },
++ { "scifb0", NULL, "sh-sci.2" },
++ { "scifb1", NULL, "sh-sci.3" },
++ { "scifb2", NULL, "sh-sci.4" },
++ { "scifa2", NULL, "sh-sci.5" },
++ { "scif0", NULL, "sh-sci.6" },
++ { "scif1", NULL, "sh-sci.7" },
++ { "scif2", NULL, "sh-sci.8" },
++ { "scif3", NULL, "sh-sci.9" },
++ { "scif4", NULL, "sh-sci.10" },
++ { "scif5", NULL, "sh-sci.11" },
++ { "scifa3", NULL, "sh-sci.12" },
++ { "scifa4", NULL, "sh-sci.13" },
++ { "scifa5", NULL, "sh-sci.14" },
++ { "du0", "du.0", "rcar-du-r8a7791" },
++ { "du1", "du.1", "rcar-du-r8a7791" },
++ { "lvds0", "lvds.0", "rcar-du-r8a7791" },
++};
++
+ static void __init koelsch_add_standard_devices(void)
+ {
+- /*
+- * This is a really crude hack to provide clkdev support to the CMT and
+- * DU devices until they get moved to DT.
+- */
+- static const struct clk_name {
+- const char *clk;
+- const char *con_id;
+- const char *dev_id;
+- } clk_names[] = {
+- { "cmt0", NULL, "sh_cmt.0" },
+- { "scifa0", NULL, "sh-sci.0" },
+- { "scifa1", NULL, "sh-sci.1" },
+- { "scifb0", NULL, "sh-sci.2" },
+- { "scifb1", NULL, "sh-sci.3" },
+- { "scifb2", NULL, "sh-sci.4" },
+- { "scifa2", NULL, "sh-sci.5" },
+- { "scif0", NULL, "sh-sci.6" },
+- { "scif1", NULL, "sh-sci.7" },
+- { "scif2", NULL, "sh-sci.8" },
+- { "scif3", NULL, "sh-sci.9" },
+- { "scif4", NULL, "sh-sci.10" },
+- { "scif5", NULL, "sh-sci.11" },
+- { "scifa3", NULL, "sh-sci.12" },
+- { "scifa4", NULL, "sh-sci.13" },
+- { "scifa5", NULL, "sh-sci.14" },
+- { "du0", "du.0", "rcar-du-r8a7791" },
+- { "du1", "du.1", "rcar-du-r8a7791" },
+- { "lvds0", "lvds.0", "rcar-du-r8a7791" },
+- };
+- struct clk *clk;
+- unsigned int i;
+-
+- for (i = 0; i < ARRAY_SIZE(clk_names); ++i) {
+- clk = clk_get(NULL, clk_names[i].clk);
+- if (!IS_ERR(clk)) {
+- clk_register_clkdev(clk, clk_names[i].con_id,
+- clk_names[i].dev_id);
+- clk_put(clk);
+- }
+- }
+-
++ shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), false);
+ r8a7791_add_dt_devices();
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+
+--
+2.1.2
+
--- /dev/null
+From 38e079066bd999d1f3e635a634015635a6c93352 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 13 Mar 2014 15:29:57 +0900
+Subject: ARM: shmobile: koelsch: Annotate clk_names with __initconst
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+(cherry picked from commit f6f98b3e44ea408e33eb4d695a4225cc11210cdb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-koelsch-reference.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
+index a760f7f19bc9..1e6a4361c0eb 100644
+--- a/arch/arm/mach-shmobile/board-koelsch-reference.c
++++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
+@@ -85,7 +85,7 @@ static void __init koelsch_add_du_device(void)
+ * This is a really crude hack to provide clkdev support to platform
+ * devices until they get moved to DT.
+ */
+-static const struct clk_name clk_names[] = {
++static const struct clk_name clk_names[] __initconst = {
+ { "cmt0", NULL, "sh_cmt.0" },
+ { "scifa0", NULL, "sh-sci.0" },
+ { "scifa1", NULL, "sh-sci.1" },
+--
+2.1.2
+
--- /dev/null
+From 086c161a27f44aea534a5c520b500600eeff28fe Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Thu, 13 Mar 2014 15:29:58 +0900
+Subject: ARM: shmobile: lager: Annotate clk_names with __initconst
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+(cherry picked from commit f71c77286b2c1f809a85e8e42df88eb2ec132e5f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-lager-reference.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
+index c76248b9a5e7..7ff395efa9fe 100644
+--- a/arch/arm/mach-shmobile/board-lager-reference.c
++++ b/arch/arm/mach-shmobile/board-lager-reference.c
+@@ -89,7 +89,7 @@ static void __init lager_add_du_device(void)
+ * This is a really crude hack to provide clkdev support to platform
+ * devices until they get moved to DT.
+ */
+-static const struct clk_name clk_names[] = {
++static const struct clk_name clk_names[] __initconst = {
+ { "cmt0", NULL, "sh_cmt.0" },
+ { "scifa0", NULL, "sh-sci.0" },
+ { "scifa1", NULL, "sh-sci.1" },
+--
+2.1.2
+
--- /dev/null
+From 2a2218cdcfb37763d12218f2e92231bb608c34d5 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Date: Thu, 13 Mar 2014 15:29:30 +0100
+Subject: ARM: shmobile: koelsch-reference: Work around core clock issues
+
+Due to issues with runtime PM clock management, clocks not explicitly
+managed by their drivers may not be enabled at all, or be inadvertently
+disabled by the clk_disable_unused() late initcall.
+
+Until this is fixed, add a temporary workaround, calling
+shmobile_clk_workaround() with enable == true.
+
+For now this enables the clocks for: ether, i2c2, msiof0, qspi_mod, and
+thermal. More clocks can be added if needed.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 53cf0cf7ba2ef785b339826a0765bb6b1756adeb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-koelsch-reference.c | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
+index 1e6a4361c0eb..a39114a1fe1b 100644
+--- a/arch/arm/mach-shmobile/board-koelsch-reference.c
++++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
+@@ -107,9 +107,21 @@ static const struct clk_name clk_names[] __initconst = {
+ { "lvds0", "lvds.0", "rcar-du-r8a7791" },
+ };
+
++/*
++ * This is a really crude hack to work around core platform clock issues
++ */
++static const struct clk_name clk_enables[] = {
++ { "ether", NULL, "ee700000.ethernet" },
++ { "i2c2", NULL, "e6530000.i2c" },
++ { "msiof0", NULL, "e6e20000.spi" },
++ { "qspi_mod", NULL, "e6b10000.spi" },
++ { "thermal", NULL, "e61f0000.thermal" },
++};
++
+ static void __init koelsch_add_standard_devices(void)
+ {
+ shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), false);
++ shmobile_clk_workaround(clk_enables, ARRAY_SIZE(clk_enables), true);
+ r8a7791_add_dt_devices();
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+
+--
+2.1.2
+
--- /dev/null
+From 2d8eeff7a5cca9d2575c8427a8bc0827fca69e04 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Mon, 17 Mar 2014 11:19:56 +0900
+Subject: ARM: shmobile: koelsch-reference: Annotate clk_enables as __initconst
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+(cherry picked from commit 9e7b83c221cc257f4dc37acc82bbcb80627c0ab9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-koelsch-reference.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
+index a39114a1fe1b..63117d52db9e 100644
+--- a/arch/arm/mach-shmobile/board-koelsch-reference.c
++++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
+@@ -110,7 +110,7 @@ static const struct clk_name clk_names[] __initconst = {
+ /*
+ * This is a really crude hack to work around core platform clock issues
+ */
+-static const struct clk_name clk_enables[] = {
++static const struct clk_name clk_enables[] __initconst = {
+ { "ether", NULL, "ee700000.ethernet" },
+ { "i2c2", NULL, "e6530000.i2c" },
+ { "msiof0", NULL, "e6e20000.spi" },
+--
+2.1.2
+
--- /dev/null
+From a1040eac2c64d7823413beab41c24239f838f3bf Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Mon, 17 Mar 2014 11:18:56 +0900
+Subject: ARM: shmobile: lager-reference: Work around core clock issues
+
+Due to issues with runtime PM clock management, clocks not explicitly
+managed by their drivers may not be enabled at all, or be inadvertently
+disabled by the clk_disable_unused() late initcall.
+
+Until this is fixed, add a temporary workaround, calling
+shmobile_clk_workaround() with enable == true.
+
+For now this enables the clocks for: ether, msiof1, qspi_mod, and
+thermal. More clocks can be added if needed.
+
+Based on work for the koelsch board by Geert Uytterhoeven.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Acked-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+(cherry picked from commit aa5de826afe747c353162bbc116c63ab5335f91c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-lager-reference.c | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
+index 7ff395efa9fe..313118c5f365 100644
+--- a/arch/arm/mach-shmobile/board-lager-reference.c
++++ b/arch/arm/mach-shmobile/board-lager-reference.c
+@@ -108,9 +108,20 @@ static const struct clk_name clk_names[] __initconst = {
+ { "lvds1", "lvds.1", "rcar-du-r8a7790" },
+ };
+
++/*
++ * This is a really crude hack to work around core platform clock issues
++ */
++static const struct clk_name clk_enables[] __initconst = {
++ { "ether", NULL, "ee700000.ethernet" },
++ { "msiof1", NULL, "e6e10000.spi" },
++ { "qspi_mod", NULL, "e6b10000.spi" },
++ { "thermal", NULL, "e61f0000.thermal" },
++};
++
+ static void __init lager_add_standard_devices(void)
+ {
+ shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), false);
++ shmobile_clk_workaround(clk_enables, ARRAY_SIZE(clk_enables), true);
+ r8a7790_add_dt_devices();
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+
+--
+2.1.2
+
--- /dev/null
+From 066d349294d0dd7ff5feb2f0195ca5974681fe50 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Tue, 18 Mar 2014 21:52:47 +0900
+Subject: ARM: shmobile: Add Lager clock workarounds for SDHI and MMCIF
+
+Add MMCIF1, SDHI0 and SDHI2 to the clock workaround list for
+Lager multiplatform. Without these additional lines wakeup
+from Suspend-to-RAM never happens.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f98b55d730492e664fb2649bd7054fec0fe81acd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-lager-reference.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
+index 313118c5f365..1eb48cffb4c5 100644
+--- a/arch/arm/mach-shmobile/board-lager-reference.c
++++ b/arch/arm/mach-shmobile/board-lager-reference.c
+@@ -114,7 +114,10 @@ static const struct clk_name clk_names[] __initconst = {
+ static const struct clk_name clk_enables[] __initconst = {
+ { "ether", NULL, "ee700000.ethernet" },
+ { "msiof1", NULL, "e6e10000.spi" },
++ { "mmcif1", NULL, "ee220000.mmc" },
+ { "qspi_mod", NULL, "e6b10000.spi" },
++ { "sdhi0", NULL, "ee100000.sd" },
++ { "sdhi2", NULL, "ee140000.sd" },
+ { "thermal", NULL, "e61f0000.thermal" },
+ };
+
+--
+2.1.2
+
--- /dev/null
+From 3c00fef7b5e720b3be998f4a95e2ee6645d024c4 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Tue, 18 Mar 2014 21:54:34 +0900
+Subject: ARM: shmobile: Add Koelsch clock workarounds for SDHI
+
+Add SDHI0, SDHI1 and SDHI2 to the clock workaround list for
+Koelsch multiplatform. Without these additional lines wakeup
+from Suspend-to-RAM never happens.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f278ea78beeb17ea07d11fc3372d4f98c94dcf46)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-koelsch-reference.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
+index 63117d52db9e..941f8b394e84 100644
+--- a/arch/arm/mach-shmobile/board-koelsch-reference.c
++++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
+@@ -115,6 +115,9 @@ static const struct clk_name clk_enables[] __initconst = {
+ { "i2c2", NULL, "e6530000.i2c" },
+ { "msiof0", NULL, "e6e20000.spi" },
+ { "qspi_mod", NULL, "e6b10000.spi" },
++ { "sdhi0", NULL, "ee100000.sd" },
++ { "sdhi1", NULL, "ee140000.sd" },
++ { "sdhi2", NULL, "ee160000.sd" },
+ { "thermal", NULL, "e61f0000.thermal" },
+ };
+
+--
+2.1.2
+
--- /dev/null
+From 94fd20cbf23bf6ba7cd664926435027e28a726e1 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Thu, 6 Mar 2014 12:15:36 +0900
+Subject: ARM: shmobile: Update r8a7791 CPU freq to 1500MHz in DTS
+
+The correct maximum CPU frequency for r8a7791 is 1500 MHz
+so update the r8a7791 SoC DTS to reflect this.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 896b79df8d60c01d46be23c10cc0f1a6691cc588)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index 52346051f6f9..4c720d13673e 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -37,14 +37,14 @@
+ device_type = "cpu";
+ compatible = "arm,cortex-a15";
+ reg = <0>;
+- clock-frequency = <1300000000>;
++ clock-frequency = <1500000000>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a15";
+ reg = <1>;
+- clock-frequency = <1300000000>;
++ clock-frequency = <1500000000>;
+ };
+ };
+
+--
+2.1.2
+
--- /dev/null
+From 4769132ac322d3e50e6c9b52348a97b9aab03ed2 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Date: Tue, 25 Feb 2014 11:30:13 +0100
+Subject: ARM: shmobile: r8a7790/lager dts: Rename label spi to qspi, add spi0
+ alias
+
+Prepare for the advent of MSIOF SPI, which will be spi1 to spi4.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit fad6d45cdf8269d6d1c6784792c74c53e2304b32)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790-lager.dts | 4 ++--
+ arch/arm/boot/dts/r8a7790.dtsi | 3 ++-
+ 2 files changed, 4 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
+index d01048ab3e77..46c263c80438 100644
+--- a/arch/arm/boot/dts/r8a7790-lager.dts
++++ b/arch/arm/boot/dts/r8a7790-lager.dts
+@@ -155,7 +155,7 @@
+ renesas,function = "mmc1";
+ };
+
+- qspi_pins: spi {
++ qspi_pins: spi0 {
+ renesas,groups = "qspi_ctrl", "qspi_data4";
+ renesas,function = "qspi";
+ };
+@@ -190,7 +190,7 @@
+ status = "okay";
+ };
+
+-&spi {
++&qspi {
+ pinctrl-0 = <&qspi_pins>;
+ pinctrl-names = "default";
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index 10b326bdf831..dc72302ab6a4 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -24,6 +24,7 @@
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
++ spi0 = &qspi;
+ };
+
+ cpus {
+@@ -765,7 +766,7 @@
+ };
+ };
+
+- spi: spi@e6b10000 {
++ qspi: spi@e6b10000 {
+ compatible = "renesas,qspi-r8a7790", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
+--
+2.1.2
+
--- /dev/null
+From c280825bf02c3828884231e8fd5d9709c2ba3688 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Date: Tue, 25 Feb 2014 11:30:14 +0100
+Subject: ARM: shmobile: r8a7791/koelsch dts: Rename label spi to qspi, add
+ spi0 alias
+
+Prepare for the advent of MSIOF SPI, which will be spi1 to spi3.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6f3e4ee340ea11d9aba39c5beaa80f0d3f368428)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-koelsch.dts | 4 ++--
+ arch/arm/boot/dts/r8a7791.dtsi | 3 ++-
+ 2 files changed, 4 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
+index de1b6977c69a..5558cc19c1b0 100644
+--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
+@@ -244,7 +244,7 @@
+ renesas,function = "sdhi2";
+ };
+
+- qspi_pins: spi {
++ qspi_pins: spi0 {
+ renesas,groups = "qspi_ctrl", "qspi_data4";
+ renesas,function = "qspi";
+ };
+@@ -301,7 +301,7 @@
+ status = "okay";
+ };
+
+-&spi {
++&qspi {
+ pinctrl-0 = <&qspi_pins>;
+ pinctrl-names = "default";
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index 4c720d13673e..46aa2f1514bf 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -27,6 +27,7 @@
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
++ spi0 = &qspi;
+ };
+
+ cpus {
+@@ -789,7 +790,7 @@
+ };
+ };
+
+- spi: spi@e6b10000 {
++ qspi: spi@e6b10000 {
+ compatible = "renesas,qspi-r8a7791", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
+--
+2.1.2
+
--- /dev/null
+From c5d727e6d6a18f8a78b06d024700adeeebcb9dcd Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Date: Tue, 25 Feb 2014 11:30:15 +0100
+Subject: ARM: shmobile: r8a7790 dtsi: Add MSIOF nodes and aliases
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ae8a6146afc9dddbbf342b3a77b9bf44618511dd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 44 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index dc72302ab6a4..da665fa92624 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -25,6 +25,10 @@
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ spi0 = &qspi;
++ spi1 = &msiof0;
++ spi2 = &msiof1;
++ spi3 = &msiof2;
++ spi4 = &msiof3;
+ };
+
+ cpus {
+@@ -776,4 +780,44 @@
+ #size-cells = <0>;
+ status = "disabled";
+ };
++
++ msiof0: spi@e6e20000 {
++ compatible = "renesas,msiof-r8a7790";
++ reg = <0 0xe6e20000 0 0x0064>;
++ interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
++
++ msiof1: spi@e6e10000 {
++ compatible = "renesas,msiof-r8a7790";
++ reg = <0 0xe6e10000 0 0x0064>;
++ interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
++
++ msiof2: spi@e6e00000 {
++ compatible = "renesas,msiof-r8a7790";
++ reg = <0 0xe6e00000 0 0x0064>;
++ interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
++
++ msiof3: spi@e6c90000 {
++ compatible = "renesas,msiof-r8a7790";
++ reg = <0 0xe6c90000 0 0x0064>;
++ interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
+ };
+--
+2.1.2
+
--- /dev/null
+From b66f287cb28e269782dd5dc98f3bd13142e39057 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Date: Tue, 25 Feb 2014 11:30:16 +0100
+Subject: ARM: shmobile: r8a7791 dtsi: Add MSIOF nodes and aliases
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 7713d3abe220c7d578768c07d183f6efbfa8895b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 33 +++++++++++++++++++++++++++++++++
+ 1 file changed, 33 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index 46aa2f1514bf..082644cde7da 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -28,6 +28,9 @@
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
+ spi0 = &qspi;
++ spi1 = &msiof0;
++ spi2 = &msiof1;
++ spi3 = &msiof2;
+ };
+
+ cpus {
+@@ -800,4 +803,34 @@
+ #size-cells = <0>;
+ status = "disabled";
+ };
++
++ msiof0: spi@e6e20000 {
++ compatible = "renesas,msiof-r8a7791";
++ reg = <0 0xe6e20000 0 0x0064>;
++ interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
++
++ msiof1: spi@e6e10000 {
++ compatible = "renesas,msiof-r8a7791";
++ reg = <0 0xe6e10000 0 0x0064>;
++ interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
++
++ msiof2: spi@e6e00000 {
++ compatible = "renesas,msiof-r8a7791";
++ reg = <0 0xe6e00000 0 0x0064>;
++ interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
+ };
+--
+2.1.2
+
--- /dev/null
+From e95eba241174f7197fc3ad6efce2ad69d82aaa89 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Date: Tue, 25 Feb 2014 11:30:17 +0100
+Subject: ARM: shmobile: lager dts: Add MSIOF nodes
+
+Add pinctrl and SPI device for MSIOF on Lager.
+On this board, only MSIOF1 is in use. Its bus contains a single device
+(a Renesas R2A11302FT PMIC), for which no bindings are defined yet.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b0403b91e18c567fe68976253ed5759c50fb3eae)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790-lager.dts | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
+index 46c263c80438..539667bb15b0 100644
+--- a/arch/arm/boot/dts/r8a7790-lager.dts
++++ b/arch/arm/boot/dts/r8a7790-lager.dts
+@@ -159,6 +159,12 @@
+ renesas,groups = "qspi_ctrl", "qspi_data4";
+ renesas,function = "qspi";
+ };
++
++ msiof1_pins: spi2 {
++ renesas,groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
++ "msiof1_tx";
++ renesas,function = "msiof1";
++ };
+ };
+
+ ðer {
+@@ -221,6 +227,22 @@
+ };
+ };
+
++&msiof1 {
++ pinctrl-0 = <&msiof1_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++
++ pmic: pmic@0 {
++ compatible = "renesas,r2a11302ft";
++ reg = <0>;
++ spi-max-frequency = <6000000>;
++ spi-cpol;
++ spi-cpha;
++ };
++
++};
++
+ &sdhi0 {
+ pinctrl-0 = <&sdhi0_pins>;
+ pinctrl-names = "default";
+--
+2.1.2
+
--- /dev/null
+From 1b974bebd5e3cf804d012c798e464e14c668ebaf Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Date: Tue, 25 Feb 2014 11:30:18 +0100
+Subject: ARM: shmobile: koelsch dts: Add MSIOF nodes
+
+Add pinctrl and SPI device for MSIOF on Koelsch.
+On this board, only MSIOF0 is in use. Its bus contains a single device
+(a Renesas R2A11302FT PMIC), for which no bindings are defined yet.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b16f05ab75571ec360f5b7298888fd6cdf06f586)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-koelsch.dts | 21 +++++++++++++++++++++
+ 1 file changed, 21 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
+index 5558cc19c1b0..ff66416ec40e 100644
+--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
+@@ -248,6 +248,12 @@
+ renesas,groups = "qspi_ctrl", "qspi_data4";
+ renesas,function = "qspi";
+ };
++
++ msiof0_pins: spi1 {
++ renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
++ "msiof0_tx";
++ renesas,function = "msiof0";
++ };
+ };
+
+ ðer {
+@@ -331,3 +337,18 @@
+ };
+ };
+ };
++
++&msiof0 {
++ pinctrl-0 = <&msiof0_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++
++ pmic: pmic@0 {
++ compatible = "renesas,r2a11302ft";
++ reg = <0>;
++ spi-max-frequency = <6000000>;
++ spi-cpol;
++ spi-cpha;
++ };
++};
+--
+2.1.2
+
--- /dev/null
+From 4062b632c01e05441246f24b2aeefed606584173 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Date: Fri, 14 Mar 2014 11:06:40 +0100
+Subject: ARM: shmobile: r8a7778 dtsi: Improve and correct HSPI nodes
+
+ - Add "renesas,hspi-r8a7778" compatible value,
+ - Correct reference to parent interrupt controller
+ (use "interrupt-parent" instead of "interrupt-controller"),
+ - Add missing "#address-cells" and "#size-cells" properties, which are
+ needed when populating the SPI buses.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a34c50d53dc7779b404baab61b290827cb898562)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7778.dtsi | 18 ++++++++++++------
+ 1 file changed, 12 insertions(+), 6 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
+index 85c5b3b99f5e..3c6fab5c9702 100644
+--- a/arch/arm/boot/dts/r8a7778.dtsi
++++ b/arch/arm/boot/dts/r8a7778.dtsi
+@@ -204,26 +204,32 @@
+ };
+
+ hspi0: spi@fffc7000 {
+- compatible = "renesas,hspi";
++ compatible = "renesas,hspi-r8a7778", "renesas,hspi";
+ reg = <0xfffc7000 0x18>;
+- interrupt-controller = <&gic>;
++ interrupt-parent = <&gic>;
+ interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
++ #address-cells = <1>;
++ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ hspi1: spi@fffc8000 {
+- compatible = "renesas,hspi";
++ compatible = "renesas,hspi-r8a7778", "renesas,hspi";
+ reg = <0xfffc8000 0x18>;
+- interrupt-controller = <&gic>;
++ interrupt-parent = <&gic>;
+ interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
++ #address-cells = <1>;
++ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ hspi2: spi@fffc6000 {
+- compatible = "renesas,hspi";
++ compatible = "renesas,hspi-r8a7778", "renesas,hspi";
+ reg = <0xfffc6000 0x18>;
+- interrupt-controller = <&gic>;
++ interrupt-parent = <&gic>;
+ interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
++ #address-cells = <1>;
++ #size-cells = <0>;
+ status = "disabled";
+ };
+ };
+--
+2.1.2
+
--- /dev/null
+From a2d9837e154d1715e100310e640bbf8fdf1b4052 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Date: Fri, 14 Mar 2014 11:06:40 +0100
+Subject: ARM: shmobile: r8a7779 dtsi: Improve and correct HSPI nodes
+
+ - Add "renesas,hspi-r8a7779" compatible value,
+ - Correct reference to parent interrupt controller
+ (use "interrupt-parent" instead of "interrupt-controller"),
+ - Add missing "#address-cells" and "#size-cells" properties, which are
+ needed when populating the SPI buses.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 7709c33b391e217d73b38853a7914a3a3e285cbc)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7779.dtsi | 18 ++++++++++++------
+ 1 file changed, 12 insertions(+), 6 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
+index d0561d4c7c46..8b1a336ee401 100644
+--- a/arch/arm/boot/dts/r8a7779.dtsi
++++ b/arch/arm/boot/dts/r8a7779.dtsi
+@@ -256,26 +256,32 @@
+ };
+
+ hspi0: spi@fffc7000 {
+- compatible = "renesas,hspi";
++ compatible = "renesas,hspi-r8a7779", "renesas,hspi";
+ reg = <0xfffc7000 0x18>;
+- interrupt-controller = <&gic>;
++ interrupt-parent = <&gic>;
+ interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
++ #address-cells = <1>;
++ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ hspi1: spi@fffc8000 {
+- compatible = "renesas,hspi";
++ compatible = "renesas,hspi-r8a7779", "renesas,hspi";
+ reg = <0xfffc8000 0x18>;
+- interrupt-controller = <&gic>;
++ interrupt-parent = <&gic>;
+ interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
++ #address-cells = <1>;
++ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ hspi2: spi@fffc6000 {
+- compatible = "renesas,hspi";
++ compatible = "renesas,hspi-r8a7779", "renesas,hspi";
+ reg = <0xfffc6000 0x18>;
+- interrupt-controller = <&gic>;
++ interrupt-parent = <&gic>;
+ interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
++ #address-cells = <1>;
++ #size-cells = <0>;
+ status = "disabled";
+ };
+ };
+--
+2.1.2
+
--- /dev/null
+From 41ff9e57618cd568af84068a4d8b2da11d976eaf Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Date: Fri, 14 Mar 2014 11:06:41 +0100
+Subject: ARM: shmobile: bockw reference dts: Add SPI FLASH
+
+Add Spansion s25fl008k SPI FLASH and MTD partition, based on bockw legacy
+board code.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 6d879a097acaeaa9deba6d4949b466886b18652e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7778-bockw-reference.dts | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+index 06cda19dac6a..f76f6ec01e19 100644
+--- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
++++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
+@@ -109,4 +109,18 @@
+ pinctrl-0 = <&hspi0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
++
++ flash: flash@0 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ compatible = "spansion,s25fl008k";
++ reg = <0>;
++ spi-max-frequency = <104000000>;
++ m25p,fast-read;
++
++ partition@0 {
++ label = "data(spi)";
++ reg = <0x00000000 0x00100000>;
++ };
++ };
+ };
+--
+2.1.2
+
--- /dev/null
+From a7fb7c9992556d4bc476c8f6ba2c89a5425d15df Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Tue, 18 Mar 2014 21:57:48 +0900
+Subject: ARM: shmobile: Add DTS gpio-keys support for SW2 on Lager
+
+Add DTS gpio-keys support for SW2 on the Lager board.
+This makes the DT code match the legacy board code.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f7dcd382a8d6ce8c6da12786c8311e71e214290d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790-lager.dts | 34 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 34 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
+index 539667bb15b0..422bb178e0de 100644
+--- a/arch/arm/boot/dts/r8a7790-lager.dts
++++ b/arch/arm/boot/dts/r8a7790-lager.dts
+@@ -12,6 +12,7 @@
+ /dts-v1/;
+ #include "r8a7790.dtsi"
+ #include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
+
+ / {
+ model = "Lager";
+@@ -36,6 +37,39 @@
+ #size-cells = <1>;
+ };
+
++ gpio_keys {
++ compatible = "gpio-keys";
++
++ button@1 {
++ linux,code = <KEY_1>;
++ label = "SW2-1";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
++ };
++ button@2 {
++ linux,code = <KEY_2>;
++ label = "SW2-2";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
++ };
++ button@3 {
++ linux,code = <KEY_3>;
++ label = "SW2-3";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
++ };
++ button@4 {
++ linux,code = <KEY_4>;
++ label = "SW2-4";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
++ };
++ };
++
+ leds {
+ compatible = "gpio-leds";
+ led6 {
+--
+2.1.2
+
--- /dev/null
+From 89464bbcfe53459eab692b46d551776da99f277c Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm@opensource.se>
+Date: Tue, 18 Mar 2014 22:01:17 +0900
+Subject: ARM: shmobile: Add DTS gpio-keys support for SW2 on Koelsch
+
+Add DTS gpio-keys support for SW2 on the Koelsch board.
+This makes the DT code match the legacy board code. Also
+update the existing gpio-keys nodes to make use of KEY_n.
+
+Signed-off-by: Magnus Damm <damm@opensource.se>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 7f168b1e921f137db4f323428819f4c86ede4320)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-koelsch.dts | 43 +++++++++++++++++++++++++++++------
+ 1 file changed, 36 insertions(+), 7 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
+index ff66416ec40e..194ab9c33ba3 100644
+--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
+@@ -13,6 +13,7 @@
+ /dts-v1/;
+ #include "r8a7791.dtsi"
+ #include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
+
+ / {
+ model = "Koelsch";
+@@ -40,51 +41,79 @@
+ gpio-keys {
+ compatible = "gpio-keys";
+
++ key-1 {
++ gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
++ linux,code = <KEY_1>;
++ label = "SW2-1";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ };
++ key-2 {
++ gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
++ linux,code = <KEY_2>;
++ label = "SW2-2";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ };
++ key-3 {
++ gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
++ linux,code = <KEY_3>;
++ label = "SW2-3";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ };
++ key-4 {
++ gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
++ linux,code = <KEY_4>;
++ label = "SW2-4";
++ gpio-key,wakeup;
++ debounce-interval = <20>;
++ };
+ key-a {
+ gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
+- linux,code = <30>;
++ linux,code = <KEY_A>;
+ label = "SW30";
+ gpio-key,wakeup;
+ debounce-interval = <20>;
+ };
+ key-b {
+ gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
+- linux,code = <48>;
++ linux,code = <KEY_B>;
+ label = "SW31";
+ gpio-key,wakeup;
+ debounce-interval = <20>;
+ };
+ key-c {
+ gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
+- linux,code = <46>;
++ linux,code = <KEY_C>;
+ label = "SW32";
+ gpio-key,wakeup;
+ debounce-interval = <20>;
+ };
+ key-d {
+ gpios = <&gpio7 3 GPIO_ACTIVE_LOW>;
+- linux,code = <32>;
++ linux,code = <KEY_D>;
+ label = "SW33";
+ gpio-key,wakeup;
+ debounce-interval = <20>;
+ };
+ key-e {
+ gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
+- linux,code = <18>;
++ linux,code = <KEY_E>;
+ label = "SW34";
+ gpio-key,wakeup;
+ debounce-interval = <20>;
+ };
+ key-f {
+ gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
+- linux,code = <33>;
++ linux,code = <KEY_F>;
+ label = "SW35";
+ gpio-key,wakeup;
+ debounce-interval = <20>;
+ };
+ key-g {
+ gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
+- linux,code = <34>;
++ linux,code = <KEY_G>;
+ label = "SW36";
+ gpio-key,wakeup;
+ debounce-interval = <20>;
+--
+2.1.2
+
--- /dev/null
+From 1e6b7d1acc990ac4f16dc6c9447502117be516ff Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 18 Mar 2014 19:04:47 +0100
+Subject: ARM: shmobile: lager: Set ethernet PHY LED mode
+
+The Lager board uses the ethernet PHY LED0 as a link signal connected to
+the ethernet controller. Specify the corresponding LED mode for the PHY.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f17dd09d5133bc0705c8319df77169cb8491eaad)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790-lager.dts | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
+index 422bb178e0de..bbd6160b9b5c 100644
+--- a/arch/arm/boot/dts/r8a7790-lager.dts
++++ b/arch/arm/boot/dts/r8a7790-lager.dts
+@@ -213,6 +213,7 @@
+ reg = <1>;
+ interrupt-parent = <&irqc0>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
++ led-mode = <1>;
+ };
+ };
+
+--
+2.1.2
+
--- /dev/null
+From 748d67dab8a6b5e8f7dcd0b4a0f22067fa71ecbe Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 18 Mar 2014 19:04:48 +0100
+Subject: ARM: shmobile: koelsch: Set ethernet PHY LED mode
+
+The Koelsch board uses the ethernet PHY LED0 as a link signal connected
+to the ethernet controller. Specify the corresponding LED mode for the
+PHY.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 19f647cbd432eff181777bbe0f302c62af4a180d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-koelsch.dts | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
+index 194ab9c33ba3..aba971d0848e 100644
+--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
+@@ -297,6 +297,7 @@
+ reg = <1>;
+ interrupt-parent = <&irqc0>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
++ micrel,led-mode = <1>;
+ };
+ };
+
+--
+2.1.2
+
--- /dev/null
+From 16bea8dc706d7009fad0121ab350319e7966c448 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Date: Sun, 23 Mar 2014 20:35:01 +0100
+Subject: ARM: shmobile: armadillo-reference dts: Use KEY_* macros for
+ gpio-keys
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c9b60e922c7551ff1c477a121ad09f3790c1a575)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 9 +++++----
+ 1 file changed, 5 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+index 95a849bf921f..97342a4820cf 100644
+--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
++++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+@@ -11,6 +11,7 @@
+ /dts-v1/;
+ #include "r8a7740.dtsi"
+ #include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/pwm/pwm.h>
+
+@@ -77,26 +78,26 @@
+
+ power-key {
+ gpios = <&pfc 99 GPIO_ACTIVE_LOW>;
+- linux,code = <116>;
++ linux,code = <KEY_POWER>;
+ label = "SW3";
+ gpio-key,wakeup;
+ };
+
+ back-key {
+ gpios = <&pfc 100 GPIO_ACTIVE_LOW>;
+- linux,code = <158>;
++ linux,code = <KEY_BACK>;
+ label = "SW4";
+ };
+
+ menu-key {
+ gpios = <&pfc 97 GPIO_ACTIVE_LOW>;
+- linux,code = <139>;
++ linux,code = <KEY_MENU>;
+ label = "SW5";
+ };
+
+ home-key {
+ gpios = <&pfc 98 GPIO_ACTIVE_LOW>;
+- linux,code = <102>;
++ linux,code = <KEY_HOME>;
+ label = "SW6";
+ };
+ };
+--
+2.1.2
+
--- /dev/null
+From 038f0a1d830f027bd0283e60855c30a7d9701ba5 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Date: Sun, 23 Mar 2014 20:35:02 +0100
+Subject: ARM: shmobile: kzm9g-reference dts: Use KEY_* macros for gpio-keys
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 39f0163098d136411538060fd53c8b8c255cda05)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 15 ++++++++-------
+ 1 file changed, 8 insertions(+), 7 deletions(-)
+
+diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+index eb8886b535e4..a99171c8a782 100644
+--- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
++++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+@@ -14,6 +14,7 @@
+ /dts-v1/;
+ #include "sh73a0.dtsi"
+ #include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ / {
+@@ -112,43 +113,43 @@
+
+ back-key {
+ gpios = <&pcf8575 8 GPIO_ACTIVE_LOW>;
+- linux,code = <158>;
++ linux,code = <KEY_BACK>;
+ label = "SW3";
+ };
+
+ right-key {
+ gpios = <&pcf8575 9 GPIO_ACTIVE_LOW>;
+- linux,code = <106>;
++ linux,code = <KEY_RIGHT>;
+ label = "SW2-R";
+ };
+
+ left-key {
+ gpios = <&pcf8575 10 GPIO_ACTIVE_LOW>;
+- linux,code = <105>;
++ linux,code = <KEY_LEFT>;
+ label = "SW2-L";
+ };
+
+ enter-key {
+ gpios = <&pcf8575 11 GPIO_ACTIVE_LOW>;
+- linux,code = <28>;
++ linux,code = <KEY_ENTER>;
+ label = "SW2-P";
+ };
+
+ up-key {
+ gpios = <&pcf8575 12 GPIO_ACTIVE_LOW>;
+- linux,code = <103>;
++ linux,code = <KEY_UP>;
+ label = "SW2-U";
+ };
+
+ down-key {
+ gpios = <&pcf8575 13 GPIO_ACTIVE_LOW>;
+- linux,code = <108>;
++ linux,code = <KEY_DOWN>;
+ label = "SW2-D";
+ };
+
+ home-key {
+ gpios = <&pcf8575 14 GPIO_ACTIVE_LOW>;
+- linux,code = <102>;
++ linux,code = <KEY_HOME>;
+ label = "SW1";
+ };
+ };
+--
+2.1.2
+
--- /dev/null
+From cdf240b8573df7bd8dc246339e1d772ca8849681 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa@sang-engineering.com>
+Date: Mon, 10 Mar 2014 12:26:57 +0100
+Subject: ARM: shmobile: r8a7791: add IIC(B) clocks to dtsi
+
+Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c08691b578338004ee467cfe51850e7ffb523647)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 25 +++++++++++++------------
+ 1 file changed, 13 insertions(+), 12 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index 082644cde7da..35b4b838cbd0 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -716,15 +716,16 @@
+ mstp3_clks: mstp3_clks@e615013c {
+ compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
+ reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
+- clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>,
+- <&cpg_clocks R8A7791_CLK_SD0>, <&mmc0_clk>, <&rclk_clk>;
++ clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7791_CLK_SD0>,
++ <&mmc0_clk>, <&hp_clk>, <&hp_clk>, <&rclk_clk>;
+ #clock-cells = <1>;
+ renesas,clock-indices = <
+- R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1
+- R8A7791_CLK_SDHI0 R8A7791_CLK_MMCIF0 R8A7791_CLK_CMT1
++ R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 R8A7791_CLK_SDHI0
++ R8A7791_CLK_MMCIF0 R8A7791_CLK_IIC0 R8A7791_CLK_IIC1 R8A7791_CLK_CMT1
+ >;
+ clock-output-names =
+- "tpu0", "sdhi2", "sdhi1", "sdhi0", "mmcif0", "cmt1";
++ "tpu0", "sdhi2", "sdhi1", "sdhi0",
++ "mmcif0", "i2c7", "i2c8", "cmt1";
+ };
+ mstp5_clks: mstp5_clks@e6150144 {
+ compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
+@@ -768,17 +769,17 @@
+ mstp9_clks: mstp9_clks@e6150994 {
+ compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
+ reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
+- clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>,
+- <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
+- <&p_clk>;
++ clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&p_clk>,
++ <&cp_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
++ <&p_clk>, <&p_clk>;
+ #clock-cells = <1>;
+ renesas,clock-indices = <
+- R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD
+- R8A7791_CLK_I2C5 R8A7791_CLK_I2C4 R8A7791_CLK_I2C3
+- R8A7791_CLK_I2C2 R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
++ R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5
++ R8A7791_CLK_IICDVFS R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2
++ R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
+ >;
+ clock-output-names =
+- "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c4", "i2c3",
++ "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3",
+ "i2c2", "i2c1", "i2c0";
+ };
+ mstp11_clks: mstp11_clks@e615099c {
+--
+2.1.2
+
--- /dev/null
+From 6ab4dd2738d6e14dda8e8a2accdabc92d4ce6d93 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa@sang-engineering.com>
+Date: Mon, 10 Mar 2014 12:26:58 +0100
+Subject: ARM: shmobile: r8a7791: add IIC(B) cores to dtsi
+
+Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 36408d9dd0c398fc3efe87231a4c847601878c97)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 36 ++++++++++++++++++++++++++++++++++++
+ 1 file changed, 36 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index 35b4b838cbd0..e47a2fcd2627 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -27,6 +27,9 @@
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
++ i2c6 = &i2c6;
++ i2c7 = &i2c7;
++ i2c8 = &i2c8;
+ spi0 = &qspi;
+ spi1 = &msiof0;
+ spi2 = &msiof1;
+@@ -184,6 +187,7 @@
+ <0 17 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
++ /* The memory map in the User's Manual maps the cores to bus numbers */
+ i2c0: i2c@e6508000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -235,6 +239,7 @@
+ };
+
+ i2c5: i2c@e6528000 {
++ /* doesn't need pinmux */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7791";
+@@ -244,6 +249,37 @@
+ status = "disabled";
+ };
+
++ i2c6: i2c@e60b0000 {
++ /* doesn't need pinmux */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
++ reg = <0 0xe60b0000 0 0x425>;
++ interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>;
++ status = "disabled";
++ };
++
++ i2c7: i2c@e6500000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
++ reg = <0 0xe6500000 0 0x425>;
++ interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp3_clks R8A7791_CLK_IIC0>;
++ status = "disabled";
++ };
++
++ i2c8: i2c@e6510000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
++ reg = <0 0xe6510000 0 0x425>;
++ interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp3_clks R8A7791_CLK_IIC1>;
++ status = "disabled";
++ };
++
+ pfc: pfc@e6060000 {
+ compatible = "renesas,pfc-r8a7791";
+ reg = <0 0xe6060000 0 0x250>;
+--
+2.1.2
+
--- /dev/null
+From 3d8d2dc6885e19a65ea38e5dcb02c03ce58a8d01 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa@sang-engineering.com>
+Date: Mon, 10 Mar 2014 12:26:59 +0100
+Subject: ARM: shmobile: koelsch: make i2c2-pfc node unique
+
+This node should have a unique name so it can be distinguished when
+other i2c busses are added later.
+
+Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e6a4c001116ca28a3c5698168a2a1fe274fa6d2c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-koelsch.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
+index aba971d0848e..745b9ecde867 100644
+--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
+@@ -228,7 +228,7 @@
+ pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
+ pinctrl-names = "default";
+
+- i2c2_pins: i2c {
++ i2c2_pins: i2c2 {
+ renesas,groups = "i2c2";
+ renesas,function = "i2c2";
+ };
+--
+2.1.2
+
--- /dev/null
+From b1f1ae1ec2ac4810da166ab5ac553a36a9f948dc Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa@sang-engineering.com>
+Date: Mon, 10 Mar 2014 12:27:00 +0100
+Subject: ARM: shmobile: koelsch: activate i2c6 bus
+
+Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit aa28e55dd9b6832a56b1a37fbe65c34ddcd32bdf)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-koelsch.dts | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
+index 745b9ecde867..3b25a0c0de0c 100644
+--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
+@@ -224,6 +224,11 @@
+ };
+ };
+
++&i2c6 {
++ status = "okay";
++ clock-frequency = <100000>;
++};
++
+ &pfc {
+ pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
+ pinctrl-names = "default";
+--
+2.1.2
+
--- /dev/null
+From 9d3520da2d8b9e734cb9068ef55c1f129b3a3347 Mon Sep 17 00:00:00 2001
+From: Ulrich Hecht <ulrich.hecht@gmail.com>
+Date: Thu, 27 Mar 2014 11:45:44 +0100
+Subject: ARM: shmobile: Use r8a7740 suffix for i2c, mmcif, fsi2 compat strings
+
+Add "renesas,*-r8a7740" to the compatible strings for consistency with other
+devices.
+
+Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
+Acked-by: Wolfram Sang <wsa@the-dreams.de>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5c53f50c50badff499568a703467c3c9f23f9bfd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7740.dtsi | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
+index 2551e9438d35..3834b94dc02a 100644
+--- a/arch/arm/boot/dts/r8a7740.dtsi
++++ b/arch/arm/boot/dts/r8a7740.dtsi
+@@ -125,7 +125,7 @@
+ i2c0: i2c@fff20000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- compatible = "renesas,rmobile-iic";
++ compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
+ reg = <0xfff20000 0x425>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH
+@@ -138,7 +138,7 @@
+ i2c1: i2c@e6c20000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- compatible = "renesas,rmobile-iic";
++ compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
+ reg = <0xe6c20000 0x425>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH
+@@ -173,7 +173,7 @@
+ };
+
+ mmcif0: mmc@e6bd0000 {
+- compatible = "renesas,sh-mmcif";
++ compatible = "renesas,mmcif-r8a7740", "renesas,sh-mmcif";
+ reg = <0xe6bd0000 0x100>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH
+@@ -219,7 +219,7 @@
+
+ sh_fsi2: sound@fe1f0000 {
+ #sound-dai-cells = <1>;
+- compatible = "renesas,sh_fsi2";
++ compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2";
+ reg = <0xfe1f0000 0x400>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 9 0x4>;
+--
+2.1.2
+
--- /dev/null
+From c18b98319d8f57f9b69305bbb9bdea33fb95f9d8 Mon Sep 17 00:00:00 2001
+From: Ulrich Hecht <ulrich.hecht@gmail.com>
+Date: Mon, 31 Mar 2014 17:38:20 +0200
+Subject: ARM: shmobile: armadillo-reference dts: enable RTC
+
+This enables the Seiko real-time clock that is attached to a couple of
+GPIO pins.
+
+Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 584b23db5beb3bd3a3c0767248a4843cac848a58)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ .../arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 18 ++++++++++++++++++
+ 1 file changed, 18 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+index 97342a4820cf..0cb235a450b9 100644
+--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
++++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+@@ -118,6 +118,16 @@
+ };
+ };
+
++ i2c2: i2c@2 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "i2c-gpio";
++ gpios = <&pfc 208 GPIO_ACTIVE_HIGH /* sda */
++ &pfc 91 GPIO_ACTIVE_HIGH /* scl */
++ >;
++ i2c-gpio,delay-us = <5>;
++ };
++
+ backlight {
+ compatible = "pwm-backlight";
+ pwms = <&tpu 2 33333 PWM_POLARITY_INVERTED>;
+@@ -167,6 +177,14 @@
+ };
+ };
+
++&i2c2 {
++ status = "okay";
++ rtc@30 {
++ compatible = "seiko,s35390a";
++ reg = <0x30>;
++ };
++};
++
+ &pfc {
+ pinctrl-0 = <&scifa1_pins>;
+ pinctrl-names = "default";
+--
+2.1.2
+
--- /dev/null
+From 7c3b28b3f12af2b17f18d1a7740b10e1d62e9635 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Tue, 8 Apr 2014 09:21:35 +0900
+Subject: ARM: shmobile: lager: Correct setting of ethernet PHY LED mode
+
+The correct binding is "micrel,led-mode", not "led-mode".
+
+This corrects an error which was introduced when setting of ethernet PHY
+LED mode was added by 82e62182d59bd1d0 ("ARM: shmobile: lager: Set ethernet
+PHY LED mode").
+
+This makes the lager code consistent with the koelsch code which was added
+by ae00d12a032490b3 ("ARM: shmobile: koelsch: Set ethernet PHY LED mode").
+
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 1c47a6aae8bc6113463c47e9b8d35e35e97411b2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790-lager.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
+index bbd6160b9b5c..e0126f015404 100644
+--- a/arch/arm/boot/dts/r8a7790-lager.dts
++++ b/arch/arm/boot/dts/r8a7790-lager.dts
+@@ -213,7 +213,7 @@
+ reg = <1>;
+ interrupt-parent = <&irqc0>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+- led-mode = <1>;
++ micrel,led-mode = <1>;
+ };
+ };
+
+--
+2.1.2
+
--- /dev/null
+From 145e6ea4e52df485f77da3fad6007cd06beb61c6 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 1 Apr 2014 13:02:17 +0200
+Subject: ARM: shmobile: r8a7790: Fix the I2C clocks parents in DT
+
+All I2C clocks derive from the HP clock, not from the P clock. Fix them.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Reviewed-by: Wolfram Sang <wsa@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 3672b059e3a8582171863e1c588059a37aa56b75)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index da665fa92624..da821693e22a 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -758,7 +758,7 @@
+ compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
+ reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
+ clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>,
+- <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>;
++ <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
+ #clock-cells = <1>;
+ renesas,clock-indices = <
+ R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD
+--
+2.1.2
+
--- /dev/null
+From becf8f1a26ac133cf225d3cf3205b7014a2245da Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 1 Apr 2014 13:02:18 +0200
+Subject: ARM: shmobile: r8a7791: Fix the I2C clocks parents in DT
+
+All I2C clocks derive from the HP clock, not from the P clock. Fix them.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Reviewed-by: Wolfram Sang <wsa@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 11b48db9321d11c623155a1c82544988508f9aca)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index e47a2fcd2627..44f03444ef74 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -805,9 +805,9 @@
+ mstp9_clks: mstp9_clks@e6150994 {
+ compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
+ reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
+- clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&p_clk>,
+- <&cp_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
+- <&p_clk>, <&p_clk>;
++ clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&hp_clk>,
++ <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>,
++ <&hp_clk>, <&hp_clk>;
+ #clock-cells = <1>;
+ renesas,clock-indices = <
+ R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5
+--
+2.1.2
+
--- /dev/null
+From dac357d3c86780b6dc94fbfc9d7b2cbae4ac0b3b Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa@sang-engineering.com>
+Date: Tue, 11 Mar 2014 22:24:37 +0100
+Subject: ARM: shmobile: r8a7790: add IIC(B) clocks to dtsi
+
+Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
+[horms+renesas@verge.net.au resolved conflicts]
+[horms+renesas@verge.net.au consistently use space as separator]
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+(cherry picked from commit 17465149d8a1a3b7a00f02796d7d364522d0383b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 27 ++++++++++++++-------------
+ 1 file changed, 14 insertions(+), 13 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index da821693e22a..eb63c45ad8ce 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -702,18 +702,19 @@
+ mstp3_clks: mstp3_clks@e615013c {
+ compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
+ reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
+- clocks = <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, <&sd2_clk>,
+- <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>,
+- <&mmc0_clk>, <&rclk_clk>;
++ clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,
++ <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,
++ <&hp_clk>, <&hp_clk>, <&rclk_clk>;
+ #clock-cells = <1>;
+ renesas,clock-indices = <
+- R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
+- R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0
+- R8A7790_CLK_MMCIF0 R8A7790_CLK_CMT1
++ R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
++ R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0
++ R8A7790_CLK_IIC0 R8A7790_CLK_IIC1 R8A7790_CLK_CMT1
+ >;
+ clock-output-names =
+- "tpu0", "mmcif1", "sdhi3", "sdhi2",
+- "sdhi1", "sdhi0", "mmcif0", "cmt1";
++ "iic2", "tpu0", "mmcif1", "sdhi3",
++ "sdhi2", "sdhi1", "sdhi0", "mmcif0",
++ "iic0", "iic1", "cmt1";
+ };
+ mstp5_clks: mstp5_clks@e6150144 {
+ compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
+@@ -757,16 +758,16 @@
+ mstp9_clks: mstp9_clks@e6150994 {
+ compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
+ reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
+- clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>,
++ clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>,
+ <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
+ #clock-cells = <1>;
+ renesas,clock-indices = <
+- R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD
+- R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1
+- R8A7790_CLK_I2C0
++ R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS
++ R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0
+ >;
+ clock-output-names =
+- "rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0";
++ "rcan1", "rcan0", "qspi_mod", "iic3",
++ "i2c3", "i2c2", "i2c1", "i2c0";
+ };
+ };
+
+--
+2.1.2
+
--- /dev/null
+From 179f16d0a4e11c4c99e3ab9de23ac64912a27fce Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa@sang-engineering.com>
+Date: Tue, 25 Mar 2014 19:56:29 +0100
+Subject: ARM: shmobile: r8a7790: add IIC(B) cores to dtsi
+
+Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 05f3991622013692b8ef428a6703663331544248)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 44 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index eb63c45ad8ce..d38d70339149 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -24,6 +24,10 @@
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
++ i2c4 = &iic0;
++ i2c5 = &iic1;
++ i2c6 = &iic2;
++ i2c7 = &iic3;
+ spi0 = &qspi;
+ spi1 = &msiof0;
+ spi2 = &msiof1;
+@@ -236,6 +240,46 @@
+ status = "disabled";
+ };
+
++ iic0: i2c@e6500000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
++ reg = <0 0xe6500000 0 0x425>;
++ interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
++ status = "disabled";
++ };
++
++ iic1: i2c@e6510000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
++ reg = <0 0xe6510000 0 0x425>;
++ interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
++ status = "disabled";
++ };
++
++ iic2: i2c@e6520000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
++ reg = <0 0xe6520000 0 0x425>;
++ interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
++ status = "disabled";
++ };
++
++ iic3: i2c@e60b0000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
++ reg = <0 0xe60b0000 0 0x425>;
++ interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
++ status = "disabled";
++ };
++
+ mmcif0: mmcif@ee200000 {
+ compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+--
+2.1.2
+
--- /dev/null
+From d6fcd883b4a1d3f67ab21d808039a7de55e4a05c Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 13 Apr 2014 17:56:42 -0700
+Subject: ARM: shmobile: r8a7778: remove old style audio clock
+
+Current sound driver moves to new style clock,
+but is keeping compatiblity at this point.
+Move to new style on r8a7778
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a9d83bd6abc00e14e2db1660e2c7d889745bb3aa)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7778.c | 22 +++++++++-------------
+ 1 file changed, 9 insertions(+), 13 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
+index 9989b1b06ffd..6609beb9b9b4 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7778.c
++++ b/arch/arm/mach-shmobile/clock-r8a7778.c
+@@ -175,10 +175,6 @@ static struct clk mstp_clks[MSTP_NR] = {
+
+ static struct clk_lookup lookups[] = {
+ /* main */
+- CLKDEV_CON_ID("audio_clk_a", &audio_clk_a),
+- CLKDEV_CON_ID("audio_clk_b", &audio_clk_b),
+- CLKDEV_CON_ID("audio_clk_c", &audio_clk_c),
+- CLKDEV_CON_ID("audio_clk_internal", &s1_clk),
+ CLKDEV_CON_ID("shyway_clk", &s_clk),
+ CLKDEV_CON_ID("peripheral_clk", &p_clk),
+
+@@ -234,15 +230,15 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP309]),
+ CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP308]),
+ CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP307]),
+- CLKDEV_ICK_ID("scu.0", "rcar_sound", &mstp_clks[MSTP531]),
+- CLKDEV_ICK_ID("scu.1", "rcar_sound", &mstp_clks[MSTP530]),
+- CLKDEV_ICK_ID("scu.2", "rcar_sound", &mstp_clks[MSTP529]),
+- CLKDEV_ICK_ID("scu.3", "rcar_sound", &mstp_clks[MSTP528]),
+- CLKDEV_ICK_ID("scu.4", "rcar_sound", &mstp_clks[MSTP527]),
+- CLKDEV_ICK_ID("scu.5", "rcar_sound", &mstp_clks[MSTP526]),
+- CLKDEV_ICK_ID("scu.6", "rcar_sound", &mstp_clks[MSTP525]),
+- CLKDEV_ICK_ID("scu.7", "rcar_sound", &mstp_clks[MSTP524]),
+- CLKDEV_ICK_ID("scu.8", "rcar_sound", &mstp_clks[MSTP523]),
++ CLKDEV_ICK_ID("src.0", "rcar_sound", &mstp_clks[MSTP531]),
++ CLKDEV_ICK_ID("src.1", "rcar_sound", &mstp_clks[MSTP530]),
++ CLKDEV_ICK_ID("src.2", "rcar_sound", &mstp_clks[MSTP529]),
++ CLKDEV_ICK_ID("src.3", "rcar_sound", &mstp_clks[MSTP528]),
++ CLKDEV_ICK_ID("src.4", "rcar_sound", &mstp_clks[MSTP527]),
++ CLKDEV_ICK_ID("src.5", "rcar_sound", &mstp_clks[MSTP526]),
++ CLKDEV_ICK_ID("src.6", "rcar_sound", &mstp_clks[MSTP525]),
++ CLKDEV_ICK_ID("src.7", "rcar_sound", &mstp_clks[MSTP524]),
++ CLKDEV_ICK_ID("src.8", "rcar_sound", &mstp_clks[MSTP523]),
+ };
+
+ void __init r8a7778_clock_init(void)
+--
+2.1.2
+
--- /dev/null
+From 48faf39521f8623127fe5ad0f3a136dfb6f501cf Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 13 Apr 2014 17:56:50 -0700
+Subject: ARM: shmobile: r8a7790: remove old style audio clock
+
+Current sound driver moves to new style clock,
+but is keeping compatiblity at this point.
+Move to new style on r8a7790
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 932616eed0308cbebbb20a079e4bed3674bf1117)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7790.c | 24 ++++++++++--------------
+ 1 file changed, 10 insertions(+), 14 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
+index 331013995fe3..a936ae7de083 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7790.c
++++ b/arch/arm/mach-shmobile/clock-r8a7790.c
+@@ -294,10 +294,6 @@ static struct clk mstp_clks[MSTP_NR] = {
+ static struct clk_lookup lookups[] = {
+
+ /* main clocks */
+- CLKDEV_CON_ID("audio_clk_a", &audio_clk_a),
+- CLKDEV_CON_ID("audio_clk_b", &audio_clk_b),
+- CLKDEV_CON_ID("audio_clk_c", &audio_clk_c),
+- CLKDEV_CON_ID("audio_clk_internal", &m2_clk),
+ CLKDEV_CON_ID("extal", &extal_clk),
+ CLKDEV_CON_ID("extal_div2", &extal_div2_clk),
+ CLKDEV_CON_ID("main", &main_clk),
+@@ -381,16 +377,16 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_ICK_ID("clk_b", "rcar_sound", &audio_clk_b),
+ CLKDEV_ICK_ID("clk_c", "rcar_sound", &audio_clk_c),
+ CLKDEV_ICK_ID("clk_i", "rcar_sound", &m2_clk),
+- CLKDEV_ICK_ID("scu.0", "rcar_sound", &mstp_clks[MSTP1031]),
+- CLKDEV_ICK_ID("scu.1", "rcar_sound", &mstp_clks[MSTP1030]),
+- CLKDEV_ICK_ID("scu.2", "rcar_sound", &mstp_clks[MSTP1029]),
+- CLKDEV_ICK_ID("scu.3", "rcar_sound", &mstp_clks[MSTP1028]),
+- CLKDEV_ICK_ID("scu.4", "rcar_sound", &mstp_clks[MSTP1027]),
+- CLKDEV_ICK_ID("scu.5", "rcar_sound", &mstp_clks[MSTP1026]),
+- CLKDEV_ICK_ID("scu.6", "rcar_sound", &mstp_clks[MSTP1025]),
+- CLKDEV_ICK_ID("scu.7", "rcar_sound", &mstp_clks[MSTP1024]),
+- CLKDEV_ICK_ID("scu.8", "rcar_sound", &mstp_clks[MSTP1023]),
+- CLKDEV_ICK_ID("scu.9", "rcar_sound", &mstp_clks[MSTP1022]),
++ CLKDEV_ICK_ID("src.0", "rcar_sound", &mstp_clks[MSTP1031]),
++ CLKDEV_ICK_ID("src.1", "rcar_sound", &mstp_clks[MSTP1030]),
++ CLKDEV_ICK_ID("src.2", "rcar_sound", &mstp_clks[MSTP1029]),
++ CLKDEV_ICK_ID("src.3", "rcar_sound", &mstp_clks[MSTP1028]),
++ CLKDEV_ICK_ID("src.4", "rcar_sound", &mstp_clks[MSTP1027]),
++ CLKDEV_ICK_ID("src.5", "rcar_sound", &mstp_clks[MSTP1026]),
++ CLKDEV_ICK_ID("src.6", "rcar_sound", &mstp_clks[MSTP1025]),
++ CLKDEV_ICK_ID("src.7", "rcar_sound", &mstp_clks[MSTP1024]),
++ CLKDEV_ICK_ID("src.8", "rcar_sound", &mstp_clks[MSTP1023]),
++ CLKDEV_ICK_ID("src.9", "rcar_sound", &mstp_clks[MSTP1022]),
+ CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP1015]),
+ CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP1014]),
+ CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP1013]),
+--
+2.1.2
+
--- /dev/null
+From bc01e1fec58ab06f1aadf54e449201c9d0629bc5 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 13 Apr 2014 17:56:57 -0700
+Subject: ARM: shmobile: bockw: remove old style audio clock
+
+Current audio clock didn't have dependency to device/driver,
+but, it was not good design for DT support.
+To avoid branch merge conflict issue,
+it is using this load map, and this patch is 3) part.
+ 1) add new style clock in platform
+ 2) add new style clock method in driver
+ 3) remove old tyle clock from platform
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 115897dab004f580fc8b4c6bab057940ccb64989)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-bockw.c | 10 ++++++----
+ 1 file changed, 6 insertions(+), 4 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
+index b4122f8cb8d9..1aca107f959f 100644
+--- a/arch/arm/mach-shmobile/board-bockw.c
++++ b/arch/arm/mach-shmobile/board-bockw.c
+@@ -591,6 +591,7 @@ static void __init bockw_init(void)
+ {
+ void __iomem *base;
+ struct clk *clk;
++ struct platform_device *pdev;
+ int i;
+
+ r8a7778_clock_init();
+@@ -673,9 +674,6 @@ static void __init bockw_init(void)
+ }
+
+ /* for Audio */
+- clk = clk_get(NULL, "audio_clk_b");
+- clk_set_rate(clk, 24576000);
+- clk_put(clk);
+ rsnd_codec_power(5, 1); /* enable ak4642 */
+
+ platform_device_register_simple(
+@@ -684,11 +682,15 @@ static void __init bockw_init(void)
+ platform_device_register_simple(
+ "ak4554-adc-dac", 1, NULL, 0);
+
+- platform_device_register_resndata(
++ pdev = platform_device_register_resndata(
+ &platform_bus, "rcar_sound", -1,
+ rsnd_resources, ARRAY_SIZE(rsnd_resources),
+ &rsnd_info, sizeof(rsnd_info));
+
++ clk = clk_get(&pdev->dev, "clk_b");
++ clk_set_rate(clk, 24576000);
++ clk_put(clk);
++
+ for (i = 0; i < ARRAY_SIZE(rsnd_card_info); i++) {
+ struct platform_device_info cardinfo = {
+ .parent = &platform_bus,
+--
+2.1.2
+
--- /dev/null
+From 72fb9d57d0b5a30491a49eabf64993cbfdb89d7a Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 13 Apr 2014 17:57:05 -0700
+Subject: ARM: shmobile: bockw: switch to use dai info for R-Car sound
+
+Now, R-Car sound driver supports dai info settings.
+switch to use it
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a3f50d1bdd47dfa07cb42f7d954739389664f166)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-bockw.c | 53 ++++++++++++++++++++++++------------
+ 1 file changed, 35 insertions(+), 18 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
+index 1aca107f959f..f444be2f241e 100644
+--- a/arch/arm/mach-shmobile/board-bockw.c
++++ b/arch/arm/mach-shmobile/board-bockw.c
+@@ -345,24 +345,39 @@ static struct rsnd_ssi_platform_info rsnd_ssi[] = {
+ RSND_SSI_UNUSED, /* SSI 0 */
+ RSND_SSI_UNUSED, /* SSI 1 */
+ RSND_SSI_UNUSED, /* SSI 2 */
+- RSND_SSI_SET(1, HPBDMA_SLAVE_HPBIF3_TX, gic_iid(0x85), RSND_SSI_PLAY),
+- RSND_SSI_SET(2, HPBDMA_SLAVE_HPBIF4_RX, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE),
+- RSND_SSI_SET(0, HPBDMA_SLAVE_HPBIF5_TX, gic_iid(0x86), RSND_SSI_PLAY),
+- RSND_SSI_SET(0, HPBDMA_SLAVE_HPBIF6_RX, gic_iid(0x86), 0),
+- RSND_SSI_SET(3, HPBDMA_SLAVE_HPBIF7_TX, gic_iid(0x86), RSND_SSI_PLAY),
+- RSND_SSI_SET(4, HPBDMA_SLAVE_HPBIF8_RX, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE),
++ RSND_SSI(HPBDMA_SLAVE_HPBIF3_TX, gic_iid(0x85), 0),
++ RSND_SSI(HPBDMA_SLAVE_HPBIF4_RX, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE),
++ RSND_SSI(HPBDMA_SLAVE_HPBIF5_TX, gic_iid(0x86), 0),
++ RSND_SSI(HPBDMA_SLAVE_HPBIF6_RX, gic_iid(0x86), 0),
++ RSND_SSI(HPBDMA_SLAVE_HPBIF7_TX, gic_iid(0x86), 0),
++ RSND_SSI(HPBDMA_SLAVE_HPBIF8_RX, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE),
+ };
+
+-static struct rsnd_scu_platform_info rsnd_scu[9] = {
+- { .flags = 0, }, /* SRU 0 */
+- { .flags = 0, }, /* SRU 1 */
+- { .flags = 0, }, /* SRU 2 */
+- { .flags = RSND_SCU_USE_HPBIF, },
+- { .flags = RSND_SCU_USE_HPBIF, },
+- { .flags = RSND_SCU_USE_HPBIF, },
+- { .flags = RSND_SCU_USE_HPBIF, },
+- { .flags = RSND_SCU_USE_HPBIF, },
+- { .flags = RSND_SCU_USE_HPBIF, },
++static struct rsnd_src_platform_info rsnd_src[9] = {
++ RSND_SRC_UNUSED, /* SRU 0 */
++ RSND_SRC_UNUSED, /* SRU 1 */
++ RSND_SRC_UNUSED, /* SRU 2 */
++ RSND_SRC(0, 0),
++ RSND_SRC(0, 0),
++ RSND_SRC(0, 0),
++ RSND_SRC(0, 0),
++ RSND_SRC(0, 0),
++ RSND_SRC(0, 0),
++};
++
++static struct rsnd_dai_platform_info rsnd_dai[] = {
++ {
++ .playback = { .ssi = &rsnd_ssi[5], .src = &rsnd_src[5] },
++ .capture = { .ssi = &rsnd_ssi[6], .src = &rsnd_src[6] },
++ }, {
++ .playback = { .ssi = &rsnd_ssi[3], .src = &rsnd_src[3] },
++ }, {
++ .capture = { .ssi = &rsnd_ssi[4], .src = &rsnd_src[4] },
++ }, {
++ .playback = { .ssi = &rsnd_ssi[7], .src = &rsnd_src[7] },
++ }, {
++ .capture = { .ssi = &rsnd_ssi[8], .src = &rsnd_src[8] },
++ },
+ };
+
+ enum {
+@@ -437,8 +452,10 @@ static struct rcar_snd_info rsnd_info = {
+ .flags = RSND_GEN1,
+ .ssi_info = rsnd_ssi,
+ .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
+- .scu_info = rsnd_scu,
+- .scu_info_nr = ARRAY_SIZE(rsnd_scu),
++ .src_info = rsnd_src,
++ .src_info_nr = ARRAY_SIZE(rsnd_src),
++ .dai_info = rsnd_dai,
++ .dai_info_nr = ARRAY_SIZE(rsnd_dai),
+ .start = rsnd_start,
+ .stop = rsnd_stop,
+ };
+--
+2.1.2
+
--- /dev/null
+From 46d3595e32833a17780de5eed3257d6c145bd77f Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Sun, 13 Apr 2014 17:57:12 -0700
+Subject: ARM: shmobile: lager: switch to use dai info for R-Car sound
+
+Now, R-Car sound driver supports dai info settings.
+switch to use it
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 50f359d7389be354b46d781f3b234d3008d20f2f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-lager.c | 17 ++++++++++++-----
+ 1 file changed, 12 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
+index 18c7e0311aa6..05c263b5de59 100644
+--- a/arch/arm/mach-shmobile/board-lager.c
++++ b/arch/arm/mach-shmobile/board-lager.c
+@@ -567,20 +567,27 @@ static struct resource rsnd_resources[] __initdata = {
+ };
+
+ static struct rsnd_ssi_platform_info rsnd_ssi[] = {
+- RSND_SSI_SET(0, 0, gic_spi(370), RSND_SSI_PLAY),
+- RSND_SSI_SET(0, 0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
++ RSND_SSI(0, gic_spi(370), 0),
++ RSND_SSI(0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
+ };
+
+-static struct rsnd_scu_platform_info rsnd_scu[2] = {
++static struct rsnd_src_platform_info rsnd_src[2] = {
+ /* no member at this point */
+ };
+
++static struct rsnd_dai_platform_info rsnd_dai = {
++ .playback = { .ssi = &rsnd_ssi[0], },
++ .capture = { .ssi = &rsnd_ssi[1], },
++};
++
+ static struct rcar_snd_info rsnd_info = {
+ .flags = RSND_GEN2,
+ .ssi_info = rsnd_ssi,
+ .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
+- .scu_info = rsnd_scu,
+- .scu_info_nr = ARRAY_SIZE(rsnd_scu),
++ .src_info = rsnd_src,
++ .src_info_nr = ARRAY_SIZE(rsnd_src),
++ .dai_info = &rsnd_dai,
++ .dai_info_nr = 1,
+ };
+
+ static struct asoc_simple_card_info rsnd_card_info = {
+--
+2.1.2
+
--- /dev/null
+From 9679362cca951fbe3f123448e742fb6e83572220 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 14 Apr 2014 19:35:57 +0200
+Subject: ARM: shmobile: koelsch legacy: Enable Quad SPI transfers for the SPI
+ FLASH
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4d4a0ff30c39b82c1dc549f2cc7a62b514431e64)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-koelsch.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
+index 5a034ff405d0..a12a9d3b4b6e 100644
+--- a/arch/arm/mach-shmobile/board-koelsch.c
++++ b/arch/arm/mach-shmobile/board-koelsch.c
+@@ -216,7 +216,7 @@ static const struct spi_board_info spi_info[] __initconst = {
+ {
+ .modalias = "m25p80",
+ .platform_data = &spi_flash_data,
+- .mode = SPI_MODE_0,
++ .mode = SPI_MODE_0 | SPI_TX_QUAD | SPI_RX_QUAD,
+ .max_speed_hz = 30000000,
+ .bus_num = 0,
+ .chip_select = 0,
+--
+2.1.2
+
--- /dev/null
+From 9c5902777d484334144a0dd8d5fda2a8270be924 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 14 Apr 2014 19:35:58 +0200
+Subject: ARM: shmobile: koelsch dts: Enable Quad SPI transfers for the SPI
+ FLASH
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ed56083acfe7c872318b8321c7d0e25a6b520371)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-koelsch.dts | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
+index 3b25a0c0de0c..0d69813def85 100644
+--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
+@@ -354,6 +354,8 @@
+ compatible = "spansion,s25fl512s";
+ reg = <0>;
+ spi-max-frequency = <30000000>;
++ spi-tx-bus-width = <4>;
++ spi-rx-bus-width = <4>;
+ m25p,fast-read;
+
+ partition@0 {
+--
+2.1.2
+
--- /dev/null
+From 6b4856e92f5583794daa563c753deaa4bcd9efa2 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 14 Apr 2014 19:36:00 +0200
+Subject: ARM: shmobile: lager dts: Enable Quad SPI transfers for the SPI FLASH
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 9909d2cb41a9c752cbbef5d9fb57d80a7196e951)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790-lager.dts | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
+index e0126f015404..86d676f62942 100644
+--- a/arch/arm/boot/dts/r8a7790-lager.dts
++++ b/arch/arm/boot/dts/r8a7790-lager.dts
+@@ -243,6 +243,8 @@
+ compatible = "spansion,s25fl512s";
+ reg = <0>;
+ spi-max-frequency = <30000000>;
++ spi-tx-bus-width = <4>;
++ spi-rx-bus-width = <4>;
+ m25p,fast-read;
+
+ partition@0 {
+--
+2.1.2
+
--- /dev/null
+From 3069df3d2dfbba4408e6d57a7386312a9c59fc8f Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 14 Apr 2014 19:35:59 +0200
+Subject: ARM: shmobile: lager legacy: Enable Quad SPI transfers for the SPI
+ FLASH
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Magnus Damm <damm@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a09b2f0ba170dc89a67d6c4c4f027b37a085dad9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-lager.c | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
+index 05c263b5de59..f8b1e05463cc 100644
+--- a/arch/arm/mach-shmobile/board-lager.c
++++ b/arch/arm/mach-shmobile/board-lager.c
+@@ -325,12 +325,12 @@ static const struct rspi_plat_data qspi_pdata __initconst = {
+
+ static const struct spi_board_info spi_info[] __initconst = {
+ {
+- .modalias = "m25p80",
+- .platform_data = &spi_flash_data,
+- .mode = SPI_MODE_0,
+- .max_speed_hz = 30000000,
+- .bus_num = 0,
+- .chip_select = 0,
++ .modalias = "m25p80",
++ .platform_data = &spi_flash_data,
++ .mode = SPI_MODE_0 | SPI_TX_QUAD | SPI_RX_QUAD,
++ .max_speed_hz = 30000000,
++ .bus_num = 0,
++ .chip_select = 0,
+ },
+ };
+
+--
+2.1.2
+
--- /dev/null
+From a91a29902d51f369e5523a47aa575fd90346d1f7 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 15 Apr 2014 14:33:57 +0200
+Subject: ARM: shmobile: r8a7740: Remove unused r8a7740_add_early_devices_dt()
+
+It was removed in commit 744fdc8dc0e22cc5b61ee1bcde9375f188daa330 ("ARM:
+shmobile: r8a7740: Prepare for reference DT setup"), but accidentally
+resurrected in commit 88378837780166d67a11142cd6f76596c0a2d8c3 ("ARM:
+shmobile: Remove unused r8a7740 auxdata table").
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 72dc392ae5bbad3477053ac4c5708dba6706ffa0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7740.c | 11 -----------
+ 1 file changed, 11 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
+index 8f3c68101d59..cba3a07a97c2 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7740.c
++++ b/arch/arm/mach-shmobile/setup-r8a7740.c
+@@ -869,17 +869,6 @@ void __init r8a7740_add_early_devices(void)
+
+ #ifdef CONFIG_USE_OF
+
+-void __init r8a7740_add_early_devices_dt(void)
+-{
+- shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
+-
+- early_platform_add_devices(r8a7740_early_devices,
+- ARRAY_SIZE(r8a7740_early_devices));
+-
+- /* setup early console here as well */
+- shmobile_setup_console();
+-}
+-
+ void __init r8a7740_add_standard_devices_dt(void)
+ {
+ platform_add_devices(r8a7740_devices_dt,
+--
+2.1.2
+
--- /dev/null
+From a0deb723c438dee7513aa7d865f92602d654146e Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 15 Apr 2014 14:33:59 +0200
+Subject: ARM: shmobile: sh7372: Call sh7372_add_early_devices() instead of
+ open coding
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 1fba31f047639a6c7accf4f6d075a6cf9eacecc0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-sh7372.c | 6 +-----
+ 1 file changed, 1 insertion(+), 5 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
+index 27301278c208..f8176b051be4 100644
+--- a/arch/arm/mach-shmobile/setup-sh7372.c
++++ b/arch/arm/mach-shmobile/setup-sh7372.c
+@@ -1037,11 +1037,7 @@ void __init sh7372_add_early_devices_dt(void)
+ {
+ shmobile_setup_delay(800, 1, 3); /* Cortex-A8 @ 800MHz */
+
+- early_platform_add_devices(sh7372_early_devices,
+- ARRAY_SIZE(sh7372_early_devices));
+-
+- /* setup early console here as well */
+- shmobile_setup_console();
++ sh7372_add_early_devices();
+ }
+
+ void __init sh7372_add_standard_devices_dt(void)
+--
+2.1.2
+
--- /dev/null
+From da70ebf307b8c7d1da22bc9fe0eb91e8d70a2a00 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 15 Apr 2014 14:33:58 +0200
+Subject: ARM: shmobile: r8a7740: Make r8a7740_meram_workaround() __init
+
+It's called from eva_init() only, which is __init
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit bb6c3d58c36adb205b4bf233fd1c4079e02a6811)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7740.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
+index cba3a07a97c2..a177a7b3bdbd 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7740.c
++++ b/arch/arm/mach-shmobile/setup-r8a7740.c
+@@ -765,7 +765,7 @@ static struct platform_device *r8a7740_late_devices[] __initdata = {
+ * "Media RAM (MERAM)" on r8a7740 documentation
+ */
+ #define MEBUFCNTR 0xFE950098
+-void r8a7740_meram_workaround(void)
++void __init r8a7740_meram_workaround(void)
+ {
+ void __iomem *reg;
+
+--
+2.1.2
+
--- /dev/null
+From db9dec57c3e47b8b344bcea873b0946520e23b9f Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Tue, 15 Apr 2014 14:51:50 +0200
+Subject: ARM: shmobile: armadillo-reference dts: Seiko Instruments, Inc is
+ "sii"
+
+Use "sii,s35390a" instead of "seiko,s35390a", cfr.
+Documentation/devicetree/bindings/i2c/trivial-devices.txt and
+Documentation/devicetree/bindings/vendor-prefixes.txt.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit dd485ab9a88267f4db0d58ace23b19e876ebf8ac)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+index 0cb235a450b9..10344e6edd20 100644
+--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
++++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+@@ -180,7 +180,7 @@
+ &i2c2 {
+ status = "okay";
+ rtc@30 {
+- compatible = "seiko,s35390a";
++ compatible = "sii,s35390a";
+ reg = <0x30>;
+ };
+ };
+--
+2.1.2
+
--- /dev/null
+From 28a2a11738940e5ca3ce363488bd1dc96428121f Mon Sep 17 00:00:00 2001
+From: Ulf Hansson <ulf.hansson@linaro.org>
+Date: Fri, 11 Apr 2014 17:26:41 +0200
+Subject: ARM: shmobile: Ignore callbacks for subsys generic_pm_domain_data
+
+There are no active users of these callbacks, thus there are no benefit
+of trying to invoke them.
+
+Cc: Simon Horman <horms@verge.net.au>
+Cc: Magnus Damm <magnus.damm@gmail.com>
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit ab496b9d259e754f5d646219e4f032b274b9fffe)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/pm-rmobile.c | 38 +++----------------------------------
+ 1 file changed, 3 insertions(+), 35 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/pm-rmobile.c b/arch/arm/mach-shmobile/pm-rmobile.c
+index 1fc05d9453d0..f710235aff2f 100644
+--- a/arch/arm/mach-shmobile/pm-rmobile.c
++++ b/arch/arm/mach-shmobile/pm-rmobile.c
+@@ -99,39 +99,7 @@ static int rmobile_pd_power_up(struct generic_pm_domain *genpd)
+
+ static bool rmobile_pd_active_wakeup(struct device *dev)
+ {
+- bool (*active_wakeup)(struct device *dev);
+-
+- active_wakeup = dev_gpd_data(dev)->ops.active_wakeup;
+- return active_wakeup ? active_wakeup(dev) : true;
+-}
+-
+-static int rmobile_pd_stop_dev(struct device *dev)
+-{
+- int (*stop)(struct device *dev);
+-
+- stop = dev_gpd_data(dev)->ops.stop;
+- if (stop) {
+- int ret = stop(dev);
+- if (ret)
+- return ret;
+- }
+- return pm_clk_suspend(dev);
+-}
+-
+-static int rmobile_pd_start_dev(struct device *dev)
+-{
+- int (*start)(struct device *dev);
+- int ret;
+-
+- ret = pm_clk_resume(dev);
+- if (ret)
+- return ret;
+-
+- start = dev_gpd_data(dev)->ops.start;
+- if (start)
+- ret = start(dev);
+-
+- return ret;
++ return true;
+ }
+
+ static void rmobile_init_pm_domain(struct rmobile_pm_domain *rmobile_pd)
+@@ -140,8 +108,8 @@ static void rmobile_init_pm_domain(struct rmobile_pm_domain *rmobile_pd)
+ struct dev_power_governor *gov = rmobile_pd->gov;
+
+ pm_genpd_init(genpd, gov ? : &simple_qos_governor, false);
+- genpd->dev_ops.stop = rmobile_pd_stop_dev;
+- genpd->dev_ops.start = rmobile_pd_start_dev;
++ genpd->dev_ops.stop = pm_clk_suspend;
++ genpd->dev_ops.start = pm_clk_resume;
+ genpd->dev_ops.active_wakeup = rmobile_pd_active_wakeup;
+ genpd->dev_irq_safe = true;
+ genpd->power_off = rmobile_pd_power_down;
+--
+2.1.2
+
--- /dev/null
+From ca93af9a38b50a06ffa5e4df8ae87d613955f994 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 25 Apr 2014 02:42:41 +0400
+Subject: ARM: shmobile: henninger: initial device tree
+
+Add the initial device tree for the R8A7791 SoC based Henninger board. SCIF0
+serial port support is included, so that the serial console can work.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4b37ab033e6f8c9750f98fefe9bdc341b6943268)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/Makefile | 1 +
+ arch/arm/boot/dts/r8a7791-henninger.dts | 50 +++++++++++++++++++++++++++++++++
+ 2 files changed, 51 insertions(+)
+ create mode 100644 arch/arm/boot/dts/r8a7791-henninger.dts
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 41927cc4b0ee..234247b51db7 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -261,6 +261,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += r7s72100-genmai.dtb \
+ sh7372-mackerel.dtb
+ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
+ r7s72100-genmai-reference.dtb \
++ r8a7791-henninger.dtb \
+ r8a7791-koelsch.dtb \
+ r8a7790-lager.dtb
+ dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_arria5_socdk.dtb \
+diff --git a/arch/arm/boot/dts/r8a7791-henninger.dts b/arch/arm/boot/dts/r8a7791-henninger.dts
+new file mode 100644
+index 000000000000..0053f52bc969
+--- /dev/null
++++ b/arch/arm/boot/dts/r8a7791-henninger.dts
+@@ -0,0 +1,50 @@
++/*
++ * Device Tree Source for the Henninger board
++ *
++ * Copyright (C) 2014 Renesas Solutions Corp.
++ * Copyright (C) 2014 Cogent Embedded, Inc.
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/dts-v1/;
++#include "r8a7791.dtsi"
++
++/ {
++ model = "Henninger";
++ compatible = "renesas,henninger", "renesas,r8a7791";
++
++ aliases {
++ serial0 = &scif0;
++ };
++
++ chosen {
++ bootargs = "console=ttySC0,38400 ignore_loglevel";
++ };
++
++ memory@40000000 {
++ device_type = "memory";
++ reg = <0 0x40000000 0 0x40000000>;
++ };
++
++ memory@200000000 {
++ device_type = "memory";
++ reg = <2 0x00000000 0 0x40000000>;
++ };
++};
++
++&pfc {
++ scif0_pins: serial0 {
++ renesas,groups = "scif0_data_d";
++ renesas,function = "scif0";
++ };
++};
++
++&scif0 {
++ pinctrl-0 = <&scif0_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
+--
+2.1.2
+
--- /dev/null
+From d4afdefd17b4d7942552a352245c0afcad03fd73 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 25 Apr 2014 02:44:12 +0400
+Subject: ARM: shmobile: henninger: add Ether DT support
+
+Define the Henninger board dependent part of the Ether device node.
+Enable DHCP and NFS root for the kernel booting.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 26b0d2cf73cb5091962c81598a36346d05e9ba83)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-henninger.dts | 28 +++++++++++++++++++++++++++-
+ 1 file changed, 27 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7791-henninger.dts b/arch/arm/boot/dts/r8a7791-henninger.dts
+index 0053f52bc969..f82f306c074d 100644
+--- a/arch/arm/boot/dts/r8a7791-henninger.dts
++++ b/arch/arm/boot/dts/r8a7791-henninger.dts
+@@ -21,7 +21,7 @@
+ };
+
+ chosen {
+- bootargs = "console=ttySC0,38400 ignore_loglevel";
++ bootargs = "console=ttySC0,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp";
+ };
+
+ memory@40000000 {
+@@ -40,6 +40,16 @@
+ renesas,groups = "scif0_data_d";
+ renesas,function = "scif0";
+ };
++
++ ether_pins: ether {
++ renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
++ renesas,function = "eth";
++ };
++
++ phy1_pins: phy1 {
++ renesas,groups = "intc_irq0";
++ renesas,function = "intc";
++ };
+ };
+
+ &scif0 {
+@@ -48,3 +58,19 @@
+
+ status = "okay";
+ };
++
++ðer {
++ pinctrl-0 = <ðer_pins &phy1_pins>;
++ pinctrl-names = "default";
++
++ phy-handle = <&phy1>;
++ renesas,ether-link-active-low;
++ status = "ok";
++
++ phy1: ethernet-phy@1 {
++ reg = <1>;
++ interrupt-parent = <&irqc0>;
++ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
++ micrel,led-mode = <1>;
++ };
++};
+--
+2.1.2
+
--- /dev/null
+From 8a4a9a92ff1b5f8df020195bd09d5e73180c3f7c Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sat, 26 Apr 2014 02:51:27 +0400
+Subject: ARM: shmobile: henninger: enable SATA0
+
+Enable SATA0 device for the Henninger board.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5a62ec57004f1a434bfd3feed43e447b5780baf6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-henninger.dts | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791-henninger.dts b/arch/arm/boot/dts/r8a7791-henninger.dts
+index f82f306c074d..6e67cea3104c 100644
+--- a/arch/arm/boot/dts/r8a7791-henninger.dts
++++ b/arch/arm/boot/dts/r8a7791-henninger.dts
+@@ -74,3 +74,7 @@
+ micrel,led-mode = <1>;
+ };
+ };
++
++&sata0 {
++ status = "okay";
++};
+--
+2.1.2
+
--- /dev/null
+From ba15e086d93e12aa00a23f58540dc17d71e4cbc0 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Fri, 2 May 2014 02:56:33 +0400
+Subject: ARM: shmobile: henninger: specify EXTAL frequency
+
+When creating the initial device tree for the Henninger board, I've overlooked
+that EXTAL frequency needs to be overridden there. The 'sh-sci' driver managed
+to work somehow but the SDHI driver that I've tried to enable just hanged with
+the default EXTAL frequency of 0...
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 2af0d93762e91d4496cc2e63761c70ae9f50f997)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-henninger.dts | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791-henninger.dts b/arch/arm/boot/dts/r8a7791-henninger.dts
+index 6e67cea3104c..0a655231d531 100644
+--- a/arch/arm/boot/dts/r8a7791-henninger.dts
++++ b/arch/arm/boot/dts/r8a7791-henninger.dts
+@@ -35,6 +35,10 @@
+ };
+ };
+
++&extal_clk {
++ clock-frequency = <20000000>;
++};
++
+ &pfc {
+ scif0_pins: serial0 {
+ renesas,groups = "scif0_data_d";
+--
+2.1.2
+
--- /dev/null
+From cd677f69f985d751616fb0cc55873953af7e96f5 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Sat, 3 May 2014 21:04:34 +0400
+Subject: ARM: shmobile: henninger: add SDHI0/2 DT support
+
+Define the Henninger board dependent part of the SDHI0/2 device nodes along with
+the necessary voltage regulators (note that the Vcc regulators are dummy -- they
+are required but don't actually exist on the board). Also, GPIOs have to be used
+for the CD and WP signals due to the SDHI driver constraints...
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 1299df03d7191ab4356c995dde8b912d3c8922e9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-henninger.dts | 76 +++++++++++++++++++++++++++++++++
+ 1 file changed, 76 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791-henninger.dts b/arch/arm/boot/dts/r8a7791-henninger.dts
+index 0a655231d531..2e45c06dd96b 100644
+--- a/arch/arm/boot/dts/r8a7791-henninger.dts
++++ b/arch/arm/boot/dts/r8a7791-henninger.dts
+@@ -11,6 +11,7 @@
+
+ /dts-v1/;
+ #include "r8a7791.dtsi"
++#include <dt-bindings/gpio/gpio.h>
+
+ / {
+ model = "Henninger";
+@@ -33,6 +34,50 @@
+ device_type = "memory";
+ reg = <2 0x00000000 0 0x40000000>;
+ };
++
++ vcc_sdhi0: regulator@0 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "SDHI0 Vcc";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++
++ vccq_sdhi0: regulator@1 {
++ compatible = "regulator-gpio";
++
++ regulator-name = "SDHI0 VccQ";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
++ gpios-states = <1>;
++ states = <3300000 1
++ 1800000 0>;
++ };
++
++ vcc_sdhi2: regulator@2 {
++ compatible = "regulator-fixed";
++
++ regulator-name = "SDHI2 Vcc";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++
++ vccq_sdhi2: regulator@3 {
++ compatible = "regulator-gpio";
++
++ regulator-name = "SDHI2 VccQ";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++
++ gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
++ gpios-states = <1>;
++ states = <3300000 1
++ 1800000 0>;
++ };
+ };
+
+ &extal_clk {
+@@ -54,6 +99,16 @@
+ renesas,groups = "intc_irq0";
+ renesas,function = "intc";
+ };
++
++ sdhi0_pins: sd0 {
++ renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
++ renesas,function = "sdhi0";
++ };
++
++ sdhi2_pins: sd2 {
++ renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
++ renesas,function = "sdhi2";
++ };
+ };
+
+ &scif0 {
+@@ -82,3 +137,24 @@
+ &sata0 {
+ status = "okay";
+ };
++
++&sdhi0 {
++ pinctrl-0 = <&sdhi0_pins>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <&vcc_sdhi0>;
++ vqmmc-supply = <&vccq_sdhi0>;
++ cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
++ wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
++ status = "okay";
++};
++
++&sdhi2 {
++ pinctrl-0 = <&sdhi2_pins>;
++ pinctrl-names = "default";
++
++ vmmc-supply = <&vcc_sdhi2>;
++ vqmmc-supply = <&vccq_sdhi2>;
++ cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
++ status = "okay";
++};
+--
+2.1.2
+
--- /dev/null
+From 3251845df5eaef00d9fd27c3e8164cc52cc69f50 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Tue, 6 May 2014 02:45:31 +0400
+Subject: ARM: shmobile: henninger: add QSPI DT support
+
+Define the Henninger board dependent part of the QSPI device node.
+Add device nodes for Spansion S25FL512S SPI flash and MTD partitions on it.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f59838d448356feb4f0ce70785a49045d842c9c3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-henninger.dts | 38 +++++++++++++++++++++++++++++++++
+ 1 file changed, 38 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791-henninger.dts b/arch/arm/boot/dts/r8a7791-henninger.dts
+index 2e45c06dd96b..1d715a3a6bb5 100644
+--- a/arch/arm/boot/dts/r8a7791-henninger.dts
++++ b/arch/arm/boot/dts/r8a7791-henninger.dts
+@@ -109,6 +109,11 @@
+ renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
+ renesas,function = "sdhi2";
+ };
++
++ qspi_pins: spi0 {
++ renesas,groups = "qspi_ctrl", "qspi_data4";
++ renesas,function = "qspi";
++ };
+ };
+
+ &scif0 {
+@@ -158,3 +163,36 @@
+ cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
+ status = "okay";
+ };
++
++&qspi {
++ pinctrl-0 = <&qspi_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++
++ flash@0 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ compatible = "spansion,s25fl512s";
++ reg = <0>;
++ spi-max-frequency = <30000000>;
++ spi-tx-bus-width = <4>;
++ spi-rx-bus-width = <4>;
++ m25p,fast-read;
++
++ partition@0 {
++ label = "loader_prg";
++ reg = <0x00000000 0x00040000>;
++ read-only;
++ };
++ partition@40000 {
++ label = "user_prg";
++ reg = <0x00040000 0x00400000>;
++ read-only;
++ };
++ partition@440000 {
++ label = "flash_fs";
++ reg = <0x00440000 0x03bc0000>;
++ };
++ };
++};
+--
+2.1.2
+
--- /dev/null
+From 7526bccbe261402f30b3294f303e8fedf9f460f7 Mon Sep 17 00:00:00 2001
+From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Date: Wed, 7 May 2014 00:47:59 +0400
+Subject: ARM: shmobile: henninger: add MSIOF0 DT support
+
+Define the Henninger board dependent part of the MSIOF0 device node.
+Add device node for Renesas R2A11302FT PMIC for which no bindings exist yet.
+
+Based on the Koelsch MSIOF device tree patch by Geert Uytterhoeven.
+
+Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 667366bff7c4d38c6efa60f2e32d13c26a58d7d4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-henninger.dts | 21 +++++++++++++++++++++
+ 1 file changed, 21 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7791-henninger.dts b/arch/arm/boot/dts/r8a7791-henninger.dts
+index 1d715a3a6bb5..cc6d992e8db2 100644
+--- a/arch/arm/boot/dts/r8a7791-henninger.dts
++++ b/arch/arm/boot/dts/r8a7791-henninger.dts
+@@ -114,6 +114,12 @@
+ renesas,groups = "qspi_ctrl", "qspi_data4";
+ renesas,function = "qspi";
+ };
++
++ msiof0_pins: spi1 {
++ renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
++ "msiof0_tx";
++ renesas,function = "msiof0";
++ };
+ };
+
+ &scif0 {
+@@ -196,3 +202,18 @@
+ };
+ };
+ };
++
++&msiof0 {
++ pinctrl-0 = <&msiof0_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++
++ pmic@0 {
++ compatible = "renesas,r2a11302ft";
++ reg = <0>;
++ spi-max-frequency = <6000000>;
++ spi-cpol;
++ spi-cpha;
++ };
++};
+--
+2.1.2
+
--- /dev/null
+From 9e1d89566a4868ce17ee35e29f113937ed056694 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 7 May 2014 22:32:29 +0200
+Subject: ARM: shmobile: r8a7740 dtsi: Add Ethernet support
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 08ec67b50db7ca8c9077e67ca23850cdc5bfc716)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7740.dtsi | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
+index 3834b94dc02a..560d8d71cea4 100644
+--- a/arch/arm/boot/dts/r8a7740.dtsi
++++ b/arch/arm/boot/dts/r8a7740.dtsi
+@@ -122,6 +122,19 @@
+ 0 149 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
++ ether: ethernet@e9a00000 {
++ compatible = "renesas,gether-r8a7740";
++ reg = <0xe9a00000 0x800>,
++ <0xe9a01800 0x800>;
++ interrupt-parent = <&gic>;
++ interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
++ /* clocks = <&mstp3_clks R8A7740_CLK_GETHER>; */
++ phy-mode = "mii";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
++
+ i2c0: i2c@fff20000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+--
+2.1.2
+
--- /dev/null
+From 4558346c5b7b75ea541365fb1f0ebc1a36ba6eb7 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 7 May 2014 22:32:30 +0200
+Subject: ARM: shmobile: armadillo-reference dts: Add Ethernet support
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 15d89dc9bfde872885c6226d86fb25676cbedfb3)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 17 +++++++++++++++++
+ 1 file changed, 17 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+index 10344e6edd20..486007d7ffe4 100644
+--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
++++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+@@ -158,6 +158,18 @@
+ };
+ };
+
++ðer {
++ pinctrl-0 = <ðer_pins>;
++ pinctrl-names = "default";
++
++ phy-handle = <&phy0>;
++ status = "ok";
++
++ phy0: ethernet-phy@0 {
++ reg = <0>;
++ };
++};
++
+ &i2c0 {
+ status = "okay";
+ touchscreen@55 {
+@@ -189,6 +201,11 @@
+ pinctrl-0 = <&scifa1_pins>;
+ pinctrl-names = "default";
+
++ ether_pins: ether {
++ renesas,groups = "gether_mii", "gether_int";
++ renesas,function = "gether";
++ };
++
+ scifa1_pins: serial1 {
+ renesas,groups = "scifa1_data";
+ renesas,function = "scifa1";
+--
+2.1.2
+
--- /dev/null
+From 720a9aee4733513383e1381b8b1f1b62db8ac0ea Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 7 May 2014 22:32:28 +0200
+Subject: ARM: shmobile: r8a7740: Correct name of DT Ethernet clock
+
+The preferred node name in DT for an Ethernet device is "ethernet".
+"sh-eth" was used in preliminary and incomplete bindings.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 93131c36d49e932151a5f482f50ea40f3f0c987f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7740.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
+index dd989f93498f..433ec674ead1 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7740.c
++++ b/arch/arm/mach-shmobile/clock-r8a7740.c
+@@ -596,7 +596,7 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP312]),
+ CLKDEV_DEV_ID("e6bd0000.mmc", &mstp_clks[MSTP312]),
+ CLKDEV_DEV_ID("r8a7740-gether", &mstp_clks[MSTP309]),
+- CLKDEV_DEV_ID("e9a00000.sh-eth", &mstp_clks[MSTP309]),
++ CLKDEV_DEV_ID("e9a00000.ethernet", &mstp_clks[MSTP309]),
+ CLKDEV_DEV_ID("renesas-tpu-pwm", &mstp_clks[MSTP304]),
+ CLKDEV_DEV_ID("e6600000.pwm", &mstp_clks[MSTP304]),
+
+--
+2.1.2
+
--- /dev/null
+From de2673abbe132a935a63be593020abbc96557b11 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 23 Apr 2014 13:15:09 +0200
+Subject: ARM: shmobile: sh7372: Switch to new style CMT device
+
+The CMT (Compare Match Timer) driver implements a new style of platform
+data that handles the timer as a single device with multiple channel.
+Switch from the old-style platform data to the new-style platform data.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 386f60aae35271efa4dc7c407f65269b7cb71edb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-sh7372.c | 6 +++---
+ arch/arm/mach-shmobile/setup-sh7372.c | 20 ++++----------------
+ 2 files changed, 7 insertions(+), 19 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
+index 28489978b09c..c622b491edaf 100644
+--- a/arch/arm/mach-shmobile/clock-sh7372.c
++++ b/arch/arm/mach-shmobile/clock-sh7372.c
+@@ -565,10 +565,7 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("r8a66597_hcd.1", &mstp_clks[MSTP406]), /* USB1 */
+ CLKDEV_DEV_ID("r8a66597_udc.1", &mstp_clks[MSTP406]), /* USB1 */
+ CLKDEV_DEV_ID("renesas_usbhs.1", &mstp_clks[MSTP406]), /* USB1 */
+- CLKDEV_DEV_ID("sh_cmt.4", &mstp_clks[MSTP405]), /* CMT4 */
+- CLKDEV_DEV_ID("sh_cmt.3", &mstp_clks[MSTP404]), /* CMT3 */
+ CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
+- CLKDEV_DEV_ID("sh_cmt.2", &mstp_clks[MSTP400]), /* CMT2 */
+
+ /* ICK */
+ CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
+@@ -581,6 +578,9 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]),
+ CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]),
+ CLKDEV_ICK_ID("spu2", "sh_fsi2", &mstp_clks[MSTP223]),
++ CLKDEV_ICK_ID("fck", "sh-cmt-32-fast.4", &mstp_clks[MSTP405]), /* CMT4 */
++ CLKDEV_ICK_ID("fck", "sh-cmt-32-fast.3", &mstp_clks[MSTP404]), /* CMT3 */
++ CLKDEV_ICK_ID("fck", "sh-cmt-32-fast.2", &mstp_clks[MSTP400]), /* CMT2 */
+ CLKDEV_ICK_ID("diva", "sh_fsi2", &fsidivs[FSIDIV_A]),
+ CLKDEV_ICK_ID("divb", "sh_fsi2", &fsidivs[FSIDIV_B]),
+ CLKDEV_ICK_ID("xcka", "sh_fsi2", &fsiack_clk),
+diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
+index f8176b051be4..0995b7299229 100644
+--- a/arch/arm/mach-shmobile/setup-sh7372.c
++++ b/arch/arm/mach-shmobile/setup-sh7372.c
+@@ -119,28 +119,16 @@ SH7372_SCIF(PORT_SCIFB, 6, 0xe6c30000, evt2irq(0x0d60));
+
+ /* CMT */
+ static struct sh_timer_config cmt2_platform_data = {
+- .name = "CMT2",
+- .channel_offset = 0x40,
+- .timer_bit = 5,
+- .clockevent_rating = 125,
+- .clocksource_rating = 125,
++ .channels_mask = 0x20,
+ };
+
+ static struct resource cmt2_resources[] = {
+- [0] = {
+- .name = "CMT2",
+- .start = 0xe6130040,
+- .end = 0xe613004b,
+- .flags = IORESOURCE_MEM,
+- },
+- [1] = {
+- .start = evt2irq(0x0b80), /* CMT2 */
+- .flags = IORESOURCE_IRQ,
+- },
++ DEFINE_RES_MEM(0xe6130000, 0x50),
++ DEFINE_RES_IRQ(evt2irq(0x0b80)),
+ };
+
+ static struct platform_device cmt2_device = {
+- .name = "sh_cmt",
++ .name = "sh-cmt-32-fast",
+ .id = 2,
+ .dev = {
+ .platform_data = &cmt2_platform_data,
+--
+2.1.2
+
--- /dev/null
+From 86ea21f05552452126376b6f6733152bbde1cd5b Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 23 Apr 2014 13:15:10 +0200
+Subject: ARM: shmobile: sh73a0: Switch to new style CMT device
+
+The CMT (Compare Match Timer) driver implements a new style of platform
+data that handles the timer as a single device with multiple channel.
+Switch from the old-style platform data to the new-style platform data.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 652256fd475053f7fd8c2cd3e85f37be96d594db)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-sh73a0.c | 2 +-
+ arch/arm/mach-shmobile/setup-sh73a0.c | 36 ++++++++++++-----------------------
+ 2 files changed, 13 insertions(+), 25 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
+index 23edf8360c27..ca03989c0d78 100644
+--- a/arch/arm/mach-shmobile/clock-sh73a0.c
++++ b/arch/arm/mach-shmobile/clock-sh73a0.c
+@@ -650,7 +650,6 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */
+ CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
+ CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */
+- CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
+ CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */
+ CLKDEV_DEV_ID("ec230000.sound", &mstp_clks[MSTP328]), /* FSI */
+ CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
+@@ -683,6 +682,7 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
+ CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.0", &dsi0phy_clk),
+ CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.1", &dsi1phy_clk),
++ CLKDEV_ICK_ID("fck", "sh-cmt-48.1", &mstp_clks[MSTP329]), /* CMT1 */
+ };
+
+ void __init sh73a0_clock_init(void)
+diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
+index f74ab530c71d..71d0e4460a10 100644
+--- a/arch/arm/mach-shmobile/setup-sh73a0.c
++++ b/arch/arm/mach-shmobile/setup-sh73a0.c
+@@ -104,35 +104,23 @@ SH73A0_SCIF(PORT_SCIFA, 6, 0xe6cc0000, gic_spi(156));
+ SH73A0_SCIF(PORT_SCIFA, 7, 0xe6cd0000, gic_spi(143));
+ SH73A0_SCIF(PORT_SCIFB, 8, 0xe6c30000, gic_spi(80));
+
+-static struct sh_timer_config cmt10_platform_data = {
+- .name = "CMT10",
+- .channel_offset = 0x10,
+- .timer_bit = 0,
+- .clockevent_rating = 80,
+- .clocksource_rating = 125,
++static struct sh_timer_config cmt1_platform_data = {
++ .channels_mask = 0x3f,
+ };
+
+-static struct resource cmt10_resources[] = {
+- [0] = {
+- .name = "CMT10",
+- .start = 0xe6138010,
+- .end = 0xe613801b,
+- .flags = IORESOURCE_MEM,
+- },
+- [1] = {
+- .start = gic_spi(65),
+- .flags = IORESOURCE_IRQ,
+- },
++static struct resource cmt1_resources[] = {
++ DEFINE_RES_MEM(0xe6138000, 0x200),
++ DEFINE_RES_IRQ(gic_spi(65)),
+ };
+
+-static struct platform_device cmt10_device = {
+- .name = "sh_cmt",
+- .id = 10,
++static struct platform_device cmt1_device = {
++ .name = "sh-cmt-48",
++ .id = 1,
+ .dev = {
+- .platform_data = &cmt10_platform_data,
++ .platform_data = &cmt1_platform_data,
+ },
+- .resource = cmt10_resources,
+- .num_resources = ARRAY_SIZE(cmt10_resources),
++ .resource = cmt1_resources,
++ .num_resources = ARRAY_SIZE(cmt1_resources),
+ };
+
+ /* TMU */
+@@ -746,7 +734,7 @@ static struct platform_device *sh73a0_devices_dt[] __initdata = {
+ &scif6_device,
+ &scif7_device,
+ &scif8_device,
+- &cmt10_device,
++ &cmt1_device,
+ };
+
+ static struct platform_device *sh73a0_early_devices[] __initdata = {
+--
+2.1.2
+
--- /dev/null
+From 7a4cf8b3ebf8cafacc04b0ce9fd0756d8e010642 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 23 Apr 2014 13:15:11 +0200
+Subject: ARM: shmobile: r8a73a4: Switch to new style CMT device
+
+The CMT (Compare Match Timer) driver implements a new style of platform
+data that handles the timer as a single device with multiple channel.
+Switch from the old-style platform data to the new-style platform data.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 52065ef71e2c4da9e9661da68915741afc72ec1d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a73a4.c | 2 +-
+ arch/arm/mach-shmobile/setup-r8a73a4.c | 17 +++++++----------
+ 2 files changed, 8 insertions(+), 11 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
+index 7348d58f500e..b5bc22c6a858 100644
+--- a/arch/arm/mach-shmobile/clock-r8a73a4.c
++++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
+@@ -597,7 +597,7 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("e6560000.i2c", &mstp_clks[MSTP317]),
+ CLKDEV_DEV_ID("e6500000.i2c", &mstp_clks[MSTP318]),
+ CLKDEV_DEV_ID("e6510000.i2c", &mstp_clks[MSTP323]),
+- CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]),
++ CLKDEV_ICK_ID("fck", "sh-cmt-48-gen2.1", &mstp_clks[MSTP329]),
+ CLKDEV_DEV_ID("e60b0000.i2c", &mstp_clks[MSTP409]),
+ CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP410]),
+ CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP411]),
+diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
+index cd36f8078325..9333770cfac2 100644
+--- a/arch/arm/mach-shmobile/setup-r8a73a4.c
++++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
+@@ -169,20 +169,17 @@ static const struct resource thermal0_resources[] = {
+ thermal0_resources, \
+ ARRAY_SIZE(thermal0_resources))
+
+-static struct sh_timer_config cmt10_platform_data = {
+- .name = "CMT10",
+- .timer_bit = 0,
+- .clockevent_rating = 80,
++static struct sh_timer_config cmt1_platform_data = {
++ .channels_mask = 0xff,
+ };
+
+-static struct resource cmt10_resources[] = {
+- DEFINE_RES_MEM(0xe6130010, 0x0c),
+- DEFINE_RES_MEM(0xe6130000, 0x04),
+- DEFINE_RES_IRQ(gic_spi(120)), /* CMT1_0 */
++static struct resource cmt1_resources[] = {
++ DEFINE_RES_MEM(0xe6130000, 0x1004),
++ DEFINE_RES_IRQ(gic_spi(120)),
+ };
+
+ #define r8a7790_register_cmt(idx) \
+- platform_device_register_resndata(&platform_bus, "sh_cmt", \
++ platform_device_register_resndata(&platform_bus, "sh-cmt-48-gen2", \
+ idx, cmt##idx##_resources, \
+ ARRAY_SIZE(cmt##idx##_resources), \
+ &cmt##idx##_platform_data, \
+@@ -196,7 +193,7 @@ void __init r8a73a4_add_dt_devices(void)
+ r8a73a4_register_scif(3);
+ r8a73a4_register_scif(4);
+ r8a73a4_register_scif(5);
+- r8a7790_register_cmt(10);
++ r8a7790_register_cmt(1);
+ }
+
+ /* DMA */
+--
+2.1.2
+
--- /dev/null
+From 93e3437363954dc3cd2227123692f53bd83e2a2f Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 23 Apr 2014 13:15:12 +0200
+Subject: ARM: shmobile: r8a7740: Switch to new style CMT device
+
+The CMT (Compare Match Timer) driver implements a new style of platform
+data that handles the timer as a single device with multiple channel.
+Switch from the old-style platform data to the new-style platform data.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e0ad56a35e02fe16f12cc18867903f8462d587bf)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7740.c | 2 +-
+ arch/arm/mach-shmobile/setup-r8a7740.c | 36 ++++++++++++----------------------
+ 2 files changed, 13 insertions(+), 25 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
+index 433ec674ead1..5ea385e46860 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7740.c
++++ b/arch/arm/mach-shmobile/clock-r8a7740.c
+@@ -583,7 +583,6 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP230]),
+ CLKDEV_DEV_ID("e6cc0000.sci", &mstp_clks[MSTP230]),
+
+- CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]),
+ CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]),
+ CLKDEV_DEV_ID("fe1f0000.sound", &mstp_clks[MSTP328]),
+ CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]),
+@@ -604,6 +603,7 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("e6870000.sd", &mstp_clks[MSTP415]),
+
+ /* ICK */
++ CLKDEV_ICK_ID("fck", "sh-cmt-48.1", &mstp_clks[MSTP329]),
+ CLKDEV_ICK_ID("host", "renesas_usbhs", &mstp_clks[MSTP416]),
+ CLKDEV_ICK_ID("func", "renesas_usbhs", &mstp_clks[MSTP407]),
+ CLKDEV_ICK_ID("phy", "renesas_usbhs", &mstp_clks[MSTP406]),
+diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
+index a177a7b3bdbd..236ac3c8f9ae 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7740.c
++++ b/arch/arm/mach-shmobile/setup-r8a7740.c
+@@ -237,35 +237,23 @@ R8A7740_SCIF(PORT_SCIFA, 7, 0xe6cd0000, gic_spi(107));
+ R8A7740_SCIF(PORT_SCIFB, 8, 0xe6c30000, gic_spi(108));
+
+ /* CMT */
+-static struct sh_timer_config cmt10_platform_data = {
+- .name = "CMT10",
+- .channel_offset = 0x10,
+- .timer_bit = 0,
+- .clockevent_rating = 125,
+- .clocksource_rating = 125,
++static struct sh_timer_config cmt1_platform_data = {
++ .channels_mask = 0x3f,
+ };
+
+-static struct resource cmt10_resources[] = {
+- [0] = {
+- .name = "CMT10",
+- .start = 0xe6138010,
+- .end = 0xe613801b,
+- .flags = IORESOURCE_MEM,
+- },
+- [1] = {
+- .start = gic_spi(58),
+- .flags = IORESOURCE_IRQ,
+- },
++static struct resource cmt1_resources[] = {
++ DEFINE_RES_MEM(0xe6138000, 0x170),
++ DEFINE_RES_IRQ(gic_spi(58)),
+ };
+
+-static struct platform_device cmt10_device = {
+- .name = "sh_cmt",
+- .id = 10,
++static struct platform_device cmt1_device = {
++ .name = "sh-cmt-48",
++ .id = 1,
+ .dev = {
+- .platform_data = &cmt10_platform_data,
++ .platform_data = &cmt1_platform_data,
+ },
+- .resource = cmt10_resources,
+- .num_resources = ARRAY_SIZE(cmt10_resources),
++ .resource = cmt1_resources,
++ .num_resources = ARRAY_SIZE(cmt1_resources),
+ };
+
+ /* TMU */
+@@ -400,7 +388,7 @@ static struct platform_device *r8a7740_devices_dt[] __initdata = {
+ &scif6_device,
+ &scif7_device,
+ &scif8_device,
+- &cmt10_device,
++ &cmt1_device,
+ };
+
+ static struct platform_device *r8a7740_early_devices[] __initdata = {
+--
+2.1.2
+
--- /dev/null
+From 39245efde9e8d8ac26422a933a59ae57df79b288 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 23 Apr 2014 13:15:13 +0200
+Subject: ARM: shmobile: r8a7790: Switch to new style CMT device
+
+The CMT (Compare Match Timer) driver implements a new style of platform
+data that handles the timer as a single device with multiple channel.
+Switch from the old-style platform data to the new-style platform data.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+[horms+renesas@verge.net.au resolved conflict: use clk_names]
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+(cherry picked from commit 711ee6c8dee1df265773786cd0ec96f2cae5c189)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-lager-reference.c | 2 +-
+ arch/arm/mach-shmobile/clock-r8a7790.c | 2 +-
+ arch/arm/mach-shmobile/setup-r8a7790.c | 17 +++++++----------
+ 3 files changed, 9 insertions(+), 12 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
+index 1eb48cffb4c5..1bca2748aa7c 100644
+--- a/arch/arm/mach-shmobile/board-lager-reference.c
++++ b/arch/arm/mach-shmobile/board-lager-reference.c
+@@ -90,7 +90,7 @@ static void __init lager_add_du_device(void)
+ * devices until they get moved to DT.
+ */
+ static const struct clk_name clk_names[] __initconst = {
+- { "cmt0", NULL, "sh_cmt.0" },
++ { "cmt0", "fck", "sh-cmt-48-gen2.0" },
+ { "scifa0", NULL, "sh-sci.0" },
+ { "scifa1", NULL, "sh-sci.1" },
+ { "scifb0", NULL, "sh-sci.2" },
+diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
+index a936ae7de083..296a057109e4 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7790.c
++++ b/arch/arm/mach-shmobile/clock-r8a7790.c
+@@ -357,7 +357,6 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
+ CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP311]),
+ CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
+- CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
+ CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
+ CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),
+ CLKDEV_DEV_ID("pci-rcar-gen2.0", &mstp_clks[MSTP703]),
+@@ -367,6 +366,7 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("sata-r8a7790.1", &mstp_clks[MSTP814]),
+
+ /* ICK */
++ CLKDEV_ICK_ID("fck", "sh-cmt-48-gen2.0", &mstp_clks[MSTP124]),
+ CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]),
+ CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7790", &mstp_clks[MSTP726]),
+ CLKDEV_ICK_ID("lvds.1", "rcar-du-r8a7790", &mstp_clks[MSTP725]),
+diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
+index a901d9ef53f6..2a6708358d4e 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7790.c
++++ b/arch/arm/mach-shmobile/setup-r8a7790.c
+@@ -263,20 +263,17 @@ static const struct resource thermal_resources[] __initconst = {
+ thermal_resources, \
+ ARRAY_SIZE(thermal_resources))
+
+-static const struct sh_timer_config cmt00_platform_data __initconst = {
+- .name = "CMT00",
+- .timer_bit = 0,
+- .clockevent_rating = 80,
++static struct sh_timer_config cmt0_platform_data = {
++ .channels_mask = 0x60,
+ };
+
+-static const struct resource cmt00_resources[] __initconst = {
+- DEFINE_RES_MEM(0xffca0510, 0x0c),
+- DEFINE_RES_MEM(0xffca0500, 0x04),
+- DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
++static struct resource cmt0_resources[] = {
++ DEFINE_RES_MEM(0xffca0000, 0x1004),
++ DEFINE_RES_IRQ(gic_spi(142)),
+ };
+
+ #define r8a7790_register_cmt(idx) \
+- platform_device_register_resndata(&platform_bus, "sh_cmt", \
++ platform_device_register_resndata(&platform_bus, "sh-cmt-48-gen2", \
+ idx, cmt##idx##_resources, \
+ ARRAY_SIZE(cmt##idx##_resources), \
+ &cmt##idx##_platform_data, \
+@@ -294,7 +291,7 @@ void __init r8a7790_add_dt_devices(void)
+ r8a7790_register_scif(7);
+ r8a7790_register_scif(8);
+ r8a7790_register_scif(9);
+- r8a7790_register_cmt(00);
++ r8a7790_register_cmt(0);
+ }
+
+ void __init r8a7790_add_standard_devices(void)
+--
+2.1.2
+
--- /dev/null
+From 9d243c41464dc8db6373bc85f1cd1ec284885000 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 23 Apr 2014 13:15:14 +0200
+Subject: ARM: shmobile: r8a7791: Switch to new style CMT device
+
+The CMT (Compare Match Timer) driver implements a new style of platform
+data that handles the timer as a single device with multiple channel.
+Switch from the old-style platform data to the new-style platform data.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+[horms+renesas@verge.net.au resolved conflict: use clk_names]
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+(cherry picked from commit 356af68bf483e4564f75a35287a8f5f39d31041f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-koelsch-reference.c | 2 +-
+ arch/arm/mach-shmobile/clock-r8a7791.c | 2 +-
+ arch/arm/mach-shmobile/setup-r8a7791.c | 17 +++++++----------
+ 3 files changed, 9 insertions(+), 12 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
+index 941f8b394e84..bd9093221f76 100644
+--- a/arch/arm/mach-shmobile/board-koelsch-reference.c
++++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
+@@ -86,7 +86,7 @@ static void __init koelsch_add_du_device(void)
+ * devices until they get moved to DT.
+ */
+ static const struct clk_name clk_names[] __initconst = {
+- { "cmt0", NULL, "sh_cmt.0" },
++ { "cmt0", "fck", "sh-cmt-48-gen2.0" },
+ { "scifa0", NULL, "sh-sci.0" },
+ { "scifa1", NULL, "sh-sci.1" },
+ { "scifb0", NULL, "sh-sci.2" },
+diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
+index 3b26c7eee873..e2fdfcc14436 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7791.c
++++ b/arch/arm/mach-shmobile/clock-r8a7791.c
+@@ -264,7 +264,7 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
+ CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP312]),
+ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]),
+- CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
++ CLKDEV_ICK_ID("fck", "sh-cmt-48-gen2.0", &mstp_clks[MSTP124]),
+ CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
+ CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
+ CLKDEV_DEV_ID("i2c-rcar_gen2.0", &mstp_clks[MSTP931]),
+diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
+index a7e4966f5e18..9839daca32a3 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7791.c
++++ b/arch/arm/mach-shmobile/setup-r8a7791.c
+@@ -128,20 +128,17 @@ R8A7791_SCIFA(14, 0xe6c80000, gic_spi(31)); /* SCIFA5 */
+ &scif##index##_platform_data, \
+ sizeof(scif##index##_platform_data))
+
+-static const struct sh_timer_config cmt00_platform_data __initconst = {
+- .name = "CMT00",
+- .timer_bit = 0,
+- .clockevent_rating = 80,
++static struct sh_timer_config cmt0_platform_data = {
++ .channels_mask = 0x60,
+ };
+
+-static const struct resource cmt00_resources[] __initconst = {
+- DEFINE_RES_MEM(0xffca0510, 0x0c),
+- DEFINE_RES_MEM(0xffca0500, 0x04),
+- DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
++static struct resource cmt0_resources[] = {
++ DEFINE_RES_MEM(0xffca0000, 0x1004),
++ DEFINE_RES_IRQ(gic_spi(142)),
+ };
+
+ #define r8a7791_register_cmt(idx) \
+- platform_device_register_resndata(&platform_bus, "sh_cmt", \
++ platform_device_register_resndata(&platform_bus, "sh-cmt-48-gen2", \
+ idx, cmt##idx##_resources, \
+ ARRAY_SIZE(cmt##idx##_resources), \
+ &cmt##idx##_platform_data, \
+@@ -200,7 +197,7 @@ void __init r8a7791_add_dt_devices(void)
+ r8a7791_register_scif(12);
+ r8a7791_register_scif(13);
+ r8a7791_register_scif(14);
+- r8a7791_register_cmt(00);
++ r8a7791_register_cmt(0);
+ }
+
+ void __init r8a7791_add_standard_devices(void)
+--
+2.1.2
+
--- /dev/null
+From 45afb7607c20e73998cd2a4b009908bbdf8119e5 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 23 Apr 2014 13:15:16 +0200
+Subject: ARM: shmobile: sh7372: Switch to new style TMU device
+
+The TMU (Timer Unit) driver implements a new style of platform data that
+handles the timer as a single device with multiple channel. Switch from
+the old-style platform data to the new-style platform data.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8e8236a9d86e5cf5979be13c3063d2381fbed285)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-sh7372.c | 3 +-
+ arch/arm/mach-shmobile/setup-sh7372.c | 69 +++++++----------------------------
+ 2 files changed, 15 insertions(+), 57 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
+index c622b491edaf..d16d9ca7f79e 100644
+--- a/arch/arm/mach-shmobile/clock-sh7372.c
++++ b/arch/arm/mach-shmobile/clock-sh7372.c
+@@ -515,8 +515,6 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */
+ CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU */
+ CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2 */
+- CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
+- CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
+ CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX0 */
+ CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */
+ CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */
+@@ -577,6 +575,7 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_ICK_ID("ick", "sh-mobile-hdmi", &div6_reparent_clks[DIV6_HDMI]),
+ CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]),
+ CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]),
++ CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP125]), /* TMU0 */
+ CLKDEV_ICK_ID("spu2", "sh_fsi2", &mstp_clks[MSTP223]),
+ CLKDEV_ICK_ID("fck", "sh-cmt-32-fast.4", &mstp_clks[MSTP405]), /* CMT4 */
+ CLKDEV_ICK_ID("fck", "sh-cmt-32-fast.3", &mstp_clks[MSTP404]), /* CMT3 */
+diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
+index 0995b7299229..2a8b9f2a2f54 100644
+--- a/arch/arm/mach-shmobile/setup-sh7372.c
++++ b/arch/arm/mach-shmobile/setup-sh7372.c
+@@ -138,64 +138,25 @@ static struct platform_device cmt2_device = {
+ };
+
+ /* TMU */
+-static struct sh_timer_config tmu00_platform_data = {
+- .name = "TMU00",
+- .channel_offset = 0x4,
+- .timer_bit = 0,
+- .clockevent_rating = 200,
++static struct sh_timer_config tmu0_platform_data = {
++ .channels_mask = 7,
+ };
+
+-static struct resource tmu00_resources[] = {
+- [0] = {
+- .name = "TMU00",
+- .start = 0xfff60008,
+- .end = 0xfff60013,
+- .flags = IORESOURCE_MEM,
+- },
+- [1] = {
+- .start = intcs_evt2irq(0xe80), /* TMU_TUNI0 */
+- .flags = IORESOURCE_IRQ,
+- },
++static struct resource tmu0_resources[] = {
++ DEFINE_RES_MEM(0xfff60000, 0x2c),
++ DEFINE_RES_IRQ(intcs_evt2irq(0xe80)),
++ DEFINE_RES_IRQ(intcs_evt2irq(0xea0)),
++ DEFINE_RES_IRQ(intcs_evt2irq(0xec0)),
+ };
+
+-static struct platform_device tmu00_device = {
+- .name = "sh_tmu",
++static struct platform_device tmu0_device = {
++ .name = "sh-tmu",
+ .id = 0,
+ .dev = {
+- .platform_data = &tmu00_platform_data,
+- },
+- .resource = tmu00_resources,
+- .num_resources = ARRAY_SIZE(tmu00_resources),
+-};
+-
+-static struct sh_timer_config tmu01_platform_data = {
+- .name = "TMU01",
+- .channel_offset = 0x10,
+- .timer_bit = 1,
+- .clocksource_rating = 200,
+-};
+-
+-static struct resource tmu01_resources[] = {
+- [0] = {
+- .name = "TMU01",
+- .start = 0xfff60014,
+- .end = 0xfff6001f,
+- .flags = IORESOURCE_MEM,
+- },
+- [1] = {
+- .start = intcs_evt2irq(0xea0), /* TMU_TUNI1 */
+- .flags = IORESOURCE_IRQ,
+- },
+-};
+-
+-static struct platform_device tmu01_device = {
+- .name = "sh_tmu",
+- .id = 1,
+- .dev = {
+- .platform_data = &tmu01_platform_data,
++ .platform_data = &tmu0_platform_data,
+ },
+- .resource = tmu01_resources,
+- .num_resources = ARRAY_SIZE(tmu01_resources),
++ .resource = tmu0_resources,
++ .num_resources = ARRAY_SIZE(tmu0_resources),
+ };
+
+ /* I2C */
+@@ -940,8 +901,7 @@ static struct platform_device *sh7372_early_devices[] __initdata = {
+ &scif5_device,
+ &scif6_device,
+ &cmt2_device,
+- &tmu00_device,
+- &tmu01_device,
++ &tmu0_device,
+ &ipmmu_device,
+ };
+
+@@ -988,8 +948,7 @@ void __init sh7372_add_standard_devices(void)
+ { "A4R", &veu2_device, },
+ { "A4R", &veu3_device, },
+ { "A4R", &jpu_device, },
+- { "A4R", &tmu00_device, },
+- { "A4R", &tmu01_device, },
++ { "A4R", &tmu0_device, },
+ };
+
+ sh7372_init_pm_domains();
+--
+2.1.2
+
--- /dev/null
+From c7b4a0ea203b8311be6f7c3e0502aa07dc48cc66 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 23 Apr 2014 13:15:17 +0200
+Subject: ARM: shmobile: sh73a0: Switch to new style TMU device
+
+The TMU (Timer Unit) driver implements a new style of platform data that
+handles the timer as a single device with multiple channel. Switch from
+the old-style platform data to the new-style platform data.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 3df592bc335a6efe30c88c9e39d29ceb5c20bbfb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-sh73a0.c | 3 +-
+ arch/arm/mach-shmobile/setup-sh73a0.c | 56 ++++++++---------------------------
+ 2 files changed, 14 insertions(+), 45 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
+index ca03989c0d78..0d9cd1fe0212 100644
+--- a/arch/arm/mach-shmobile/clock-sh73a0.c
++++ b/arch/arm/mach-shmobile/clock-sh73a0.c
+@@ -633,8 +633,6 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("sh-mobile-csi2.1", &mstp_clks[MSTP128]), /* CSI2-RX1 */
+ CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU0 */
+ CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2-RX0 */
+- CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
+- CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
+ CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
+ CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
+ CLKDEV_DEV_ID("e6820000.i2c", &mstp_clks[MSTP116]), /* I2C0 */
+@@ -683,6 +681,7 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.0", &dsi0phy_clk),
+ CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.1", &dsi1phy_clk),
+ CLKDEV_ICK_ID("fck", "sh-cmt-48.1", &mstp_clks[MSTP329]), /* CMT1 */
++ CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP125]), /* TMU0 */
+ };
+
+ void __init sh73a0_clock_init(void)
+diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
+index 71d0e4460a10..ad00724a2269 100644
+--- a/arch/arm/mach-shmobile/setup-sh73a0.c
++++ b/arch/arm/mach-shmobile/setup-sh73a0.c
+@@ -124,54 +124,25 @@ static struct platform_device cmt1_device = {
+ };
+
+ /* TMU */
+-static struct sh_timer_config tmu00_platform_data = {
+- .name = "TMU00",
+- .channel_offset = 0x4,
+- .timer_bit = 0,
+- .clockevent_rating = 200,
++static struct sh_timer_config tmu0_platform_data = {
++ .channels_mask = 7,
+ };
+
+-static struct resource tmu00_resources[] = {
+- [0] = DEFINE_RES_MEM(0xfff60008, 0xc),
+- [1] = {
+- .start = intcs_evt2irq(0x0e80), /* TMU0_TUNI00 */
+- .flags = IORESOURCE_IRQ,
+- },
++static struct resource tmu0_resources[] = {
++ DEFINE_RES_MEM(0xfff60000, 0x2c),
++ DEFINE_RES_IRQ(intcs_evt2irq(0xe80)),
++ DEFINE_RES_IRQ(intcs_evt2irq(0xea0)),
++ DEFINE_RES_IRQ(intcs_evt2irq(0xec0)),
+ };
+
+-static struct platform_device tmu00_device = {
+- .name = "sh_tmu",
++static struct platform_device tmu0_device = {
++ .name = "sh-tmu",
+ .id = 0,
+ .dev = {
+- .platform_data = &tmu00_platform_data,
+- },
+- .resource = tmu00_resources,
+- .num_resources = ARRAY_SIZE(tmu00_resources),
+-};
+-
+-static struct sh_timer_config tmu01_platform_data = {
+- .name = "TMU01",
+- .channel_offset = 0x10,
+- .timer_bit = 1,
+- .clocksource_rating = 200,
+-};
+-
+-static struct resource tmu01_resources[] = {
+- [0] = DEFINE_RES_MEM(0xfff60014, 0xc),
+- [1] = {
+- .start = intcs_evt2irq(0x0ea0), /* TMU0_TUNI01 */
+- .flags = IORESOURCE_IRQ,
+- },
+-};
+-
+-static struct platform_device tmu01_device = {
+- .name = "sh_tmu",
+- .id = 1,
+- .dev = {
+- .platform_data = &tmu01_platform_data,
++ .platform_data = &tmu0_platform_data,
+ },
+- .resource = tmu01_resources,
+- .num_resources = ARRAY_SIZE(tmu01_resources),
++ .resource = tmu0_resources,
++ .num_resources = ARRAY_SIZE(tmu0_resources),
+ };
+
+ static struct resource i2c0_resources[] = {
+@@ -738,8 +709,7 @@ static struct platform_device *sh73a0_devices_dt[] __initdata = {
+ };
+
+ static struct platform_device *sh73a0_early_devices[] __initdata = {
+- &tmu00_device,
+- &tmu01_device,
++ &tmu0_device,
+ &ipmmu_device,
+ };
+
+--
+2.1.2
+
--- /dev/null
+From 25bd60b4415c5b4bc612e91c0c1fb2707459c895 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 23 Apr 2014 13:15:18 +0200
+Subject: ARM: shmobile: r8a7740: Switch to new style TMU device
+
+The TMU (Timer Unit) driver implements a new style of platform data that
+handles the timer as a single device with multiple channel. Switch from
+the old-style platform data to the new-style platform data.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 8ec72e46067d237dd60a08582e6427159c3f4b5f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7740.c | 8 +--
+ arch/arm/mach-shmobile/setup-r8a7740.c | 97 +++++-----------------------------
+ 2 files changed, 15 insertions(+), 90 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
+index 5ea385e46860..50931e3c97c7 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7740.c
++++ b/arch/arm/mach-shmobile/clock-r8a7740.c
+@@ -548,15 +548,9 @@ static struct clk_lookup lookups[] = {
+
+ /* MSTP32 clocks */
+ CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]),
+- CLKDEV_DEV_ID("sh_tmu.3", &mstp_clks[MSTP111]),
+- CLKDEV_DEV_ID("sh_tmu.4", &mstp_clks[MSTP111]),
+- CLKDEV_DEV_ID("sh_tmu.5", &mstp_clks[MSTP111]),
+ CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]),
+ CLKDEV_DEV_ID("fff20000.i2c", &mstp_clks[MSTP116]),
+ CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]),
+- CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]),
+- CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]),
+- CLKDEV_DEV_ID("sh_tmu.2", &mstp_clks[MSTP125]),
+ CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]),
+ CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP128]),
+
+@@ -603,6 +597,8 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("e6870000.sd", &mstp_clks[MSTP415]),
+
+ /* ICK */
++ CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP111]),
++ CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP125]),
+ CLKDEV_ICK_ID("fck", "sh-cmt-48.1", &mstp_clks[MSTP329]),
+ CLKDEV_ICK_ID("host", "renesas_usbhs", &mstp_clks[MSTP416]),
+ CLKDEV_ICK_ID("func", "renesas_usbhs", &mstp_clks[MSTP407]),
+diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
+index 236ac3c8f9ae..069cd3d0b18f 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7740.c
++++ b/arch/arm/mach-shmobile/setup-r8a7740.c
+@@ -257,94 +257,25 @@ static struct platform_device cmt1_device = {
+ };
+
+ /* TMU */
+-static struct sh_timer_config tmu00_platform_data = {
+- .name = "TMU00",
+- .channel_offset = 0x4,
+- .timer_bit = 0,
+- .clockevent_rating = 200,
++static struct sh_timer_config tmu0_platform_data = {
++ .channels_mask = 7,
+ };
+
+-static struct resource tmu00_resources[] = {
+- [0] = {
+- .name = "TMU00",
+- .start = 0xfff80008,
+- .end = 0xfff80014 - 1,
+- .flags = IORESOURCE_MEM,
+- },
+- [1] = {
+- .start = gic_spi(198),
+- .flags = IORESOURCE_IRQ,
+- },
++static struct resource tmu0_resources[] = {
++ DEFINE_RES_MEM(0xfff80000, 0x2c),
++ DEFINE_RES_IRQ(gic_spi(198)),
++ DEFINE_RES_IRQ(gic_spi(199)),
++ DEFINE_RES_IRQ(gic_spi(200)),
+ };
+
+-static struct platform_device tmu00_device = {
+- .name = "sh_tmu",
++static struct platform_device tmu0_device = {
++ .name = "sh-tmu",
+ .id = 0,
+ .dev = {
+- .platform_data = &tmu00_platform_data,
+- },
+- .resource = tmu00_resources,
+- .num_resources = ARRAY_SIZE(tmu00_resources),
+-};
+-
+-static struct sh_timer_config tmu01_platform_data = {
+- .name = "TMU01",
+- .channel_offset = 0x10,
+- .timer_bit = 1,
+- .clocksource_rating = 200,
+-};
+-
+-static struct resource tmu01_resources[] = {
+- [0] = {
+- .name = "TMU01",
+- .start = 0xfff80014,
+- .end = 0xfff80020 - 1,
+- .flags = IORESOURCE_MEM,
+- },
+- [1] = {
+- .start = gic_spi(199),
+- .flags = IORESOURCE_IRQ,
+- },
+-};
+-
+-static struct platform_device tmu01_device = {
+- .name = "sh_tmu",
+- .id = 1,
+- .dev = {
+- .platform_data = &tmu01_platform_data,
+- },
+- .resource = tmu01_resources,
+- .num_resources = ARRAY_SIZE(tmu01_resources),
+-};
+-
+-static struct sh_timer_config tmu02_platform_data = {
+- .name = "TMU02",
+- .channel_offset = 0x1C,
+- .timer_bit = 2,
+- .clocksource_rating = 200,
+-};
+-
+-static struct resource tmu02_resources[] = {
+- [0] = {
+- .name = "TMU02",
+- .start = 0xfff80020,
+- .end = 0xfff8002C - 1,
+- .flags = IORESOURCE_MEM,
+- },
+- [1] = {
+- .start = gic_spi(200),
+- .flags = IORESOURCE_IRQ,
+- },
+-};
+-
+-static struct platform_device tmu02_device = {
+- .name = "sh_tmu",
+- .id = 2,
+- .dev = {
+- .platform_data = &tmu02_platform_data,
++ .platform_data = &tmu0_platform_data,
+ },
+- .resource = tmu02_resources,
+- .num_resources = ARRAY_SIZE(tmu02_resources),
++ .resource = tmu0_resources,
++ .num_resources = ARRAY_SIZE(tmu0_resources),
+ };
+
+ /* IPMMUI (an IPMMU module for ICB/LMB) */
+@@ -396,9 +327,7 @@ static struct platform_device *r8a7740_early_devices[] __initdata = {
+ &irqpin1_device,
+ &irqpin2_device,
+ &irqpin3_device,
+- &tmu00_device,
+- &tmu01_device,
+- &tmu02_device,
++ &tmu0_device,
+ &ipmmu_device,
+ };
+
+--
+2.1.2
+
--- /dev/null
+From de52088b87688a1162080fdeb7ae203d538f01bb Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Fri, 2 May 2014 20:21:25 +0200
+Subject: ARM: shmobile: r8a7778: Switch to new style TMU device
+
+The TMU (Timer Unit) driver implements a new style of platform data that
+handles the timer as a single device with multiple channel. Switch from
+the old-style platform data to the new-style platform data.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 535ef0d9575b0809915341481ef3bac6bb5d0aaa)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7778.c | 4 ++--
+ arch/arm/mach-shmobile/setup-r8a7778.c | 28 +++++++---------------------
+ 2 files changed, 9 insertions(+), 23 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
+index 6609beb9b9b4..13f8f3ab8840 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7778.c
++++ b/arch/arm/mach-shmobile/clock-r8a7778.c
+@@ -207,8 +207,6 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP023]), /* SCIF3 */
+ CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */
+ CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
+- CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
+- CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */
+ CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
+ CLKDEV_DEV_ID("fffc7000.spi", &mstp_clks[MSTP007]), /* HSPI0 */
+ CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
+@@ -239,6 +237,8 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_ICK_ID("src.6", "rcar_sound", &mstp_clks[MSTP525]),
+ CLKDEV_ICK_ID("src.7", "rcar_sound", &mstp_clks[MSTP524]),
+ CLKDEV_ICK_ID("src.8", "rcar_sound", &mstp_clks[MSTP523]),
++ CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP016]),
++ CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP015]),
+ };
+
+ void __init r8a7778_clock_init(void)
+diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
+index 6d694526e4ca..8c02e24f2483 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7778.c
++++ b/arch/arm/mach-shmobile/setup-r8a7778.c
+@@ -71,33 +71,20 @@ R8A7778_SCIF(5, 0xffe45000, gic_iid(0x6b));
+ sizeof(scif##index##_platform_data))
+
+ /* TMU */
+-static struct resource sh_tmu0_resources[] __initdata = {
+- DEFINE_RES_MEM(0xffd80008, 12),
+- DEFINE_RES_IRQ(gic_iid(0x40)),
+-};
+-
+-static struct sh_timer_config sh_tmu0_platform_data __initdata = {
+- .name = "TMU00",
+- .channel_offset = 0x4,
+- .timer_bit = 0,
+- .clockevent_rating = 200,
++static struct sh_timer_config sh_tmu0_platform_data = {
++ .channels_mask = 7,
+ };
+
+-static struct resource sh_tmu1_resources[] __initdata = {
+- DEFINE_RES_MEM(0xffd80014, 12),
++static struct resource sh_tmu0_resources[] = {
++ DEFINE_RES_MEM(0xffd80000, 0x30),
++ DEFINE_RES_IRQ(gic_iid(0x40)),
+ DEFINE_RES_IRQ(gic_iid(0x41)),
+-};
+-
+-static struct sh_timer_config sh_tmu1_platform_data __initdata = {
+- .name = "TMU01",
+- .channel_offset = 0x10,
+- .timer_bit = 1,
+- .clocksource_rating = 200,
++ DEFINE_RES_IRQ(gic_iid(0x42)),
+ };
+
+ #define r8a7778_register_tmu(idx) \
+ platform_device_register_resndata( \
+- &platform_bus, "sh_tmu", idx, \
++ &platform_bus, "sh-tmu", idx, \
+ sh_tmu##idx##_resources, \
+ ARRAY_SIZE(sh_tmu##idx##_resources), \
+ &sh_tmu##idx##_platform_data, \
+@@ -312,7 +299,6 @@ void __init r8a7778_add_dt_devices(void)
+ r8a7778_register_scif(4);
+ r8a7778_register_scif(5);
+ r8a7778_register_tmu(0);
+- r8a7778_register_tmu(1);
+ }
+
+ /* HPB-DMA */
+--
+2.1.2
+
--- /dev/null
+From d81351c2ceecda2cb078d1b87be49babcd42ac71 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 23 Apr 2014 13:15:20 +0200
+Subject: ARM: shmobile: r8a7779: Switch to new style TMU device
+
+The TMU (Timer Unit) driver implements a new style of platform data that
+handles the timer as a single device with multiple channel. Switch from
+the old-style platform data to the new-style platform data.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e4ae34e285b1c102686cb1c2a39ef93f930bf8f4)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r8a7779.c | 4 +--
+ arch/arm/mach-shmobile/setup-r8a7779.c | 66 +++++++---------------------------
+ 2 files changed, 14 insertions(+), 56 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
+index 8e403ae0c7b2..a13298bd37a8 100644
+--- a/arch/arm/mach-shmobile/clock-r8a7779.c
++++ b/arch/arm/mach-shmobile/clock-r8a7779.c
+@@ -173,9 +173,7 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("ohci-platform.1", &mstp_clks[MSTP101]), /* USB OHCI port2 */
+ CLKDEV_DEV_ID("ehci-platform.0", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */
+ CLKDEV_DEV_ID("ohci-platform.0", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */
+- CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
+- CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */
+- CLKDEV_DEV_ID("sh_tmu.2", &mstp_clks[MSTP016]), /* TMU02 */
++ CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP016]), /* TMU0 */
+ CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
+ CLKDEV_DEV_ID("ffc70000.i2c", &mstp_clks[MSTP030]), /* I2C0 */
+ CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
+diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
+index 8e860b36997a..d197b5adc886 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7779.c
++++ b/arch/arm/mach-shmobile/setup-r8a7779.c
+@@ -219,64 +219,25 @@ R8A7779_SCIF(4, 0xffe44000, gic_iid(0x7c));
+ R8A7779_SCIF(5, 0xffe45000, gic_iid(0x7d));
+
+ /* TMU */
+-static struct sh_timer_config tmu00_platform_data = {
+- .name = "TMU00",
+- .channel_offset = 0x4,
+- .timer_bit = 0,
+- .clockevent_rating = 200,
++static struct sh_timer_config tmu0_platform_data = {
++ .channels_mask = 7,
+ };
+
+-static struct resource tmu00_resources[] = {
+- [0] = {
+- .name = "TMU00",
+- .start = 0xffd80008,
+- .end = 0xffd80013,
+- .flags = IORESOURCE_MEM,
+- },
+- [1] = {
+- .start = gic_iid(0x40),
+- .flags = IORESOURCE_IRQ,
+- },
++static struct resource tmu0_resources[] = {
++ DEFINE_RES_MEM(0xffd80000, 0x30),
++ DEFINE_RES_IRQ(gic_iid(0x40)),
++ DEFINE_RES_IRQ(gic_iid(0x41)),
++ DEFINE_RES_IRQ(gic_iid(0x42)),
+ };
+
+-static struct platform_device tmu00_device = {
+- .name = "sh_tmu",
++static struct platform_device tmu0_device = {
++ .name = "sh-tmu",
+ .id = 0,
+ .dev = {
+- .platform_data = &tmu00_platform_data,
+- },
+- .resource = tmu00_resources,
+- .num_resources = ARRAY_SIZE(tmu00_resources),
+-};
+-
+-static struct sh_timer_config tmu01_platform_data = {
+- .name = "TMU01",
+- .channel_offset = 0x10,
+- .timer_bit = 1,
+- .clocksource_rating = 200,
+-};
+-
+-static struct resource tmu01_resources[] = {
+- [0] = {
+- .name = "TMU01",
+- .start = 0xffd80014,
+- .end = 0xffd8001f,
+- .flags = IORESOURCE_MEM,
+- },
+- [1] = {
+- .start = gic_iid(0x41),
+- .flags = IORESOURCE_IRQ,
+- },
+-};
+-
+-static struct platform_device tmu01_device = {
+- .name = "sh_tmu",
+- .id = 1,
+- .dev = {
+- .platform_data = &tmu01_platform_data,
++ .platform_data = &tmu0_platform_data,
+ },
+- .resource = tmu01_resources,
+- .num_resources = ARRAY_SIZE(tmu01_resources),
++ .resource = tmu0_resources,
++ .num_resources = ARRAY_SIZE(tmu0_resources),
+ };
+
+ /* I2C */
+@@ -685,8 +646,7 @@ static struct platform_device *r8a7779_devices_dt[] __initdata = {
+ &scif3_device,
+ &scif4_device,
+ &scif5_device,
+- &tmu00_device,
+- &tmu01_device,
++ &tmu0_device,
+ };
+
+ static struct platform_device *r8a7779_standard_devices[] __initdata = {
+--
+2.1.2
+
--- /dev/null
+From 140cad9153ee69734b82413611c1d5e7b2736ec1 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 23 Apr 2014 13:15:22 +0200
+Subject: ARM: shmobile: r7s72100: Switch to new style MTU2 device
+
+The MTU2 (Multi-Function Timer Pulse Unit 2) driver implements a new
+style of platform data that handles the timer as a single device with
+multiple channel. Switch from the old-style platform data to the
+new-style platform data.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Tested-by: Wolfram Sang <wsa@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c17fcfbcc0f6b4f3cae761149e1a6108dd6750e7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r7s72100.c | 2 +-
+ arch/arm/mach-shmobile/setup-r7s72100.c | 26 +++++++++-----------------
+ 2 files changed, 10 insertions(+), 18 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
+index bee0073c9b64..644f1c2a96c7 100644
+--- a/arch/arm/mach-shmobile/clock-r7s72100.c
++++ b/arch/arm/mach-shmobile/clock-r7s72100.c
+@@ -204,7 +204,6 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
+ CLKDEV_DEV_ID("fcfeec00.i2c", &mstp_clks[MSTP94]),
+ CLKDEV_DEV_ID("r7s72100-ether", &mstp_clks[MSTP74]),
+- CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
+
+ /* ICK */
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP47]),
+@@ -215,6 +214,7 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP42]),
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &mstp_clks[MSTP41]),
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &mstp_clks[MSTP40]),
++ CLKDEV_ICK_ID("fck", "sh-mtu2", &mstp_clks[MSTP33]),
+ };
+
+ void __init r7s72100_clock_init(void)
+diff --git a/arch/arm/mach-shmobile/setup-r7s72100.c b/arch/arm/mach-shmobile/setup-r7s72100.c
+index 9c0b3a9d5f7a..545db1512480 100644
+--- a/arch/arm/mach-shmobile/setup-r7s72100.c
++++ b/arch/arm/mach-shmobile/setup-r7s72100.c
+@@ -62,24 +62,16 @@ R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
+ sizeof(scif##index##_platform_data))
+
+
+-static struct sh_timer_config mtu2_0_platform_data __initdata = {
+- .name = "MTU2_0",
+- .timer_bit = 0,
+- .channel_offset = -0x80,
+- .clockevent_rating = 200,
++static struct resource mtu2_resources[] __initdata = {
++ DEFINE_RES_MEM(0xfcff0000, 0x400),
++ DEFINE_RES_IRQ_NAMED(gic_iid(139), "tgi0a"),
+ };
+
+-static struct resource mtu2_0_resources[] __initdata = {
+- DEFINE_RES_MEM(0xfcff0300, 0x27),
+- DEFINE_RES_IRQ(gic_iid(139)), /* MTU2 TGI0A */
+-};
+-
+-#define r7s72100_register_mtu2(idx) \
+- platform_device_register_resndata(&platform_bus, "sh_mtu2", \
+- idx, mtu2_##idx##_resources, \
+- ARRAY_SIZE(mtu2_##idx##_resources), \
+- &mtu2_##idx##_platform_data, \
+- sizeof(struct sh_timer_config))
++#define r7s72100_register_mtu2() \
++ platform_device_register_resndata(&platform_bus, "sh-mtu2", \
++ -1, mtu2_resources, \
++ ARRAY_SIZE(mtu2_resources), \
++ NULL, 0)
+
+ void __init r7s72100_add_dt_devices(void)
+ {
+@@ -91,7 +83,7 @@ void __init r7s72100_add_dt_devices(void)
+ r7s72100_register_scif(5);
+ r7s72100_register_scif(6);
+ r7s72100_register_scif(7);
+- r7s72100_register_mtu2(0);
++ r7s72100_register_mtu2();
+ }
+
+ void __init r7s72100_init_early(void)
+--
+2.1.2
+
--- /dev/null
+From 4dc9e0e0edf77b15fa062a82357854700ff75261 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Thu, 8 May 2014 08:32:29 +0900
+Subject: ARM: shmobile: Add r8a7740 Maximum CPU Frequency to DTS
+
+Add 800 MHz to the r8a7740 DTS to describe the maximum CPU frequency.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Tested-by: Geert Uytterhoeven <geert@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 63575d8cd5cba0c657ac5c18f75e91e2e30cc0eb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7740.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
+index 560d8d71cea4..a4498de64f7d 100644
+--- a/arch/arm/boot/dts/r8a7740.dtsi
++++ b/arch/arm/boot/dts/r8a7740.dtsi
+@@ -22,6 +22,7 @@
+ compatible = "arm,cortex-a9";
+ device_type = "cpu";
+ reg = <0x0>;
++ clock-frequency = <800000000>;
+ };
+ };
+
+--
+2.1.2
+
--- /dev/null
+From 4bcd8049b2e0cadf40686b20137e4f9b564e9022 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Thu, 8 May 2014 08:32:38 +0900
+Subject: ARM: shmobile: Use r8a7740 DT CPU Frequency in common case
+
+Convert the common C-code-less r8a7740 DT board support
+to use shmobile_init_delay() to be able to migrate away
+from per-SoC delay setup functions.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Tested-by: Geert Uytterhoeven <geert@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a0c1fb0c285d9aa5f9d078449cfa37883a3f5a91)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7740.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
+index 069cd3d0b18f..f498ad52c85f 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7740.c
++++ b/arch/arm/mach-shmobile/setup-r8a7740.c
+@@ -841,7 +841,7 @@ static const char *r8a7740_boards_compat_dt[] __initdata = {
+
+ DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)")
+ .map_io = r8a7740_map_io,
+- .init_early = r8a7740_init_delay,
++ .init_early = shmobile_init_delay,
+ .init_irq = r8a7740_init_irq_of,
+ .init_machine = r8a7740_generic_init,
+ .dt_compat = r8a7740_boards_compat_dt,
+--
+2.1.2
+
--- /dev/null
+From e2ec0f66a4da97e7ea078aa0a11969102e625c6c Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Thu, 8 May 2014 08:32:47 +0900
+Subject: ARM: shmobile: Use r8a7740 DT CPU Frequency for Armadillo DT Ref
+
+Convert the Armadillo r8a7740 DT reference board support
+to use shmobile_init_delay() to be able to migrate away
+from per-SoC delay setup functions.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Tested-by: Geert Uytterhoeven <geert@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit e568802d13eb1dbcbe688aa4e7cf1db866a52e3e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-armadillo800eva-reference.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
+index 57d1a78367b6..57d246eb8813 100644
+--- a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
++++ b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
+@@ -187,7 +187,7 @@ static const char *eva_boards_compat_dt[] __initdata = {
+
+ DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva-reference")
+ .map_io = r8a7740_map_io,
+- .init_early = r8a7740_init_delay,
++ .init_early = shmobile_init_delay,
+ .init_irq = r8a7740_init_irq_of,
+ .init_machine = eva_init,
+ .init_late = shmobile_init_late,
+--
+2.1.2
+
--- /dev/null
+From af0135ab78a30273740357a2e20d6269a932b382 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Thu, 8 May 2014 08:32:56 +0900
+Subject: ARM: shmobile: Remove unused r8a7740_init_delay()
+
+Remove the now unused r8a7740_init_delay() function.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Tested-by: Geert Uytterhoeven <geert@glider.be>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit bf901fbd9040effe4aa1389f78efcc1c2736a44b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/include/mach/r8a7740.h | 1 -
+ arch/arm/mach-shmobile/setup-r8a7740.c | 5 -----
+ 2 files changed, 6 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
+index d07932f872b6..5e3c9ec06303 100644
+--- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
++++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
+@@ -47,7 +47,6 @@ enum {
+ };
+
+ extern void r8a7740_meram_workaround(void);
+-extern void r8a7740_init_delay(void);
+ extern void r8a7740_init_irq_of(void);
+ extern void r8a7740_map_io(void);
+ extern void r8a7740_add_early_devices(void);
+diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
+index f498ad52c85f..c96099e3638c 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7740.c
++++ b/arch/arm/mach-shmobile/setup-r8a7740.c
+@@ -793,11 +793,6 @@ void __init r8a7740_add_standard_devices_dt(void)
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ }
+
+-void __init r8a7740_init_delay(void)
+-{
+- shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
+-};
+-
+ void __init r8a7740_init_irq_of(void)
+ {
+ void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10);
+--
+2.1.2
+
--- /dev/null
+From 12a99a095ed5bf0e279d42e1f44acdbcc02c12cd Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Thu, 8 May 2014 08:37:53 +0900
+Subject: ARM: shmobile: Minor cleanup of the Armadillo legacy board code
+
+Cleanup the legacy Armadillo board code slightly by
+removing the pointless eva_add_early_devices() function
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit fd105ecf17fe459d979f336a7389d87172a1cf6d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-armadillo800eva.c | 7 +------
+ 1 file changed, 1 insertion(+), 6 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
+index dfdc9730e029..d4e7f771c174 100644
+--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
++++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
+@@ -1292,11 +1292,6 @@ static void __init eva_earlytimer_init(void)
+ eva_clock_init();
+ }
+
+-static void __init eva_add_early_devices(void)
+-{
+- r8a7740_add_early_devices();
+-}
+-
+ #define RESCNT2 IOMEM(0xe6188020)
+ static void eva_restart(enum reboot_mode mode, const char *cmd)
+ {
+@@ -1311,7 +1306,7 @@ static const char *eva_boards_compat_dt[] __initdata = {
+
+ DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva")
+ .map_io = r8a7740_map_io,
+- .init_early = eva_add_early_devices,
++ .init_early = r8a7740_add_early_devices,
+ .init_irq = r8a7740_init_irq_of,
+ .init_machine = eva_init,
+ .init_late = shmobile_init_late,
+--
+2.1.2
+
--- /dev/null
+From 971ba3a290605f9d9e374317790bef314c2cea21 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 12 May 2014 08:25:18 +0900
+Subject: ARM: shmobile: Use r8a7791 DT CPU Frequency in common case
+
+Convert the common C-code-less r8a7791 DT board support
+to use shmobile_init_delay() to be able to migrate away
+from per-SoC delay setup functions.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 648c687a6a43a6473caedba4785a16537bd21bfb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7791.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
+index 9839daca32a3..71bc5ae053f5 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7791.c
++++ b/arch/arm/mach-shmobile/setup-r8a7791.c
+@@ -222,7 +222,7 @@ static const char *r8a7791_boards_compat_dt[] __initdata = {
+
+ DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)")
+ .smp = smp_ops(r8a7791_smp_ops),
+- .init_early = r8a7791_init_early,
++ .init_early = shmobile_init_delay,
+ .init_time = rcar_gen2_timer_init,
+ .dt_compat = r8a7791_boards_compat_dt,
+ MACHINE_END
+--
+2.1.2
+
--- /dev/null
+From 54b3b4337835bacf10fd5b91134aabd2d39a93e9 Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 12 May 2014 08:25:27 +0900
+Subject: ARM: shmobile: Use r8a7791 DT CPU Frequency for Koelsch
+
+Convert the Koelsch board support to use shmobile_init_delay()
+to be able to migrate away from per-SoC delay setup functions.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 7e99497cf5e7b46ff5f434beae45f6f35005e8b6)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-koelsch-reference.c | 2 +-
+ arch/arm/mach-shmobile/board-koelsch.c | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
+index bd9093221f76..e85f7b685d26 100644
+--- a/arch/arm/mach-shmobile/board-koelsch-reference.c
++++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
+@@ -139,7 +139,7 @@ static const char * const koelsch_boards_compat_dt[] __initconst = {
+
+ DT_MACHINE_START(KOELSCH_DT, "koelsch")
+ .smp = smp_ops(r8a7791_smp_ops),
+- .init_early = r8a7791_init_early,
++ .init_early = shmobile_init_delay,
+ .init_time = rcar_gen2_timer_init,
+ .init_machine = koelsch_add_standard_devices,
+ .init_late = shmobile_init_late,
+diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
+index a12a9d3b4b6e..c6c68892caa3 100644
+--- a/arch/arm/mach-shmobile/board-koelsch.c
++++ b/arch/arm/mach-shmobile/board-koelsch.c
+@@ -522,7 +522,7 @@ static const char * const koelsch_boards_compat_dt[] __initconst = {
+
+ DT_MACHINE_START(KOELSCH_DT, "koelsch")
+ .smp = smp_ops(r8a7791_smp_ops),
+- .init_early = r8a7791_init_early,
++ .init_early = shmobile_init_delay,
+ .init_time = rcar_gen2_timer_init,
+ .init_machine = koelsch_init,
+ .init_late = shmobile_init_late,
+--
+2.1.2
+
--- /dev/null
+From 2558c3883f0416555150d88dd6658da9911ca31a Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 12 May 2014 08:25:37 +0900
+Subject: ARM: shmobile: Remove unused r8a7791_init_early()
+
+Remove the now unused r8a7791_init_early() function.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 595e9b00fb81f971d84ff451861423d02c39d060)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/include/mach/r8a7791.h | 1 -
+ arch/arm/mach-shmobile/setup-r8a7791.c | 7 -------
+ 2 files changed, 8 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/include/mach/r8a7791.h b/arch/arm/mach-shmobile/include/mach/r8a7791.h
+index 200fa699f730..664274cc4b64 100644
+--- a/arch/arm/mach-shmobile/include/mach/r8a7791.h
++++ b/arch/arm/mach-shmobile/include/mach/r8a7791.h
+@@ -5,7 +5,6 @@ void r8a7791_add_standard_devices(void);
+ void r8a7791_add_dt_devices(void);
+ void r8a7791_clock_init(void);
+ void r8a7791_pinmux_init(void);
+-void r8a7791_init_early(void);
+ extern struct smp_operations r8a7791_smp_ops;
+
+ #endif /* __ASM_R8A7791_H__ */
+diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
+index 71bc5ae053f5..74a416e52fb9 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7791.c
++++ b/arch/arm/mach-shmobile/setup-r8a7791.c
+@@ -207,13 +207,6 @@ void __init r8a7791_add_standard_devices(void)
+ r8a7791_register_thermal();
+ }
+
+-void __init r8a7791_init_early(void)
+-{
+-#ifndef CONFIG_ARM_ARCH_TIMER
+- shmobile_setup_delay(1500, 2, 4); /* Cortex-A15 @ 1500MHz */
+-#endif
+-}
+-
+ #ifdef CONFIG_USE_OF
+ static const char *r8a7791_boards_compat_dt[] __initdata = {
+ "renesas,r8a7791",
+--
+2.1.2
+
--- /dev/null
+From d1ed6d2e525d1c201533130ecb69f6c1376024ba Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 30 Apr 2014 02:41:28 +0200
+Subject: ARM: shmobile: dts: Move interrupt-parent property to root node
+
+There's no need to duplicate the interrupt-parent property in all DT
+nodes as the kernel automatically walks parent nodes to find the
+property. Specify it once in the root node only.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 9ff254adc1e32db46000a33b8ecbc4d7047672be)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a73a4.dtsi | 18 ------------------
+ arch/arm/boot/dts/r8a7740.dtsi | 12 +-----------
+ arch/arm/boot/dts/r8a7778.dtsi | 18 +-----------------
+ arch/arm/boot/dts/r8a7779.dtsi | 21 +--------------------
+ arch/arm/boot/dts/r8a7791.dtsi | 3 ---
+ 5 files changed, 3 insertions(+), 69 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
+index 62d0211bd192..82c5ac825386 100644
+--- a/arch/arm/boot/dts/r8a73a4.dtsi
++++ b/arch/arm/boot/dts/r8a73a4.dtsi
+@@ -55,7 +55,6 @@
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
+ <0 1 IRQ_TYPE_LEVEL_HIGH>,
+ <0 2 IRQ_TYPE_LEVEL_HIGH>,
+@@ -95,7 +94,6 @@
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0200 0 0x200>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
+ <0 33 IRQ_TYPE_LEVEL_HIGH>,
+ <0 34 IRQ_TYPE_LEVEL_HIGH>,
+@@ -136,7 +134,6 @@
+ dma0: dma-controller@e6700020 {
+ compatible = "renesas,shdma-r8a73a4";
+ reg = <0 0xe6700020 0 0x89e0>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
+ 0 200 IRQ_TYPE_LEVEL_HIGH
+ 0 201 IRQ_TYPE_LEVEL_HIGH
+@@ -171,7 +168,6 @@
+ compatible = "renesas,rcar-thermal";
+ reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
+ <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+@@ -180,7 +176,6 @@
+ #size-cells = <0>;
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6500000 0 0x428>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+@@ -190,7 +185,6 @@
+ #size-cells = <0>;
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6510000 0 0x428>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+@@ -200,7 +194,6 @@
+ #size-cells = <0>;
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6520000 0 0x428>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+@@ -210,7 +203,6 @@
+ #size-cells = <0>;
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6530000 0 0x428>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+@@ -220,7 +212,6 @@
+ #size-cells = <0>;
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6540000 0 0x428>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 178 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+@@ -230,7 +221,6 @@
+ #size-cells = <0>;
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe60b0000 0 0x428>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+@@ -240,7 +230,6 @@
+ #size-cells = <0>;
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6550000 0 0x428>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+@@ -250,7 +239,6 @@
+ #size-cells = <0>;
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6560000 0 0x428>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+@@ -260,7 +248,6 @@
+ #size-cells = <0>;
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6570000 0 0x428>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+@@ -268,7 +255,6 @@
+ mmcif0: mmc@ee200000 {
+ compatible = "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
+ reg-io-width = <4>;
+ status = "disabled";
+@@ -277,7 +263,6 @@
+ mmcif1: mmc@ee220000 {
+ compatible = "renesas,sh-mmcif";
+ reg = <0 0xee220000 0 0x80>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
+ reg-io-width = <4>;
+ status = "disabled";
+@@ -309,7 +294,6 @@
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a73a4";
+ reg = <0 0xee100000 0 0x100>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ status = "disabled";
+@@ -318,7 +302,6 @@
+ sdhi1: sd@ee120000 {
+ compatible = "renesas,sdhi-r8a73a4";
+ reg = <0 0xee120000 0 0x100>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ status = "disabled";
+@@ -327,7 +310,6 @@
+ sdhi2: sd@ee140000 {
+ compatible = "renesas,sdhi-r8a73a4";
+ reg = <0 0xee140000 0 0x100>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ status = "disabled";
+diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
+index a4498de64f7d..ce7a0b29ae7c 100644
+--- a/arch/arm/boot/dts/r8a7740.dtsi
++++ b/arch/arm/boot/dts/r8a7740.dtsi
+@@ -14,6 +14,7 @@
+
+ / {
+ compatible = "renesas,r8a7740";
++ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <1>;
+@@ -49,7 +50,6 @@
+ <0xe6900020 1>,
+ <0xe6900040 1>,
+ <0xe6900060 1>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
+ 0 149 IRQ_TYPE_LEVEL_HIGH
+ 0 149 IRQ_TYPE_LEVEL_HIGH
+@@ -70,7 +70,6 @@
+ <0xe6900024 1>,
+ <0xe6900044 1>,
+ <0xe6900064 1>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
+ 0 149 IRQ_TYPE_LEVEL_HIGH
+ 0 149 IRQ_TYPE_LEVEL_HIGH
+@@ -91,7 +90,6 @@
+ <0xe6900028 1>,
+ <0xe6900048 1>,
+ <0xe6900068 1>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
+ 0 149 IRQ_TYPE_LEVEL_HIGH
+ 0 149 IRQ_TYPE_LEVEL_HIGH
+@@ -112,7 +110,6 @@
+ <0xe690002c 1>,
+ <0xe690004c 1>,
+ <0xe690006c 1>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
+ 0 149 IRQ_TYPE_LEVEL_HIGH
+ 0 149 IRQ_TYPE_LEVEL_HIGH
+@@ -141,7 +138,6 @@
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
+ reg = <0xfff20000 0x425>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH
+ 0 202 IRQ_TYPE_LEVEL_HIGH
+ 0 203 IRQ_TYPE_LEVEL_HIGH
+@@ -154,7 +150,6 @@
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
+ reg = <0xe6c20000 0x425>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH
+ 0 71 IRQ_TYPE_LEVEL_HIGH
+ 0 72 IRQ_TYPE_LEVEL_HIGH
+@@ -189,7 +184,6 @@
+ mmcif0: mmc@e6bd0000 {
+ compatible = "renesas,mmcif-r8a7740", "renesas,sh-mmcif";
+ reg = <0xe6bd0000 0x100>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH
+ 0 57 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+@@ -198,7 +192,6 @@
+ sdhi0: sd@e6850000 {
+ compatible = "renesas,sdhi-r8a7740";
+ reg = <0xe6850000 0x100>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH
+ 0 118 IRQ_TYPE_LEVEL_HIGH
+ 0 119 IRQ_TYPE_LEVEL_HIGH>;
+@@ -210,7 +203,6 @@
+ sdhi1: sd@e6860000 {
+ compatible = "renesas,sdhi-r8a7740";
+ reg = <0xe6860000 0x100>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH
+ 0 122 IRQ_TYPE_LEVEL_HIGH
+ 0 123 IRQ_TYPE_LEVEL_HIGH>;
+@@ -222,7 +214,6 @@
+ sdhi2: sd@e6870000 {
+ compatible = "renesas,sdhi-r8a7740";
+ reg = <0xe6870000 0x100>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH
+ 0 126 IRQ_TYPE_LEVEL_HIGH
+ 0 127 IRQ_TYPE_LEVEL_HIGH>;
+@@ -235,7 +226,6 @@
+ #sound-dai-cells = <1>;
+ compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2";
+ reg = <0xfe1f0000 0x400>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 9 0x4>;
+ status = "disabled";
+ };
+diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
+index 3c6fab5c9702..3af0a2187493 100644
+--- a/arch/arm/boot/dts/r8a7778.dtsi
++++ b/arch/arm/boot/dts/r8a7778.dtsi
+@@ -20,6 +20,7 @@
+
+ / {
+ compatible = "renesas,r8a7778";
++ interrupt-parent = <&gic>;
+
+ cpus {
+ cpu@0 {
+@@ -52,7 +53,6 @@
+ <0xfe780024 4>,
+ <0xfe780044 4>,
+ <0xfe780064 4>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH
+ 0 28 IRQ_TYPE_LEVEL_HIGH
+ 0 29 IRQ_TYPE_LEVEL_HIGH
+@@ -63,7 +63,6 @@
+ gpio0: gpio@ffc40000 {
+ compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+ reg = <0xffc40000 0x2c>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+@@ -75,7 +74,6 @@
+ gpio1: gpio@ffc41000 {
+ compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+ reg = <0xffc41000 0x2c>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+@@ -87,7 +85,6 @@
+ gpio2: gpio@ffc42000 {
+ compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+ reg = <0xffc42000 0x2c>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+@@ -99,7 +96,6 @@
+ gpio3: gpio@ffc43000 {
+ compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+ reg = <0xffc43000 0x2c>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+@@ -111,7 +107,6 @@
+ gpio4: gpio@ffc44000 {
+ compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+ reg = <0xffc44000 0x2c>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+@@ -130,7 +125,6 @@
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7778";
+ reg = <0xffc70000 0x1000>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+@@ -140,7 +134,6 @@
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7778";
+ reg = <0xffc71000 0x1000>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+@@ -150,7 +143,6 @@
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7778";
+ reg = <0xffc72000 0x1000>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+@@ -160,7 +152,6 @@
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7778";
+ reg = <0xffc73000 0x1000>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+@@ -168,7 +159,6 @@
+ mmcif: mmc@ffe4e000 {
+ compatible = "renesas,sh-mmcif";
+ reg = <0xffe4e000 0x100>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+@@ -176,7 +166,6 @@
+ sdhi0: sd@ffe4c000 {
+ compatible = "renesas,sdhi-r8a7778";
+ reg = <0xffe4c000 0x100>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+@@ -186,7 +175,6 @@
+ sdhi1: sd@ffe4d000 {
+ compatible = "renesas,sdhi-r8a7778";
+ reg = <0xffe4d000 0x100>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+@@ -196,7 +184,6 @@
+ sdhi2: sd@ffe4f000 {
+ compatible = "renesas,sdhi-r8a7778";
+ reg = <0xffe4f000 0x100>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+@@ -206,7 +193,6 @@
+ hspi0: spi@fffc7000 {
+ compatible = "renesas,hspi-r8a7778", "renesas,hspi";
+ reg = <0xfffc7000 0x18>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -216,7 +202,6 @@
+ hspi1: spi@fffc8000 {
+ compatible = "renesas,hspi-r8a7778", "renesas,hspi";
+ reg = <0xfffc8000 0x18>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -226,7 +211,6 @@
+ hspi2: spi@fffc6000 {
+ compatible = "renesas,hspi-r8a7778", "renesas,hspi";
+ reg = <0xfffc6000 0x18>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
+index 8b1a336ee401..b517c8e6b420 100644
+--- a/arch/arm/boot/dts/r8a7779.dtsi
++++ b/arch/arm/boot/dts/r8a7779.dtsi
+@@ -15,6 +15,7 @@
+
+ / {
+ compatible = "renesas,r8a7779";
++ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <1>;
+@@ -59,7 +60,6 @@
+ gpio0: gpio@ffc40000 {
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc40000 0x2c>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 141 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+@@ -71,7 +71,6 @@
+ gpio1: gpio@ffc41000 {
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc41000 0x2c>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+@@ -83,7 +82,6 @@
+ gpio2: gpio@ffc42000 {
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc42000 0x2c>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 143 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+@@ -95,7 +93,6 @@
+ gpio3: gpio@ffc43000 {
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc43000 0x2c>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+@@ -107,7 +104,6 @@
+ gpio4: gpio@ffc44000 {
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc44000 0x2c>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+@@ -119,7 +115,6 @@
+ gpio5: gpio@ffc45000 {
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc45000 0x2c>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 146 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+@@ -131,7 +126,6 @@
+ gpio6: gpio@ffc46000 {
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc46000 0x2c>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 147 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+@@ -150,7 +144,6 @@
+ <0xfe780024 4>,
+ <0xfe780044 4>,
+ <0xfe780064 4>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH
+ 0 28 IRQ_TYPE_LEVEL_HIGH
+ 0 29 IRQ_TYPE_LEVEL_HIGH
+@@ -163,7 +156,6 @@
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7779";
+ reg = <0xffc70000 0x1000>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+@@ -173,7 +165,6 @@
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7779";
+ reg = <0xffc71000 0x1000>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+@@ -183,7 +174,6 @@
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7779";
+ reg = <0xffc72000 0x1000>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+@@ -193,7 +183,6 @@
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7779";
+ reg = <0xffc73000 0x1000>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+@@ -211,14 +200,12 @@
+ sata: sata@fc600000 {
+ compatible = "renesas,rcar-sata";
+ reg = <0xfc600000 0x2000>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ sdhi0: sd@ffe4c000 {
+ compatible = "renesas,sdhi-r8a7779";
+ reg = <0xffe4c000 0x100>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+@@ -228,7 +215,6 @@
+ sdhi1: sd@ffe4d000 {
+ compatible = "renesas,sdhi-r8a7779";
+ reg = <0xffe4d000 0x100>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+@@ -238,7 +224,6 @@
+ sdhi2: sd@ffe4e000 {
+ compatible = "renesas,sdhi-r8a7779";
+ reg = <0xffe4e000 0x100>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+@@ -248,7 +233,6 @@
+ sdhi3: sd@ffe4f000 {
+ compatible = "renesas,sdhi-r8a7779";
+ reg = <0xffe4f000 0x100>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+@@ -258,7 +242,6 @@
+ hspi0: spi@fffc7000 {
+ compatible = "renesas,hspi-r8a7779", "renesas,hspi";
+ reg = <0xfffc7000 0x18>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -268,7 +251,6 @@
+ hspi1: spi@fffc8000 {
+ compatible = "renesas,hspi-r8a7779", "renesas,hspi";
+ reg = <0xfffc8000 0x18>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -278,7 +260,6 @@
+ hspi2: spi@fffc6000 {
+ compatible = "renesas,hspi-r8a7779", "renesas,hspi";
+ reg = <0xfffc6000 0x18>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index 44f03444ef74..ed57f6f5f532 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -289,7 +289,6 @@
+ sdhi0: sd@ee100000 {
+ compatible = "renesas,sdhi-r8a7791";
+ reg = <0 0xee100000 0 0x200>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7791_CLK_SDHI0>;
+ status = "disabled";
+@@ -298,7 +297,6 @@
+ sdhi1: sd@ee140000 {
+ compatible = "renesas,sdhi-r8a7791";
+ reg = <0 0xee140000 0 0x100>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7791_CLK_SDHI1>;
+ status = "disabled";
+@@ -307,7 +305,6 @@
+ sdhi2: sd@ee160000 {
+ compatible = "renesas,sdhi-r8a7791";
+ reg = <0 0xee160000 0 0x100>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7791_CLK_SDHI2>;
+ status = "disabled";
+--
+2.1.2
+
--- /dev/null
+From ccf4a8aafca2c7b605b84ff45263de7bb43d9834 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 23 Apr 2014 10:25:27 +0200
+Subject: ARM: shmobile: r8a7790 dtsi: Add GPIO clocks
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 81f6883f0b1bbb1dbca34cc65257f823acb55cbd)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7790.dtsi | 13 ++++++++++++-
+ 1 file changed, 12 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
+index d38d70339149..7ff29601f962 100644
+--- a/arch/arm/boot/dts/r8a7790.dtsi
++++ b/arch/arm/boot/dts/r8a7790.dtsi
+@@ -117,6 +117,7 @@
+ gpio-ranges = <&pfc 0 0 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
++ clocks = <&mstp9_clks R8A7790_CLK_GPIO0>;
+ };
+
+ gpio1: gpio@e6051000 {
+@@ -128,6 +129,7 @@
+ gpio-ranges = <&pfc 0 32 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
++ clocks = <&mstp9_clks R8A7790_CLK_GPIO1>;
+ };
+
+ gpio2: gpio@e6052000 {
+@@ -139,6 +141,7 @@
+ gpio-ranges = <&pfc 0 64 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
++ clocks = <&mstp9_clks R8A7790_CLK_GPIO2>;
+ };
+
+ gpio3: gpio@e6053000 {
+@@ -150,6 +153,7 @@
+ gpio-ranges = <&pfc 0 96 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
++ clocks = <&mstp9_clks R8A7790_CLK_GPIO3>;
+ };
+
+ gpio4: gpio@e6054000 {
+@@ -161,6 +165,7 @@
+ gpio-ranges = <&pfc 0 128 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
++ clocks = <&mstp9_clks R8A7790_CLK_GPIO4>;
+ };
+
+ gpio5: gpio@e6055000 {
+@@ -172,6 +177,7 @@
+ gpio-ranges = <&pfc 0 160 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
++ clocks = <&mstp9_clks R8A7790_CLK_GPIO5>;
+ };
+
+ thermal@e61f0000 {
+@@ -802,14 +808,19 @@
+ mstp9_clks: mstp9_clks@e6150994 {
+ compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
+ reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
+- clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>,
++ clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>,
++ <&cp_clk>, <&cp_clk>, <&cp_clk>,
++ <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>,
+ <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
+ #clock-cells = <1>;
+ renesas,clock-indices = <
++ R8A7790_CLK_GPIO5 R8A7790_CLK_GPIO4 R8A7790_CLK_GPIO3
++ R8A7790_CLK_GPIO2 R8A7790_CLK_GPIO1 R8A7790_CLK_GPIO0
+ R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS
+ R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0
+ >;
+ clock-output-names =
++ "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0",
+ "rcan1", "rcan0", "qspi_mod", "iic3",
+ "i2c3", "i2c2", "i2c1", "i2c0";
+ };
+--
+2.1.2
+
--- /dev/null
+From 84f8b8b8ba4f88dc51998708f164c2646cfa85a8 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 23 Apr 2014 10:25:28 +0200
+Subject: ARM: shmobile: r8a7791 dtsi: Add GPIO clocks
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4faf9c5e56d1326067f5faca551eb67ecf76696c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 19 ++++++++++++++++---
+ 1 file changed, 16 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index ed57f6f5f532..8d7ffaeff6e0 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -76,6 +76,7 @@
+ gpio-ranges = <&pfc 0 0 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
++ clocks = <&mstp9_clks R8A7791_CLK_GPIO0>;
+ };
+
+ gpio1: gpio@e6051000 {
+@@ -87,6 +88,7 @@
+ gpio-ranges = <&pfc 0 32 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
++ clocks = <&mstp9_clks R8A7791_CLK_GPIO1>;
+ };
+
+ gpio2: gpio@e6052000 {
+@@ -98,6 +100,7 @@
+ gpio-ranges = <&pfc 0 64 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
++ clocks = <&mstp9_clks R8A7791_CLK_GPIO2>;
+ };
+
+ gpio3: gpio@e6053000 {
+@@ -109,6 +112,7 @@
+ gpio-ranges = <&pfc 0 96 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
++ clocks = <&mstp9_clks R8A7791_CLK_GPIO3>;
+ };
+
+ gpio4: gpio@e6054000 {
+@@ -120,6 +124,7 @@
+ gpio-ranges = <&pfc 0 128 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
++ clocks = <&mstp9_clks R8A7791_CLK_GPIO4>;
+ };
+
+ gpio5: gpio@e6055000 {
+@@ -131,6 +136,7 @@
+ gpio-ranges = <&pfc 0 160 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
++ clocks = <&mstp9_clks R8A7791_CLK_GPIO5>;
+ };
+
+ gpio6: gpio@e6055400 {
+@@ -142,6 +148,7 @@
+ gpio-ranges = <&pfc 0 192 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
++ clocks = <&mstp9_clks R8A7791_CLK_GPIO6>;
+ };
+
+ gpio7: gpio@e6055800 {
+@@ -153,6 +160,7 @@
+ gpio-ranges = <&pfc 0 224 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
++ clocks = <&mstp9_clks R8A7791_CLK_GPIO7>;
+ };
+
+ thermal@e61f0000 {
+@@ -802,18 +810,23 @@
+ mstp9_clks: mstp9_clks@e6150994 {
+ compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
+ reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
+- clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&hp_clk>,
++ clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
++ <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
++ <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&hp_clk>,
+ <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>,
+ <&hp_clk>, <&hp_clk>;
+ #clock-cells = <1>;
+ renesas,clock-indices = <
++ R8A7791_CLK_GPIO7 R8A7791_CLK_GPIO6 R8A7791_CLK_GPIO5 R8A7791_CLK_GPIO4
++ R8A7791_CLK_GPIO3 R8A7791_CLK_GPIO2 R8A7791_CLK_GPIO1 R8A7791_CLK_GPIO0
+ R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5
+ R8A7791_CLK_IICDVFS R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2
+ R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
+ >;
+ clock-output-names =
+- "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3",
+- "i2c2", "i2c1", "i2c0";
++ "gpio7", "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0",
++ "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3", "i2c2",
++ "i2c1", "i2c0";
+ };
+ mstp11_clks: mstp11_clks@e615099c {
+ compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
+--
+2.1.2
+
--- /dev/null
+From 01af01bb3f41d83b8a0d490530cd66fb2b1ed0ab Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Wed, 15 May 2013 11:57:30 +0900
+Subject: ARM: shmobile: marzen-reference: Set SMSC lan to use irq-push-pull
+
+This change makes the DTS consistent with the platform data
+that exists in board-marzen.c.
+
+Empirically it does not appear to be necessary.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c9af5428be0cea61a34fa8d5dda83d4c57a03b06)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7779-marzen-reference.dts | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+index 76f5eef7d1cc..b27c6373ff4d 100644
+--- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
++++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+@@ -45,6 +45,7 @@
+ phy-mode = "mii";
+ interrupt-parent = <&irqpin0>;
+ interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
++ smsc,irq-push-pull;
+ reg-io-width = <4>;
+ vddvario-supply = <&fixedregulator3v3>;
+ vdd33a-supply = <&fixedregulator3v3>;
+--
+2.1.2
+
--- /dev/null
+From 89cefdfa9cf24f021d9aa0d3d4a8f1d540f23b7b Mon Sep 17 00:00:00 2001
+From: Magnus Damm <damm+renesas@opensource.se>
+Date: Mon, 12 May 2014 08:10:50 +0900
+Subject: ARM: shmobile: Use shmobile_init_late() on r8a7740
+
+Hook up ->init_late for r8a7740 to initialize Suspend-to-RAM
+and CPUIdle in case of C-code less board support for r8a7740.
+
+Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 34b9fa401eeef4e388bb7563110733c73c452c80)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/setup-r8a7740.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
+index c96099e3638c..35dec233301e 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7740.c
++++ b/arch/arm/mach-shmobile/setup-r8a7740.c
+@@ -839,6 +839,7 @@ DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)")
+ .init_early = shmobile_init_delay,
+ .init_irq = r8a7740_init_irq_of,
+ .init_machine = r8a7740_generic_init,
++ .init_late = shmobile_init_late,
+ .dt_compat = r8a7740_boards_compat_dt,
+ MACHINE_END
+
+--
+2.1.2
+
--- /dev/null
+From dce9e4711699fac663929e680ce75d5b04e5f229 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 30 Apr 2014 02:31:45 +0200
+Subject: ARM: shmobile: lager: Enable SCIF0 and SCIF1 serial ports in DT
+
+SCIF0 and SCIF1 are used as debug serial ports. Enable them and
+configure pinmuxing appropriately. We can now remove the clkdev
+registration hack for SCIF devices from the Lager reference board file.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+[horms+renesas@verge.net.au: updated changelog to remove references to
+ device renaming]
+[horms+renesas@verge.net.au: resolved conflicts]
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+(cherry picked from commit 4e9c4877aacc134b568e480eb8998de58b43d63e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+Conflicts:
+ arch/arm/boot/dts/r8a7790-lager.dts
+---
+ arch/arm/boot/dts/r8a7790-lager.dts | 20 +++++++++++++++++++-
+ arch/arm/mach-shmobile/board-lager-reference.c | 10 ----------
+ arch/arm/mach-shmobile/setup-r8a7790.c | 10 +++++-----
+ 3 files changed, 24 insertions(+), 16 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
+index 86d676f62942..9becef78c797 100644
+--- a/arch/arm/boot/dts/r8a7790-lager.dts
++++ b/arch/arm/boot/dts/r8a7790-lager.dts
+@@ -18,6 +18,11 @@
+ model = "Lager";
+ compatible = "renesas,lager", "renesas,r8a7790";
+
++ aliases {
++ serial6 = &scif0;
++ serial7 = &scif1;
++ };
++
+ chosen {
+ bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
+ };
+@@ -146,7 +151,7 @@
+ };
+
+ &pfc {
+- pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
++ pinctrl-0 = <&du_pins>;
+ pinctrl-names = "default";
+
+ du_pins: du {
+@@ -277,7 +282,20 @@
+ spi-cpol;
+ spi-cpha;
+ };
++};
+
++&scif0 {
++ pinctrl-0 = <&scif0_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&scif1 {
++ pinctrl-0 = <&scif1_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
+ };
+
+ &sdhi0 {
+diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
+index 1bca2748aa7c..749832e3f33c 100644
+--- a/arch/arm/mach-shmobile/board-lager-reference.c
++++ b/arch/arm/mach-shmobile/board-lager-reference.c
+@@ -91,16 +91,6 @@ static void __init lager_add_du_device(void)
+ */
+ static const struct clk_name clk_names[] __initconst = {
+ { "cmt0", "fck", "sh-cmt-48-gen2.0" },
+- { "scifa0", NULL, "sh-sci.0" },
+- { "scifa1", NULL, "sh-sci.1" },
+- { "scifb0", NULL, "sh-sci.2" },
+- { "scifb1", NULL, "sh-sci.3" },
+- { "scifb2", NULL, "sh-sci.4" },
+- { "scifa2", NULL, "sh-sci.5" },
+- { "scif0", NULL, "sh-sci.6" },
+- { "scif1", NULL, "sh-sci.7" },
+- { "hscif0", NULL, "sh-sci.8" },
+- { "hscif1", NULL, "sh-sci.9" },
+ { "du0", "du.0", "rcar-du-r8a7790" },
+ { "du1", "du.1", "rcar-du-r8a7790" },
+ { "du2", "du.2", "rcar-du-r8a7790" },
+diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
+index 2a6708358d4e..6bd08b127fa4 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7790.c
++++ b/arch/arm/mach-shmobile/setup-r8a7790.c
+@@ -281,6 +281,11 @@ static struct resource cmt0_resources[] = {
+
+ void __init r8a7790_add_dt_devices(void)
+ {
++ r8a7790_register_cmt(0);
++}
++
++void __init r8a7790_add_standard_devices(void)
++{
+ r8a7790_register_scif(0);
+ r8a7790_register_scif(1);
+ r8a7790_register_scif(2);
+@@ -291,11 +296,6 @@ void __init r8a7790_add_dt_devices(void)
+ r8a7790_register_scif(7);
+ r8a7790_register_scif(8);
+ r8a7790_register_scif(9);
+- r8a7790_register_cmt(0);
+-}
+-
+-void __init r8a7790_add_standard_devices(void)
+-{
+ r8a7790_add_dt_devices();
+ r8a7790_register_irqc(0);
+ r8a7790_register_thermal();
+--
+2.1.2
+
--- /dev/null
+From f935f61c380a601ee6fd2a814ab87c634b2f37da Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Wed, 30 Apr 2014 02:31:46 +0200
+Subject: ARM: shmobile: koelsch: Enable SCIF0 and SCIF1 serial ports in DT
+
+SCIF0 and SCIF1 are used as debug serial ports. Enable them and
+configure pinmuxing appropriately. We can now remove the clkdev
+registration hack for SCIF devices from the Koelsch reference board
+file.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+[horms+renesas@verge.net.au: added aliases to avoid device renumbering]
+[horms+renesas@verge.net.au: resolved conflicts]
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+(cherry picked from commit 5ba55fa81aee9493928c245f142a0bfe9f32d02f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791-koelsch.dts | 21 ++++++++++++++++++++-
+ arch/arm/mach-shmobile/board-koelsch-reference.c | 15 ---------------
+ arch/arm/mach-shmobile/setup-r8a7791.c | 10 +++++-----
+ 3 files changed, 25 insertions(+), 21 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
+index 0d69813def85..05d44f9b202f 100644
+--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
++++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
+@@ -19,6 +19,11 @@
+ model = "Koelsch";
+ compatible = "renesas,koelsch", "renesas,r8a7791";
+
++ aliases {
++ serial6 = &scif0;
++ serial7 = &scif1;
++ };
++
+ chosen {
+ bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
+ };
+@@ -230,7 +235,7 @@
+ };
+
+ &pfc {
+- pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
++ pinctrl-0 = <&du_pins>;
+ pinctrl-names = "default";
+
+ i2c2_pins: i2c2 {
+@@ -310,6 +315,20 @@
+ status = "okay";
+ };
+
++&scif0 {
++ pinctrl-0 = <&scif0_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
++&scif1 {
++ pinctrl-0 = <&scif1_pins>;
++ pinctrl-names = "default";
++
++ status = "okay";
++};
++
+ &sdhi0 {
+ pinctrl-0 = <&sdhi0_pins>;
+ pinctrl-names = "default";
+diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
+index e85f7b685d26..d322a162b4b0 100644
+--- a/arch/arm/mach-shmobile/board-koelsch-reference.c
++++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
+@@ -87,21 +87,6 @@ static void __init koelsch_add_du_device(void)
+ */
+ static const struct clk_name clk_names[] __initconst = {
+ { "cmt0", "fck", "sh-cmt-48-gen2.0" },
+- { "scifa0", NULL, "sh-sci.0" },
+- { "scifa1", NULL, "sh-sci.1" },
+- { "scifb0", NULL, "sh-sci.2" },
+- { "scifb1", NULL, "sh-sci.3" },
+- { "scifb2", NULL, "sh-sci.4" },
+- { "scifa2", NULL, "sh-sci.5" },
+- { "scif0", NULL, "sh-sci.6" },
+- { "scif1", NULL, "sh-sci.7" },
+- { "scif2", NULL, "sh-sci.8" },
+- { "scif3", NULL, "sh-sci.9" },
+- { "scif4", NULL, "sh-sci.10" },
+- { "scif5", NULL, "sh-sci.11" },
+- { "scifa3", NULL, "sh-sci.12" },
+- { "scifa4", NULL, "sh-sci.13" },
+- { "scifa5", NULL, "sh-sci.14" },
+ { "du0", "du.0", "rcar-du-r8a7791" },
+ { "du1", "du.1", "rcar-du-r8a7791" },
+ { "lvds0", "lvds.0", "rcar-du-r8a7791" },
+diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
+index 74a416e52fb9..04a96ddb3224 100644
+--- a/arch/arm/mach-shmobile/setup-r8a7791.c
++++ b/arch/arm/mach-shmobile/setup-r8a7791.c
+@@ -182,6 +182,11 @@ static const struct resource thermal_resources[] __initconst = {
+
+ void __init r8a7791_add_dt_devices(void)
+ {
++ r8a7791_register_cmt(0);
++}
++
++void __init r8a7791_add_standard_devices(void)
++{
+ r8a7791_register_scif(0);
+ r8a7791_register_scif(1);
+ r8a7791_register_scif(2);
+@@ -197,11 +202,6 @@ void __init r8a7791_add_dt_devices(void)
+ r8a7791_register_scif(12);
+ r8a7791_register_scif(13);
+ r8a7791_register_scif(14);
+- r8a7791_register_cmt(0);
+-}
+-
+-void __init r8a7791_add_standard_devices(void)
+-{
+ r8a7791_add_dt_devices();
+ r8a7791_register_irqc(0);
+ r8a7791_register_thermal();
+--
+2.1.2
+
--- /dev/null
+From ae34743efe7e2a380cb6c62774633a2458c09e9b Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 14 May 2014 03:10:06 +0200
+Subject: ARM: shmobile: r7s72100: add essential clock nodes to dtsi
+
+Only essential clocks are added for now. Other clocks will be added when
+needed.
+
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit b6face404f38f783c4428d953efa4eeb68d7cc24)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r7s72100.dtsi | 86 +++++++++++++++++++++++++++++-
+ include/dt-bindings/clock/r7s72100-clock.h | 28 ++++++++++
+ 2 files changed, 113 insertions(+), 1 deletion(-)
+ create mode 100644 include/dt-bindings/clock/r7s72100-clock.h
+
+diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
+index ee700717a34b..5a6e2481b567 100644
+--- a/arch/arm/boot/dts/r7s72100.dtsi
++++ b/arch/arm/boot/dts/r7s72100.dtsi
+@@ -1,13 +1,15 @@
+ /*
+ * Device Tree Source for the r7s72100 SoC
+ *
+- * Copyright (C) 2013 Renesas Solutions Corp.
++ * Copyright (C) 2013-14 Renesas Solutions Corp.
++ * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
++#include <dt-bindings/clock/r7s72100-clock.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ / {
+@@ -28,6 +30,88 @@
+ spi4 = &spi4;
+ };
+
++ clocks {
++ ranges;
++ #address-cells = <1>;
++ #size-cells = <1>;
++
++ /* External clocks */
++ extal_clk: extal_clk {
++ #clock-cells = <0>;
++ compatible = "fixed-clock";
++ /* If clk present, value must be set by board */
++ clock-frequency = <0>;
++ clock-output-names = "extal";
++ };
++
++ usb_x1_clk: usb_x1_clk {
++ #clock-cells = <0>;
++ compatible = "fixed-clock";
++ /* If clk present, value must be set by board */
++ clock-frequency = <0>;
++ clock-output-names = "usb_x1";
++ };
++
++ /* Special CPG clocks */
++ cpg_clocks: cpg_clocks@fcfe0000 {
++ #clock-cells = <1>;
++ compatible = "renesas,r7s72100-cpg-clocks",
++ "renesas,rz-cpg-clocks";
++ reg = <0xfcfe0000 0x18>;
++ clocks = <&extal_clk>, <&usb_x1_clk>;
++ clock-output-names = "pll", "i", "g";
++ };
++
++ /* Fixed factor clocks */
++ b_clk: b_clk {
++ #clock-cells = <0>;
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R7S72100_CLK_PLL>;
++ clock-mult = <1>;
++ clock-div = <3>;
++ clock-output-names = "b";
++ };
++ p1_clk: p1_clk {
++ #clock-cells = <0>;
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R7S72100_CLK_PLL>;
++ clock-mult = <1>;
++ clock-div = <6>;
++ clock-output-names = "p1";
++ };
++ p0_clk: p0_clk {
++ #clock-cells = <0>;
++ compatible = "fixed-factor-clock";
++ clocks = <&cpg_clocks R7S72100_CLK_PLL>;
++ clock-mult = <1>;
++ clock-div = <12>;
++ clock-output-names = "p0";
++ };
++
++ /* MSTP clocks */
++ mstp3_clks: mstp3_clks@fcfe0420 {
++ #clock-cells = <1>;
++ compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0xfcfe0420 4>;
++ clocks = <&p0_clk>;
++ clock-indices = <R7S72100_CLK_MTU2>;
++ clock-output-names = "mtu2";
++ };
++
++ mstp4_clks: mstp4_clks@fcfe0424 {
++ #clock-cells = <1>;
++ compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0xfcfe0424 4>;
++ clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
++ <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>;
++ clock-indices = <
++ R7S72100_CLK_SCIF0 R7S72100_CLK_SCIF1 R7S72100_CLK_SCIF2 R7S72100_CLK_SCIF3
++ R7S72100_CLK_SCIF4 R7S72100_CLK_SCIF5 R7S72100_CLK_SCIF6 R7S72100_CLK_SCIF7
++ >;
++ clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";
++ };
++ };
++
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+diff --git a/include/dt-bindings/clock/r7s72100-clock.h b/include/dt-bindings/clock/r7s72100-clock.h
+new file mode 100644
+index 000000000000..c756f1cf0d52
+--- /dev/null
++++ b/include/dt-bindings/clock/r7s72100-clock.h
+@@ -0,0 +1,28 @@
++/*
++ * Copyright (C) 2014 Renesas Solutions Corp.
++ * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; version 2 of the License.
++ */
++
++#ifndef __DT_BINDINGS_CLOCK_R7S72100_H__
++#define __DT_BINDINGS_CLOCK_R7S72100_H__
++
++#define R7S72100_CLK_PLL 0
++
++/* MSTP3 */
++#define R7S72100_CLK_MTU2 3
++
++/* MSTP4 */
++#define R7S72100_CLK_SCIF0 7
++#define R7S72100_CLK_SCIF1 6
++#define R7S72100_CLK_SCIF2 5
++#define R7S72100_CLK_SCIF3 4
++#define R7S72100_CLK_SCIF4 3
++#define R7S72100_CLK_SCIF5 2
++#define R7S72100_CLK_SCIF6 1
++#define R7S72100_CLK_SCIF7 0
++
++#endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */
+--
+2.1.2
+
--- /dev/null
+From ed1025a13fd22e2385576b4f959b1450619e336d Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 14 May 2014 03:10:07 +0200
+Subject: ARM: shmobile: r7s72100: genmai: populate nodes for external clocks
+
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5f76a5699f52052468e006e6c58010c5183b8386)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r7s72100-genmai-reference.dts | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r7s72100-genmai-reference.dts b/arch/arm/boot/dts/r7s72100-genmai-reference.dts
+index e664611a47c8..941e72ce7c82 100644
+--- a/arch/arm/boot/dts/r7s72100-genmai-reference.dts
++++ b/arch/arm/boot/dts/r7s72100-genmai-reference.dts
+@@ -30,6 +30,14 @@
+ };
+ };
+
++&extal_clk {
++ clock-frequency = <13330000>;
++};
++
++&usb_x1_clk {
++ clock-frequency = <48000000>;
++};
++
+ &i2c2 {
+ status = "okay";
+ clock-frequency = <400000>;
+--
+2.1.2
+
--- /dev/null
+From 9b85f11aa82b56d9010bd10828bb7ce1e960f233 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 14 May 2014 03:10:08 +0200
+Subject: ARM: shmobile: r7s72100: add scif nodes to dtsi
+
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 4c84c1b3accabdfb7aa8e98a4644c94df0703bb0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r7s72100.dtsi | 96 +++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 96 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
+index 5a6e2481b567..a4a67380b0a2 100644
+--- a/arch/arm/boot/dts/r7s72100.dtsi
++++ b/arch/arm/boot/dts/r7s72100.dtsi
+@@ -200,6 +200,102 @@
+ status = "disabled";
+ };
+
++ scif0: serial@e8007000 {
++ compatible = "renesas,scif-r7s72100", "renesas,scif";
++ reg = <0xe8007000 64>;
++ interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>,
++ <0 191 IRQ_TYPE_LEVEL_HIGH>,
++ <0 192 IRQ_TYPE_LEVEL_HIGH>,
++ <0 189 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
++ clock-names = "sci_ick";
++ status = "disabled";
++ };
++
++ scif1: serial@e8007800 {
++ compatible = "renesas,scif-r7s72100", "renesas,scif";
++ reg = <0xe8007800 64>;
++ interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>,
++ <0 195 IRQ_TYPE_LEVEL_HIGH>,
++ <0 196 IRQ_TYPE_LEVEL_HIGH>,
++ <0 193 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
++ clock-names = "sci_ick";
++ status = "disabled";
++ };
++
++ scif2: serial@e8008000 {
++ compatible = "renesas,scif-r7s72100", "renesas,scif";
++ reg = <0xe8008000 64>;
++ interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
++ <0 199 IRQ_TYPE_LEVEL_HIGH>,
++ <0 200 IRQ_TYPE_LEVEL_HIGH>,
++ <0 197 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
++ clock-names = "sci_ick";
++ status = "disabled";
++ };
++
++ scif3: serial@e8008800 {
++ compatible = "renesas,scif-r7s72100", "renesas,scif";
++ reg = <0xe8008800 64>;
++ interrupts = <0 202 IRQ_TYPE_LEVEL_HIGH>,
++ <0 203 IRQ_TYPE_LEVEL_HIGH>,
++ <0 204 IRQ_TYPE_LEVEL_HIGH>,
++ <0 201 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
++ clock-names = "sci_ick";
++ status = "disabled";
++ };
++
++ scif4: serial@e8009000 {
++ compatible = "renesas,scif-r7s72100", "renesas,scif";
++ reg = <0xe8009000 64>;
++ interrupts = <0 206 IRQ_TYPE_LEVEL_HIGH>,
++ <0 207 IRQ_TYPE_LEVEL_HIGH>,
++ <0 208 IRQ_TYPE_LEVEL_HIGH>,
++ <0 205 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp4_clks R7S72100_CLK_SCIF4>;
++ clock-names = "sci_ick";
++ status = "disabled";
++ };
++
++ scif5: serial@e8009800 {
++ compatible = "renesas,scif-r7s72100", "renesas,scif";
++ reg = <0xe8009800 64>;
++ interrupts = <0 210 IRQ_TYPE_LEVEL_HIGH>,
++ <0 211 IRQ_TYPE_LEVEL_HIGH>,
++ <0 212 IRQ_TYPE_LEVEL_HIGH>,
++ <0 209 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp4_clks R7S72100_CLK_SCIF5>;
++ clock-names = "sci_ick";
++ status = "disabled";
++ };
++
++ scif6: serial@e800a000 {
++ compatible = "renesas,scif-r7s72100", "renesas,scif";
++ reg = <0xe800a000 64>;
++ interrupts = <0 214 IRQ_TYPE_LEVEL_HIGH>,
++ <0 215 IRQ_TYPE_LEVEL_HIGH>,
++ <0 216 IRQ_TYPE_LEVEL_HIGH>,
++ <0 213 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp4_clks R7S72100_CLK_SCIF6>;
++ clock-names = "sci_ick";
++ status = "disabled";
++ };
++
++ scif7: serial@e800a800 {
++ compatible = "renesas,scif-r7s72100", "renesas,scif";
++ reg = <0xe800a800 64>;
++ interrupts = <0 218 IRQ_TYPE_LEVEL_HIGH>,
++ <0 219 IRQ_TYPE_LEVEL_HIGH>,
++ <0 220 IRQ_TYPE_LEVEL_HIGH>,
++ <0 217 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp4_clks R7S72100_CLK_SCIF7>;
++ clock-names = "sci_ick";
++ status = "disabled";
++ };
++
+ spi0: spi@e800c800 {
+ compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+ reg = <0xe800c800 0x24>;
+--
+2.1.2
+
--- /dev/null
+From c942e82891bb7f96d137e0e8ecfdb1e22ad6053b Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 14 May 2014 03:10:09 +0200
+Subject: ARM: shmobile: r7s72100: genmai: add uart alias and activate scif2 as
+ console
+
+We keep the UART naming backwards compatible with the legacy version.
+
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 5be13fefdb83c15ed69eb032dfe011162d1a5269)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r7s72100-genmai-reference.dts | 11 ++++++++++-
+ 1 file changed, 10 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r7s72100-genmai-reference.dts b/arch/arm/boot/dts/r7s72100-genmai-reference.dts
+index 941e72ce7c82..ca88458e0706 100644
+--- a/arch/arm/boot/dts/r7s72100-genmai-reference.dts
++++ b/arch/arm/boot/dts/r7s72100-genmai-reference.dts
+@@ -1,7 +1,8 @@
+ /*
+ * Device Tree Source for the Genmai board
+ *
+- * Copyright (C) 2013 Renesas Solutions Corp.
++ * Copyright (C) 2013-14 Renesas Solutions Corp.
++ * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+@@ -15,6 +16,10 @@
+ model = "Genmai";
+ compatible = "renesas,genmai-reference", "renesas,r7s72100";
+
++ aliases {
++ serial2 = &scif2;
++ };
++
+ chosen {
+ bootargs = "console=ttySC2,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
+ };
+@@ -48,3 +53,7 @@
+ pagesize = <64>;
+ };
+ };
++
++&scif2 {
++ status = "okay";
++};
+--
+2.1.2
+
--- /dev/null
+From 1b68ac7781e0009b33c63a72d5b4c8e6ad91a2fc Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 14 May 2014 03:10:10 +0200
+Subject: ARM: shmobile: r7s72100: genmai: platform scif devices only for
+ legacy support
+
+We have now DT support for SCIF, so use the platform_device
+initialization only for the legacy support.
+
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d45b21c9021d7de7941b00f0902a9401fb32a3d9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-genmai.c | 44 +++++++++++++++++++++++++++++++++
+ arch/arm/mach-shmobile/setup-r7s72100.c | 43 --------------------------------
+ 2 files changed, 44 insertions(+), 43 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-genmai.c b/arch/arm/mach-shmobile/board-genmai.c
+index 6c328d63b819..c94201ee8596 100644
+--- a/arch/arm/mach-shmobile/board-genmai.c
++++ b/arch/arm/mach-shmobile/board-genmai.c
+@@ -21,6 +21,7 @@
+
+ #include <linux/kernel.h>
+ #include <linux/platform_device.h>
++#include <linux/serial_sci.h>
+ #include <linux/sh_eth.h>
+ #include <linux/spi/rspi.h>
+ #include <linux/spi/spi.h>
+@@ -89,6 +90,40 @@ static const struct spi_board_info spi_info[] __initconst = {
+ },
+ };
+
++/* SCIF */
++#define R7S72100_SCIF(index, baseaddr, irq) \
++static const struct plat_sci_port scif##index##_platform_data = { \
++ .type = PORT_SCIF, \
++ .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, \
++ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
++ .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | \
++ SCSCR_REIE, \
++}; \
++ \
++static struct resource scif##index##_resources[] = { \
++ DEFINE_RES_MEM(baseaddr, 0x100), \
++ DEFINE_RES_IRQ(irq + 1), \
++ DEFINE_RES_IRQ(irq + 2), \
++ DEFINE_RES_IRQ(irq + 3), \
++ DEFINE_RES_IRQ(irq), \
++} \
++
++R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
++R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
++R7S72100_SCIF(2, 0xe8008000, gic_iid(229));
++R7S72100_SCIF(3, 0xe8008800, gic_iid(233));
++R7S72100_SCIF(4, 0xe8009000, gic_iid(237));
++R7S72100_SCIF(5, 0xe8009800, gic_iid(241));
++R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
++R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
++
++#define r7s72100_register_scif(index) \
++ platform_device_register_resndata(&platform_bus, "sh-sci", index, \
++ scif##index##_resources, \
++ ARRAY_SIZE(scif##index##_resources), \
++ &scif##index##_platform_data, \
++ sizeof(scif##index##_platform_data))
++
+ static void __init genmai_add_standard_devices(void)
+ {
+ r7s72100_clock_init();
+@@ -102,6 +137,15 @@ static void __init genmai_add_standard_devices(void)
+ r7s72100_register_rspi(3);
+ r7s72100_register_rspi(4);
+ spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
++
++ r7s72100_register_scif(0);
++ r7s72100_register_scif(1);
++ r7s72100_register_scif(2);
++ r7s72100_register_scif(3);
++ r7s72100_register_scif(4);
++ r7s72100_register_scif(5);
++ r7s72100_register_scif(6);
++ r7s72100_register_scif(7);
+ }
+
+ static const char * const genmai_boards_compat_dt[] __initconst = {
+diff --git a/arch/arm/mach-shmobile/setup-r7s72100.c b/arch/arm/mach-shmobile/setup-r7s72100.c
+index 545db1512480..412e179429cd 100644
+--- a/arch/arm/mach-shmobile/setup-r7s72100.c
++++ b/arch/arm/mach-shmobile/setup-r7s72100.c
+@@ -21,47 +21,12 @@
+ #include <linux/irq.h>
+ #include <linux/kernel.h>
+ #include <linux/of_platform.h>
+-#include <linux/serial_sci.h>
+ #include <linux/sh_timer.h>
+ #include <mach/common.h>
+ #include <mach/irqs.h>
+ #include <mach/r7s72100.h>
+ #include <asm/mach/arch.h>
+
+-#define R7S72100_SCIF(index, baseaddr, irq) \
+-static const struct plat_sci_port scif##index##_platform_data = { \
+- .type = PORT_SCIF, \
+- .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, \
+- .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
+- .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | \
+- SCSCR_REIE, \
+-}; \
+- \
+-static struct resource scif##index##_resources[] = { \
+- DEFINE_RES_MEM(baseaddr, 0x100), \
+- DEFINE_RES_IRQ(irq + 1), \
+- DEFINE_RES_IRQ(irq + 2), \
+- DEFINE_RES_IRQ(irq + 3), \
+- DEFINE_RES_IRQ(irq), \
+-} \
+-
+-R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
+-R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
+-R7S72100_SCIF(2, 0xe8008000, gic_iid(229));
+-R7S72100_SCIF(3, 0xe8008800, gic_iid(233));
+-R7S72100_SCIF(4, 0xe8009000, gic_iid(237));
+-R7S72100_SCIF(5, 0xe8009800, gic_iid(241));
+-R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
+-R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
+-
+-#define r7s72100_register_scif(index) \
+- platform_device_register_resndata(&platform_bus, "sh-sci", index, \
+- scif##index##_resources, \
+- ARRAY_SIZE(scif##index##_resources), \
+- &scif##index##_platform_data, \
+- sizeof(scif##index##_platform_data))
+-
+-
+ static struct resource mtu2_resources[] __initdata = {
+ DEFINE_RES_MEM(0xfcff0000, 0x400),
+ DEFINE_RES_IRQ_NAMED(gic_iid(139), "tgi0a"),
+@@ -75,14 +40,6 @@ static struct resource mtu2_resources[] __initdata = {
+
+ void __init r7s72100_add_dt_devices(void)
+ {
+- r7s72100_register_scif(0);
+- r7s72100_register_scif(1);
+- r7s72100_register_scif(2);
+- r7s72100_register_scif(3);
+- r7s72100_register_scif(4);
+- r7s72100_register_scif(5);
+- r7s72100_register_scif(6);
+- r7s72100_register_scif(7);
+ r7s72100_register_mtu2();
+ }
+
+--
+2.1.2
+
--- /dev/null
+From 99229899541e43b3386778a9679ed53208013de5 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 14 May 2014 03:10:11 +0200
+Subject: ARM: shmobile: r7s72100: add i2c clocks to dtsi
+
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit d165566b8dc425e52a4f2c19c27c63d9807128b2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r7s72100.dtsi | 15 +++++++++++++++
+ include/dt-bindings/clock/r7s72100-clock.h | 6 ++++++
+ 2 files changed, 21 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
+index a4a67380b0a2..afce2e344c7a 100644
+--- a/arch/arm/boot/dts/r7s72100.dtsi
++++ b/arch/arm/boot/dts/r7s72100.dtsi
+@@ -110,6 +110,17 @@
+ >;
+ clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";
+ };
++
++ mstp9_clks: mstp9_clks@fcfe0438 {
++ #clock-cells = <1>;
++ compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0xfcfe0438 4>;
++ clocks = <&p0_clk>, <&p0_clk>, <&p0_clk>, <&p0_clk>;
++ clock-indices = <
++ R7S72100_CLK_I2C0 R7S72100_CLK_I2C1 R7S72100_CLK_I2C2 R7S72100_CLK_I2C3
++ >;
++ clock-output-names = "i2c0", "i2c1", "i2c2", "i2c3";
++ };
+ };
+
+ cpus {
+@@ -145,6 +156,7 @@
+ <0 162 IRQ_TYPE_LEVEL_HIGH>,
+ <0 163 IRQ_TYPE_LEVEL_HIGH>,
+ <0 164 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+@@ -162,6 +174,7 @@
+ <0 170 IRQ_TYPE_LEVEL_HIGH>,
+ <0 171 IRQ_TYPE_LEVEL_HIGH>,
+ <0 172 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp9_clks R7S72100_CLK_I2C1>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+@@ -179,6 +192,7 @@
+ <0 178 IRQ_TYPE_LEVEL_HIGH>,
+ <0 179 IRQ_TYPE_LEVEL_HIGH>,
+ <0 180 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp9_clks R7S72100_CLK_I2C2>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+@@ -196,6 +210,7 @@
+ <0 186 IRQ_TYPE_LEVEL_HIGH>,
+ <0 187 IRQ_TYPE_LEVEL_HIGH>,
+ <0 188 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&mstp9_clks R7S72100_CLK_I2C3>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+diff --git a/include/dt-bindings/clock/r7s72100-clock.h b/include/dt-bindings/clock/r7s72100-clock.h
+index c756f1cf0d52..ff84e0bafd7b 100644
+--- a/include/dt-bindings/clock/r7s72100-clock.h
++++ b/include/dt-bindings/clock/r7s72100-clock.h
+@@ -25,4 +25,10 @@
+ #define R7S72100_CLK_SCIF6 1
+ #define R7S72100_CLK_SCIF7 0
+
++/* MSTP9 */
++#define R7S72100_CLK_I2C0 7
++#define R7S72100_CLK_I2C1 6
++#define R7S72100_CLK_I2C2 5
++#define R7S72100_CLK_I2C3 4
++
+ #endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */
+--
+2.1.2
+
--- /dev/null
+From c7366c6697fb54b46b255bed74fb487df22ef850 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 14 May 2014 03:10:12 +0200
+Subject: ARM: shmobile: r7s72100: remove I2C DT clocks from legacy clock
+ support
+
+Not used anymore since we switched to CCF.
+
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 316b9353784386aedc4f2643dfdfda30da268b0b)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r7s72100.c | 4 ----
+ 1 file changed, 4 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
+index 644f1c2a96c7..1a797fe9e42f 100644
+--- a/arch/arm/mach-shmobile/clock-r7s72100.c
++++ b/arch/arm/mach-shmobile/clock-r7s72100.c
+@@ -199,10 +199,6 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("e800d800.spi", &mstp_clks[MSTP105]),
+ CLKDEV_DEV_ID("e800e000.spi", &mstp_clks[MSTP104]),
+ CLKDEV_DEV_ID("e800e800.spi", &mstp_clks[MSTP103]),
+- CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
+- CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
+- CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
+- CLKDEV_DEV_ID("fcfeec00.i2c", &mstp_clks[MSTP94]),
+ CLKDEV_DEV_ID("r7s72100-ether", &mstp_clks[MSTP74]),
+
+ /* ICK */
+--
+2.1.2
+
--- /dev/null
+From 849ab92b9850c897d389df5d3fe97ff7694967ab Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 14 May 2014 03:10:13 +0200
+Subject: ARM: shmobile: r7s72100: add spi clocks to dtsi
+
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 52eed4f5c267bd50d870f9c63d0a83d6f83d8bab)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r7s72100.dtsi | 18 ++++++++++++++++++
+ include/dt-bindings/clock/r7s72100-clock.h | 7 +++++++
+ 2 files changed, 25 insertions(+)
+
+diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
+index afce2e344c7a..f50fbc8f3bd9 100644
+--- a/arch/arm/boot/dts/r7s72100.dtsi
++++ b/arch/arm/boot/dts/r7s72100.dtsi
+@@ -121,6 +121,19 @@
+ >;
+ clock-output-names = "i2c0", "i2c1", "i2c2", "i2c3";
+ };
++
++ mstp10_clks: mstp10_clks@fcfe043c {
++ #clock-cells = <1>;
++ compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
++ reg = <0xfcfe043c 4>;
++ clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
++ <&p1_clk>;
++ clock-indices = <
++ R7S72100_CLK_SPI0 R7S72100_CLK_SPI1 R7S72100_CLK_SPI2 R7S72100_CLK_SPI3
++ R7S72100_CLK_SPI4
++ >;
++ clock-output-names = "spi0", "spi1", "spi2", "spi3", "spi4";
++ };
+ };
+
+ cpus {
+@@ -318,6 +331,7 @@
+ <0 239 IRQ_TYPE_LEVEL_HIGH>,
+ <0 240 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
++ clocks = <&mstp10_clks R7S72100_CLK_SPI0>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -331,6 +345,7 @@
+ <0 242 IRQ_TYPE_LEVEL_HIGH>,
+ <0 243 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
++ clocks = <&mstp10_clks R7S72100_CLK_SPI1>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -344,6 +359,7 @@
+ <0 245 IRQ_TYPE_LEVEL_HIGH>,
+ <0 246 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
++ clocks = <&mstp10_clks R7S72100_CLK_SPI2>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -357,6 +373,7 @@
+ <0 248 IRQ_TYPE_LEVEL_HIGH>,
+ <0 249 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
++ clocks = <&mstp10_clks R7S72100_CLK_SPI3>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -370,6 +387,7 @@
+ <0 251 IRQ_TYPE_LEVEL_HIGH>,
+ <0 252 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error", "rx", "tx";
++ clocks = <&mstp10_clks R7S72100_CLK_SPI4>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+diff --git a/include/dt-bindings/clock/r7s72100-clock.h b/include/dt-bindings/clock/r7s72100-clock.h
+index ff84e0bafd7b..5128f4d94f44 100644
+--- a/include/dt-bindings/clock/r7s72100-clock.h
++++ b/include/dt-bindings/clock/r7s72100-clock.h
+@@ -31,4 +31,11 @@
+ #define R7S72100_CLK_I2C2 5
+ #define R7S72100_CLK_I2C3 4
+
++/* MSTP10 */
++#define R7S72100_CLK_SPI0 7
++#define R7S72100_CLK_SPI1 6
++#define R7S72100_CLK_SPI2 5
++#define R7S72100_CLK_SPI3 4
++#define R7S72100_CLK_SPI4 3
++
+ #endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */
+--
+2.1.2
+
--- /dev/null
+From e4369ec07be28b534fe09eafa7a725895137b184 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 14 May 2014 03:10:14 +0200
+Subject: ARM: shmobile: r7s72100: remove SPI DT clocks from legacy clock
+ support
+
+Not used anymore since we switched to CCF.
+
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 3158e053ff45ed36d531d775cf0040642b91b606)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/clock-r7s72100.c | 5 -----
+ 1 file changed, 5 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
+index 1a797fe9e42f..df187484de5d 100644
+--- a/arch/arm/mach-shmobile/clock-r7s72100.c
++++ b/arch/arm/mach-shmobile/clock-r7s72100.c
+@@ -194,11 +194,6 @@ static struct clk_lookup lookups[] = {
+ CLKDEV_DEV_ID("rspi-rz.2", &mstp_clks[MSTP105]),
+ CLKDEV_DEV_ID("rspi-rz.3", &mstp_clks[MSTP104]),
+ CLKDEV_DEV_ID("rspi-rz.4", &mstp_clks[MSTP103]),
+- CLKDEV_DEV_ID("e800c800.spi", &mstp_clks[MSTP107]),
+- CLKDEV_DEV_ID("e800d000.spi", &mstp_clks[MSTP106]),
+- CLKDEV_DEV_ID("e800d800.spi", &mstp_clks[MSTP105]),
+- CLKDEV_DEV_ID("e800e000.spi", &mstp_clks[MSTP104]),
+- CLKDEV_DEV_ID("e800e800.spi", &mstp_clks[MSTP103]),
+ CLKDEV_DEV_ID("r7s72100-ether", &mstp_clks[MSTP74]),
+
+ /* ICK */
+--
+2.1.2
+
--- /dev/null
+From 3743219eee51446646a7807ba99f50eb0db34cb3 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 14 May 2014 03:10:16 +0200
+Subject: ARM: shmobile: Add forward declaration of struct clk to silence
+ warning
+
+arch/arm/mach-shmobile/board-genmai-reference.c:23:0:
+arch/arm/mach-shmobile/include/mach/clock.h:19:54: warning: 'struct clk' declared inside parameter list [enabled by default]
+arch/arm/mach-shmobile/include/mach/clock.h:19:54: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default]
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 1f9c7a691fefc2158bed4d5403422cc9b99ca335)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/include/mach/clock.h | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm/mach-shmobile/include/mach/clock.h b/arch/arm/mach-shmobile/include/mach/clock.h
+index 9a93cf924b9c..31b6417463e6 100644
+--- a/arch/arm/mach-shmobile/include/mach/clock.h
++++ b/arch/arm/mach-shmobile/include/mach/clock.h
+@@ -16,6 +16,7 @@ void shmobile_clk_workaround(const struct clk_name *clks, int nr_clks,
+ #else /* CONFIG_COMMON_CLK */
+ /* legacy clock implementation */
+
++struct clk;
+ unsigned long shmobile_fixed_ratio_clk_recalc(struct clk *clk);
+ extern struct sh_clk_ops shmobile_fixed_ratio_clk_ops;
+
+--
+2.1.2
+
--- /dev/null
+From 74108fbd9c0ea6a6d9696e992513afa74edddf6c Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Wed, 14 May 2014 03:10:15 +0200
+Subject: ARM: shmobile: r7s72100: use workaround for non DT-clocks
+
+MTU2 is not yet prepared for DT usage, so use the common workaround via
+clkdev for now.
+
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Acked-by: Magnus Damm <damm+renesas@opensource.se>
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 9fbb1ae01b878e2cce9626fa6fdc9e5dcefeb6b5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-genmai-reference.c | 14 ++++++++++++--
+ 1 file changed, 12 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-genmai-reference.c b/arch/arm/mach-shmobile/board-genmai-reference.c
+index 7630c1053e32..33015e5ed52a 100644
+--- a/arch/arm/mach-shmobile/board-genmai-reference.c
++++ b/arch/arm/mach-shmobile/board-genmai-reference.c
+@@ -18,18 +18,28 @@
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+-#include <linux/clk-provider.h>
+ #include <linux/kernel.h>
+ #include <linux/of_platform.h>
++#include <mach/clock.h>
+ #include <mach/common.h>
+ #include <mach/r7s72100.h>
+ #include <asm/mach-types.h>
+ #include <asm/mach/arch.h>
+
++#ifdef CONFIG_COMMON_CLK
++/*
++ * This is a really crude hack to provide clkdev support to platform
++ * devices until they get moved to DT.
++ */
++static const struct clk_name clk_names[] = {
++ { "mtu2", "fck", "sh-mtu2" },
++};
++#endif
++
+ static void __init genmai_add_standard_devices(void)
+ {
+ #ifdef CONFIG_COMMON_CLK
+- of_clk_init(NULL);
++ shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), true);
+ #else
+ r7s72100_clock_init();
+ #endif
+--
+2.1.2
+
--- /dev/null
+From ccb5373448691d47807bfa160cc6bcfa06252c35 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Tue, 13 May 2014 15:59:18 +0900
+Subject: ARM: shmobile: Set clock frequency in HZ from OF nodes
+
+shmobile_init_delay() looks for OF "clock-frequency" to determine
+the delay which is set by calling shmobile_setup_delay().
+
+Unfortunately this seems to be incorrect in detail as
+"clock-frequency" node values are in HZ whereas the frequency
+argument to shmobile_setup_delay() is in MHz.
+
+Provide a variant of shmobile_setup_delay() that accepts HZ to
+correct this problem.
+
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit f492b81777c93b33afe892b424e022022b5bc297)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/timer.c | 23 ++++++++++++++++++++---
+ 1 file changed, 20 insertions(+), 3 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
+index ccecde9a3362..68bc0b82226d 100644
+--- a/arch/arm/mach-shmobile/timer.c
++++ b/arch/arm/mach-shmobile/timer.c
+@@ -23,6 +23,23 @@
+ #include <linux/delay.h>
+ #include <linux/of_address.h>
+
++void __init shmobile_setup_delay_hz(unsigned int max_cpu_core_hz,
++ unsigned int mult, unsigned int div)
++{
++ /* calculate a worst-case loops-per-jiffy value
++ * based on maximum cpu core hz setting and the
++ * __delay() implementation in arch/arm/lib/delay.S
++ *
++ * this will result in a longer delay than expected
++ * when the cpu core runs on lower frequencies.
++ */
++
++ unsigned int value = HZ * div / mult;
++
++ if (!preset_lpj)
++ preset_lpj = max_cpu_core_hz / value;
++}
++
+ void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz,
+ unsigned int mult, unsigned int div)
+ {
+@@ -58,12 +75,12 @@ void __init shmobile_init_delay(void)
+
+ if (max_freq) {
+ if (of_find_compatible_node(NULL, NULL, "arm,cortex-a8"))
+- shmobile_setup_delay(max_freq, 1, 3);
++ shmobile_setup_delay_hz(max_freq, 1, 3);
+ else if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
+- shmobile_setup_delay(max_freq, 1, 3);
++ shmobile_setup_delay_hz(max_freq, 1, 3);
+ else if (of_find_compatible_node(NULL, NULL, "arm,cortex-a15"))
+ if (!IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
+- shmobile_setup_delay(max_freq, 2, 4);
++ shmobile_setup_delay_hz(max_freq, 2, 4);
+ }
+ }
+
+--
+2.1.2
+
--- /dev/null
+From 5d48a53e45aa5ddc46e88a0be50b5cc6152d6d6c Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Wed, 14 May 2014 16:41:12 +0200
+Subject: ARM: shmobile: r8a7740 dtsi: Remove duplicate interrupt-parent
+ property
+
+Caused by interaction between commit
+08ec67b50db7ca8c9077e67ca23850cdc5bfc716 ("ARM: shmobile: r8a7740 dtsi:
+Add Ethernet support") and commit 9ff254adc1e32db46000a33b8ecbc4d7047672be
+("ARM: shmobile: dts: Move interrupt-parent property to root node").
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 3fa3985e624aea24334abc9a33b484c3d316e64e)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7740.dtsi | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
+index ce7a0b29ae7c..55d29f4d2ed6 100644
+--- a/arch/arm/boot/dts/r8a7740.dtsi
++++ b/arch/arm/boot/dts/r8a7740.dtsi
+@@ -124,7 +124,6 @@
+ compatible = "renesas,gether-r8a7740";
+ reg = <0xe9a00000 0x800>,
+ <0xe9a01800 0x800>;
+- interrupt-parent = <&gic>;
+ interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
+ /* clocks = <&mstp3_clks R8A7740_CLK_GETHER>; */
+ phy-mode = "mii";
+--
+2.1.2
+
--- /dev/null
+From d57c54652095a0505113d06b0eca9aa951ec4381 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Fri, 16 May 2014 14:10:12 +0200
+Subject: ARM: shmobile: Remove non-multiplatform Genmai reference support
+
+Now that r7s72100 has CCF support, remove the legacy Genmai reference
+Kconfig bits for the non-multiplatform case.
+
+Starting from this commit Genmai board support is always enabled via
+CONFIG_MACH_GENMAI, and CONFIG_ARCH_MULTIPLATFORM is used to select
+between board-genmai.c and board-genmai-reference.c
+
+The file board-genmai-reference.c can no longer be used together with
+the legacy sh-clk clock framework, instead CCF is used.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 551f80a5c915c4615cd4065ad4db5cf68f765b97)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+Conflicts:
+ arch/arm/boot/dts/Makefile
+---
+ arch/arm/boot/dts/Makefile | 1 -
+ arch/arm/mach-shmobile/Kconfig | 11 -----------
+ arch/arm/mach-shmobile/Makefile | 1 -
+ arch/arm/mach-shmobile/Makefile.boot | 1 -
+ 4 files changed, 14 deletions(-)
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 234247b51db7..f4d6c845a4cd 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -245,7 +245,6 @@ dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
+ dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \
+ s3c6410-smdk6410.dtb
+ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += r7s72100-genmai.dtb \
+- r7s72100-genmai-reference.dtb \
+ r8a7740-armadillo800eva.dtb \
+ r8a7778-bockw.dtb \
+ r8a7778-bockw-reference.dtb \
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index d19a06899e10..b50c753482c7 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -229,17 +229,6 @@ config MACH_GENMAI
+ depends on ARCH_R7S72100
+ select USE_OF
+
+-config MACH_GENMAI_REFERENCE
+- bool "Genmai board - Reference Device Tree Implementation"
+- depends on ARCH_R7S72100
+- select USE_OF
+- ---help---
+- Use reference implementation of Genmai board support
+- which makes use of device tree at the expense
+- of not supporting a number of devices.
+-
+- This is intended to aid developers
+-
+ config MACH_MARZEN
+ bool "MARZEN board"
+ depends on ARCH_R8A7779
+diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
+index 9c5cd8c53a85..38d5fe825e93 100644
+--- a/arch/arm/mach-shmobile/Makefile
++++ b/arch/arm/mach-shmobile/Makefile
+@@ -66,7 +66,6 @@ obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o
+ obj-$(CONFIG_MACH_BOCKW) += board-bockw.o
+ obj-$(CONFIG_MACH_BOCKW_REFERENCE) += board-bockw-reference.o
+ obj-$(CONFIG_MACH_GENMAI) += board-genmai.o
+-obj-$(CONFIG_MACH_GENMAI_REFERENCE) += board-genmai-reference.o
+ obj-$(CONFIG_MACH_MARZEN) += board-marzen.o
+ obj-$(CONFIG_MACH_MARZEN_REFERENCE) += board-marzen-reference.o
+ obj-$(CONFIG_MACH_LAGER) += board-lager.o
+diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
+index 99455ecafa05..918fccffa1b6 100644
+--- a/arch/arm/mach-shmobile/Makefile.boot
++++ b/arch/arm/mach-shmobile/Makefile.boot
+@@ -7,7 +7,6 @@ loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
+ loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
+ loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
+ loadaddr-$(CONFIG_MACH_GENMAI) += 0x08008000
+-loadaddr-$(CONFIG_MACH_GENMAI_REFERENCE) += 0x08008000
+ loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
+ loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
+ loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
+--
+2.1.2
+
--- /dev/null
+From fa8306a4b7bbbba32d5a3b4dad36905e6a2924d9 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Fri, 16 May 2014 14:10:13 +0200
+Subject: ARM: shmobile: genmai-reference: Remove legacy clock support
+
+genmai-reference is now only built for multiplatform which means that
+CCF comes with the package. Remove unused legacy code ifdefs to clean up
+the code.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 88351216f595786a24ff6cb7df7b101811981c78)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-genmai-reference.c | 6 ------
+ 1 file changed, 6 deletions(-)
+
+diff --git a/arch/arm/mach-shmobile/board-genmai-reference.c b/arch/arm/mach-shmobile/board-genmai-reference.c
+index 33015e5ed52a..968bbba20d08 100644
+--- a/arch/arm/mach-shmobile/board-genmai-reference.c
++++ b/arch/arm/mach-shmobile/board-genmai-reference.c
+@@ -26,7 +26,6 @@
+ #include <asm/mach-types.h>
+ #include <asm/mach/arch.h>
+
+-#ifdef CONFIG_COMMON_CLK
+ /*
+ * This is a really crude hack to provide clkdev support to platform
+ * devices until they get moved to DT.
+@@ -34,15 +33,10 @@
+ static const struct clk_name clk_names[] = {
+ { "mtu2", "fck", "sh-mtu2" },
+ };
+-#endif
+
+ static void __init genmai_add_standard_devices(void)
+ {
+-#ifdef CONFIG_COMMON_CLK
+ shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), true);
+-#else
+- r7s72100_clock_init();
+-#endif
+ r7s72100_add_dt_devices();
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ }
+--
+2.1.2
+
--- /dev/null
+From 4ad6b9e6a9c3a0e56e4f50a386e8d8259ac5b767 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Fri, 16 May 2014 14:10:14 +0200
+Subject: ARM: shmobile: Sync Genmai DTS with Genmai reference DTS
+
+Copy the device nodes from Genmai reference into the Genmai device tree
+file. This will allow us to use a single DTS file regardless of kernel
+configuration. In case of legacy C board code the device nodes may or
+may not be used, but in the multiplatform case all the DT device nodes
+will be used.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 2606f47be55fd4545ed9236467682c636fd23f9d)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r7s72100-genmai.dts | 30 +++++++++++++++++++++++++++++-
+ 1 file changed, 29 insertions(+), 1 deletion(-)
+
+diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts b/arch/arm/boot/dts/r7s72100-genmai.dts
+index b1deaf7e2e06..56849b55e1c2 100644
+--- a/arch/arm/boot/dts/r7s72100-genmai.dts
++++ b/arch/arm/boot/dts/r7s72100-genmai.dts
+@@ -1,7 +1,8 @@
+ /*
+ * Device Tree Source for the Genmai board
+ *
+- * Copyright (C) 2013 Renesas Solutions Corp.
++ * Copyright (C) 2013-14 Renesas Solutions Corp.
++ * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+@@ -15,6 +16,10 @@
+ model = "Genmai";
+ compatible = "renesas,genmai", "renesas,r7s72100";
+
++ aliases {
++ serial2 = &scif2;
++ };
++
+ chosen {
+ bootargs = "console=ttySC2,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
+ };
+@@ -29,3 +34,26 @@
+ #size-cells = <1>;
+ };
+ };
++
++&extal_clk {
++ clock-frequency = <13330000>;
++};
++
++&usb_x1_clk {
++ clock-frequency = <48000000>;
++};
++
++&i2c2 {
++ status = "okay";
++ clock-frequency = <400000>;
++
++ eeprom@50 {
++ compatible = "renesas,24c128";
++ reg = <0x50>;
++ pagesize = <64>;
++ };
++};
++
++&scif2 {
++ status = "okay";
++};
+--
+2.1.2
+
--- /dev/null
+From f85e4ee632f3c97fdc2b6f02071de5b3ff52613a Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Fri, 16 May 2014 14:10:15 +0200
+Subject: ARM: shmobile: Let Genmai multiplatform boot with Genmai DTB
+
+Let the multiplatform Genmai support boot with the unified DTS.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 23f679fa6de3b3f7e1d9e1d8eaeafa5167a55a17)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+Conflicts:
+ arch/arm/boot/dts/Makefile
+---
+ arch/arm/boot/dts/Makefile | 2 +-
+ arch/arm/mach-shmobile/board-genmai-reference.c | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index f4d6c845a4cd..6ec1b220c4c4 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -259,7 +259,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += r7s72100-genmai.dtb \
+ r8a73a4-ape6evm-reference.dtb \
+ sh7372-mackerel.dtb
+ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
+- r7s72100-genmai-reference.dtb \
++ r7s72100-genmai.dtb \
+ r8a7791-henninger.dtb \
+ r8a7791-koelsch.dtb \
+ r8a7790-lager.dtb
+diff --git a/arch/arm/mach-shmobile/board-genmai-reference.c b/arch/arm/mach-shmobile/board-genmai-reference.c
+index 968bbba20d08..2ff6ad6e608e 100644
+--- a/arch/arm/mach-shmobile/board-genmai-reference.c
++++ b/arch/arm/mach-shmobile/board-genmai-reference.c
+@@ -42,7 +42,7 @@ static void __init genmai_add_standard_devices(void)
+ }
+
+ static const char * const genmai_boards_compat_dt[] __initconst = {
+- "renesas,genmai-reference",
++ "renesas,genmai",
+ NULL,
+ };
+
+--
+2.1.2
+
--- /dev/null
+From 5d332faf26d42b236b658c10731b8d861304ba68 Mon Sep 17 00:00:00 2001
+From: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Date: Fri, 16 May 2014 14:10:16 +0200
+Subject: ARM: shmobile: Remove Genmai reference DTS
+
+Now that the DTS file r7s72100-genmai.dts can be used with
+board-genmai.c and board-genmai-reference.c, proceed with removing
+r7s72100-genmai-reference.dts.
+
+Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit a5176e0d9de31a54e08468f21c15dc08e006857f)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r7s72100-genmai-reference.dts | 59 -------------------------
+ 1 file changed, 59 deletions(-)
+ delete mode 100644 arch/arm/boot/dts/r7s72100-genmai-reference.dts
+
+diff --git a/arch/arm/boot/dts/r7s72100-genmai-reference.dts b/arch/arm/boot/dts/r7s72100-genmai-reference.dts
+deleted file mode 100644
+index ca88458e0706..000000000000
+--- a/arch/arm/boot/dts/r7s72100-genmai-reference.dts
++++ /dev/null
+@@ -1,59 +0,0 @@
+-/*
+- * Device Tree Source for the Genmai board
+- *
+- * Copyright (C) 2013-14 Renesas Solutions Corp.
+- * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
+- *
+- * This file is licensed under the terms of the GNU General Public License
+- * version 2. This program is licensed "as is" without any warranty of any
+- * kind, whether express or implied.
+- */
+-
+-/dts-v1/;
+-#include "r7s72100.dtsi"
+-
+-/ {
+- model = "Genmai";
+- compatible = "renesas,genmai-reference", "renesas,r7s72100";
+-
+- aliases {
+- serial2 = &scif2;
+- };
+-
+- chosen {
+- bootargs = "console=ttySC2,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
+- };
+-
+- memory {
+- device_type = "memory";
+- reg = <0x08000000 0x08000000>;
+- };
+-
+- lbsc {
+- #address-cells = <1>;
+- #size-cells = <1>;
+- };
+-};
+-
+-&extal_clk {
+- clock-frequency = <13330000>;
+-};
+-
+-&usb_x1_clk {
+- clock-frequency = <48000000>;
+-};
+-
+-&i2c2 {
+- status = "okay";
+- clock-frequency = <400000>;
+-
+- eeprom@50 {
+- compatible = "renesas,24c128";
+- reg = <0x50>;
+- pagesize = <64>;
+- };
+-};
+-
+-&scif2 {
+- status = "okay";
+-};
+--
+2.1.2
+
--- /dev/null
+From 1fddf4d6e39878fab14f3181aa1969145d705390 Mon Sep 17 00:00:00 2001
+From: Naoki MATSUMOTO <nekomatu@gmail.com>
+Date: Thu, 15 May 2014 20:17:44 +0900
+Subject: USB: delete CONFIG_USB_DEVICEFS from defconfig
+
+It no longer occurs in Kconfig.
+USB: remove CONFIG_USB_DEVICEFS(fb28d58b) leaked remove defconfig.
+
+Signed-off-by: Naoki MATSUMOTO <nekomatu+linux@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 3a0d89d3f80df15fee3802e030d51f1848269a01)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/configs/badge4_defconfig | 1 -
+ arch/arm/configs/cm_x2xx_defconfig | 1 -
+ arch/arm/configs/cm_x300_defconfig | 1 -
+ arch/arm/configs/colibri_pxa270_defconfig | 1 -
+ arch/arm/configs/colibri_pxa300_defconfig | 1 -
+ arch/arm/configs/corgi_defconfig | 1 -
+ arch/arm/configs/davinci_all_defconfig | 1 -
+ arch/arm/configs/em_x270_defconfig | 1 -
+ arch/arm/configs/footbridge_defconfig | 1 -
+ arch/arm/configs/ixp4xx_defconfig | 1 -
+ arch/arm/configs/kzm9g_defconfig | 1 -
+ arch/arm/configs/mini2440_defconfig | 1 -
+ arch/arm/configs/mv78xx0_defconfig | 1 -
+ arch/arm/configs/neponset_defconfig | 1 -
+ arch/arm/configs/omap1_defconfig | 1 -
+ arch/arm/configs/pcm027_defconfig | 1 -
+ arch/arm/configs/s3c2410_defconfig | 1 -
+ arch/arm/configs/s3c6400_defconfig | 1 -
+ arch/arm/configs/spitz_defconfig | 1 -
+ arch/arm/configs/trizeps4_defconfig | 1 -
+ arch/arm/configs/viper_defconfig | 1 -
+ arch/arm/configs/zeus_defconfig | 1 -
+ arch/avr32/configs/hammerhead_defconfig | 1 -
+ arch/blackfin/configs/BF526-EZBRD_defconfig | 1 -
+ arch/blackfin/configs/BF527-EZKIT-V2_defconfig | 1 -
+ arch/blackfin/configs/BF527-EZKIT_defconfig | 1 -
+ arch/blackfin/configs/BF548-EZKIT_defconfig | 1 -
+ arch/blackfin/configs/CM-BF527_defconfig | 1 -
+ arch/blackfin/configs/CM-BF548_defconfig | 1 -
+ arch/blackfin/configs/IP0X_defconfig | 1 -
+ arch/ia64/configs/bigsur_defconfig | 1 -
+ arch/ia64/configs/generic_defconfig | 1 -
+ arch/ia64/configs/gensparse_defconfig | 1 -
+ arch/ia64/configs/tiger_defconfig | 1 -
+ arch/mips/configs/fuloong2e_defconfig | 1 -
+ arch/mips/configs/lemote2f_defconfig | 1 -
+ arch/mips/configs/mpc30x_defconfig | 1 -
+ arch/mips/configs/msp71xx_defconfig | 1 -
+ arch/mips/configs/mtx1_defconfig | 1 -
+ arch/mips/configs/rm200_defconfig | 1 -
+ arch/mips/configs/sb1250_swarm_defconfig | 1 -
+ arch/mips/configs/tb0219_defconfig | 1 -
+ arch/mips/configs/tb0226_defconfig | 1 -
+ arch/parisc/configs/c3000_defconfig | 1 -
+ arch/parisc/configs/default_defconfig | 1 -
+ arch/powerpc/configs/40x/ep405_defconfig | 1 -
+ arch/powerpc/configs/44x/canyonlands_defconfig | 1 -
+ arch/powerpc/configs/44x/sam440ep_defconfig | 1 -
+ arch/powerpc/configs/52xx/cm5200_defconfig | 1 -
+ arch/powerpc/configs/52xx/pcm030_defconfig | 1 -
+ arch/powerpc/configs/52xx/tqm5200_defconfig | 1 -
+ arch/powerpc/configs/83xx/mpc8313_rdb_defconfig | 1 -
+ arch/powerpc/configs/83xx/mpc8315_rdb_defconfig | 1 -
+ arch/powerpc/configs/83xx/mpc832x_rdb_defconfig | 1 -
+ arch/powerpc/configs/83xx/mpc834x_itx_defconfig | 1 -
+ arch/powerpc/configs/83xx/sbc834x_defconfig | 1 -
+ arch/powerpc/configs/85xx/ge_imp3a_defconfig | 1 -
+ arch/powerpc/configs/85xx/socrates_defconfig | 1 -
+ arch/powerpc/configs/85xx/xes_mpc85xx_defconfig | 1 -
+ arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig | 1 -
+ arch/powerpc/configs/amigaone_defconfig | 1 -
+ arch/powerpc/configs/c2k_defconfig | 1 -
+ arch/powerpc/configs/cell_defconfig | 1 -
+ arch/powerpc/configs/celleb_defconfig | 1 -
+ arch/powerpc/configs/chrp32_defconfig | 1 -
+ arch/powerpc/configs/g5_defconfig | 1 -
+ arch/powerpc/configs/linkstation_defconfig | 1 -
+ arch/powerpc/configs/maple_defconfig | 1 -
+ arch/powerpc/configs/mpc5200_defconfig | 1 -
+ arch/powerpc/configs/mpc86xx_defconfig | 1 -
+ arch/powerpc/configs/pmac32_defconfig | 1 -
+ arch/powerpc/configs/ppc6xx_defconfig | 1 -
+ arch/powerpc/configs/storcenter_defconfig | 1 -
+ arch/sh/configs/ecovec24_defconfig | 1 -
+ arch/sh/configs/landisk_defconfig | 1 -
+ arch/sh/configs/rsk7203_defconfig | 1 -
+ arch/sh/configs/sdk7780_defconfig | 1 -
+ arch/sh/configs/se7343_defconfig | 1 -
+ arch/sh/configs/se7780_defconfig | 1 -
+ arch/sh/configs/sh2007_defconfig | 1 -
+ arch/sh/configs/sh7785lcr_defconfig | 1 -
+ arch/sh/configs/titan_defconfig | 1 -
+ arch/sh/configs/urquell_defconfig | 1 -
+ arch/unicore32/configs/unicore32_defconfig | 1 -
+ 84 files changed, 84 deletions(-)
+
+diff --git a/arch/arm/configs/badge4_defconfig b/arch/arm/configs/badge4_defconfig
+index 5b54abbeb0b3..60b0b9368b1b 100644
+--- a/arch/arm/configs/badge4_defconfig
++++ b/arch/arm/configs/badge4_defconfig
+@@ -74,7 +74,6 @@ CONFIG_SOUND=y
+ CONFIG_SOUND_PRIME=y
+ CONFIG_USB=y
+ CONFIG_USB_DEBUG=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_ACM=m
+ CONFIG_USB_PRINTER=m
+diff --git a/arch/arm/configs/cm_x2xx_defconfig b/arch/arm/configs/cm_x2xx_defconfig
+index a93ff8da5bab..dc01c049a520 100644
+--- a/arch/arm/configs/cm_x2xx_defconfig
++++ b/arch/arm/configs/cm_x2xx_defconfig
+@@ -144,7 +144,6 @@ CONFIG_HID_SAMSUNG=y
+ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_MON=y
+ CONFIG_USB_OHCI_HCD=y
+diff --git a/arch/arm/configs/cm_x300_defconfig b/arch/arm/configs/cm_x300_defconfig
+index f4b767256f95..7df040e91c1c 100644
+--- a/arch/arm/configs/cm_x300_defconfig
++++ b/arch/arm/configs/cm_x300_defconfig
+@@ -129,7 +129,6 @@ CONFIG_HID_TOPSEED=y
+ CONFIG_HID_THRUSTMASTER=y
+ CONFIG_HID_ZEROPLUS=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_MON=y
+ CONFIG_USB_OHCI_HCD=y
+diff --git a/arch/arm/configs/colibri_pxa270_defconfig b/arch/arm/configs/colibri_pxa270_defconfig
+index 2ef2c5e8aaec..18c311ae1113 100644
+--- a/arch/arm/configs/colibri_pxa270_defconfig
++++ b/arch/arm/configs/colibri_pxa270_defconfig
+@@ -124,7 +124,6 @@ CONFIG_FONT_8x16=y
+ CONFIG_LOGO=y
+ # CONFIG_USB_HID is not set
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_SERIAL=m
+ CONFIG_USB_GADGET=m
+diff --git a/arch/arm/configs/colibri_pxa300_defconfig b/arch/arm/configs/colibri_pxa300_defconfig
+index b985334e42dd..2641dd6ed2f5 100644
+--- a/arch/arm/configs/colibri_pxa300_defconfig
++++ b/arch/arm/configs/colibri_pxa300_defconfig
+@@ -49,7 +49,6 @@ CONFIG_LOGO=y
+ CONFIG_USB=y
+ CONFIG_USB_DEBUG=y
+ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_STORAGE=y
+ CONFIG_MMC=y
+diff --git a/arch/arm/configs/corgi_defconfig b/arch/arm/configs/corgi_defconfig
+index 1fd1d1de3220..c1470a00f55a 100644
+--- a/arch/arm/configs/corgi_defconfig
++++ b/arch/arm/configs/corgi_defconfig
+@@ -172,7 +172,6 @@ CONFIG_HID_SAMSUNG=m
+ CONFIG_HID_SONY=m
+ CONFIG_HID_SUNPLUS=m
+ CONFIG_USB=m
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=m
+ CONFIG_USB_SL811_HCD=m
+ CONFIG_USB_SL811_CS=m
+diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig
+index ab2f7378352c..24fb7a60518e 100644
+--- a/arch/arm/configs/davinci_all_defconfig
++++ b/arch/arm/configs/davinci_all_defconfig
+@@ -134,7 +134,6 @@ CONFIG_HID_SAMSUNG=m
+ CONFIG_HID_SONY=m
+ CONFIG_HID_SUNPLUS=m
+ CONFIG_USB=m
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=m
+ CONFIG_USB_MUSB_HDRC=m
+ CONFIG_USB_MUSB_PERIPHERAL=y
+diff --git a/arch/arm/configs/em_x270_defconfig b/arch/arm/configs/em_x270_defconfig
+index 60a21e01eb70..4560c9ca6636 100644
+--- a/arch/arm/configs/em_x270_defconfig
++++ b/arch/arm/configs/em_x270_defconfig
+@@ -144,7 +144,6 @@ CONFIG_HID_SAMSUNG=y
+ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_MON=y
+ CONFIG_USB_OHCI_HCD=y
+diff --git a/arch/arm/configs/footbridge_defconfig b/arch/arm/configs/footbridge_defconfig
+index 038518ab39a8..17bb3f7b5802 100644
+--- a/arch/arm/configs/footbridge_defconfig
++++ b/arch/arm/configs/footbridge_defconfig
+@@ -101,7 +101,6 @@ CONFIG_SOUND=m
+ # CONFIG_USB_HID is not set
+ CONFIG_USB=m
+ CONFIG_USB_DEBUG=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=m
+ CONFIG_USB_PRINTER=m
+ CONFIG_EXT2_FS=y
+diff --git a/arch/arm/configs/ixp4xx_defconfig b/arch/arm/configs/ixp4xx_defconfig
+index 063e2ab2c8f1..1af665e847d1 100644
+--- a/arch/arm/configs/ixp4xx_defconfig
++++ b/arch/arm/configs/ixp4xx_defconfig
+@@ -169,7 +169,6 @@ CONFIG_SENSORS_W83781D=y
+ CONFIG_WATCHDOG=y
+ CONFIG_IXP4XX_WATCHDOG=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_OHCI_HCD=y
+diff --git a/arch/arm/configs/kzm9g_defconfig b/arch/arm/configs/kzm9g_defconfig
+index 12bd1f63c399..bd097d455f87 100644
+--- a/arch/arm/configs/kzm9g_defconfig
++++ b/arch/arm/configs/kzm9g_defconfig
+@@ -106,7 +106,6 @@ CONFIG_SND_SOC=y
+ CONFIG_SND_SOC_SH4_FSI=y
+ # CONFIG_HID_SUPPORT is not set
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_R8A66597_HCD=y
+ CONFIG_USB_RENESAS_USBHS=y
+ CONFIG_USB_STORAGE=y
+diff --git a/arch/arm/configs/mini2440_defconfig b/arch/arm/configs/mini2440_defconfig
+index a07948a87caa..9c93f5655248 100644
+--- a/arch/arm/configs/mini2440_defconfig
++++ b/arch/arm/configs/mini2440_defconfig
+@@ -217,7 +217,6 @@ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_HID_TOPSEED=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_OHCI_HCD=y
+ CONFIG_USB_ACM=m
+diff --git a/arch/arm/configs/mv78xx0_defconfig b/arch/arm/configs/mv78xx0_defconfig
+index 1f08219c1b3c..0dae1c1f007a 100644
+--- a/arch/arm/configs/mv78xx0_defconfig
++++ b/arch/arm/configs/mv78xx0_defconfig
+@@ -80,7 +80,6 @@ CONFIG_I2C=y
+ CONFIG_I2C_CHARDEV=y
+ CONFIG_I2C_MV64XXX=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_EHCI_ROOT_HUB_TT=y
+ CONFIG_USB_EHCI_TT_NEWSCHED=y
+diff --git a/arch/arm/configs/neponset_defconfig b/arch/arm/configs/neponset_defconfig
+index d7dc9922cfff..63aa319b44bb 100644
+--- a/arch/arm/configs/neponset_defconfig
++++ b/arch/arm/configs/neponset_defconfig
+@@ -69,7 +69,6 @@ CONFIG_SOUND_PRIME=y
+ # CONFIG_USB_HID is not set
+ CONFIG_USB=m
+ CONFIG_USB_DEBUG=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=m
+ CONFIG_USB_OHCI_HCD=m
+ CONFIG_USB_STORAGE=m
+diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig
+index d74edbad18fc..0f258d555fbc 100644
+--- a/arch/arm/configs/omap1_defconfig
++++ b/arch/arm/configs/omap1_defconfig
+@@ -198,7 +198,6 @@ CONFIG_SND_OMAP_SOC=y
+ CONFIG_USB=y
+ CONFIG_USB_PHY=y
+ CONFIG_USB_DEBUG=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_MON=y
+ CONFIG_USB_OHCI_HCD=y
+diff --git a/arch/arm/configs/pcm027_defconfig b/arch/arm/configs/pcm027_defconfig
+index 2f136c30a989..0a847d04ddc1 100644
+--- a/arch/arm/configs/pcm027_defconfig
++++ b/arch/arm/configs/pcm027_defconfig
+@@ -76,7 +76,6 @@ CONFIG_SND_PCM_OSS=y
+ CONFIG_SND_PXA2XX_AC97=y
+ # CONFIG_HID_SUPPORT is not set
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_OHCI_HCD=y
+ CONFIG_USB_STORAGE=y
+ CONFIG_MMC=y
+diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig
+index 193448f31284..eb4d204bff47 100644
+--- a/arch/arm/configs/s3c2410_defconfig
++++ b/arch/arm/configs/s3c2410_defconfig
+@@ -324,7 +324,6 @@ CONFIG_SND_USB_CAIAQ=m
+ CONFIG_SND_SOC=y
+ # CONFIG_USB_HID is not set
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_OHCI_HCD=y
+ CONFIG_USB_ACM=m
+diff --git a/arch/arm/configs/s3c6400_defconfig b/arch/arm/configs/s3c6400_defconfig
+index 3a186d653dac..e2f9fa5bb54b 100644
+--- a/arch/arm/configs/s3c6400_defconfig
++++ b/arch/arm/configs/s3c6400_defconfig
+@@ -56,7 +56,6 @@ CONFIG_SND_S3C24XX_SOC=m
+ CONFIG_SND_SOC_SMDK_WM9713=m
+ CONFIG_USB=y
+ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_OHCI_HCD=y
+ CONFIG_USB_ACM=m
+ CONFIG_USB_PRINTER=m
+diff --git a/arch/arm/configs/spitz_defconfig b/arch/arm/configs/spitz_defconfig
+index 2e0419d1b964..a1ede1966baf 100644
+--- a/arch/arm/configs/spitz_defconfig
++++ b/arch/arm/configs/spitz_defconfig
+@@ -166,7 +166,6 @@ CONFIG_HID_SAMSUNG=m
+ CONFIG_HID_SONY=m
+ CONFIG_HID_SUNPLUS=m
+ CONFIG_USB=m
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=m
+ CONFIG_USB_OHCI_HCD=m
+ CONFIG_USB_SL811_HCD=m
+diff --git a/arch/arm/configs/trizeps4_defconfig b/arch/arm/configs/trizeps4_defconfig
+index 3162173fa75a..932ee4e4a13a 100644
+--- a/arch/arm/configs/trizeps4_defconfig
++++ b/arch/arm/configs/trizeps4_defconfig
+@@ -165,7 +165,6 @@ CONFIG_SND_PXA2XX_AC97=y
+ CONFIG_SND_USB_AUDIO=m
+ # CONFIG_USB_HID is not set
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_OHCI_HCD=y
+ CONFIG_USB_STORAGE=m
+diff --git a/arch/arm/configs/viper_defconfig b/arch/arm/configs/viper_defconfig
+index d36e0d3c86ec..0d717a5eff29 100644
+--- a/arch/arm/configs/viper_defconfig
++++ b/arch/arm/configs/viper_defconfig
+@@ -127,7 +127,6 @@ CONFIG_SND_MIXER_OSS=m
+ CONFIG_SND_PCM_OSS=m
+ CONFIG_SND_PXA2XX_AC97=m
+ CONFIG_USB=m
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_ISP116X_HCD=m
+ CONFIG_USB_SL811_HCD=m
+ CONFIG_USB_R8A66597_HCD=m
+diff --git a/arch/arm/configs/zeus_defconfig b/arch/arm/configs/zeus_defconfig
+index 731d4f985310..cd11da8b5123 100644
+--- a/arch/arm/configs/zeus_defconfig
++++ b/arch/arm/configs/zeus_defconfig
+@@ -132,7 +132,6 @@ CONFIG_SND_SOC=m
+ CONFIG_SND_PXA2XX_SOC=m
+ # CONFIG_HID_SUPPORT is not set
+ CONFIG_USB=m
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_OHCI_HCD=m
+ CONFIG_USB_ACM=m
+ CONFIG_USB_STORAGE=m
+diff --git a/arch/avr32/configs/hammerhead_defconfig b/arch/avr32/configs/hammerhead_defconfig
+index 18db853386c8..4912f0aadaa1 100644
+--- a/arch/avr32/configs/hammerhead_defconfig
++++ b/arch/avr32/configs/hammerhead_defconfig
+@@ -117,7 +117,6 @@ CONFIG_HID_SAMSUNG=m
+ CONFIG_HID_SONY=m
+ CONFIG_HID_SUNPLUS=m
+ CONFIG_USB=m
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_MON=m
+ CONFIG_USB_ISP116X_HCD=m
+diff --git a/arch/blackfin/configs/BF526-EZBRD_defconfig b/arch/blackfin/configs/BF526-EZBRD_defconfig
+index 2f2c6acf210c..1759fad54017 100644
+--- a/arch/blackfin/configs/BF526-EZBRD_defconfig
++++ b/arch/blackfin/configs/BF526-EZBRD_defconfig
+@@ -123,7 +123,6 @@ CONFIG_HID_SAMSUNG=y
+ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_OTG_BLACKLIST_HUB=y
+ CONFIG_USB_MON=y
+diff --git a/arch/blackfin/configs/BF527-EZKIT-V2_defconfig b/arch/blackfin/configs/BF527-EZKIT-V2_defconfig
+index 91535c38e7f2..357729682c00 100644
+--- a/arch/blackfin/configs/BF527-EZKIT-V2_defconfig
++++ b/arch/blackfin/configs/BF527-EZKIT-V2_defconfig
+@@ -147,7 +147,6 @@ CONFIG_HID_SAMSUNG=y
+ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_OTG_BLACKLIST_HUB=y
+ CONFIG_USB_MON=y
+diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig
+index af2738c7441b..2e73a5d33da8 100644
+--- a/arch/blackfin/configs/BF527-EZKIT_defconfig
++++ b/arch/blackfin/configs/BF527-EZKIT_defconfig
+@@ -141,7 +141,6 @@ CONFIG_HID_SAMSUNG=y
+ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_OTG_BLACKLIST_HUB=y
+ CONFIG_USB_MON=y
+diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig
+index e716fdfd2cf2..f0a2ddf5de46 100644
+--- a/arch/blackfin/configs/BF548-EZKIT_defconfig
++++ b/arch/blackfin/configs/BF548-EZKIT_defconfig
+@@ -159,7 +159,6 @@ CONFIG_HID_SAMSUNG=y
+ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_OTG_BLACKLIST_HUB=y
+ CONFIG_USB_MON=y
+diff --git a/arch/blackfin/configs/CM-BF527_defconfig b/arch/blackfin/configs/CM-BF527_defconfig
+index f59c80ee78e3..05108b85ab12 100644
+--- a/arch/blackfin/configs/CM-BF527_defconfig
++++ b/arch/blackfin/configs/CM-BF527_defconfig
+@@ -95,7 +95,6 @@ CONFIG_WATCHDOG=y
+ CONFIG_BFIN_WDT=y
+ CONFIG_USB=m
+ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_OTG_BLACKLIST_HUB=y
+ CONFIG_USB_MON=m
+diff --git a/arch/blackfin/configs/CM-BF548_defconfig b/arch/blackfin/configs/CM-BF548_defconfig
+index b9af4fa69984..9ff79df6825c 100644
+--- a/arch/blackfin/configs/CM-BF548_defconfig
++++ b/arch/blackfin/configs/CM-BF548_defconfig
+@@ -94,7 +94,6 @@ CONFIG_WATCHDOG=y
+ CONFIG_BFIN_WDT=y
+ # CONFIG_HID_SUPPORT is not set
+ CONFIG_USB=m
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_MON=m
+ CONFIG_USB_MUSB_HDRC=m
+diff --git a/arch/blackfin/configs/IP0X_defconfig b/arch/blackfin/configs/IP0X_defconfig
+index 629516578760..5adf0da58499 100644
+--- a/arch/blackfin/configs/IP0X_defconfig
++++ b/arch/blackfin/configs/IP0X_defconfig
+@@ -73,7 +73,6 @@ CONFIG_SPI_BFIN5XX=y
+ # CONFIG_HWMON is not set
+ CONFIG_WATCHDOG=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_OTG_WHITELIST=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_ISP1362_HCD=y
+diff --git a/arch/ia64/configs/bigsur_defconfig b/arch/ia64/configs/bigsur_defconfig
+index cf5993f05d4f..4c4ac163c600 100644
+--- a/arch/ia64/configs/bigsur_defconfig
++++ b/arch/ia64/configs/bigsur_defconfig
+@@ -75,7 +75,6 @@ CONFIG_SND_PCM_OSS=m
+ CONFIG_SND_CS4281=m
+ CONFIG_USB_HIDDEV=y
+ CONFIG_USB=m
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=m
+ CONFIG_USB_UHCI_HCD=m
+ CONFIG_USB_ACM=m
+diff --git a/arch/ia64/configs/generic_defconfig b/arch/ia64/configs/generic_defconfig
+index efbd2929aeb7..8f4d051d190c 100644
+--- a/arch/ia64/configs/generic_defconfig
++++ b/arch/ia64/configs/generic_defconfig
+@@ -144,7 +144,6 @@ CONFIG_HID_SAMSUNG=m
+ CONFIG_HID_SONY=m
+ CONFIG_HID_SUNPLUS=m
+ CONFIG_USB=m
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=m
+ CONFIG_USB_EHCI_HCD=m
+ CONFIG_USB_OHCI_HCD=m
+diff --git a/arch/ia64/configs/gensparse_defconfig b/arch/ia64/configs/gensparse_defconfig
+index f64980dd20c3..d663efd1e4db 100644
+--- a/arch/ia64/configs/gensparse_defconfig
++++ b/arch/ia64/configs/gensparse_defconfig
+@@ -126,7 +126,6 @@ CONFIG_SND_CS46XX=m
+ CONFIG_SND_EMU10K1=m
+ CONFIG_SND_FM801=m
+ CONFIG_USB=m
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=m
+ CONFIG_USB_EHCI_HCD=m
+ CONFIG_USB_OHCI_HCD=m
+diff --git a/arch/ia64/configs/tiger_defconfig b/arch/ia64/configs/tiger_defconfig
+index 0f4e9e41f130..2f4bc3e80efc 100644
+--- a/arch/ia64/configs/tiger_defconfig
++++ b/arch/ia64/configs/tiger_defconfig
+@@ -103,7 +103,6 @@ CONFIG_DRM_RADEON=m
+ CONFIG_DRM_MGA=m
+ CONFIG_DRM_SIS=m
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_EHCI_HCD=m
+ CONFIG_USB_OHCI_HCD=m
+ CONFIG_USB_UHCI_HCD=y
+diff --git a/arch/mips/configs/fuloong2e_defconfig b/arch/mips/configs/fuloong2e_defconfig
+index e5b73de08fc5..002680648dcb 100644
+--- a/arch/mips/configs/fuloong2e_defconfig
++++ b/arch/mips/configs/fuloong2e_defconfig
+@@ -188,7 +188,6 @@ CONFIG_USB_KBD=y
+ CONFIG_USB_MOUSE=y
+ CONFIG_USB=y
+ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_OTG_WHITELIST=y
+ CONFIG_USB_WUSB_CBAF=m
+diff --git a/arch/mips/configs/lemote2f_defconfig b/arch/mips/configs/lemote2f_defconfig
+index 343bebc4b63b..227a9de32246 100644
+--- a/arch/mips/configs/lemote2f_defconfig
++++ b/arch/mips/configs/lemote2f_defconfig
+@@ -297,7 +297,6 @@ CONFIG_HID_WACOM=m
+ CONFIG_HID_ZEROPLUS=m
+ CONFIG_ZEROPLUS_FF=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_DYNAMIC_MINORS=y
+ CONFIG_USB_OTG_WHITELIST=y
+diff --git a/arch/mips/configs/mpc30x_defconfig b/arch/mips/configs/mpc30x_defconfig
+index c16de9812920..7a346605c498 100644
+--- a/arch/mips/configs/mpc30x_defconfig
++++ b/arch/mips/configs/mpc30x_defconfig
+@@ -47,7 +47,6 @@ CONFIG_GPIO_VR41XX=y
+ # CONFIG_VGA_CONSOLE is not set
+ # CONFIG_HID_SUPPORT is not set
+ CONFIG_USB=m
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_OHCI_HCD=m
+ CONFIG_RTC_CLASS=y
+ CONFIG_RTC_DRV_VR41XX=y
+diff --git a/arch/mips/configs/msp71xx_defconfig b/arch/mips/configs/msp71xx_defconfig
+index d1142e9cd9a1..201edfb2637d 100644
+--- a/arch/mips/configs/msp71xx_defconfig
++++ b/arch/mips/configs/msp71xx_defconfig
+@@ -67,7 +67,6 @@ CONFIG_I2C_CHARDEV=y
+ CONFIG_I2C_PMCMSP=y
+ # CONFIG_USB_HID is not set
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_EHCI_ROOT_HUB_TT=y
+diff --git a/arch/mips/configs/mtx1_defconfig b/arch/mips/configs/mtx1_defconfig
+index 593946afc483..d269a5326a30 100644
+--- a/arch/mips/configs/mtx1_defconfig
++++ b/arch/mips/configs/mtx1_defconfig
+@@ -575,7 +575,6 @@ CONFIG_USB_HIDDEV=y
+ CONFIG_USB_KBD=m
+ CONFIG_USB_MOUSE=m
+ CONFIG_USB=m
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=m
+ CONFIG_USB_EHCI_HCD=m
+ CONFIG_USB_EHCI_ROOT_HUB_TT=y
+diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig
+index 59d9d2fdcd48..73e7bf49461c 100644
+--- a/arch/mips/configs/rm200_defconfig
++++ b/arch/mips/configs/rm200_defconfig
+@@ -301,7 +301,6 @@ CONFIG_USB_HIDDEV=y
+ CONFIG_USB_KBD=m
+ CONFIG_USB_MOUSE=m
+ CONFIG_USB=m
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=m
+ CONFIG_USB_EHCI_HCD=m
+ # CONFIG_USB_EHCI_TT_NEWSCHED is not set
+diff --git a/arch/mips/configs/sb1250_swarm_defconfig b/arch/mips/configs/sb1250_swarm_defconfig
+index 5b0463ef9389..51bab13ef6f8 100644
+--- a/arch/mips/configs/sb1250_swarm_defconfig
++++ b/arch/mips/configs/sb1250_swarm_defconfig
+@@ -72,7 +72,6 @@ CONFIG_SERIO_RAW=m
+ # CONFIG_HW_RANDOM is not set
+ # CONFIG_HWMON is not set
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_OHCI_HCD=y
+ CONFIG_EXT2_FS=y
+diff --git a/arch/mips/configs/tb0219_defconfig b/arch/mips/configs/tb0219_defconfig
+index 30036b4cbeb1..11f51505d562 100644
+--- a/arch/mips/configs/tb0219_defconfig
++++ b/arch/mips/configs/tb0219_defconfig
+@@ -72,7 +72,6 @@ CONFIG_GPIO_TB0219=y
+ # CONFIG_VGA_CONSOLE is not set
+ # CONFIG_HID_SUPPORT is not set
+ CONFIG_USB=m
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=m
+ CONFIG_USB_EHCI_HCD=m
+ # CONFIG_USB_EHCI_TT_NEWSCHED is not set
+diff --git a/arch/mips/configs/tb0226_defconfig b/arch/mips/configs/tb0226_defconfig
+index 81bfa1d4d8e3..d99b1905a1ba 100644
+--- a/arch/mips/configs/tb0226_defconfig
++++ b/arch/mips/configs/tb0226_defconfig
+@@ -69,7 +69,6 @@ CONFIG_SERIAL_VR41XX_CONSOLE=y
+ # CONFIG_VGA_CONSOLE is not set
+ # CONFIG_HID_SUPPORT is not set
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_EHCI_HCD=y
+ # CONFIG_USB_EHCI_TT_NEWSCHED is not set
+ CONFIG_USB_OHCI_HCD=y
+diff --git a/arch/parisc/configs/c3000_defconfig b/arch/parisc/configs/c3000_defconfig
+index acacd348df89..b2c3905682d9 100644
+--- a/arch/parisc/configs/c3000_defconfig
++++ b/arch/parisc/configs/c3000_defconfig
+@@ -128,7 +128,6 @@ CONFIG_SND_AD1889=y
+ CONFIG_USB_HIDDEV=y
+ CONFIG_USB=y
+ CONFIG_USB_DEBUG=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_OHCI_HCD=y
+ CONFIG_USB_PRINTER=m
+ CONFIG_USB_STORAGE=m
+diff --git a/arch/parisc/configs/default_defconfig b/arch/parisc/configs/default_defconfig
+index ba61495e1fa4..4d8127e8428a 100644
+--- a/arch/parisc/configs/default_defconfig
++++ b/arch/parisc/configs/default_defconfig
+@@ -145,7 +145,6 @@ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_HID_TOPSEED=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_OHCI_HCD=y
+ CONFIG_USB_UHCI_HCD=y
+diff --git a/arch/powerpc/configs/40x/ep405_defconfig b/arch/powerpc/configs/40x/ep405_defconfig
+index 17582a3420fb..09e078ab5ff6 100644
+--- a/arch/powerpc/configs/40x/ep405_defconfig
++++ b/arch/powerpc/configs/40x/ep405_defconfig
+@@ -58,7 +58,6 @@ CONFIG_SERIAL_OF_PLATFORM=y
+ CONFIG_THERMAL=y
+ CONFIG_VIDEO_OUTPUT_CONTROL=m
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_OHCI_HCD=y
+ CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
+diff --git a/arch/powerpc/configs/44x/canyonlands_defconfig b/arch/powerpc/configs/44x/canyonlands_defconfig
+index d5be93e6e92d..47aefd0d2a8f 100644
+--- a/arch/powerpc/configs/44x/canyonlands_defconfig
++++ b/arch/powerpc/configs/44x/canyonlands_defconfig
+@@ -72,7 +72,6 @@ CONFIG_I2C_IBM_IIC=y
+ CONFIG_SENSORS_AD7414=y
+ CONFIG_USB=y
+ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=m
+ CONFIG_USB_OHCI_HCD=y
+diff --git a/arch/powerpc/configs/44x/sam440ep_defconfig b/arch/powerpc/configs/44x/sam440ep_defconfig
+index ca088cd581af..9622eb2a3e37 100644
+--- a/arch/powerpc/configs/44x/sam440ep_defconfig
++++ b/arch/powerpc/configs/44x/sam440ep_defconfig
+@@ -83,7 +83,6 @@ CONFIG_HID_SAMSUNG=y
+ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_EHCI_HCD=m
+ CONFIG_USB_OHCI_HCD=y
+diff --git a/arch/powerpc/configs/52xx/cm5200_defconfig b/arch/powerpc/configs/52xx/cm5200_defconfig
+index 0b88c7b30bb9..7f979fb48972 100644
+--- a/arch/powerpc/configs/52xx/cm5200_defconfig
++++ b/arch/powerpc/configs/52xx/cm5200_defconfig
+@@ -65,7 +65,6 @@ CONFIG_I2C_MPC=y
+ # CONFIG_HWMON is not set
+ CONFIG_WATCHDOG=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_OHCI_HCD=y
+ CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
+diff --git a/arch/powerpc/configs/52xx/pcm030_defconfig b/arch/powerpc/configs/52xx/pcm030_defconfig
+index 430aa182fa1c..279686dffbf8 100644
+--- a/arch/powerpc/configs/52xx/pcm030_defconfig
++++ b/arch/powerpc/configs/52xx/pcm030_defconfig
+@@ -77,7 +77,6 @@ CONFIG_I2C_CHARDEV=y
+ CONFIG_I2C_MPC=y
+ # CONFIG_HWMON is not set
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_OHCI_HCD=m
+ # CONFIG_USB_OHCI_HCD_PPC_SOC is not set
+diff --git a/arch/powerpc/configs/52xx/tqm5200_defconfig b/arch/powerpc/configs/52xx/tqm5200_defconfig
+index 7af4c5bb7c63..39a686eb31a0 100644
+--- a/arch/powerpc/configs/52xx/tqm5200_defconfig
++++ b/arch/powerpc/configs/52xx/tqm5200_defconfig
+@@ -76,7 +76,6 @@ CONFIG_FB_FOREIGN_ENDIAN=y
+ CONFIG_FB_SM501=y
+ CONFIG_FRAMEBUFFER_CONSOLE=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_MON=y
+ CONFIG_USB_OHCI_HCD=y
+diff --git a/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig b/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
+index e4ad2e27551a..e4a43fe93ae5 100644
+--- a/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
++++ b/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
+@@ -75,7 +75,6 @@ CONFIG_WATCHDOG=y
+ CONFIG_VIDEO_OUTPUT_CONTROL=m
+ # CONFIG_USB_HID is not set
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_EHCI_FSL=y
+diff --git a/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig b/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig
+index 34ff5686be08..4e5e4bc1cef0 100644
+--- a/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig
++++ b/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig
+@@ -72,7 +72,6 @@ CONFIG_WATCHDOG=y
+ CONFIG_VIDEO_OUTPUT_CONTROL=m
+ # CONFIG_USB_HID is not set
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_EHCI_FSL=y
+diff --git a/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig b/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig
+index b4da1a7e6449..5adc4cea42d3 100644
+--- a/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig
++++ b/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig
+@@ -61,7 +61,6 @@ CONFIG_WATCHDOG=y
+ CONFIG_VIDEO_OUTPUT_CONTROL=m
+ # CONFIG_USB_HID is not set
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_OHCI_HCD=y
+diff --git a/arch/powerpc/configs/83xx/mpc834x_itx_defconfig b/arch/powerpc/configs/83xx/mpc834x_itx_defconfig
+index 291f8221d5a6..82b6b6c88d6a 100644
+--- a/arch/powerpc/configs/83xx/mpc834x_itx_defconfig
++++ b/arch/powerpc/configs/83xx/mpc834x_itx_defconfig
+@@ -71,7 +71,6 @@ CONFIG_SPI_BITBANG=y
+ CONFIG_WATCHDOG=y
+ CONFIG_VIDEO_OUTPUT_CONTROL=m
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_EHCI_FSL=y
+diff --git a/arch/powerpc/configs/83xx/sbc834x_defconfig b/arch/powerpc/configs/83xx/sbc834x_defconfig
+index 6d6463fe06fc..f859fb128346 100644
+--- a/arch/powerpc/configs/83xx/sbc834x_defconfig
++++ b/arch/powerpc/configs/83xx/sbc834x_defconfig
+@@ -71,7 +71,6 @@ CONFIG_I2C_MPC=y
+ CONFIG_WATCHDOG=y
+ # CONFIG_USB_HID is not set
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_EHCI_FSL=y
+diff --git a/arch/powerpc/configs/85xx/ge_imp3a_defconfig b/arch/powerpc/configs/85xx/ge_imp3a_defconfig
+index c9765b54dd1a..dc939de9b5b0 100644
+--- a/arch/powerpc/configs/85xx/ge_imp3a_defconfig
++++ b/arch/powerpc/configs/85xx/ge_imp3a_defconfig
+@@ -158,7 +158,6 @@ CONFIG_HID_TOPSEED=y
+ CONFIG_HID_THRUSTMASTER=y
+ CONFIG_HID_ZEROPLUS=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_EHCI_HCD=y
+ # CONFIG_USB_EHCI_TT_NEWSCHED is not set
+ CONFIG_USB_EHCI_FSL=y
+diff --git a/arch/powerpc/configs/85xx/socrates_defconfig b/arch/powerpc/configs/85xx/socrates_defconfig
+index 77506b5d5a41..0eb5954d481f 100644
+--- a/arch/powerpc/configs/85xx/socrates_defconfig
++++ b/arch/powerpc/configs/85xx/socrates_defconfig
+@@ -87,7 +87,6 @@ CONFIG_FONTS=y
+ CONFIG_FONT_8x16=y
+ CONFIG_USB=y
+ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_OHCI_HCD=y
+diff --git a/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig b/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig
+index 1cd6fcb368e9..98bd50cac54b 100644
+--- a/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig
++++ b/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig
+@@ -126,7 +126,6 @@ CONFIG_SENSORS_LM90=y
+ CONFIG_WATCHDOG=y
+ CONFIG_VIDEO_OUTPUT_CONTROL=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_MON=y
+ CONFIG_USB_ISP1760_HCD=y
+diff --git a/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig b/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig
+index f51c7ebc181e..76f43df3dec7 100644
+--- a/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig
++++ b/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig
+@@ -123,7 +123,6 @@ CONFIG_HID_SAMSUNG=y
+ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_OHCI_HCD=y
+diff --git a/arch/powerpc/configs/amigaone_defconfig b/arch/powerpc/configs/amigaone_defconfig
+index b6d49da9c82c..8c66b13e59fc 100644
+--- a/arch/powerpc/configs/amigaone_defconfig
++++ b/arch/powerpc/configs/amigaone_defconfig
+@@ -108,7 +108,6 @@ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_HID_TOPSEED=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_OHCI_HCD=y
+ CONFIG_USB_UHCI_HCD=y
+diff --git a/arch/powerpc/configs/c2k_defconfig b/arch/powerpc/configs/c2k_defconfig
+index 671a8f960afa..3d091b556dff 100644
+--- a/arch/powerpc/configs/c2k_defconfig
++++ b/arch/powerpc/configs/c2k_defconfig
+@@ -262,7 +262,6 @@ CONFIG_USBPCWATCHDOG=m
+ # CONFIG_VGA_CONSOLE is not set
+ # CONFIG_HID_SUPPORT is not set
+ CONFIG_USB=m
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_MON=m
+ CONFIG_USB_EHCI_HCD=m
+diff --git a/arch/powerpc/configs/cell_defconfig b/arch/powerpc/configs/cell_defconfig
+index 22a403d78d34..4bee1a6d41d0 100644
+--- a/arch/powerpc/configs/cell_defconfig
++++ b/arch/powerpc/configs/cell_defconfig
+@@ -179,7 +179,6 @@ CONFIG_VIDEO_OUTPUT_CONTROL=m
+ CONFIG_HID=m
+ # CONFIG_USB_HID is not set
+ CONFIG_USB=m
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=m
+ CONFIG_USB_EHCI_HCD=m
+ # CONFIG_USB_EHCI_HCD_PPC_OF is not set
+diff --git a/arch/powerpc/configs/celleb_defconfig b/arch/powerpc/configs/celleb_defconfig
+index 895449ed971e..6d7b22f41b50 100644
+--- a/arch/powerpc/configs/celleb_defconfig
++++ b/arch/powerpc/configs/celleb_defconfig
+@@ -87,7 +87,6 @@ CONFIG_WATCHDOG=y
+ # CONFIG_VGA_CONSOLE is not set
+ CONFIG_USB_HIDDEV=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=m
+diff --git a/arch/powerpc/configs/chrp32_defconfig b/arch/powerpc/configs/chrp32_defconfig
+index b20554efddcc..db5b30857e1c 100644
+--- a/arch/powerpc/configs/chrp32_defconfig
++++ b/arch/powerpc/configs/chrp32_defconfig
+@@ -111,7 +111,6 @@ CONFIG_HID_SAMSUNG=y
+ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=m
+ # CONFIG_USB_EHCI_HCD_PPC_OF is not set
+diff --git a/arch/powerpc/configs/g5_defconfig b/arch/powerpc/configs/g5_defconfig
+index 1ea22fc24ea8..3c72fa615bd9 100644
+--- a/arch/powerpc/configs/g5_defconfig
++++ b/arch/powerpc/configs/g5_defconfig
+@@ -175,7 +175,6 @@ CONFIG_HID_SAMSUNG=y
+ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=y
+ # CONFIG_USB_EHCI_HCD_PPC_OF is not set
+diff --git a/arch/powerpc/configs/linkstation_defconfig b/arch/powerpc/configs/linkstation_defconfig
+index 8a874b999867..67389b959649 100644
+--- a/arch/powerpc/configs/linkstation_defconfig
++++ b/arch/powerpc/configs/linkstation_defconfig
+@@ -112,7 +112,6 @@ CONFIG_VIDEO_OUTPUT_CONTROL=m
+ CONFIG_HID=m
+ # CONFIG_USB_HID is not set
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_OHCI_HCD=y
+diff --git a/arch/powerpc/configs/maple_defconfig b/arch/powerpc/configs/maple_defconfig
+index 2a5afac29861..95e545d9f25c 100644
+--- a/arch/powerpc/configs/maple_defconfig
++++ b/arch/powerpc/configs/maple_defconfig
+@@ -79,7 +79,6 @@ CONFIG_HID_SAMSUNG=y
+ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_EHCI_ROOT_HUB_TT=y
+diff --git a/arch/powerpc/configs/mpc5200_defconfig b/arch/powerpc/configs/mpc5200_defconfig
+index 8b682d1cf4d6..530601e8ccfe 100644
+--- a/arch/powerpc/configs/mpc5200_defconfig
++++ b/arch/powerpc/configs/mpc5200_defconfig
+@@ -113,7 +113,6 @@ CONFIG_HID_TOPSEED=y
+ CONFIG_HID_THRUSTMASTER=y
+ CONFIG_HID_ZEROPLUS=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_MON=y
+ CONFIG_USB_OHCI_HCD=y
+diff --git a/arch/powerpc/configs/mpc86xx_defconfig b/arch/powerpc/configs/mpc86xx_defconfig
+index a1cc8179e9fd..35595ea74ff4 100644
+--- a/arch/powerpc/configs/mpc86xx_defconfig
++++ b/arch/powerpc/configs/mpc86xx_defconfig
+@@ -126,7 +126,6 @@ CONFIG_HID_SAMSUNG=y
+ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_OHCI_HCD=y
+diff --git a/arch/powerpc/configs/pmac32_defconfig b/arch/powerpc/configs/pmac32_defconfig
+index a73626b09051..553e66278010 100644
+--- a/arch/powerpc/configs/pmac32_defconfig
++++ b/arch/powerpc/configs/pmac32_defconfig
+@@ -279,7 +279,6 @@ CONFIG_HID_SAMSUNG=y
+ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_HID_TOPSEED=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_DYNAMIC_MINORS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=m
+diff --git a/arch/powerpc/configs/ppc6xx_defconfig b/arch/powerpc/configs/ppc6xx_defconfig
+index c2353bf059fd..809845841469 100644
+--- a/arch/powerpc/configs/ppc6xx_defconfig
++++ b/arch/powerpc/configs/ppc6xx_defconfig
+@@ -966,7 +966,6 @@ CONFIG_HID_SUNPLUS=y
+ CONFIG_USB=y
+ CONFIG_USB_DEBUG=y
+ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=m
+diff --git a/arch/powerpc/configs/storcenter_defconfig b/arch/powerpc/configs/storcenter_defconfig
+index ebb2a66c99d3..7687f4dbee76 100644
+--- a/arch/powerpc/configs/storcenter_defconfig
++++ b/arch/powerpc/configs/storcenter_defconfig
+@@ -73,7 +73,6 @@ CONFIG_I2C_CHARDEV=y
+ CONFIG_I2C_MPC=y
+ # CONFIG_HWMON is not set
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_OHCI_HCD=y
+ CONFIG_USB_STORAGE=y
+diff --git a/arch/sh/configs/ecovec24_defconfig b/arch/sh/configs/ecovec24_defconfig
+index c6c2becdc8ab..0b364e3b0ff8 100644
+--- a/arch/sh/configs/ecovec24_defconfig
++++ b/arch/sh/configs/ecovec24_defconfig
+@@ -107,7 +107,6 @@ CONFIG_SND_SOC=y
+ CONFIG_SND_SOC_SH4_FSI=y
+ CONFIG_SND_FSI_DA7210=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_R8A66597_HCD=y
+ CONFIG_USB_STORAGE=y
+diff --git a/arch/sh/configs/landisk_defconfig b/arch/sh/configs/landisk_defconfig
+index 3670e937f2b7..6783f31315c7 100644
+--- a/arch/sh/configs/landisk_defconfig
++++ b/arch/sh/configs/landisk_defconfig
+@@ -80,7 +80,6 @@ CONFIG_HID_SAMSUNG=m
+ CONFIG_HID_SONY=m
+ CONFIG_HID_SUNPLUS=m
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=y
+ # CONFIG_USB_EHCI_TT_NEWSCHED is not set
+diff --git a/arch/sh/configs/rsk7203_defconfig b/arch/sh/configs/rsk7203_defconfig
+index 4e5229b0c5bb..549412d4b21a 100644
+--- a/arch/sh/configs/rsk7203_defconfig
++++ b/arch/sh/configs/rsk7203_defconfig
+@@ -100,7 +100,6 @@ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_USB=y
+ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_R8A66597_HCD=y
+ CONFIG_NEW_LEDS=y
+diff --git a/arch/sh/configs/sdk7780_defconfig b/arch/sh/configs/sdk7780_defconfig
+index ae1115849dda..fa37e897399b 100644
+--- a/arch/sh/configs/sdk7780_defconfig
++++ b/arch/sh/configs/sdk7780_defconfig
+@@ -101,7 +101,6 @@ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_USB=y
+ CONFIG_USB_DEBUG=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=y
+diff --git a/arch/sh/configs/se7343_defconfig b/arch/sh/configs/se7343_defconfig
+index be9c474197b3..af3fe7352471 100644
+--- a/arch/sh/configs/se7343_defconfig
++++ b/arch/sh/configs/se7343_defconfig
+@@ -94,7 +94,6 @@ CONFIG_HID_SUNPLUS=y
+ CONFIG_USB=y
+ CONFIG_USB_DEBUG=y
+ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_ISP116X_HCD=y
+ CONFIG_UIO=y
+ CONFIG_EXT2_FS=y
+diff --git a/arch/sh/configs/se7780_defconfig b/arch/sh/configs/se7780_defconfig
+index c8c5e7f7a68d..b0ef63ce525a 100644
+--- a/arch/sh/configs/se7780_defconfig
++++ b/arch/sh/configs/se7780_defconfig
+@@ -94,7 +94,6 @@ CONFIG_HID_SAMSUNG=y
+ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=y
+diff --git a/arch/sh/configs/sh2007_defconfig b/arch/sh/configs/sh2007_defconfig
+index 0d2f41472a19..0c08d9244c97 100644
+--- a/arch/sh/configs/sh2007_defconfig
++++ b/arch/sh/configs/sh2007_defconfig
+@@ -97,7 +97,6 @@ CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+ CONFIG_LOGO=y
+ # CONFIG_HID_SUPPORT is not set
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ # CONFIG_USB_DEVICE_CLASS is not set
+ CONFIG_USB_MON=y
+ CONFIG_NEW_LEDS=y
+diff --git a/arch/sh/configs/sh7785lcr_defconfig b/arch/sh/configs/sh7785lcr_defconfig
+index 51561f5677d8..d29da4a0f6c2 100644
+--- a/arch/sh/configs/sh7785lcr_defconfig
++++ b/arch/sh/configs/sh7785lcr_defconfig
+@@ -88,7 +88,6 @@ CONFIG_HID_SAMSUNG=y
+ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=m
+ # CONFIG_USB_EHCI_TT_NEWSCHED is not set
+diff --git a/arch/sh/configs/titan_defconfig b/arch/sh/configs/titan_defconfig
+index e2cbd92d520b..a77b778c745b 100644
+--- a/arch/sh/configs/titan_defconfig
++++ b/arch/sh/configs/titan_defconfig
+@@ -215,7 +215,6 @@ CONFIG_WATCHDOG=y
+ CONFIG_SH_WDT=m
+ # CONFIG_USB_HID is not set
+ CONFIG_USB=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_EHCI_ROOT_HUB_TT=y
+diff --git a/arch/sh/configs/urquell_defconfig b/arch/sh/configs/urquell_defconfig
+index d7f89be9f474..1e843dbed5f0 100644
+--- a/arch/sh/configs/urquell_defconfig
++++ b/arch/sh/configs/urquell_defconfig
+@@ -117,7 +117,6 @@ CONFIG_HID_SONY=y
+ CONFIG_HID_SUNPLUS=y
+ CONFIG_USB=y
+ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+-CONFIG_USB_DEVICEFS=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_OHCI_HCD=y
+ CONFIG_USB_STORAGE=y
+diff --git a/arch/unicore32/configs/unicore32_defconfig b/arch/unicore32/configs/unicore32_defconfig
+index c9dd3198b6f7..45f47f88d86a 100644
+--- a/arch/unicore32/configs/unicore32_defconfig
++++ b/arch/unicore32/configs/unicore32_defconfig
+@@ -149,7 +149,6 @@ CONFIG_SND_PCM_OSS=m
+ # USB support
+ CONFIG_USB_ARCH_HAS_HCD=n
+ CONFIG_USB=n
+-CONFIG_USB_DEVICEFS=n
+ CONFIG_USB_PRINTER=n
+ CONFIG_USB_STORAGE=n
+ # Inventra Highspeed Dual Role Controller
+--
+2.1.2
+
--- /dev/null
+From 2d74d066e91fc2e93745cc17b1ddce40d477e1b7 Mon Sep 17 00:00:00 2001
+From: Simon Horman <horms+renesas@verge.net.au>
+Date: Wed, 28 May 2014 10:52:34 +0900
+Subject: ARM: shmobile: r8a7779: Add clock index macros for DT sources
+
+Add macros usable by device tree sources to reference r8a7779 clocks by
+index.
+
+Based on work for the r8a7791 SoC by Laurent Pinchart.
+
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+Signed-off-by: Mike Turquette <mturquette@linaro.org>
+(cherry picked from commit b59e869674f5b6779c65ddb13cf799cd01c07072)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ include/dt-bindings/clock/r8a7779-clock.h | 64 +++++++++++++++++++++++++++++++
+ 1 file changed, 64 insertions(+)
+ create mode 100644 include/dt-bindings/clock/r8a7779-clock.h
+
+diff --git a/include/dt-bindings/clock/r8a7779-clock.h b/include/dt-bindings/clock/r8a7779-clock.h
+new file mode 100644
+index 000000000000..381a6114237a
+--- /dev/null
++++ b/include/dt-bindings/clock/r8a7779-clock.h
+@@ -0,0 +1,64 @@
++/*
++ * Copyright (C) 2013 Horms Solutions Ltd.
++ *
++ * Contact: Simon Horman <horms@verge.net.au>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++#ifndef __DT_BINDINGS_CLOCK_R8A7779_H__
++#define __DT_BINDINGS_CLOCK_R8A7779_H__
++
++/* CPG */
++#define R8A7779_CLK_PLLA 0
++#define R8A7779_CLK_Z 1
++#define R8A7779_CLK_ZS 2
++#define R8A7779_CLK_S 3
++#define R8A7779_CLK_S1 4
++#define R8A7779_CLK_P 5
++#define R8A7779_CLK_B 6
++#define R8A7779_CLK_OUT 7
++
++/* MSTP 0 */
++#define R8A7779_CLK_HSPI 7
++#define R8A7779_CLK_TMU2 14
++#define R8A7779_CLK_TMU1 15
++#define R8A7779_CLK_TMU0 16
++#define R8A7779_CLK_HSCIF1 18
++#define R8A7779_CLK_HSCIF0 19
++#define R8A7779_CLK_SCIF5 21
++#define R8A7779_CLK_SCIF4 22
++#define R8A7779_CLK_SCIF3 23
++#define R8A7779_CLK_SCIF2 24
++#define R8A7779_CLK_SCIF1 25
++#define R8A7779_CLK_SCIF0 26
++#define R8A7779_CLK_I2C3 27
++#define R8A7779_CLK_I2C2 28
++#define R8A7779_CLK_I2C1 29
++#define R8A7779_CLK_I2C0 30
++
++/* MSTP 1 */
++#define R8A7779_CLK_USB01 0
++#define R8A7779_CLK_USB2 1
++#define R8A7779_CLK_DU 3
++#define R8A7779_CLK_VIN2 8
++#define R8A7779_CLK_VIN1 9
++#define R8A7779_CLK_VIN0 10
++#define R8A7779_CLK_ETHER 14
++#define R8A7779_CLK_SATA 15
++#define R8A7779_CLK_PCIE 16
++#define R8A7779_CLK_VIN3 20
++
++/* MSTP 3 */
++#define R8A7779_CLK_SDHI3 20
++#define R8A7779_CLK_SDHI2 21
++#define R8A7779_CLK_SDHI1 22
++#define R8A7779_CLK_SDHI0 23
++#define R8A7779_CLK_MMC1 30
++#define R8A7779_CLK_MMC0 31
++
++
++#endif /* __DT_BINDINGS_CLOCK_R8A7779_H__ */
+--
+2.1.2
+
--- /dev/null
+From 63903c85819f13c84a1b84079b60b0450e83b391 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 27 May 2014 19:57:16 -0700
+Subject: ARM: shmobile: armadillo800eva: fixup HDMI sound flags setting
+
+c7a507eea1db1430476289f525f9c853d5d485e8
+(ASoC: fsi: fixup SND_SOC_DAIFMT_CBx_CFx flags)
+fixuped FSI driver's behavior
+which didn't match to ALSA flags.
+
+But, it didn't care about armadillo800eva HDMI sound flags.
+This patch fixed it.
+
+Reported-by: Bui Duc Phuc(Fukuda) <bd-phuc@jinso.co.jp>
+Reported-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit 730359857f5f0e1fac9881c63d389d73adb5f416)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/mach-shmobile/board-armadillo800eva.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
+index d4e7f771c174..5b2aee4eac0c 100644
+--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
++++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
+@@ -1009,7 +1009,7 @@ static struct asoc_simple_card_info fsi2_hdmi_info = {
+ .platform = "sh_fsi2",
+ .cpu_dai = {
+ .name = "fsib-dai",
+- .fmt = SND_SOC_DAIFMT_CBM_CFM,
++ .fmt = SND_SOC_DAIFMT_CBS_CFS,
+ },
+ .codec_dai = {
+ .name = "sh_mobile_hdmi-hifi",
+--
+2.1.2
+
--- /dev/null
+From 9d3436e9dcd7ae92bf011bdbba84d65fc45afd81 Mon Sep 17 00:00:00 2001
+From: Will Deacon <will.deacon@arm.com>
+Date: Tue, 27 May 2014 23:26:35 +0100
+Subject: ARM: kconfig: allow PCI support to be selected with
+ ARCH_MULTIPLATFORM
+
+When targetting ARCH_MULTIPLATFORM, we may include support for SoCs with
+PCI-capable devices (e.g. mach-virt with virtio-pci).
+
+This patch allows PCI support to be selected for these SoCs by selecting
+CONFIG_MIGHT_HAVE_PCI when CONFIG_ARCH_MULTIPLATFORM=y and removes the
+individual selections from multi-platform enabled SoCs.
+
+Acked-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Olof Johansson <olof@lixom.net>
+(cherry picked from commit 08d38bebb4dcd6414944f8277ea5ea30010664fe)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+
+Conflicts:
+ arch/arm/mach-bcm/Kconfig
+ arch/arm/mach-cns3xxx/Kconfig
+ arch/arm/mach-imx/Kconfig
+---
+ arch/arm/Kconfig | 1 +
+ arch/arm/mach-cns3xxx/Kconfig | 1 -
+ arch/arm/mach-imx/Kconfig | 3 ---
+ arch/arm/mach-mvebu/Kconfig | 1 -
+ arch/arm/mach-shmobile/Kconfig | 1 -
+ arch/arm/mach-tegra/Kconfig | 1 -
+ 6 files changed, 1 insertion(+), 7 deletions(-)
+
+diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
+index bb7270772b24..69fc8c1ee833 100644
+--- a/arch/arm/Kconfig
++++ b/arch/arm/Kconfig
+@@ -312,6 +312,7 @@ config ARCH_MULTIPLATFORM
+ select AUTO_ZRELADDR
+ select COMMON_CLK
+ select GENERIC_CLOCKEVENTS
++ select MIGHT_HAVE_PCI
+ select MULTI_IRQ_HANDLER
+ select SPARSE_IRQ
+ select USE_OF
+diff --git a/arch/arm/mach-cns3xxx/Kconfig b/arch/arm/mach-cns3xxx/Kconfig
+index c6f58a15c95e..5191e10b3945 100644
+--- a/arch/arm/mach-cns3xxx/Kconfig
++++ b/arch/arm/mach-cns3xxx/Kconfig
+@@ -2,7 +2,6 @@ config ARCH_CNS3XXX
+ bool "Cavium Networks CNS3XXX family" if ARCH_MULTI_V6
+ select ARM_GIC
+ select CPU_V6K
+- select MIGHT_HAVE_PCI
+ select PCI_DOMAINS if PCI
+ help
+ Support for Cavium Networks CNS3XXX platform.
+diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
+index ff2447389f27..54fc3c5d1862 100644
+--- a/arch/arm/mach-imx/Kconfig
++++ b/arch/arm/mach-imx/Kconfig
+@@ -96,7 +96,6 @@ config SOC_IMX25
+
+ config SOC_IMX27
+ bool
+- select ARCH_HAS_CPUFREQ
+ select ARCH_HAS_OPP
+ select CPU_ARM926T
+ select IMX_HAVE_IOMUX_V1
+@@ -122,7 +121,6 @@ config SOC_IMX35
+
+ config SOC_IMX5
+ bool
+- select ARCH_HAS_CPUFREQ
+ select ARCH_HAS_OPP
+ select ARCH_MXC_IOMUX_V3
+ select MXC_TZIC
+@@ -791,7 +789,6 @@ config SOC_IMX6Q
+ select HAVE_IMX_MMDC
+ select HAVE_IMX_SRC
+ select MFD_SYSCON
+- select MIGHT_HAVE_PCI
+ select PCI_DOMAINS if PCI
+ select PINCTRL_IMX6Q
+ select PL310_ERRATA_588369 if CACHE_PL310
+diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
+index 875a35263dc3..0451caf88c65 100644
+--- a/arch/arm/mach-mvebu/Kconfig
++++ b/arch/arm/mach-mvebu/Kconfig
+@@ -9,7 +9,6 @@ config ARCH_MVEBU
+ select MVEBU_MBUS
+ select ZONE_DMA if ARM_LPAE
+ select ARCH_REQUIRE_GPIOLIB
+- select MIGHT_HAVE_PCI
+ select PCI_QUIRKS if PCI
+
+ if ARCH_MVEBU
+diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
+index b50c753482c7..54c9210461c7 100644
+--- a/arch/arm/mach-shmobile/Kconfig
++++ b/arch/arm/mach-shmobile/Kconfig
+@@ -8,7 +8,6 @@ config ARCH_SHMOBILE_MULTI
+ select HAVE_ARM_SCU if SMP
+ select HAVE_ARM_TWD if SMP
+ select ARM_GIC
+- select MIGHT_HAVE_PCI
+ select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
+ select NO_IOPORT_MAP
+ select PINCTRL
+diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
+index 92d660f9610f..b3c521eba7a7 100644
+--- a/arch/arm/mach-tegra/Kconfig
++++ b/arch/arm/mach-tegra/Kconfig
+@@ -7,7 +7,6 @@ config ARCH_TEGRA
+ select CLKSRC_MMIO
+ select HAVE_ARM_SCU if SMP
+ select HAVE_ARM_TWD if SMP
+- select MIGHT_HAVE_PCI
+ select PINCTRL
+ select ARCH_HAS_RESET_CONTROLLER
+ select RESET_CONTROLLER
+--
+2.1.2
+
--- /dev/null
+From 9e26903bf76980800af81fdf38557e45e57cc2c6 Mon Sep 17 00:00:00 2001
+From: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
+Date: Mon, 21 Jul 2014 22:04:29 -0700
+Subject: ARM: shmobile: r8a7791: Fix SD2CKCR register address
+
+59e79895b95892863617ce630fbda467f2470575
+(ARM: shmobile: r8a7791: Add clocks)
+added r8a7791 SD clocks when v3.14.
+
+2c60a7df72711fb8b4be1e6aa651ab166a8931bc
+(ARM: shmobile: Add SDHI devices for Koelsch DTS)
+enabled SD on r8a7791 Koelsch when v3.15.
+
+1299df03d7191ab4356c995dde8b912d3c8922e9
+(ARM: shmobile: henninger: add SDHI0/2 DT support)
+enable SD on r8a7791 Henninger when v3.16.
+
+But r8a7791 SD clock had wrong address.
+This patch fixup it.
+
+[Kuninori Morimoto: tidyup for upstreaming]
+
+Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+(cherry picked from commit c9b227723d051184b9e78f20c75ae2f9d44a6ea2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ arch/arm/boot/dts/r8a7791.dtsi | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
+index 8d7ffaeff6e0..79f68acfd5d4 100644
+--- a/arch/arm/boot/dts/r8a7791.dtsi
++++ b/arch/arm/boot/dts/r8a7791.dtsi
+@@ -540,9 +540,9 @@
+ #clock-cells = <0>;
+ clock-output-names = "sd1";
+ };
+- sd2_clk: sd3_clk@e615007c {
++ sd2_clk: sd3_clk@e615026c {
+ compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
+- reg = <0 0xe615007c 0 4>;
++ reg = <0 0xe615026c 0 4>;
+ clocks = <&pll1_div2_clk>;
+ #clock-cells = <0>;
+ clock-output-names = "sd2";
+--
+2.1.2
+
--- /dev/null
+From a5a8df7a02b1bfbd51146cf1f22f7b129508ab3c Mon Sep 17 00:00:00 2001
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Tue, 29 Apr 2014 19:18:30 +0800
+Subject: ASoC: sh: Migo-R sound needs I2C
+
+The WM8978 driver needs I2C to be enabled, so the
+SND_SIU_MIGOR option also requires this.
+
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+Signed-off-by: Xia Kaixu <kaixu.xia@linaro.org>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 7b6ad9e85bad73bac3ce799864e0e3a66a0469e2)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/sound/soc/sh/Kconfig b/sound/soc/sh/Kconfig
+index ff60e11ecb56..b43fdf0d08af 100644
+--- a/sound/soc/sh/Kconfig
++++ b/sound/soc/sh/Kconfig
+@@ -56,7 +56,7 @@ config SND_SH7760_AC97
+
+ config SND_SIU_MIGOR
+ tristate "SIU sound support on Migo-R"
+- depends on SH_MIGOR
++ depends on SH_MIGOR && I2C
+ select SND_SOC_SH4_SIU
+ select SND_SOC_WM8978
+ help
+--
+2.1.2
+
--- /dev/null
+From dc172b9e53d9793668d90bb51f5e76cb79c3c125 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 8 May 2014 01:59:00 -0700
+Subject: ASoC: rsnd: remove old clock style support
+
+All platform which used old style was
+switched to new style.
+R-Car sound can remove old style clock support,
+use device dependent clock now.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 5e392ea0da04d4206d56ec1479565fb42a044b57)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/adg.c | 39 +++------------------------------------
+ 1 file changed, 3 insertions(+), 36 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/adg.c b/sound/soc/sh/rcar/adg.c
+index 69c44269ebdb..41556b2ef21e 100644
+--- a/sound/soc/sh/rcar/adg.c
++++ b/sound/soc/sh/rcar/adg.c
+@@ -397,9 +397,8 @@ int rsnd_adg_probe(struct platform_device *pdev,
+ {
+ struct rsnd_adg *adg;
+ struct device *dev = rsnd_priv_to_dev(priv);
+- struct clk *clk, *clk_orig;
++ struct clk *clk;
+ int i;
+- bool use_old_style = false;
+
+ adg = devm_kzalloc(dev, sizeof(*adg), GFP_KERNEL);
+ if (!adg) {
+@@ -407,45 +406,13 @@ int rsnd_adg_probe(struct platform_device *pdev,
+ return -ENOMEM;
+ }
+
+- clk_orig = devm_clk_get(dev, NULL);
+ adg->clk[CLKA] = devm_clk_get(dev, "clk_a");
+ adg->clk[CLKB] = devm_clk_get(dev, "clk_b");
+ adg->clk[CLKC] = devm_clk_get(dev, "clk_c");
+ adg->clk[CLKI] = devm_clk_get(dev, "clk_i");
+
+- /*
+- * It request device dependent audio clock.
+- * But above all clks will indicate rsnd module clock
+- * if platform doesn't it
+- */
+- for_each_rsnd_clk(clk, adg, i) {
+- if (clk_orig == clk) {
+- dev_warn(dev,
+- "doesn't have device dependent clock, use independent clock\n");
+- use_old_style = true;
+- break;
+- }
+- }
+-
+- /*
+- * note:
+- * these exist in order to keep compatible with
+- * platform which has device independent audio clock,
+- * but will be removed soon
+- */
+- if (use_old_style) {
+- adg->clk[CLKA] = devm_clk_get(NULL, "audio_clk_a");
+- adg->clk[CLKB] = devm_clk_get(NULL, "audio_clk_b");
+- adg->clk[CLKC] = devm_clk_get(NULL, "audio_clk_c");
+- adg->clk[CLKI] = devm_clk_get(NULL, "audio_clk_internal");
+- }
+-
+- for_each_rsnd_clk(clk, adg, i) {
+- if (IS_ERR(clk)) {
+- dev_err(dev, "Audio clock failed\n");
+- return -EIO;
+- }
+- }
++ for_each_rsnd_clk(clk, adg, i)
++ dev_dbg(dev, "clk %d : %p\n", i, clk);
+
+ rsnd_adg_ssi_clk_init(priv, adg);
+
+--
+2.1.2
+
--- /dev/null
+From d0650c75c67b0c29b39c461e96bfcde6382b2d3b Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 8 May 2014 01:59:26 -0700
+Subject: ASoC: rsnd: remove compatibility code
+
+Now, all platform is using new style rsnd_dai_platform_info.
+Keeping compatibility is no longer needed.
+We can cleanup code.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 29e69fd2cd6f55233f64f600ad55ce2b661784d1)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ include/sound/rcar_snd.h | 22 +++------------
+ sound/soc/sh/rcar/core.c | 54 ++++++++-----------------------------
+ sound/soc/sh/rcar/rsnd.h | 3 ---
+ sound/soc/sh/rcar/src.c | 69 +++++++++++++++---------------------------------
+ sound/soc/sh/rcar/ssi.c | 51 +----------------------------------
+ 5 files changed, 36 insertions(+), 163 deletions(-)
+
+diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h
+index 34a3c02a4576..a03268ec59c3 100644
+--- a/include/sound/rcar_snd.h
++++ b/include/sound/rcar_snd.h
+@@ -34,40 +34,24 @@
+ * B : SSI direction
+ */
+ #define RSND_SSI_CLK_PIN_SHARE (1 << 31)
+-#define RSND_SSI_PLAY (1 << 24)
+
+ #define RSND_SSI(_dma_id, _pio_irq, _flags) \
+ { .dma_id = _dma_id, .pio_irq = _pio_irq, .flags = _flags }
+-#define RSND_SSI_SET(_dai_id, _dma_id, _pio_irq, _flags) \
+-{ .dai_id = _dai_id, .dma_id = _dma_id, .pio_irq = _pio_irq, .flags = _flags }
+ #define RSND_SSI_UNUSED \
+-{ .dai_id = -1, .dma_id = -1, .pio_irq = -1, .flags = 0 }
++{ .dma_id = -1, .pio_irq = -1, .flags = 0 }
+
+ struct rsnd_ssi_platform_info {
+- int dai_id; /* will be removed */
+ int dma_id;
+ int pio_irq;
+ u32 flags;
+ };
+
+-/*
+- * flags
+- */
+-#define RSND_SCU_USE_HPBIF (1 << 31) /* it needs RSND_SSI_DEPENDENT */
+-
+ #define RSND_SRC(rate, _dma_id) \
+-{ .flags = RSND_SCU_USE_HPBIF, .convert_rate = rate, .dma_id = _dma_id, }
+-#define RSND_SRC_SET(rate, _dma_id) \
+- { .flags = RSND_SCU_USE_HPBIF, .convert_rate = rate, .dma_id = _dma_id, }
++{ .convert_rate = rate, .dma_id = _dma_id, }
+ #define RSND_SRC_UNUSED \
+- { .flags = 0, .convert_rate = 0, .dma_id = 0, }
+-
+-#define rsnd_scu_platform_info rsnd_src_platform_info
+-#define src_info scu_info
+-#define src_info_nr scu_info_nr
++{ .convert_rate = 0, .dma_id = -1, }
+
+ struct rsnd_src_platform_info {
+- u32 flags;
+ u32 convert_rate; /* sampling rate convert */
+ int dma_id; /* for Gen2 SCU */
+ };
+diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
+index 89424470a1f3..a2ae46f83038 100644
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -467,10 +467,7 @@ static int rsnd_soc_dai_trigger(struct snd_pcm_substream *substream, int cmd,
+ struct rsnd_priv *priv = snd_soc_dai_get_drvdata(dai);
+ struct rsnd_dai *rdai = rsnd_dai_to_rdai(dai);
+ struct rsnd_dai_stream *io = rsnd_rdai_to_io(rdai, substream);
+- struct rsnd_mod *mod = rsnd_ssi_mod_get_frm_dai(priv,
+- rsnd_dai_id(priv, rdai),
+- rsnd_dai_is_play(rdai, io));
+- int ssi_id = rsnd_mod_id(mod);
++ int ssi_id = rsnd_mod_id(rsnd_io_to_mod_ssi(io));
+ int ret;
+ unsigned long flags;
+
+@@ -583,7 +580,6 @@ static int rsnd_path_init(struct rsnd_priv *priv,
+ struct rsnd_dai_stream *io)
+ {
+ struct rsnd_mod *mod;
+- struct rsnd_dai_platform_info *dai_info = rdai->info;
+ int ret;
+ int ssi_id = -1;
+ int src_id = -1;
+@@ -598,20 +594,10 @@ static int rsnd_path_init(struct rsnd_priv *priv,
+ * Gen2 SCU path is very flexible, but, Gen1 SRU (SCU parts) is
+ * using fixed path.
+ */
+- if (dai_info) {
+- if (rsnd_is_enable_path(io, ssi))
+- ssi_id = rsnd_info_id(priv, io, ssi);
+- if (rsnd_is_enable_path(io, src))
+- src_id = rsnd_info_id(priv, io, src);
+- } else {
+- /* get SSI's ID */
+- mod = rsnd_ssi_mod_get_frm_dai(priv,
+- rsnd_dai_id(priv, rdai),
+- rsnd_dai_is_play(rdai, io));
+- if (!mod)
+- return 0;
+- ssi_id = src_id = rsnd_mod_id(mod);
+- }
++ if (rsnd_is_enable_path(io, ssi))
++ ssi_id = rsnd_info_id(priv, io, ssi);
++ if (rsnd_is_enable_path(io, src))
++ src_id = rsnd_info_id(priv, io, src);
+
+ ret = 0;
+
+@@ -725,30 +711,15 @@ static int rsnd_dai_probe(struct platform_device *pdev,
+ struct snd_soc_dai_driver *drv;
+ struct rcar_snd_info *info = rsnd_priv_to_info(priv);
+ struct rsnd_dai *rdai;
+- struct rsnd_mod *pmod, *cmod;
++ struct rsnd_ssi_platform_info *pmod, *cmod;
+ struct device *dev = rsnd_priv_to_dev(priv);
+ int dai_nr;
+ int i;
+
+ rsnd_of_parse_dai(pdev, of_data, priv);
+
+- /*
+- * dai_nr should be set via dai_info_nr,
+- * but allow it to keeping compatible
+- */
+ dai_nr = info->dai_info_nr;
+ if (!dai_nr) {
+- /* get max dai nr */
+- for (dai_nr = 0; dai_nr < 32; dai_nr++) {
+- pmod = rsnd_ssi_mod_get_frm_dai(priv, dai_nr, 1);
+- cmod = rsnd_ssi_mod_get_frm_dai(priv, dai_nr, 0);
+-
+- if (!pmod && !cmod)
+- break;
+- }
+- }
+-
+- if (!dai_nr) {
+ dev_err(dev, "no dai\n");
+ return -EIO;
+ }
+@@ -765,11 +736,10 @@ static int rsnd_dai_probe(struct platform_device *pdev,
+ priv->rdai = rdai;
+
+ for (i = 0; i < dai_nr; i++) {
+- if (info->dai_info)
+- rdai[i].info = &info->dai_info[i];
++ rdai[i].info = &info->dai_info[i];
+
+- pmod = rsnd_ssi_mod_get_frm_dai(priv, i, 1);
+- cmod = rsnd_ssi_mod_get_frm_dai(priv, i, 0);
++ pmod = rdai[i].info->playback.ssi;
++ cmod = rdai[i].info->capture.ssi;
+
+ /*
+ * init rsnd_dai
+@@ -787,8 +757,7 @@ static int rsnd_dai_probe(struct platform_device *pdev,
+ drv[i].playback.channels_min = 2;
+ drv[i].playback.channels_max = 2;
+
+- if (info->dai_info)
+- rdai[i].playback.info = &info->dai_info[i].playback;
++ rdai[i].playback.info = &info->dai_info[i].playback;
+ rsnd_path_init(priv, &rdai[i], &rdai[i].playback);
+ }
+ if (cmod) {
+@@ -797,8 +766,7 @@ static int rsnd_dai_probe(struct platform_device *pdev,
+ drv[i].capture.channels_min = 2;
+ drv[i].capture.channels_max = 2;
+
+- if (info->dai_info)
+- rdai[i].capture.info = &info->dai_info[i].capture;
++ rdai[i].capture.info = &info->dai_info[i].capture;
+ rsnd_path_init(priv, &rdai[i], &rdai[i].capture);
+ }
+
+diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
+index 619d198c7d2e..061b04cbd7d5 100644
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -379,9 +379,6 @@ int rsnd_ssi_probe(struct platform_device *pdev,
+ const struct rsnd_of_data *of_data,
+ struct rsnd_priv *priv);
+ struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id);
+-struct rsnd_mod *rsnd_ssi_mod_get_frm_dai(struct rsnd_priv *priv,
+- int dai_id, int is_play);
+ int rsnd_ssi_is_pin_sharing(struct rsnd_mod *mod);
+-int rsnd_ssi_is_play(struct rsnd_mod *mod);
+
+ #endif
+diff --git a/sound/soc/sh/rcar/src.c b/sound/soc/sh/rcar/src.c
+index 4d0720ed5a90..09424bcf86ec 100644
+--- a/sound/soc/sh/rcar/src.c
++++ b/sound/soc/sh/rcar/src.c
+@@ -27,12 +27,9 @@ struct rsnd_src {
+ #define OTBL_18 (6 << 16)
+ #define OTBL_16 (8 << 16)
+
+-#define rsnd_src_mode_flags(p) ((p)->info->flags)
+ #define rsnd_src_convert_rate(p) ((p)->info->convert_rate)
+ #define rsnd_mod_to_src(_mod) \
+ container_of((_mod), struct rsnd_src, mod)
+-#define rsnd_src_hpbif_is_enable(src) \
+- (rsnd_src_mode_flags(src) & RSND_SCU_USE_HPBIF)
+ #define rsnd_src_dma_available(src) \
+ rsnd_dma_available(rsnd_mod_to_dma(&(src)->mod))
+
+@@ -80,34 +77,35 @@ struct rsnd_src {
+ *
+ * This driver request
+ * struct rsnd_src_platform_info {
+- * u32 flags;
+ * u32 convert_rate;
++ * int dma_id;
+ * }
+ *
+- * rsnd_src_hpbif_is_enable() will be true
+- * if flags had RSND_SRC_USE_HPBIF,
+- * and it controls whether SSIU is used or not.
+- *
+ * rsnd_src_convert_rate() indicates
+ * above convert_rate, and it controls
+ * whether SRC is used or not.
+ *
+ * ex) doesn't use SRC
+- * struct rsnd_src_platform_info info = {
+- * .flags = 0,
+- * .convert_rate = 0,
++ * static struct rsnd_dai_platform_info rsnd_dai = {
++ * .playback = { .ssi = &rsnd_ssi[0], },
+ * };
+ *
+ * ex) uses SRC
+- * struct rsnd_src_platform_info info = {
+- * .flags = RSND_SRC_USE_HPBIF,
+- * .convert_rate = 48000,
++ * static struct rsnd_src_platform_info rsnd_src[] = {
++ * RSND_SCU(48000, 0),
++ * ...
++ * };
++ * static struct rsnd_dai_platform_info rsnd_dai = {
++ * .playback = { .ssi = &rsnd_ssi[0], .src = &rsnd_src[0] },
+ * };
+ *
+ * ex) uses SRC bypass mode
+- * struct rsnd_src_platform_info info = {
+- * .flags = RSND_SRC_USE_HPBIF,
+- * .convert_rate = 0,
++ * static struct rsnd_src_platform_info rsnd_src[] = {
++ * RSND_SCU(0, 0),
++ * ...
++ * };
++ * static struct rsnd_dai_platform_info rsnd_dai = {
++ * .playback = { .ssi = &rsnd_ssi[0], .src = &rsnd_src[0] },
+ * };
+ *
+ */
+@@ -119,24 +117,14 @@ int rsnd_src_ssi_mode_init(struct rsnd_mod *ssi_mod,
+ struct rsnd_dai *rdai,
+ struct rsnd_dai_stream *io)
+ {
+- struct rsnd_priv *priv = rsnd_mod_to_priv(ssi_mod);
+ struct rsnd_mod *src_mod = rsnd_io_to_mod_src(io);
+- struct rcar_snd_info *info = rsnd_priv_to_info(priv);
+ int ssi_id = rsnd_mod_id(ssi_mod);
+- int has_src = 0;
+
+ /*
+ * SSI_MODE0
+ */
+- if (info->dai_info) {
+- has_src = !!src_mod;
+- } else {
+- struct rsnd_src *src = rsnd_mod_to_src(src_mod);
+- has_src = rsnd_src_hpbif_is_enable(src);
+- }
+-
+ rsnd_mod_bset(ssi_mod, SSI_MODE0, (1 << ssi_id),
+- has_src ? 0 : (1 << ssi_id));
++ src_mod ? 0 : (1 << ssi_id));
+
+ /*
+ * SSI_MODE1
+@@ -534,21 +522,13 @@ static int rsnd_src_probe_gen2(struct rsnd_mod *mod,
+ struct rsnd_dai_stream *io)
+ {
+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
+- struct rcar_snd_info *info = rsnd_priv_to_info(priv);
+ struct rsnd_src *src = rsnd_mod_to_src(mod);
+- struct rsnd_mod *ssi = rsnd_ssi_mod_get(priv, rsnd_mod_id(mod));
+ struct device *dev = rsnd_priv_to_dev(priv);
+ int ret;
+- int is_play;
+-
+- if (info->dai_info)
+- is_play = rsnd_info_is_playback(priv, src);
+- else
+- is_play = rsnd_ssi_is_play(ssi);
+
+ ret = rsnd_dma_init(priv,
+ rsnd_mod_to_dma(mod),
+- is_play,
++ rsnd_info_is_playback(priv, src),
+ src->info->dma_id);
+ if (ret < 0)
+ dev_err(dev, "SRC DMA failed\n");
+@@ -699,11 +679,6 @@ int rsnd_src_probe(struct platform_device *pdev,
+ snprintf(name, RSND_SRC_NAME_SIZE, "src.%d", i);
+
+ clk = devm_clk_get(dev, name);
+- if (IS_ERR(clk)) {
+- snprintf(name, RSND_SRC_NAME_SIZE, "scu.%d", i);
+- clk = devm_clk_get(dev, name);
+- }
+-
+ if (IS_ERR(clk))
+ return PTR_ERR(clk);
+
+@@ -711,12 +686,10 @@ int rsnd_src_probe(struct platform_device *pdev,
+ src->clk = clk;
+
+ ops = &rsnd_src_non_ops;
+- if (rsnd_src_hpbif_is_enable(src)) {
+- if (rsnd_is_gen1(priv))
+- ops = &rsnd_src_gen1_ops;
+- if (rsnd_is_gen2(priv))
+- ops = &rsnd_src_gen2_ops;
+- }
++ if (rsnd_is_gen1(priv))
++ ops = &rsnd_src_gen1_ops;
++ if (rsnd_is_gen2(priv))
++ ops = &rsnd_src_gen2_ops;
+
+ rsnd_mod_init(priv, &src->mod, ops, RSND_MOD_SRC, i);
+
+diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c
+index 1d8387c25bd8..3a088e569921 100644
+--- a/sound/soc/sh/rcar/ssi.c
++++ b/sound/soc/sh/rcar/ssi.c
+@@ -422,20 +422,13 @@ static int rsnd_ssi_dma_probe(struct rsnd_mod *mod,
+ {
+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
+ struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
+- struct rcar_snd_info *info = rsnd_priv_to_info(priv);
+ struct device *dev = rsnd_priv_to_dev(priv);
+ int dma_id = ssi->info->dma_id;
+- int is_play;
+ int ret;
+
+- if (info->dai_info)
+- is_play = rsnd_info_is_playback(priv, ssi);
+- else
+- is_play = rsnd_ssi_is_play(&ssi->mod);
+-
+ ret = rsnd_dma_init(
+ priv, rsnd_mod_to_dma(mod),
+- is_play,
++ rsnd_info_is_playback(priv, ssi),
+ dma_id);
+
+ if (ret < 0)
+@@ -512,41 +505,6 @@ static struct rsnd_mod_ops rsnd_ssi_non_ops = {
+ /*
+ * ssi mod function
+ */
+-struct rsnd_mod *rsnd_ssi_mod_get_frm_dai(struct rsnd_priv *priv,
+- int dai_id, int is_play)
+-{
+- struct rsnd_dai_platform_info *dai_info = NULL;
+- struct rsnd_dai_path_info *path_info = NULL;
+- struct rsnd_ssi_platform_info *target_info = NULL;
+- struct rsnd_ssi *ssi;
+- int i, has_play;
+-
+- if (priv->rdai)
+- dai_info = priv->rdai[dai_id].info;
+- if (dai_info)
+- path_info = (is_play) ? &dai_info->playback : &dai_info->capture;
+- if (path_info)
+- target_info = path_info->ssi;
+-
+- is_play = !!is_play;
+-
+- for_each_rsnd_ssi(ssi, priv, i) {
+- if (target_info == ssi->info)
+- return &ssi->mod;
+-
+- /* for compatible */
+- if (rsnd_ssi_dai_id(ssi) != dai_id)
+- continue;
+-
+- has_play = rsnd_ssi_is_play(&ssi->mod);
+-
+- if (is_play == has_play)
+- return &ssi->mod;
+- }
+-
+- return NULL;
+-}
+-
+ struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id)
+ {
+ if (WARN_ON(id < 0 || id >= rsnd_ssi_nr(priv)))
+@@ -562,13 +520,6 @@ int rsnd_ssi_is_pin_sharing(struct rsnd_mod *mod)
+ return !!(rsnd_ssi_mode_flags(ssi) & RSND_SSI_CLK_PIN_SHARE);
+ }
+
+-int rsnd_ssi_is_play(struct rsnd_mod *mod)
+-{
+- struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
+-
+- return !!(rsnd_ssi_mode_flags(ssi) & RSND_SSI_PLAY);
+-}
+-
+ static void rsnd_ssi_parent_clk_setup(struct rsnd_priv *priv, struct rsnd_ssi *ssi)
+ {
+ if (!rsnd_ssi_is_pin_sharing(&ssi->mod))
+--
+2.1.2
+
--- /dev/null
+From fd65e0a967c01325c5cf07f5879ce581d1581880 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 8 May 2014 17:43:26 -0700
+Subject: ASoC: rsnd: add rsnd_path_parse() macro
+
+Current R-Car sound supports only SRC/SSI,
+but, other module will be supported.
+This patch adds rsnd_path_parse() macro to share code
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 739f9502fdd7c7202123ded842415a0392b7dc40)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/core.c | 43 ++++++++++++++++++++++---------------------
+ 1 file changed, 22 insertions(+), 21 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
+index a2ae46f83038..8bc3ef2503b5 100644
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -575,14 +575,27 @@ static const struct snd_soc_dai_ops rsnd_soc_dai_ops = {
+ .set_fmt = rsnd_soc_dai_set_fmt,
+ };
+
++#define rsnd_path_parse(priv, io, type) \
++({ \
++ struct rsnd_mod *mod; \
++ int ret = 0; \
++ int id = -1; \
++ \
++ if (rsnd_is_enable_path(io, type)) { \
++ id = rsnd_info_id(priv, io, type); \
++ if (id >= 0) { \
++ mod = rsnd_##type##_mod_get(priv, id); \
++ ret = rsnd_dai_connect(mod, io); \
++ } \
++ } \
++ ret; \
++})
++
+ static int rsnd_path_init(struct rsnd_priv *priv,
+ struct rsnd_dai *rdai,
+ struct rsnd_dai_stream *io)
+ {
+- struct rsnd_mod *mod;
+ int ret;
+- int ssi_id = -1;
+- int src_id = -1;
+
+ /*
+ * Gen1 is created by SRU/SSI, and this SRU is base module of
+@@ -594,28 +607,16 @@ static int rsnd_path_init(struct rsnd_priv *priv,
+ * Gen2 SCU path is very flexible, but, Gen1 SRU (SCU parts) is
+ * using fixed path.
+ */
+- if (rsnd_is_enable_path(io, ssi))
+- ssi_id = rsnd_info_id(priv, io, ssi);
+- if (rsnd_is_enable_path(io, src))
+- src_id = rsnd_info_id(priv, io, src);
+-
+- ret = 0;
+
+ /* SRC */
+- if (src_id >= 0) {
+- mod = rsnd_src_mod_get(priv, src_id);
+- ret = rsnd_dai_connect(mod, io);
+- if (ret < 0)
+- return ret;
+- }
++ ret = rsnd_path_parse(priv, io, src);
++ if (ret < 0)
++ return ret;
+
+ /* SSI */
+- if (ssi_id >= 0) {
+- mod = rsnd_ssi_mod_get(priv, ssi_id);
+- ret = rsnd_dai_connect(mod, io);
+- if (ret < 0)
+- return ret;
+- }
++ ret = rsnd_path_parse(priv, io, ssi);
++ if (ret < 0)
++ return ret;
+
+ return ret;
+ }
+--
+2.1.2
+
--- /dev/null
+From 48915c4596ae7546d2eaf2d4279d49acf49904e1 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 8 May 2014 17:44:14 -0700
+Subject: ASoC: rsnd: add rsnd_get_adinr()
+
+SRC module needs ADINR register settings,
+but, it has many similar xxx_ADINR register,
+and needs same settings.
+This patch adds rsnd_get_adinr() to sharing code.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit d7bdbc5d9e4e813522f46632527826211270b9d0)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/core.c | 26 ++++++++++++++++++++++++++
+ sound/soc/sh/rcar/rsnd.h | 1 +
+ sound/soc/sh/rcar/src.c | 26 +++-----------------------
+ 3 files changed, 30 insertions(+), 23 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
+index 8bc3ef2503b5..c3a5035e2459 100644
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -309,6 +309,32 @@ void rsnd_dma_quit(struct rsnd_priv *priv,
+ }
+
+ /*
++ * settting function
++ */
++u32 rsnd_get_adinr(struct rsnd_mod *mod)
++{
++ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
++ struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
++ struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
++ struct device *dev = rsnd_priv_to_dev(priv);
++ u32 adinr = runtime->channels;
++
++ switch (runtime->sample_bits) {
++ case 16:
++ adinr |= (8 << 16);
++ break;
++ case 32:
++ adinr |= (0 << 16);
++ break;
++ default:
++ dev_warn(dev, "not supported sample bits\n");
++ return 0;
++ }
++
++ return adinr;
++}
++
++/*
+ * rsnd_dai functions
+ */
+ #define __rsnd_mod_call(mod, func, rdai, io) \
+diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
+index 061b04cbd7d5..fee3ec21aaeb 100644
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -136,6 +136,7 @@ void rsnd_write(struct rsnd_priv *priv, struct rsnd_mod *mod,
+ enum rsnd_reg reg, u32 data);
+ void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod, enum rsnd_reg reg,
+ u32 mask, u32 data);
++u32 rsnd_get_adinr(struct rsnd_mod *mod);
+
+ /*
+ * R-Car DMA
+diff --git a/sound/soc/sh/rcar/src.c b/sound/soc/sh/rcar/src.c
+index 09424bcf86ec..60e966d22c9e 100644
+--- a/sound/soc/sh/rcar/src.c
++++ b/sound/soc/sh/rcar/src.c
+@@ -18,15 +18,6 @@ struct rsnd_src {
+
+ #define RSND_SRC_NAME_SIZE 16
+
+-/*
+- * ADINR
+- */
+-#define OTBL_24 (0 << 16)
+-#define OTBL_22 (2 << 16)
+-#define OTBL_20 (4 << 16)
+-#define OTBL_18 (6 << 16)
+-#define OTBL_16 (8 << 16)
+-
+ #define rsnd_src_convert_rate(p) ((p)->info->convert_rate)
+ #define rsnd_mod_to_src(_mod) \
+ container_of((_mod), struct rsnd_src, mod)
+@@ -197,7 +188,6 @@ static int rsnd_src_set_convert_rate(struct rsnd_mod *mod,
+ struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
+ struct rsnd_src *src = rsnd_mod_to_src(mod);
+ u32 convert_rate = rsnd_src_convert_rate(src);
+- u32 adinr = runtime->channels;
+ u32 fsrate = 0;
+
+ if (convert_rate)
+@@ -214,17 +204,7 @@ static int rsnd_src_set_convert_rate(struct rsnd_mod *mod,
+ rsnd_mod_write(mod, SRC_SRCIR, 1);
+
+ /* Set channel number and output bit length */
+- switch (runtime->sample_bits) {
+- case 16:
+- adinr |= OTBL_16;
+- break;
+- case 32:
+- adinr |= OTBL_24;
+- break;
+- default:
+- return -EIO;
+- }
+- rsnd_mod_write(mod, SRC_ADINR, adinr);
++ rsnd_mod_write(mod, SRC_ADINR, rsnd_get_adinr(mod));
+
+ /* Enable the initial value of IFS */
+ if (fsrate) {
+@@ -487,8 +467,8 @@ static int rsnd_src_set_convert_rate_gen2(struct rsnd_mod *mod,
+ if (ret < 0)
+ return ret;
+
+- rsnd_mod_write(mod, SSI_BUSIF_ADINR, rsnd_mod_read(mod, SRC_ADINR));
+- rsnd_mod_write(mod, SSI_BUSIF_MODE, rsnd_mod_read(mod, SRC_BUSIF_MODE));
++ rsnd_mod_write(mod, SSI_BUSIF_ADINR, rsnd_get_adinr(mod));
++ rsnd_mod_write(mod, SSI_BUSIF_MODE, 1);
+
+ rsnd_mod_write(mod, SRC_SRCCR, 0x00011110);
+
+--
+2.1.2
+
--- /dev/null
+From a309e856ed7e621886a7aed78e2a759ac08e6f75 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 8 May 2014 17:44:29 -0700
+Subject: ASoC: rsnd: remove duplicate parameter from rsnd_mod_ops
+
+Now, it can get rsnd_dai_stream pointer from rsnd_mod.
+Remove duplicate parameter from rsnd_mod_ops
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit b42fccf69cd7153d1158c85137ec718d7309e074)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/core.c | 10 +++---
+ sound/soc/sh/rcar/rsnd.h | 24 +++++--------
+ sound/soc/sh/rcar/src.c | 91 ++++++++++++++++++++----------------------------
+ sound/soc/sh/rcar/ssi.c | 34 ++++++++----------
+ 4 files changed, 65 insertions(+), 94 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
+index c3a5035e2459..798c7cc8d8be 100644
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -337,19 +337,19 @@ u32 rsnd_get_adinr(struct rsnd_mod *mod)
+ /*
+ * rsnd_dai functions
+ */
+-#define __rsnd_mod_call(mod, func, rdai, io) \
++#define __rsnd_mod_call(mod, func, rdai) \
+ ({ \
+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod); \
+ struct device *dev = rsnd_priv_to_dev(priv); \
+ dev_dbg(dev, "%s [%d] %s\n", \
+ rsnd_mod_name(mod), rsnd_mod_id(mod), #func); \
+- (mod)->ops->func(mod, rdai, io); \
++ (mod)->ops->func(mod, rdai); \
+ })
+
+-#define rsnd_mod_call(mod, func, rdai, io) \
++#define rsnd_mod_call(mod, func, rdai) \
+ (!(mod) ? -ENODEV : \
+ !((mod)->ops->func) ? 0 : \
+- __rsnd_mod_call(mod, func, (rdai), (io)))
++ __rsnd_mod_call(mod, func, (rdai)))
+
+ #define rsnd_dai_call(rdai, io, fn) \
+ ({ \
+@@ -359,7 +359,7 @@ u32 rsnd_get_adinr(struct rsnd_mod *mod)
+ mod = (io)->mod[i]; \
+ if (!mod) \
+ continue; \
+- ret = rsnd_mod_call(mod, fn, (rdai), (io)); \
++ ret = rsnd_mod_call(mod, fn, (rdai)); \
+ if (ret < 0) \
+ break; \
+ } \
+diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
+index fee3ec21aaeb..6156ceebd58b 100644
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -172,23 +172,17 @@ enum rsnd_mod_type {
+ struct rsnd_mod_ops {
+ char *name;
+ int (*probe)(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io);
++ struct rsnd_dai *rdai);
+ int (*remove)(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io);
++ struct rsnd_dai *rdai);
+ int (*init)(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io);
++ struct rsnd_dai *rdai);
+ int (*quit)(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io);
++ struct rsnd_dai *rdai);
+ int (*start)(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io);
++ struct rsnd_dai *rdai);
+ int (*stop)(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io);
++ struct rsnd_dai *rdai);
+ };
+
+ struct rsnd_dai_stream;
+@@ -365,11 +359,9 @@ unsigned int rsnd_src_get_ssi_rate(struct rsnd_priv *priv,
+ struct rsnd_dai_stream *io,
+ struct snd_pcm_runtime *runtime);
+ int rsnd_src_ssi_mode_init(struct rsnd_mod *ssi_mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io);
++ struct rsnd_dai *rdai);
+ int rsnd_src_enable_ssi_irq(struct rsnd_mod *ssi_mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io);
++ struct rsnd_dai *rdai);
+
+ #define rsnd_src_nr(priv) ((priv)->src_nr)
+
+diff --git a/sound/soc/sh/rcar/src.c b/sound/soc/sh/rcar/src.c
+index 60e966d22c9e..2a0f7e63ffc8 100644
+--- a/sound/soc/sh/rcar/src.c
++++ b/sound/soc/sh/rcar/src.c
+@@ -105,9 +105,9 @@ struct rsnd_src {
+ * Gen1/Gen2 common functions
+ */
+ int rsnd_src_ssi_mode_init(struct rsnd_mod *ssi_mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
++ struct rsnd_dai_stream *io = rsnd_mod_to_io(ssi_mod);
+ struct rsnd_mod *src_mod = rsnd_io_to_mod_src(io);
+ int ssi_id = rsnd_mod_id(ssi_mod);
+
+@@ -145,8 +145,7 @@ int rsnd_src_ssi_mode_init(struct rsnd_mod *ssi_mod,
+ }
+
+ int rsnd_src_enable_ssi_irq(struct rsnd_mod *ssi_mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ struct rsnd_priv *priv = rsnd_mod_to_priv(ssi_mod);
+
+@@ -182,9 +181,9 @@ unsigned int rsnd_src_get_ssi_rate(struct rsnd_priv *priv,
+ }
+
+ static int rsnd_src_set_convert_rate(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
++ struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
+ struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
+ struct rsnd_src *src = rsnd_mod_to_src(mod);
+ u32 convert_rate = rsnd_src_convert_rate(src);
+@@ -221,8 +220,7 @@ static int rsnd_src_set_convert_rate(struct rsnd_mod *mod,
+ }
+
+ static int rsnd_src_init(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ struct rsnd_src *src = rsnd_mod_to_src(mod);
+
+@@ -232,8 +230,7 @@ static int rsnd_src_init(struct rsnd_mod *mod,
+ }
+
+ static int rsnd_src_quit(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ struct rsnd_src *src = rsnd_mod_to_src(mod);
+
+@@ -243,8 +240,7 @@ static int rsnd_src_quit(struct rsnd_mod *mod,
+ }
+
+ static int rsnd_src_start(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ struct rsnd_src *src = rsnd_mod_to_src(mod);
+
+@@ -262,8 +258,7 @@ static int rsnd_src_start(struct rsnd_mod *mod,
+
+
+ static int rsnd_src_stop(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ struct rsnd_src *src = rsnd_mod_to_src(mod);
+
+@@ -281,9 +276,9 @@ static struct rsnd_mod_ops rsnd_src_non_ops = {
+ * Gen1 functions
+ */
+ static int rsnd_src_set_route_gen1(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
++ struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
+ struct src_route_config {
+ u32 mask;
+ int shift;
+@@ -319,9 +314,9 @@ static int rsnd_src_set_route_gen1(struct rsnd_mod *mod,
+ }
+
+ static int rsnd_src_set_convert_timing_gen1(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
++ struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
+ struct rsnd_src *src = rsnd_mod_to_src(mod);
+ struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
+@@ -378,12 +373,11 @@ static int rsnd_src_set_convert_timing_gen1(struct rsnd_mod *mod,
+ }
+
+ static int rsnd_src_set_convert_rate_gen1(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ int ret;
+
+- ret = rsnd_src_set_convert_rate(mod, rdai, io);
++ ret = rsnd_src_set_convert_rate(mod, rdai);
+ if (ret < 0)
+ return ret;
+
+@@ -400,24 +394,23 @@ static int rsnd_src_set_convert_rate_gen1(struct rsnd_mod *mod,
+ }
+
+ static int rsnd_src_init_gen1(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ int ret;
+
+- ret = rsnd_src_init(mod, rdai, io);
++ ret = rsnd_src_init(mod, rdai);
+ if (ret < 0)
+ return ret;
+
+- ret = rsnd_src_set_route_gen1(mod, rdai, io);
++ ret = rsnd_src_set_route_gen1(mod, rdai);
+ if (ret < 0)
+ return ret;
+
+- ret = rsnd_src_set_convert_rate_gen1(mod, rdai, io);
++ ret = rsnd_src_set_convert_rate_gen1(mod, rdai);
+ if (ret < 0)
+ return ret;
+
+- ret = rsnd_src_set_convert_timing_gen1(mod, rdai, io);
++ ret = rsnd_src_set_convert_timing_gen1(mod, rdai);
+ if (ret < 0)
+ return ret;
+
+@@ -425,25 +418,23 @@ static int rsnd_src_init_gen1(struct rsnd_mod *mod,
+ }
+
+ static int rsnd_src_start_gen1(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ int id = rsnd_mod_id(mod);
+
+ rsnd_mod_bset(mod, SRC_ROUTE_CTRL, (1 << id), (1 << id));
+
+- return rsnd_src_start(mod, rdai, io);
++ return rsnd_src_start(mod, rdai);
+ }
+
+ static int rsnd_src_stop_gen1(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ int id = rsnd_mod_id(mod);
+
+ rsnd_mod_bset(mod, SRC_ROUTE_CTRL, (1 << id), 0);
+
+- return rsnd_src_stop(mod, rdai, io);
++ return rsnd_src_stop(mod, rdai);
+ }
+
+ static struct rsnd_mod_ops rsnd_src_gen1_ops = {
+@@ -458,12 +449,11 @@ static struct rsnd_mod_ops rsnd_src_gen1_ops = {
+ * Gen2 functions
+ */
+ static int rsnd_src_set_convert_rate_gen2(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ int ret;
+
+- ret = rsnd_src_set_convert_rate(mod, rdai, io);
++ ret = rsnd_src_set_convert_rate(mod, rdai);
+ if (ret < 0)
+ return ret;
+
+@@ -479,9 +469,9 @@ static int rsnd_src_set_convert_rate_gen2(struct rsnd_mod *mod,
+ }
+
+ static int rsnd_src_set_convert_timing_gen2(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
++ struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
+ struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
+ struct rsnd_src *src = rsnd_mod_to_src(mod);
+ u32 convert_rate = rsnd_src_convert_rate(src);
+@@ -498,8 +488,7 @@ static int rsnd_src_set_convert_timing_gen2(struct rsnd_mod *mod,
+ }
+
+ static int rsnd_src_probe_gen2(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
+ struct rsnd_src *src = rsnd_mod_to_src(mod);
+@@ -517,8 +506,7 @@ static int rsnd_src_probe_gen2(struct rsnd_mod *mod,
+ }
+
+ static int rsnd_src_remove_gen2(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ rsnd_dma_quit(rsnd_mod_to_priv(mod), rsnd_mod_to_dma(mod));
+
+@@ -526,20 +514,19 @@ static int rsnd_src_remove_gen2(struct rsnd_mod *mod,
+ }
+
+ static int rsnd_src_init_gen2(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ int ret;
+
+- ret = rsnd_src_init(mod, rdai, io);
++ ret = rsnd_src_init(mod, rdai);
+ if (ret < 0)
+ return ret;
+
+- ret = rsnd_src_set_convert_rate_gen2(mod, rdai, io);
++ ret = rsnd_src_set_convert_rate_gen2(mod, rdai);
+ if (ret < 0)
+ return ret;
+
+- ret = rsnd_src_set_convert_timing_gen2(mod, rdai, io);
++ ret = rsnd_src_set_convert_timing_gen2(mod, rdai);
+ if (ret < 0)
+ return ret;
+
+@@ -547,8 +534,7 @@ static int rsnd_src_init_gen2(struct rsnd_mod *mod,
+ }
+
+ static int rsnd_src_start_gen2(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ struct rsnd_src *src = rsnd_mod_to_src(mod);
+
+@@ -557,12 +543,11 @@ static int rsnd_src_start_gen2(struct rsnd_mod *mod,
+ rsnd_mod_write(mod, SSI_CTRL, 0x1);
+ rsnd_mod_write(mod, SRC_CTRL, 0x11);
+
+- return rsnd_src_start(mod, rdai, io);
++ return rsnd_src_start(mod, rdai);
+ }
+
+ static int rsnd_src_stop_gen2(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ struct rsnd_src *src = rsnd_mod_to_src(mod);
+
+@@ -571,7 +556,7 @@ static int rsnd_src_stop_gen2(struct rsnd_mod *mod,
+
+ rsnd_dma_stop(rsnd_mod_to_dma(&src->mod));
+
+- return rsnd_src_stop(mod, rdai, io);
++ return rsnd_src_stop(mod, rdai);
+ }
+
+ static struct rsnd_mod_ops rsnd_src_gen2_ops = {
+diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c
+index 3a088e569921..36654bd4e428 100644
+--- a/sound/soc/sh/rcar/ssi.c
++++ b/sound/soc/sh/rcar/ssi.c
+@@ -240,10 +240,10 @@ static void rsnd_ssi_hw_stop(struct rsnd_ssi *ssi,
+ * SSI mod common functions
+ */
+ static int rsnd_ssi_init(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
++ struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
+ struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
+ u32 cr;
+
+@@ -287,14 +287,13 @@ static int rsnd_ssi_init(struct rsnd_mod *mod,
+ ssi->cr_own = cr;
+ ssi->err = -1; /* ignore 1st error */
+
+- rsnd_src_ssi_mode_init(mod, rdai, io);
++ rsnd_src_ssi_mode_init(mod, rdai);
+
+ return 0;
+ }
+
+ static int rsnd_ssi_quit(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
+@@ -359,8 +358,7 @@ static irqreturn_t rsnd_ssi_pio_interrupt(int irq, void *data)
+ }
+
+ static int rsnd_ssi_pio_probe(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
+ struct device *dev = rsnd_priv_to_dev(priv);
+@@ -379,15 +377,15 @@ static int rsnd_ssi_pio_probe(struct rsnd_mod *mod,
+ }
+
+ static int rsnd_ssi_pio_start(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
++ struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
+
+ /* enable PIO IRQ */
+ ssi->cr_etc = UIEN | OIEN | DIEN;
+
+- rsnd_src_enable_ssi_irq(mod, rdai, io);
++ rsnd_src_enable_ssi_irq(mod, rdai);
+
+ rsnd_ssi_hw_start(ssi, rdai, io);
+
+@@ -395,8 +393,7 @@ static int rsnd_ssi_pio_start(struct rsnd_mod *mod,
+ }
+
+ static int rsnd_ssi_pio_stop(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
+
+@@ -417,8 +414,7 @@ static struct rsnd_mod_ops rsnd_ssi_pio_ops = {
+ };
+
+ static int rsnd_ssi_dma_probe(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
+ struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
+@@ -438,8 +434,7 @@ static int rsnd_ssi_dma_probe(struct rsnd_mod *mod,
+ }
+
+ static int rsnd_ssi_dma_remove(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ rsnd_dma_quit(rsnd_mod_to_priv(mod), rsnd_mod_to_dma(mod));
+
+@@ -447,11 +442,11 @@ static int rsnd_ssi_dma_remove(struct rsnd_mod *mod,
+ }
+
+ static int rsnd_ssi_dma_start(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
+ struct rsnd_dma *dma = rsnd_mod_to_dma(&ssi->mod);
++ struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
+
+ /* enable DMA transfer */
+ ssi->cr_etc = DMEN;
+@@ -468,8 +463,7 @@ static int rsnd_ssi_dma_start(struct rsnd_mod *mod,
+ }
+
+ static int rsnd_ssi_dma_stop(struct rsnd_mod *mod,
+- struct rsnd_dai *rdai,
+- struct rsnd_dai_stream *io)
++ struct rsnd_dai *rdai)
+ {
+ struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
+ struct rsnd_dma *dma = rsnd_mod_to_dma(&ssi->mod);
+--
+2.1.2
+
--- /dev/null
+From 66906c2c256667fb95ba5397288fd0b4df50dd6e Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 8 May 2014 17:44:41 -0700
+Subject: ASoC: rsnd: enable to use multi parameter on
+ rsnd_dai_call/rsnd_mod_call
+
+rsnd_mod_ops would like to come to use multi parameter.
+modify macro to enable it.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 68b6af3656a1f3303cca094a19e26653fad1853a)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/core.c | 26 +++++++++++++-------------
+ 1 file changed, 13 insertions(+), 13 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
+index 798c7cc8d8be..1f34cd4e949d 100644
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -337,7 +337,7 @@ u32 rsnd_get_adinr(struct rsnd_mod *mod)
+ /*
+ * rsnd_dai functions
+ */
+-#define __rsnd_mod_call(mod, func, rdai) \
++#define __rsnd_mod_call(mod, func, rdai...) \
+ ({ \
+ struct rsnd_priv *priv = rsnd_mod_to_priv(mod); \
+ struct device *dev = rsnd_priv_to_dev(priv); \
+@@ -346,12 +346,12 @@ u32 rsnd_get_adinr(struct rsnd_mod *mod)
+ (mod)->ops->func(mod, rdai); \
+ })
+
+-#define rsnd_mod_call(mod, func, rdai) \
++#define rsnd_mod_call(mod, func, rdai...) \
+ (!(mod) ? -ENODEV : \
+ !((mod)->ops->func) ? 0 : \
+- __rsnd_mod_call(mod, func, (rdai)))
++ __rsnd_mod_call(mod, func, rdai))
+
+-#define rsnd_dai_call(rdai, io, fn) \
++#define rsnd_dai_call(fn, io, rdai...) \
+ ({ \
+ struct rsnd_mod *mod; \
+ int ret = 0, i; \
+@@ -359,7 +359,7 @@ u32 rsnd_get_adinr(struct rsnd_mod *mod)
+ mod = (io)->mod[i]; \
+ if (!mod) \
+ continue; \
+- ret = rsnd_mod_call(mod, fn, (rdai)); \
++ ret = rsnd_mod_call(mod, fn, rdai); \
+ if (ret < 0) \
+ break; \
+ } \
+@@ -509,20 +509,20 @@ static int rsnd_soc_dai_trigger(struct snd_pcm_substream *substream, int cmd,
+ if (ret < 0)
+ goto dai_trigger_end;
+
+- ret = rsnd_dai_call(rdai, io, init);
++ ret = rsnd_dai_call(init, io, rdai);
+ if (ret < 0)
+ goto dai_trigger_end;
+
+- ret = rsnd_dai_call(rdai, io, start);
++ ret = rsnd_dai_call(start, io, rdai);
+ if (ret < 0)
+ goto dai_trigger_end;
+ break;
+ case SNDRV_PCM_TRIGGER_STOP:
+- ret = rsnd_dai_call(rdai, io, stop);
++ ret = rsnd_dai_call(stop, io, rdai);
+ if (ret < 0)
+ goto dai_trigger_end;
+
+- ret = rsnd_dai_call(rdai, io, quit);
++ ret = rsnd_dai_call(quit, io, rdai);
+ if (ret < 0)
+ goto dai_trigger_end;
+
+@@ -950,11 +950,11 @@ static int rsnd_probe(struct platform_device *pdev)
+ }
+
+ for_each_rsnd_dai(rdai, priv, i) {
+- ret = rsnd_dai_call(rdai, &rdai->playback, probe);
++ ret = rsnd_dai_call(probe, &rdai->playback, rdai);
+ if (ret)
+ return ret;
+
+- ret = rsnd_dai_call(rdai, &rdai->capture, probe);
++ ret = rsnd_dai_call(probe, &rdai->capture, rdai);
+ if (ret)
+ return ret;
+ }
+@@ -997,11 +997,11 @@ static int rsnd_remove(struct platform_device *pdev)
+ pm_runtime_disable(&pdev->dev);
+
+ for_each_rsnd_dai(rdai, priv, i) {
+- ret = rsnd_dai_call(rdai, &rdai->playback, remove);
++ ret = rsnd_dai_call(remove, &rdai->playback, rdai);
+ if (ret)
+ return ret;
+
+- ret = rsnd_dai_call(rdai, &rdai->capture, remove);
++ ret = rsnd_dai_call(remove, &rdai->capture, rdai);
+ if (ret)
+ return ret;
+ }
+--
+2.1.2
+
--- /dev/null
+From 46c96710342f4fef77b84a22c0c16816b0ab5a5e Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 8 May 2014 17:44:49 -0700
+Subject: ASoC: rsnd: add DVC support
+
+This patch adds DVC (Digital Volume Controller)
+support which is member of CMD unit.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit bff58ea4f43d9b4a9fd6fb05fabc8f50f68131f5)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ include/sound/rcar_snd.h | 10 ++
+ sound/soc/sh/rcar/Makefile | 2 +-
+ sound/soc/sh/rcar/adg.c | 18 +++
+ sound/soc/sh/rcar/core.c | 20 ++++
+ sound/soc/sh/rcar/dvc.c | 273 +++++++++++++++++++++++++++++++++++++++++++++
+ sound/soc/sh/rcar/gen.c | 11 ++
+ sound/soc/sh/rcar/rsnd.h | 40 +++++++
+ sound/soc/sh/rcar/src.c | 4 +-
+ 8 files changed, 376 insertions(+), 2 deletions(-)
+ create mode 100644 sound/soc/sh/rcar/dvc.c
+
+diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h
+index a03268ec59c3..f4a706f82cb7 100644
+--- a/include/sound/rcar_snd.h
++++ b/include/sound/rcar_snd.h
+@@ -56,9 +56,17 @@ struct rsnd_src_platform_info {
+ int dma_id; /* for Gen2 SCU */
+ };
+
++/*
++ * flags
++ */
++struct rsnd_dvc_platform_info {
++ u32 flags;
++};
++
+ struct rsnd_dai_path_info {
+ struct rsnd_ssi_platform_info *ssi;
+ struct rsnd_src_platform_info *src;
++ struct rsnd_dvc_platform_info *dvc;
+ };
+
+ struct rsnd_dai_platform_info {
+@@ -83,6 +91,8 @@ struct rcar_snd_info {
+ int ssi_info_nr;
+ struct rsnd_src_platform_info *src_info;
+ int src_info_nr;
++ struct rsnd_dvc_platform_info *dvc_info;
++ int dvc_info_nr;
+ struct rsnd_dai_platform_info *dai_info;
+ int dai_info_nr;
+ int (*start)(int id);
+diff --git a/sound/soc/sh/rcar/Makefile b/sound/soc/sh/rcar/Makefile
+index 7d0051ced838..9ac536429800 100644
+--- a/sound/soc/sh/rcar/Makefile
++++ b/sound/soc/sh/rcar/Makefile
+@@ -1,2 +1,2 @@
+-snd-soc-rcar-objs := core.o gen.o src.o adg.o ssi.o
++snd-soc-rcar-objs := core.o gen.o src.o adg.o ssi.o dvc.o
+ obj-$(CONFIG_SND_SOC_RCAR) += snd-soc-rcar.o
+\ No newline at end of file
+diff --git a/sound/soc/sh/rcar/adg.c b/sound/soc/sh/rcar/adg.c
+index 41556b2ef21e..fc41a0e8b09f 100644
+--- a/sound/soc/sh/rcar/adg.c
++++ b/sound/soc/sh/rcar/adg.c
+@@ -57,6 +57,24 @@ static u32 rsnd_adg_ssi_ws_timing_gen2(struct rsnd_dai_stream *io)
+ return (0x6 + ws) << 8;
+ }
+
++int rsnd_adg_set_cmd_timsel_gen2(struct rsnd_dai *rdai,
++ struct rsnd_mod *mod,
++ struct rsnd_dai_stream *io)
++{
++ int id = rsnd_mod_id(mod);
++ int shift = (id % 2) ? 16 : 0;
++ u32 mask, val;
++
++ val = rsnd_adg_ssi_ws_timing_gen2(io);
++
++ val = val << shift;
++ mask = 0xffff << shift;
++
++ rsnd_mod_bset(mod, CMDOUT_TIMSEL, mask, val);
++
++ return 0;
++}
++
+ static int rsnd_adg_set_src_timsel_gen2(struct rsnd_dai *rdai,
+ struct rsnd_mod *mod,
+ struct rsnd_dai_stream *io,
+diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
+index 1f34cd4e949d..964463dada87 100644
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -644,6 +644,11 @@ static int rsnd_path_init(struct rsnd_priv *priv,
+ if (ret < 0)
+ return ret;
+
++ /* DVC */
++ ret = rsnd_path_parse(priv, io, dvc);
++ if (ret < 0)
++ return ret;
++
+ return ret;
+ }
+
+@@ -868,6 +873,20 @@ static struct snd_pcm_ops rsnd_pcm_ops = {
+
+ static int rsnd_pcm_new(struct snd_soc_pcm_runtime *rtd)
+ {
++ struct rsnd_priv *priv = snd_soc_dai_get_drvdata(rtd->cpu_dai);
++ struct rsnd_dai *rdai;
++ int i, ret;
++
++ for_each_rsnd_dai(rdai, priv, i) {
++ ret = rsnd_dai_call(pcm_new, &rdai->playback, rdai, rtd);
++ if (ret)
++ return ret;
++
++ ret = rsnd_dai_call(pcm_new, &rdai->capture, rdai, rtd);
++ if (ret)
++ return ret;
++ }
++
+ return snd_pcm_lib_preallocate_pages_for_all(
+ rtd->pcm,
+ SNDRV_DMA_TYPE_DEV,
+@@ -907,6 +926,7 @@ static int rsnd_probe(struct platform_device *pdev)
+ rsnd_gen_probe,
+ rsnd_ssi_probe,
+ rsnd_src_probe,
++ rsnd_dvc_probe,
+ rsnd_adg_probe,
+ rsnd_dai_probe,
+ };
+diff --git a/sound/soc/sh/rcar/dvc.c b/sound/soc/sh/rcar/dvc.c
+new file mode 100644
+index 000000000000..74769b1be005
+--- /dev/null
++++ b/sound/soc/sh/rcar/dvc.c
+@@ -0,0 +1,273 @@
++/*
++ * Renesas R-Car DVC support
++ *
++ * Copyright (C) 2014 Renesas Solutions Corp.
++ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include "rsnd.h"
++
++#define RSND_DVC_NAME_SIZE 16
++#define RSND_DVC_VOLUME_MAX 100
++#define RSND_DVC_VOLUME_NUM 2
++struct rsnd_dvc {
++ struct rsnd_dvc_platform_info *info; /* rcar_snd.h */
++ struct rsnd_mod mod;
++ struct clk *clk;
++ long volume[RSND_DVC_VOLUME_NUM];
++};
++
++#define rsnd_mod_to_dvc(_mod) \
++ container_of((_mod), struct rsnd_dvc, mod)
++
++#define for_each_rsnd_dvc(pos, priv, i) \
++ for ((i) = 0; \
++ ((i) < rsnd_dvc_nr(priv)) && \
++ ((pos) = (struct rsnd_dvc *)(priv)->dvc + i); \
++ i++)
++
++static void rsnd_dvc_volume_update(struct rsnd_mod *mod)
++{
++ struct rsnd_dvc *dvc = rsnd_mod_to_dvc(mod);
++ u32 max = (0x00800000 - 1);
++ u32 vol[RSND_DVC_VOLUME_NUM];
++ int i;
++
++ for (i = 0; i < RSND_DVC_VOLUME_NUM; i++)
++ vol[i] = max / RSND_DVC_VOLUME_MAX * dvc->volume[i];
++
++ rsnd_mod_write(mod, DVC_VOL0R, vol[0]);
++ rsnd_mod_write(mod, DVC_VOL1R, vol[1]);
++}
++
++static int rsnd_dvc_init(struct rsnd_mod *dvc_mod,
++ struct rsnd_dai *rdai)
++{
++ struct rsnd_dvc *dvc = rsnd_mod_to_dvc(dvc_mod);
++ struct rsnd_dai_stream *io = rsnd_mod_to_io(dvc_mod);
++ struct rsnd_priv *priv = rsnd_mod_to_priv(dvc_mod);
++ struct rsnd_mod *src_mod = rsnd_io_to_mod_src(io);
++ struct device *dev = rsnd_priv_to_dev(priv);
++ int dvc_id = rsnd_mod_id(dvc_mod);
++ int src_id = rsnd_mod_id(src_mod);
++ u32 route[] = {
++ [0] = 0x30000,
++ [1] = 0x30001,
++ [2] = 0x40000,
++ [3] = 0x10000,
++ [4] = 0x20000,
++ [5] = 0x40100
++ };
++
++ if (src_id >= ARRAY_SIZE(route)) {
++ dev_err(dev, "DVC%d isn't connected to SRC%d\n", dvc_id, src_id);
++ return -EINVAL;
++ }
++
++ clk_prepare_enable(dvc->clk);
++
++ /*
++ * fixme
++ * it doesn't support CTU/MIX
++ */
++ rsnd_mod_write(dvc_mod, CMD_ROUTE_SLCT, route[src_id]);
++
++ rsnd_mod_write(dvc_mod, DVC_SWRSR, 0);
++ rsnd_mod_write(dvc_mod, DVC_SWRSR, 1);
++
++ rsnd_mod_write(dvc_mod, DVC_DVUIR, 1);
++
++ rsnd_mod_write(dvc_mod, DVC_ADINR, rsnd_get_adinr(dvc_mod));
++
++ /* enable Volume */
++ rsnd_mod_write(dvc_mod, DVC_DVUCR, 0x100);
++
++ /* ch0/ch1 Volume */
++ rsnd_dvc_volume_update(dvc_mod);
++
++ rsnd_mod_write(dvc_mod, DVC_DVUIR, 0);
++
++ rsnd_mod_write(dvc_mod, DVC_DVUER, 1);
++
++ rsnd_adg_set_cmd_timsel_gen2(rdai, dvc_mod, io);
++
++ return 0;
++}
++
++static int rsnd_dvc_quit(struct rsnd_mod *mod,
++ struct rsnd_dai *rdai)
++{
++ struct rsnd_dvc *dvc = rsnd_mod_to_dvc(mod);
++
++ clk_disable_unprepare(dvc->clk);
++
++ return 0;
++}
++
++static int rsnd_dvc_start(struct rsnd_mod *mod,
++ struct rsnd_dai *rdai)
++{
++ rsnd_mod_write(mod, CMD_CTRL, 0x10);
++
++ return 0;
++}
++
++static int rsnd_dvc_stop(struct rsnd_mod *mod,
++ struct rsnd_dai *rdai)
++{
++ rsnd_mod_write(mod, CMD_CTRL, 0);
++
++ return 0;
++}
++
++static int rsnd_dvc_volume_info(struct snd_kcontrol *kctrl,
++ struct snd_ctl_elem_info *uinfo)
++{
++ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++ uinfo->count = RSND_DVC_VOLUME_NUM;
++ uinfo->value.integer.min = 0;
++ uinfo->value.integer.max = RSND_DVC_VOLUME_MAX;
++
++ return 0;
++}
++
++static int rsnd_dvc_volume_get(struct snd_kcontrol *kctrl,
++ struct snd_ctl_elem_value *ucontrol)
++{
++ struct rsnd_mod *mod = snd_kcontrol_chip(kctrl);
++ struct rsnd_dvc *dvc = rsnd_mod_to_dvc(mod);
++ int i;
++
++ for (i = 0; i < RSND_DVC_VOLUME_NUM; i++)
++ ucontrol->value.integer.value[i] = dvc->volume[i];
++
++ return 0;
++}
++
++static int rsnd_dvc_volume_put(struct snd_kcontrol *kctrl,
++ struct snd_ctl_elem_value *ucontrol)
++{
++ struct rsnd_mod *mod = snd_kcontrol_chip(kctrl);
++ struct rsnd_dvc *dvc = rsnd_mod_to_dvc(mod);
++ int i, change = 0;
++
++ for (i = 0; i < RSND_DVC_VOLUME_NUM; i++) {
++ if (ucontrol->value.integer.value[i] < 0 ||
++ ucontrol->value.integer.value[i] > RSND_DVC_VOLUME_MAX)
++ return -EINVAL;
++
++ change |= (ucontrol->value.integer.value[i] != dvc->volume[i]);
++ }
++
++ if (change) {
++ for (i = 0; i < RSND_DVC_VOLUME_NUM; i++)
++ dvc->volume[i] = ucontrol->value.integer.value[i];
++
++ rsnd_dvc_volume_update(mod);
++ }
++
++ return change;
++}
++
++static int rsnd_dvc_pcm_new(struct rsnd_mod *mod,
++ struct rsnd_dai *rdai,
++ struct snd_soc_pcm_runtime *rtd)
++{
++ struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
++ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
++ struct device *dev = rsnd_priv_to_dev(priv);
++ struct snd_card *card = rtd->card->snd_card;
++ struct snd_kcontrol *kctrl;
++ static struct snd_kcontrol_new knew = {
++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
++ .name = "Playback Volume",
++ .info = rsnd_dvc_volume_info,
++ .get = rsnd_dvc_volume_get,
++ .put = rsnd_dvc_volume_put,
++ };
++ int ret;
++
++ if (!rsnd_dai_is_play(rdai, io)) {
++ dev_err(dev, "DVC%d is connected to Capture DAI\n",
++ rsnd_mod_id(mod));
++ return -EINVAL;
++ }
++
++ kctrl = snd_ctl_new1(&knew, mod);
++ if (!kctrl)
++ return -ENOMEM;
++
++ ret = snd_ctl_add(card, kctrl);
++ if (ret < 0)
++ return ret;
++
++ return 0;
++}
++
++static struct rsnd_mod_ops rsnd_dvc_ops = {
++ .name = "dvc (gen2)",
++ .init = rsnd_dvc_init,
++ .quit = rsnd_dvc_quit,
++ .start = rsnd_dvc_start,
++ .stop = rsnd_dvc_stop,
++ .pcm_new = rsnd_dvc_pcm_new,
++};
++
++struct rsnd_mod *rsnd_dvc_mod_get(struct rsnd_priv *priv, int id)
++{
++ if (WARN_ON(id < 0 || id >= rsnd_dvc_nr(priv)))
++ id = 0;
++
++ return &((struct rsnd_dvc *)(priv->dvc) + id)->mod;
++}
++
++int rsnd_dvc_probe(struct platform_device *pdev,
++ const struct rsnd_of_data *of_data,
++ struct rsnd_priv *priv)
++{
++ struct rcar_snd_info *info = rsnd_priv_to_info(priv);
++ struct device *dev = rsnd_priv_to_dev(priv);
++ struct rsnd_dvc *dvc;
++ struct clk *clk;
++ char name[RSND_DVC_NAME_SIZE];
++ int i, nr;
++
++ nr = info->dvc_info_nr;
++ if (!nr)
++ return 0;
++
++ /* This driver doesn't support Gen1 at this point */
++ if (rsnd_is_gen1(priv)) {
++ dev_warn(dev, "CMD is not supported on Gen1\n");
++ return -EINVAL;
++ }
++
++ dvc = devm_kzalloc(dev, sizeof(*dvc) * nr, GFP_KERNEL);
++ if (!dvc) {
++ dev_err(dev, "CMD allocate failed\n");
++ return -ENOMEM;
++ }
++
++ priv->dvc_nr = nr;
++ priv->dvc = dvc;
++
++ for_each_rsnd_dvc(dvc, priv, i) {
++ snprintf(name, RSND_DVC_NAME_SIZE, "dvc.%d", i);
++
++ clk = devm_clk_get(dev, name);
++ if (IS_ERR(clk))
++ return PTR_ERR(clk);
++
++ dvc->info = &info->dvc_info[i];
++ dvc->clk = clk;
++
++ rsnd_mod_init(priv, &dvc->mod, &rsnd_dvc_ops, RSND_MOD_DVC, i);
++
++ dev_dbg(dev, "CMD%d probed\n", i);
++ }
++
++ return 0;
++}
+diff --git a/sound/soc/sh/rcar/gen.c b/sound/soc/sh/rcar/gen.c
+index 50a1ef3eb1c6..a135d4c9d080 100644
+--- a/sound/soc/sh/rcar/gen.c
++++ b/sound/soc/sh/rcar/gen.c
+@@ -181,6 +181,8 @@ static int rsnd_gen2_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen)
+ RSND_GEN2_M_REG(gen, SCU, SRC_BUSIF_MODE, 0x0, 0x20),
+ RSND_GEN2_M_REG(gen, SCU, SRC_ROUTE_MODE0,0xc, 0x20),
+ RSND_GEN2_M_REG(gen, SCU, SRC_CTRL, 0x10, 0x20),
++ RSND_GEN2_M_REG(gen, SCU, CMD_ROUTE_SLCT, 0x18c, 0x20),
++ RSND_GEN2_M_REG(gen, SCU, CMD_CTRL, 0x190, 0x20),
+ RSND_GEN2_M_REG(gen, SCU, SRC_SWRSR, 0x200, 0x40),
+ RSND_GEN2_M_REG(gen, SCU, SRC_SRCIR, 0x204, 0x40),
+ RSND_GEN2_M_REG(gen, SCU, SRC_ADINR, 0x214, 0x40),
+@@ -189,6 +191,14 @@ static int rsnd_gen2_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen)
+ RSND_GEN2_M_REG(gen, SCU, SRC_SRCCR, 0x224, 0x40),
+ RSND_GEN2_M_REG(gen, SCU, SRC_BSDSR, 0x22c, 0x40),
+ RSND_GEN2_M_REG(gen, SCU, SRC_BSISR, 0x238, 0x40),
++ RSND_GEN2_M_REG(gen, SCU, DVC_SWRSR, 0xe00, 0x100),
++ RSND_GEN2_M_REG(gen, SCU, DVC_DVUIR, 0xe04, 0x100),
++ RSND_GEN2_M_REG(gen, SCU, DVC_ADINR, 0xe08, 0x100),
++ RSND_GEN2_M_REG(gen, SCU, DVC_DVUCR, 0xe10, 0x100),
++ RSND_GEN2_M_REG(gen, SCU, DVC_ZCMCR, 0xe14, 0x100),
++ RSND_GEN2_M_REG(gen, SCU, DVC_VOL0R, 0xe28, 0x100),
++ RSND_GEN2_M_REG(gen, SCU, DVC_VOL1R, 0xe2c, 0x100),
++ RSND_GEN2_M_REG(gen, SCU, DVC_DVUER, 0xe48, 0x100),
+
+ RSND_GEN2_S_REG(gen, ADG, BRRA, 0x00),
+ RSND_GEN2_S_REG(gen, ADG, BRRB, 0x04),
+@@ -207,6 +217,7 @@ static int rsnd_gen2_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen)
+ RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL2, 0x50),
+ RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL3, 0x54),
+ RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL4, 0x58),
++ RSND_GEN2_S_REG(gen, ADG, CMDOUT_TIMSEL, 0x5c),
+
+ RSND_GEN2_M_REG(gen, SSI, SSICR, 0x00, 0x40),
+ RSND_GEN2_M_REG(gen, SSI, SSISR, 0x04, 0x40),
+diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
+index 6156ceebd58b..5aa790170b01 100644
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -44,6 +44,15 @@ enum rsnd_reg {
+ RSND_REG_SRC_IFSCR,
+ RSND_REG_SRC_IFSVR,
+ RSND_REG_SRC_SRCCR,
++ RSND_REG_CMD_ROUTE_SLCT,
++ RSND_REG_DVC_SWRSR,
++ RSND_REG_DVC_DVUIR,
++ RSND_REG_DVC_ADINR,
++ RSND_REG_DVC_DVUCR,
++ RSND_REG_DVC_ZCMCR,
++ RSND_REG_DVC_VOL0R,
++ RSND_REG_DVC_VOL1R,
++ RSND_REG_DVC_DVUER,
+
+ /* ADG */
+ RSND_REG_BRRA,
+@@ -79,6 +88,8 @@ enum rsnd_reg {
+ RSND_REG_SHARE17,
+ RSND_REG_SHARE18,
+ RSND_REG_SHARE19,
++ RSND_REG_SHARE20,
++ RSND_REG_SHARE21,
+
+ RSND_REG_MAX,
+ };
+@@ -114,6 +125,8 @@ enum rsnd_reg {
+ #define RSND_REG_SRCOUT_TIMSEL3 RSND_REG_SHARE17
+ #define RSND_REG_SRCOUT_TIMSEL4 RSND_REG_SHARE18
+ #define RSND_REG_AUDIO_CLK_SEL2 RSND_REG_SHARE19
++#define RSND_REG_CMD_CTRL RSND_REG_SHARE20
++#define RSND_REG_CMDOUT_TIMSEL RSND_REG_SHARE21
+
+ struct rsnd_of_data;
+ struct rsnd_priv;
+@@ -166,6 +179,7 @@ void rsnd_dma_quit(struct rsnd_priv *priv,
+ enum rsnd_mod_type {
+ RSND_MOD_SRC = 0,
+ RSND_MOD_SSI,
++ RSND_MOD_DVC,
+ RSND_MOD_MAX,
+ };
+
+@@ -183,6 +197,9 @@ struct rsnd_mod_ops {
+ struct rsnd_dai *rdai);
+ int (*stop)(struct rsnd_mod *mod,
+ struct rsnd_dai *rdai);
++ int (*pcm_new)(struct rsnd_mod *mod,
++ struct rsnd_dai *rdai,
++ struct snd_soc_pcm_runtime *rtd);
+ };
+
+ struct rsnd_dai_stream;
+@@ -223,6 +240,7 @@ struct rsnd_dai_stream {
+ };
+ #define rsnd_io_to_mod_ssi(io) ((io)->mod[RSND_MOD_SSI])
+ #define rsnd_io_to_mod_src(io) ((io)->mod[RSND_MOD_SRC])
++#define rsnd_io_to_mod_dvc(io) ((io)->mod[RSND_MOD_DVC])
+
+ struct rsnd_dai {
+ char name[RSND_DAI_NAME_SIZE];
+@@ -286,6 +304,9 @@ int rsnd_adg_set_convert_clk_gen2(struct rsnd_mod *mod,
+ int rsnd_adg_set_convert_timing_gen2(struct rsnd_mod *mod,
+ struct rsnd_dai *rdai,
+ struct rsnd_dai_stream *io);
++int rsnd_adg_set_cmd_timsel_gen2(struct rsnd_dai *rdai,
++ struct rsnd_mod *mod,
++ struct rsnd_dai_stream *io);
+
+ /*
+ * R-Car sound priv
+@@ -323,6 +344,12 @@ struct rsnd_priv {
+ int ssi_nr;
+
+ /*
++ * below value will be filled on rsnd_dvc_probe()
++ */
++ void *dvc;
++ int dvc_nr;
++
++ /*
+ * below value will be filled on rsnd_dai_probe()
+ */
+ struct snd_soc_dai_driver *daidrv;
+@@ -374,4 +401,17 @@ int rsnd_ssi_probe(struct platform_device *pdev,
+ struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id);
+ int rsnd_ssi_is_pin_sharing(struct rsnd_mod *mod);
+
++/*
++ * R-Car DVC
++ */
++int rsnd_dvc_probe(struct platform_device *pdev,
++ const struct rsnd_of_data *of_data,
++ struct rsnd_priv *priv);
++void rsnd_dvc_remove(struct platform_device *pdev,
++ struct rsnd_priv *priv);
++struct rsnd_mod *rsnd_dvc_mod_get(struct rsnd_priv *priv, int id);
++
++#define rsnd_dvc_nr(priv) ((priv)->dvc_nr)
++
++
+ #endif
+diff --git a/sound/soc/sh/rcar/src.c b/sound/soc/sh/rcar/src.c
+index 2a0f7e63ffc8..e3b078e7c3aa 100644
+--- a/sound/soc/sh/rcar/src.c
++++ b/sound/soc/sh/rcar/src.c
+@@ -536,12 +536,14 @@ static int rsnd_src_init_gen2(struct rsnd_mod *mod,
+ static int rsnd_src_start_gen2(struct rsnd_mod *mod,
+ struct rsnd_dai *rdai)
+ {
++ struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
+ struct rsnd_src *src = rsnd_mod_to_src(mod);
++ u32 val = rsnd_io_to_mod_dvc(io) ? 0x01 : 0x11;
+
+ rsnd_dma_start(rsnd_mod_to_dma(&src->mod));
+
+ rsnd_mod_write(mod, SSI_CTRL, 0x1);
+- rsnd_mod_write(mod, SRC_CTRL, 0x11);
++ rsnd_mod_write(mod, SRC_CTRL, val);
+
+ return rsnd_src_start(mod, rdai);
+ }
+--
+2.1.2
+
--- /dev/null
+From eaf2e318aa4596c780a241bac4dff3bdc3d23353 Mon Sep 17 00:00:00 2001
+From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Date: Tue, 13 May 2014 01:10:20 +0200
+Subject: ASoC: rsnd: Fix warnings due to improper printk formats
+
+Use the %pap printk specifier to print resource_size_t variables. This
+fixes warnings on platforms where resource_size_t has a different size
+than int.
+
+Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit e6b0d896ab0597d37422cae3cef3e789431549eb)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/gen.c | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/gen.c b/sound/soc/sh/rcar/gen.c
+index a135d4c9d080..a1583b57bf8d 100644
+--- a/sound/soc/sh/rcar/gen.c
++++ b/sound/soc/sh/rcar/gen.c
+@@ -263,13 +263,13 @@ static int rsnd_gen2_probe(struct platform_device *pdev,
+ return ret;
+
+ dev_dbg(dev, "Gen2 device probed\n");
+- dev_dbg(dev, "SCU : %08x => %p\n", scu_res->start,
++ dev_dbg(dev, "SCU : %pap => %p\n", &scu_res->start,
+ gen->base[RSND_GEN2_SCU]);
+- dev_dbg(dev, "ADG : %08x => %p\n", adg_res->start,
++ dev_dbg(dev, "ADG : %pap => %p\n", &adg_res->start,
+ gen->base[RSND_GEN2_ADG]);
+- dev_dbg(dev, "SSIU : %08x => %p\n", ssiu_res->start,
++ dev_dbg(dev, "SSIU : %pap => %p\n", &ssiu_res->start,
+ gen->base[RSND_GEN2_SSIU]);
+- dev_dbg(dev, "SSI : %08x => %p\n", ssi_res->start,
++ dev_dbg(dev, "SSI : %pap => %p\n", &ssi_res->start,
+ gen->base[RSND_GEN2_SSI]);
+
+ return 0;
+@@ -356,11 +356,11 @@ static int rsnd_gen1_probe(struct platform_device *pdev,
+ return ret;
+
+ dev_dbg(dev, "Gen1 device probed\n");
+- dev_dbg(dev, "SRU : %08x => %p\n", sru_res->start,
++ dev_dbg(dev, "SRU : %pap => %p\n", &sru_res->start,
+ gen->base[RSND_GEN1_SRU]);
+- dev_dbg(dev, "ADG : %08x => %p\n", adg_res->start,
++ dev_dbg(dev, "ADG : %pap => %p\n", &adg_res->start,
+ gen->base[RSND_GEN1_ADG]);
+- dev_dbg(dev, "SSI : %08x => %p\n", ssi_res->start,
++ dev_dbg(dev, "SSI : %pap => %p\n", &ssi_res->start,
+ gen->base[RSND_GEN1_SSI]);
+
+ return 0;
+--
+2.1.2
+
--- /dev/null
+From 990221a11227e160afdf238c910ae841e6c2a367 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 22 May 2014 23:24:59 -0700
+Subject: ASoC: rsnd: DT node clean up by using the of_node_put()
+
+Driver needs to call of_node_put() after of_get_chile_by_name()
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit f451e48d8e1cae07d55b4a5b558c008cd4dc9a73)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/src.c | 7 +++++--
+ sound/soc/sh/rcar/ssi.c | 7 +++++--
+ 2 files changed, 10 insertions(+), 4 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/src.c b/sound/soc/sh/rcar/src.c
+index e3b078e7c3aa..df5d7f87c66d 100644
+--- a/sound/soc/sh/rcar/src.c
++++ b/sound/soc/sh/rcar/src.c
+@@ -598,18 +598,21 @@ static void rsnd_of_parse_src(struct platform_device *pdev,
+
+ nr = of_get_child_count(src_node);
+ if (!nr)
+- return;
++ goto rsnd_of_parse_src_end;
+
+ src_info = devm_kzalloc(dev,
+ sizeof(struct rsnd_src_platform_info) * nr,
+ GFP_KERNEL);
+ if (!src_info) {
+ dev_err(dev, "src info allocation error\n");
+- return;
++ goto rsnd_of_parse_src_end;
+ }
+
+ info->src_info = src_info;
+ info->src_info_nr = nr;
++
++rsnd_of_parse_src_end:
++ of_node_put(src_node);
+ }
+
+ int rsnd_src_probe(struct platform_device *pdev,
+diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c
+index 36654bd4e428..97bc4707c624 100644
+--- a/sound/soc/sh/rcar/ssi.c
++++ b/sound/soc/sh/rcar/ssi.c
+@@ -554,14 +554,14 @@ static void rsnd_of_parse_ssi(struct platform_device *pdev,
+
+ nr = of_get_child_count(node);
+ if (!nr)
+- return;
++ goto rsnd_of_parse_ssi_end;
+
+ ssi_info = devm_kzalloc(dev,
+ sizeof(struct rsnd_ssi_platform_info) * nr,
+ GFP_KERNEL);
+ if (!ssi_info) {
+ dev_err(dev, "ssi info allocation error\n");
+- return;
++ goto rsnd_of_parse_ssi_end;
+ }
+
+ info->ssi_info = ssi_info;
+@@ -584,6 +584,9 @@ static void rsnd_of_parse_ssi(struct platform_device *pdev,
+ */
+ ssi_info->pio_irq = irq_of_parse_and_map(np, 0);
+ }
++
++rsnd_of_parse_ssi_end:
++ of_node_put(node);
+ }
+
+ int rsnd_ssi_probe(struct platform_device *pdev,
+--
+2.1.2
+
--- /dev/null
+From 92e03fb9e8f73b2729d23c433924608148699f89 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 22 May 2014 23:25:30 -0700
+Subject: ASoC: rsnd: save platform_device instead of device
+
+DT DMA support needs struct platform_device pointer,
+and it can get struct device pointer from platform_device.
+Save platform_device instead of device.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 9f464f8e076e6fcc8d249e76d84f4fb99c1fecff)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/core.c | 2 +-
+ sound/soc/sh/rcar/rsnd.h | 5 +++--
+ 2 files changed, 4 insertions(+), 3 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
+index 964463dada87..7bb9a2e69ad4 100644
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -956,7 +956,7 @@ static int rsnd_probe(struct platform_device *pdev)
+ return -ENODEV;
+ }
+
+- priv->dev = dev;
++ priv->pdev = pdev;
+ priv->info = info;
+ spin_lock_init(&priv->lock);
+
+diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
+index 5aa790170b01..344f9415e669 100644
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -317,7 +317,7 @@ struct rsnd_of_data {
+
+ struct rsnd_priv {
+
+- struct device *dev;
++ struct platform_device *pdev;
+ struct rcar_snd_info *info;
+ spinlock_t lock;
+
+@@ -357,7 +357,8 @@ struct rsnd_priv {
+ int rdai_nr;
+ };
+
+-#define rsnd_priv_to_dev(priv) ((priv)->dev)
++#define rsnd_priv_to_pdev(priv) ((priv)->pdev)
++#define rsnd_priv_to_dev(priv) (&(rsnd_priv_to_pdev(priv)->dev))
+ #define rsnd_priv_to_info(priv) ((priv)->info)
+ #define rsnd_lock(priv, flags) spin_lock_irqsave(&priv->lock, flags)
+ #define rsnd_unlock(priv, flags) spin_unlock_irqrestore(&priv->lock, flags)
+--
+2.1.2
+
--- /dev/null
+From 308cc1b1768f19c03c5422ff615c49ea1a7a20a0 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 22 May 2014 23:25:37 -0700
+Subject: ASoC: rsnd: remove rsnd_src_non_ops
+
+Renesas sound driver is supporting Gen1/Gen2.
+SRC probe can return error if it was unknown
+generation.
+Now, rsnd_src_non_ops is not needed.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 033e7ed85b8513db4efacbdf0f22db2bed4ff405)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/src.c | 20 ++++++++++----------
+ 1 file changed, 10 insertions(+), 10 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/src.c b/sound/soc/sh/rcar/src.c
+index df5d7f87c66d..89d24eea3948 100644
+--- a/sound/soc/sh/rcar/src.c
++++ b/sound/soc/sh/rcar/src.c
+@@ -268,10 +268,6 @@ static int rsnd_src_stop(struct rsnd_mod *mod,
+ return 0;
+ }
+
+-static struct rsnd_mod_ops rsnd_src_non_ops = {
+- .name = "src (non)",
+-};
+-
+ /*
+ * Gen1 functions
+ */
+@@ -627,6 +623,16 @@ int rsnd_src_probe(struct platform_device *pdev,
+ char name[RSND_SRC_NAME_SIZE];
+ int i, nr;
+
++ ops = NULL;
++ if (rsnd_is_gen1(priv))
++ ops = &rsnd_src_gen1_ops;
++ if (rsnd_is_gen2(priv))
++ ops = &rsnd_src_gen2_ops;
++ if (!ops) {
++ dev_err(dev, "unknown Generation\n");
++ return -EIO;
++ }
++
+ rsnd_of_parse_src(pdev, of_data, priv);
+
+ /*
+@@ -655,12 +661,6 @@ int rsnd_src_probe(struct platform_device *pdev,
+ src->info = &info->src_info[i];
+ src->clk = clk;
+
+- ops = &rsnd_src_non_ops;
+- if (rsnd_is_gen1(priv))
+- ops = &rsnd_src_gen1_ops;
+- if (rsnd_is_gen2(priv))
+- ops = &rsnd_src_gen2_ops;
+-
+ rsnd_mod_init(priv, &src->mod, ops, RSND_MOD_SRC, i);
+
+ dev_dbg(dev, "SRC%d probed\n", i);
+--
+2.1.2
+
--- /dev/null
+From 3ea6a94d129dc0b1ffe7a95490a94af1785a7bfb Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 22 May 2014 23:25:43 -0700
+Subject: ASoC: rsnd: module name is unified
+
+Renesas sound driver uses many modules (= SSI/SRC/DVC),
+and each module had own name.
+But, each module name can be used as several purpose,
+like clock name, DMA name etc...
+This patch uses common name for each module.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 8aefda5046f417c551e3acdeb2cf37949a4b75e9)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/dvc.c | 20 ++++++++++++++++++--
+ sound/soc/sh/rcar/src.c | 23 ++++++++++++++++++++---
+ sound/soc/sh/rcar/ssi.c | 15 +++++++++++----
+ 3 files changed, 49 insertions(+), 9 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/dvc.c b/sound/soc/sh/rcar/dvc.c
+index 74769b1be005..ed0007006899 100644
+--- a/sound/soc/sh/rcar/dvc.c
++++ b/sound/soc/sh/rcar/dvc.c
+@@ -13,6 +13,9 @@
+ #define RSND_DVC_NAME_SIZE 16
+ #define RSND_DVC_VOLUME_MAX 100
+ #define RSND_DVC_VOLUME_NUM 2
++
++#define DVC_NAME "dvc"
++
+ struct rsnd_dvc {
+ struct rsnd_dvc_platform_info *info; /* rcar_snd.h */
+ struct rsnd_mod mod;
+@@ -43,6 +46,17 @@ static void rsnd_dvc_volume_update(struct rsnd_mod *mod)
+ rsnd_mod_write(mod, DVC_VOL1R, vol[1]);
+ }
+
++static int rsnd_dvc_probe_gen2(struct rsnd_mod *mod,
++ struct rsnd_dai *rdai)
++{
++ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
++ struct device *dev = rsnd_priv_to_dev(priv);
++
++ dev_dbg(dev, "%s (Gen2) is probed\n", rsnd_mod_name(mod));
++
++ return 0;
++}
++
+ static int rsnd_dvc_init(struct rsnd_mod *dvc_mod,
+ struct rsnd_dai *rdai)
+ {
+@@ -208,7 +222,8 @@ static int rsnd_dvc_pcm_new(struct rsnd_mod *mod,
+ }
+
+ static struct rsnd_mod_ops rsnd_dvc_ops = {
+- .name = "dvc (gen2)",
++ .name = DVC_NAME,
++ .probe = rsnd_dvc_probe_gen2,
+ .init = rsnd_dvc_init,
+ .quit = rsnd_dvc_quit,
+ .start = rsnd_dvc_start,
+@@ -255,7 +270,8 @@ int rsnd_dvc_probe(struct platform_device *pdev,
+ priv->dvc = dvc;
+
+ for_each_rsnd_dvc(dvc, priv, i) {
+- snprintf(name, RSND_DVC_NAME_SIZE, "dvc.%d", i);
++ snprintf(name, RSND_DVC_NAME_SIZE, "%s.%d",
++ DVC_NAME, i);
+
+ clk = devm_clk_get(dev, name);
+ if (IS_ERR(clk))
+diff --git a/sound/soc/sh/rcar/src.c b/sound/soc/sh/rcar/src.c
+index 89d24eea3948..200eda019bc7 100644
+--- a/sound/soc/sh/rcar/src.c
++++ b/sound/soc/sh/rcar/src.c
+@@ -10,6 +10,8 @@
+ */
+ #include "rsnd.h"
+
++#define SRC_NAME "src"
++
+ struct rsnd_src {
+ struct rsnd_src_platform_info *info; /* rcar_snd.h */
+ struct rsnd_mod mod;
+@@ -389,6 +391,17 @@ static int rsnd_src_set_convert_rate_gen1(struct rsnd_mod *mod,
+ return 0;
+ }
+
++static int rsnd_src_probe_gen1(struct rsnd_mod *mod,
++ struct rsnd_dai *rdai)
++{
++ struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
++ struct device *dev = rsnd_priv_to_dev(priv);
++
++ dev_dbg(dev, "%s (Gen1) is probed\n", rsnd_mod_name(mod));
++
++ return 0;
++}
++
+ static int rsnd_src_init_gen1(struct rsnd_mod *mod,
+ struct rsnd_dai *rdai)
+ {
+@@ -434,7 +447,8 @@ static int rsnd_src_stop_gen1(struct rsnd_mod *mod,
+ }
+
+ static struct rsnd_mod_ops rsnd_src_gen1_ops = {
+- .name = "sru (gen1)",
++ .name = SRC_NAME,
++ .probe = rsnd_src_probe_gen1,
+ .init = rsnd_src_init_gen1,
+ .quit = rsnd_src_quit,
+ .start = rsnd_src_start_gen1,
+@@ -498,6 +512,8 @@ static int rsnd_src_probe_gen2(struct rsnd_mod *mod,
+ if (ret < 0)
+ dev_err(dev, "SRC DMA failed\n");
+
++ dev_dbg(dev, "%s (Gen2) is probed\n", rsnd_mod_name(mod));
++
+ return ret;
+ }
+
+@@ -558,7 +574,7 @@ static int rsnd_src_stop_gen2(struct rsnd_mod *mod,
+ }
+
+ static struct rsnd_mod_ops rsnd_src_gen2_ops = {
+- .name = "src (gen2)",
++ .name = SRC_NAME,
+ .probe = rsnd_src_probe_gen2,
+ .remove = rsnd_src_remove_gen2,
+ .init = rsnd_src_init_gen2,
+@@ -652,7 +668,8 @@ int rsnd_src_probe(struct platform_device *pdev,
+ priv->src = src;
+
+ for_each_rsnd_src(src, priv, i) {
+- snprintf(name, RSND_SRC_NAME_SIZE, "src.%d", i);
++ snprintf(name, RSND_SRC_NAME_SIZE, "%s.%d",
++ SRC_NAME, i);
+
+ clk = devm_clk_get(dev, name);
+ if (IS_ERR(clk))
+diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c
+index 97bc4707c624..b821ec6683d2 100644
+--- a/sound/soc/sh/rcar/ssi.c
++++ b/sound/soc/sh/rcar/ssi.c
+@@ -57,6 +57,8 @@
+ */
+ #define CONT (1 << 8) /* WS Continue Function */
+
++#define SSI_NAME "ssi"
++
+ struct rsnd_ssi {
+ struct clk *clk;
+ struct rsnd_ssi_platform_info *info; /* rcar_snd.h */
+@@ -373,6 +375,8 @@ static int rsnd_ssi_pio_probe(struct rsnd_mod *mod,
+ if (ret)
+ dev_err(dev, "SSI request interrupt failed\n");
+
++ dev_dbg(dev, "%s (PIO) is probed\n", rsnd_mod_name(mod));
++
+ return ret;
+ }
+
+@@ -405,7 +409,7 @@ static int rsnd_ssi_pio_stop(struct rsnd_mod *mod,
+ }
+
+ static struct rsnd_mod_ops rsnd_ssi_pio_ops = {
+- .name = "ssi (pio)",
++ .name = SSI_NAME,
+ .probe = rsnd_ssi_pio_probe,
+ .init = rsnd_ssi_init,
+ .quit = rsnd_ssi_quit,
+@@ -430,6 +434,8 @@ static int rsnd_ssi_dma_probe(struct rsnd_mod *mod,
+ if (ret < 0)
+ dev_err(dev, "SSI DMA failed\n");
+
++ dev_dbg(dev, "%s (DMA) is probed\n", rsnd_mod_name(mod));
++
+ return ret;
+ }
+
+@@ -480,7 +486,7 @@ static int rsnd_ssi_dma_stop(struct rsnd_mod *mod,
+ }
+
+ static struct rsnd_mod_ops rsnd_ssi_dma_ops = {
+- .name = "ssi (dma)",
++ .name = SSI_NAME,
+ .probe = rsnd_ssi_dma_probe,
+ .remove = rsnd_ssi_dma_remove,
+ .init = rsnd_ssi_init,
+@@ -493,7 +499,7 @@ static struct rsnd_mod_ops rsnd_ssi_dma_ops = {
+ * Non SSI
+ */
+ static struct rsnd_mod_ops rsnd_ssi_non_ops = {
+- .name = "ssi (non)",
++ .name = SSI_NAME,
+ };
+
+ /*
+@@ -620,7 +626,8 @@ int rsnd_ssi_probe(struct platform_device *pdev,
+ for_each_rsnd_ssi(ssi, priv, i) {
+ pinfo = &info->ssi_info[i];
+
+- snprintf(name, RSND_SSI_NAME_SIZE, "ssi.%d", i);
++ snprintf(name, RSND_SSI_NAME_SIZE, "%s.%d",
++ SSI_NAME, i);
+
+ clk = devm_clk_get(dev, name);
+ if (IS_ERR(clk))
+--
+2.1.2
+
--- /dev/null
+From eef4df7bd7dcef66994207b7dd1f1a0f2b14a412 Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 22 May 2014 23:25:49 -0700
+Subject: ASoC: rsnd: care DMA slave channel name for DT
+
+Renesas sound driver is supporting to use DMAEngine.
+But, DMA slave channel name "tx", "rx" is not enough
+in DT case.
+Becuase, it has many ports and path combination.
+
+This patch adds rsnd_dma_of_name() to find
+DMA channel name, for example
+memory to SSI0 is "mem_ssi0",
+SSI0 to memory is "ssi0_mem",
+SSI0 to SRC0 is "ssi0_src0",
+SRC0 to SSI0 is "src0_ssi0",
+SRC0 to DVC0 is "src0_dvc0"...
+
+Renesas sound want to use PIO transfer mode for some reasons.
+It will be PIO tranfer mode if device node doesn't have
+DMA settings.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 199e7688bdf7d188d70c3432c96ec13d8a14b341)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ .../devicetree/bindings/sound/renesas,rsnd.txt | 1 +
+ sound/soc/sh/rcar/core.c | 80 +++++++++++++++++++++-
+ sound/soc/sh/rcar/ssi.c | 6 ++
+ 3 files changed, 86 insertions(+), 1 deletion(-)
+
+diff --git a/Documentation/devicetree/bindings/sound/renesas,rsnd.txt b/Documentation/devicetree/bindings/sound/renesas,rsnd.txt
+index a44e9179faf5..8346cab046cd 100644
+--- a/Documentation/devicetree/bindings/sound/renesas,rsnd.txt
++++ b/Documentation/devicetree/bindings/sound/renesas,rsnd.txt
+@@ -20,6 +20,7 @@ Required properties:
+ SSI subnode properties:
+ - interrupts : Should contain SSI interrupt for PIO transfer
+ - shared-pin : if shared clock pin
++- pio-transfer : use PIO transfer mode
+
+ SRC subnode properties:
+ no properties at this point
+diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
+index 7bb9a2e69ad4..19f44640e1a8 100644
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -255,11 +255,81 @@ int rsnd_dma_available(struct rsnd_dma *dma)
+ return !!dma->chan;
+ }
+
++#define DMA_NAME_SIZE 16
++#define MOD_MAX 4 /* MEM/SSI/SRC/DVC */
++static int _rsnd_dma_of_name(char *dma_name, struct rsnd_mod *mod)
++{
++ if (mod)
++ return snprintf(dma_name, DMA_NAME_SIZE / 2, "%s%d",
++ rsnd_mod_name(mod), rsnd_mod_id(mod));
++ else
++ return snprintf(dma_name, DMA_NAME_SIZE / 2, "mem");
++
++}
++
++static void rsnd_dma_of_name(struct rsnd_dma *dma,
++ int is_play, char *dma_name)
++{
++ struct rsnd_mod *this = rsnd_dma_to_mod(dma);
++ struct rsnd_dai_stream *io = rsnd_mod_to_io(this);
++ struct rsnd_mod *ssi = rsnd_io_to_mod_ssi(io);
++ struct rsnd_mod *src = rsnd_io_to_mod_src(io);
++ struct rsnd_mod *dvc = rsnd_io_to_mod_dvc(io);
++ struct rsnd_mod *mod[MOD_MAX];
++ struct rsnd_mod *src_mod, *dst_mod;
++ int i, index;
++
++
++ for (i = 0; i < MOD_MAX; i++)
++ mod[i] = NULL;
++
++ /*
++ * in play case...
++ *
++ * src -> dst
++ *
++ * mem -> SSI
++ * mem -> SRC -> SSI
++ * mem -> SRC -> DVC -> SSI
++ */
++ mod[0] = NULL; /* for "mem" */
++ index = 1;
++ for (i = 1; i < MOD_MAX; i++) {
++ if (!src) {
++ mod[i] = ssi;
++ break;
++ } else if (!dvc) {
++ mod[i] = src;
++ src = NULL;
++ } else {
++ mod[i] = dvc;
++ dvc = NULL;
++ }
++
++ if (mod[i] == this)
++ index = i;
++ }
++
++ if (is_play) {
++ src_mod = mod[index - 1];
++ dst_mod = mod[index];
++ } else {
++ src_mod = mod[index];
++ dst_mod = mod[index + 1];
++ }
++
++ index = 0;
++ index = _rsnd_dma_of_name(dma_name + index, src_mod);
++ *(dma_name + index++) = '_';
++ index = _rsnd_dma_of_name(dma_name + index, dst_mod);
++}
++
+ int rsnd_dma_init(struct rsnd_priv *priv, struct rsnd_dma *dma,
+ int is_play, int id)
+ {
+ struct device *dev = rsnd_priv_to_dev(priv);
+ struct dma_slave_config cfg;
++ char dma_name[DMA_NAME_SIZE];
+ dma_cap_mask_t mask;
+ int ret;
+
+@@ -271,9 +341,17 @@ int rsnd_dma_init(struct rsnd_priv *priv, struct rsnd_dma *dma,
+ dma_cap_zero(mask);
+ dma_cap_set(DMA_SLAVE, mask);
+
++ if (dev->of_node)
++ rsnd_dma_of_name(dma, is_play, dma_name);
++ else
++ snprintf(dma_name, DMA_NAME_SIZE,
++ is_play ? "tx" : "rx");
++
++ dev_dbg(dev, "dma name : %s\n", dma_name);
++
+ dma->chan = dma_request_slave_channel_compat(mask, shdma_chan_filter,
+ (void *)id, dev,
+- is_play ? "tx" : "rx");
++ dma_name);
+ if (!dma->chan) {
+ dev_err(dev, "can't get dma channel\n");
+ return -EIO;
+diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c
+index b821ec6683d2..2df723df5d19 100644
+--- a/sound/soc/sh/rcar/ssi.c
++++ b/sound/soc/sh/rcar/ssi.c
+@@ -589,6 +589,12 @@ static void rsnd_of_parse_ssi(struct platform_device *pdev,
+ * irq
+ */
+ ssi_info->pio_irq = irq_of_parse_and_map(np, 0);
++
++ /*
++ * DMA
++ */
++ ssi_info->dma_id = of_get_property(np, "pio-transfer", NULL) ?
++ 0 : 1;
+ }
+
+ rsnd_of_parse_ssi_end:
+--
+2.1.2
+
--- /dev/null
+From 6185440d23f6d10c1d5bd2a26f157ca11b647cda Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Thu, 22 May 2014 23:25:54 -0700
+Subject: ASoC: rsnd: add rsnd_gen_dma_addr() for DMAC addr
+
+The DMAC src/dst addr needs to be set from driver when DT case.
+(It was set from SoC/DMAEngine code when non-DT case)
+This patch adds rsnd_gen_dma_addr() to set DMAC src/dst addr.
+
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit ad32d0c7b0e993433df152ae747652647eb65a27)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/core.c | 5 +--
+ sound/soc/sh/rcar/gen.c | 95 ++++++++++++++++++++++++++++++++++++++++++++++++
+ sound/soc/sh/rcar/rsnd.h | 5 +++
+ 3 files changed, 101 insertions(+), 4 deletions(-)
+
+diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
+index 19f44640e1a8..91880156e1ae 100644
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -357,10 +357,7 @@ int rsnd_dma_init(struct rsnd_priv *priv, struct rsnd_dma *dma,
+ return -EIO;
+ }
+
+- cfg.slave_id = id;
+- cfg.dst_addr = 0; /* use default addr when playback */
+- cfg.src_addr = 0; /* use default addr when capture */
+- cfg.direction = is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
++ rsnd_gen_dma_addr(priv, dma, &cfg, is_play, id);
+
+ ret = dmaengine_slave_config(dma->chan, &cfg);
+ if (ret < 0)
+diff --git a/sound/soc/sh/rcar/gen.c b/sound/soc/sh/rcar/gen.c
+index a1583b57bf8d..1dd2b7d38c2c 100644
+--- a/sound/soc/sh/rcar/gen.c
++++ b/sound/soc/sh/rcar/gen.c
+@@ -156,6 +156,101 @@ static int rsnd_gen_regmap_init(struct rsnd_priv *priv,
+ }
+
+ /*
++ * DMA read/write register offset
++ *
++ * RSND_xxx_I_N for Audio DMAC input
++ * RSND_xxx_O_N for Audio DMAC output
++ * RSND_xxx_I_P for Audio DMAC peri peri input
++ * RSND_xxx_O_P for Audio DMAC peri peri output
++ *
++ * ex) R-Car H2 case
++ * mod / DMAC in / DMAC out / DMAC PP in / DMAC pp out
++ * SSI : 0xec541000 / 0xec241008 / 0xec24100c / 0xec400000 / 0xec400000
++ * SCU : 0xec500000 / 0xec000000 / 0xec004000 / 0xec300000 / 0xec304000
++ * CMD : 0xec500000 / 0xec008000 0xec308000
++ */
++#define RDMA_SSI_I_N(addr, i) (addr ##_reg - 0x00300000 + (0x40 * i) + 0x8)
++#define RDMA_SSI_O_N(addr, i) (addr ##_reg - 0x00300000 + (0x40 * i) + 0xc)
++
++#define RDMA_SSI_I_P(addr, i) (addr ##_reg - 0x00141000 + (0x1000 * i))
++#define RDMA_SSI_O_P(addr, i) (addr ##_reg - 0x00141000 + (0x1000 * i))
++
++#define RDMA_SRC_I_N(addr, i) (addr ##_reg - 0x00500000 + (0x400 * i))
++#define RDMA_SRC_O_N(addr, i) (addr ##_reg - 0x004fc000 + (0x400 * i))
++
++#define RDMA_SRC_I_P(addr, i) (addr ##_reg - 0x00200000 + (0x400 * i))
++#define RDMA_SRC_O_P(addr, i) (addr ##_reg - 0x001fc000 + (0x400 * i))
++
++#define RDMA_CMD_O_N(addr, i) (addr ##_reg - 0x004f8000 + (0x400 * i))
++#define RDMA_CMD_O_P(addr, i) (addr ##_reg - 0x001f8000 + (0x400 * i))
++
++void rsnd_gen_dma_addr(struct rsnd_priv *priv,
++ struct rsnd_dma *dma,
++ struct dma_slave_config *cfg,
++ int is_play, int slave_id)
++{
++ struct platform_device *pdev = rsnd_priv_to_pdev(priv);
++ struct device *dev = rsnd_priv_to_dev(priv);
++ struct rsnd_mod *mod = rsnd_dma_to_mod(dma);
++ struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
++ dma_addr_t ssi_reg = platform_get_resource(pdev,
++ IORESOURCE_MEM, RSND_GEN2_SSI)->start;
++ dma_addr_t src_reg = platform_get_resource(pdev,
++ IORESOURCE_MEM, RSND_GEN2_SCU)->start;
++ int is_ssi = !!(rsnd_io_to_mod_ssi(io) == mod);
++ int use_src = !!rsnd_io_to_mod_src(io);
++ int use_dvc = !!rsnd_io_to_mod_dvc(io);
++ int id = rsnd_mod_id(mod);
++ struct dma_addr {
++ dma_addr_t src_addr;
++ dma_addr_t dst_addr;
++ } dma_addrs[2][2][3] = {
++ { /* SRC */
++ /* Capture */
++ {{ 0, 0 },
++ { RDMA_SRC_O_N(src, id), 0 },
++ { RDMA_CMD_O_N(src, id), 0 }},
++ /* Playback */
++ {{ 0, 0, },
++ { 0, RDMA_SRC_I_N(src, id) },
++ { 0, RDMA_SRC_I_N(src, id) }}
++ }, { /* SSI */
++ /* Capture */
++ {{ RDMA_SSI_O_N(ssi, id), 0 },
++ { RDMA_SSI_O_P(ssi, id), RDMA_SRC_I_P(src, id) },
++ { RDMA_SSI_O_P(ssi, id), RDMA_SRC_I_P(src, id) }},
++ /* Playback */
++ {{ 0, RDMA_SSI_I_N(ssi, id) },
++ { RDMA_SRC_O_P(src, id), RDMA_SSI_I_P(ssi, id) },
++ { RDMA_CMD_O_P(src, id), RDMA_SSI_I_P(ssi, id) }}
++ }
++ };
++
++ cfg->slave_id = slave_id;
++ cfg->src_addr = 0;
++ cfg->dst_addr = 0;
++ cfg->direction = is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
++
++ /*
++ * gen1 uses default DMA addr
++ */
++ if (rsnd_is_gen1(priv))
++ return;
++
++ /* it shouldn't happen */
++ if (use_dvc & !use_src) {
++ dev_err(dev, "DVC is selected without SRC\n");
++ return;
++ }
++
++ cfg->src_addr = dma_addrs[is_ssi][is_play][use_src + use_dvc].src_addr;
++ cfg->dst_addr = dma_addrs[is_ssi][is_play][use_src + use_dvc].dst_addr;
++
++ dev_dbg(dev, "dma%d addr - src : %x / dst : %x\n",
++ id, cfg->src_addr, cfg->dst_addr);
++}
++
++/*
+ * Gen2
+ */
+
+diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
+index 344f9415e669..39d98af5ee05 100644
+--- a/sound/soc/sh/rcar/rsnd.h
++++ b/sound/soc/sh/rcar/rsnd.h
+@@ -281,6 +281,11 @@ int rsnd_gen_probe(struct platform_device *pdev,
+ void __iomem *rsnd_gen_reg_get(struct rsnd_priv *priv,
+ struct rsnd_mod *mod,
+ enum rsnd_reg reg);
++void rsnd_gen_dma_addr(struct rsnd_priv *priv,
++ struct rsnd_dma *dma,
++ struct dma_slave_config *cfg,
++ int is_play, int slave_id);
++
+ #define rsnd_is_gen1(s) (((s)->info->flags & RSND_GEN_MASK) == RSND_GEN1)
+ #define rsnd_is_gen2(s) (((s)->info->flags & RSND_GEN_MASK) == RSND_GEN2)
+
+--
+2.1.2
+
--- /dev/null
+From 1b4f4d85fa2a5c943ef1b6ad607a13130a49f21d Mon Sep 17 00:00:00 2001
+From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Date: Tue, 10 Jun 2014 23:41:03 -0700
+Subject: ASoC: rsnd: fixup index of src/dst mod when capture
+
+Index of dma name should use -1, not +1 when capture case.
+Thank you Dan.
+
+Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
+Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+(cherry picked from commit 4cf612780cec81317a0278b28679a8b69ea8f09c)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ sound/soc/sh/rcar/core.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
+index 91880156e1ae..4e86265f625c 100644
+--- a/sound/soc/sh/rcar/core.c
++++ b/sound/soc/sh/rcar/core.c
+@@ -315,7 +315,7 @@ static void rsnd_dma_of_name(struct rsnd_dma *dma,
+ dst_mod = mod[index];
+ } else {
+ src_mod = mod[index];
+- dst_mod = mod[index + 1];
++ dst_mod = mod[index - 1];
+ }
+
+ index = 0;
+--
+2.1.2
+
--- /dev/null
+From 2c3dae4e793325fda02053478bbe527d2b43c1df Mon Sep 17 00:00:00 2001
+From: Gregory CLEMENT <gregory.clement@free-electrons.com>
+Date: Thu, 15 May 2014 12:17:34 +0200
+Subject: Documentation: dt-bindings: update xhci-platform DT binding
+
+This commit extends the compatible string list of the xhci-platform
+binding with the new "armada-375-xhci" and "armada-380-xhci"
+compatible strings. It is used to describe the XHCI controller which
+is available in the Armada 375 and 38x SoCs.
+
+It also indicates that an optional 'clocks' property is now supported.
+
+Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
+Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit 023bfe83e278dca17abc491f8e1182211edb0559)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/usb/usb-xhci.txt | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+diff --git a/Documentation/devicetree/bindings/usb/usb-xhci.txt b/Documentation/devicetree/bindings/usb/usb-xhci.txt
+index 90f8f607d125..999be5ca901c 100644
+--- a/Documentation/devicetree/bindings/usb/usb-xhci.txt
++++ b/Documentation/devicetree/bindings/usb/usb-xhci.txt
+@@ -1,11 +1,16 @@
+ USB xHCI controllers
+
+ Required properties:
+- - compatible: should be "generic-xhci" (deprecated: "xhci-platform").
++ - compatible: should be one of "generic-xhci",
++ "marvell,armada-375-xhci", "marvell,armada-380-xhci" (deprecated:
++ "xhci-platform").
+ - reg: should contain address and length of the standard XHCI
+ register set for the device.
+ - interrupts: one XHCI interrupt should be described here.
+
++Optional property:
++ - clocks: reference to a clock
++
+ Example:
+ usb@f0931000 {
+ compatible = "generic-xhci";
+--
+2.1.2
+
--- /dev/null
+From 07910224660c07df5647e72c250cb4062f2840f1 Mon Sep 17 00:00:00 2001
+From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Date: Wed, 28 May 2014 20:23:26 +0900
+Subject: Documentation: dt-bindings: update xhci-platform DT binding for R-Car
+ H2 and M2
+
+This commit extends the compatible string list of the xhci-platform
+binding with the new "renesas,xhci-r8a7790" and "renesas,xhci-r8a7791"
+compatible strings. It is used to describe the xHCI controller which
+is available in the R-Car H2 and M2 SoCs.
+
+Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+(cherry picked from commit c7c1ce8061c0dc5b848e5df0ba459dbbf78057d7)
+Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
+---
+ Documentation/devicetree/bindings/usb/usb-xhci.txt | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/Documentation/devicetree/bindings/usb/usb-xhci.txt
++++ b/Documentation/devicetree/bindings/usb/usb-xhci.txt
+@@ -2,7 +2,8 @@ USB xHCI controllers
+
+ Required properties:
+ - compatible: should be one of "generic-xhci",
+- "marvell,armada-375-xhci", "marvell,armada-380-xhci" (deprecated:
++ "marvell,armada-375-xhci", "marvell,armada-380-xhci",
++ "renesas,xhci-r8a7790", "renesas,xhci-r8a7791" (deprecated:
+ "xhci-platform").
+ - reg: should contain address and length of the standard XHCI
+ register set for the device.
patches.renesas/0363-xhci-platform-Change-compatible-string-from-xhci-pla.patch
patches.renesas/0364-ASoC-rcar-subnode-tidyup-for-renesas-rsnd.txt.patch
patches.renesas/0365-ARM-shmobile-r8a7790-Correct-SYS-DMAC-clock-defines.patch
+patches.renesas/0366-media-v4l-vsp1-Remove-unexisting-rt-clocks.patch
+patches.renesas/0367-media-v4l-vsp1-uds-Enable-scaling-of-alpha-layer.patch
+patches.renesas/0368-media-v4l-vsp1-Support-multi-input-entities.patch
+patches.renesas/0369-media-v4l-vsp1-Add-BRU-support.patch
+patches.renesas/0370-media-v4l-vsp1-Add-DT-support.patch
+patches.renesas/0371-ASoC-ak4642-Add-ALC-controls.patch
+patches.renesas/0372-ASoC-ak4642-Add-driver-data-and-driver-private-struc.patch
+patches.renesas/0373-ASoC-ak4642-Add-support-for-extended-sysclk-frequenc.patch
+patches.renesas/0374-gpio-rcar-Add-optional-functional-clock-to-bindings.patch
+patches.renesas/0375-gpio-rcar-Add-minimal-runtime-PM-support.patch
+patches.renesas/0376-gpio-rcar-remove-unnecessary-OOM-messages.patch
+patches.renesas/0377-i2c-rcar-add-compatibles-for-additional-SoC.patch
+patches.renesas/0378-i2c-rcar-not-everything-needs-to-be-a-function.patch
+patches.renesas/0379-i2c-rcar-no-need-to-store-irq-number.patch
+patches.renesas/0380-i2c-rcar-refactor-bus-state-machine.patch
+patches.renesas/0381-i2c-rcar-refactor-irq-state-machine.patch
+patches.renesas/0382-i2c-rcar-check-bus-free-before-first-message.patch
+patches.renesas/0383-i2c-rcar-refactor-setting-up-msg.patch
+patches.renesas/0384-i2c-rcar-refactor-status-bit-handling.patch
+patches.renesas/0385-i2c-rcar-remove-spinlock.patch
+patches.renesas/0386-i2c-rcar-reuse-status-bits-as-enable-bits.patch
+patches.renesas/0387-i2c-rcar-janitorial-cleanup-after-refactoring.patch
+patches.renesas/0388-i2c-rcar-update-copyright-and-license-information.patch
+patches.renesas/0389-i2c-remove-unnecessary-OOM-messages.patch
+patches.renesas/0390-i2c-sh_mobile-replace-magic-hex-values-with-constant.patch
+patches.renesas/0391-i2c-sh_mobile-improve-error-handling.patch
+patches.renesas/0392-i2c-sh_mobile-honor-DT-bus-speed-settings.patch
+patches.renesas/0393-i2c-sh_mobile-devm-conversion-low-hanging-fruits.patch
+patches.renesas/0394-i2c-sh_mobile-devm-conversion-irq-setup.patch
+patches.renesas/0395-i2c-sh_mobile-remove-superfluous-offset-parameter.patch
+patches.renesas/0396-i2c-sh_mobile-bail-out-on-errors-when-initializing.patch
+patches.renesas/0397-i2c-sh_mobile-check-timing-parameters-for-valid-rang.patch
+patches.renesas/0398-i2c-sh_mobile-fix-clock-calculation-for-newer-SoCs.patch
+patches.renesas/0399-i2c-sh_mobile-add-compatibles-for-additional-SoC.patch
+patches.renesas/0400-pinctrl-allows-not-to-define-the-get_group_pins-oper.patch
+patches.renesas/0401-pinctrl-pinconf-generic-Use-kmemdup-instead-of-kmall.patch
+patches.renesas/0402-pinctrl-Enable-power-source-to-be-extracted-from-DT-.patch
+patches.renesas/0403-thermal-rcar-Use-pm_runtime_put-i.s.o.-pm_runtime_pu.patch
+patches.renesas/0404-thermal-rcar-remove-unnecessary-OOM-messages.patch
+patches.renesas/0405-ata-use-CONFIG_PM_SLEEP-instead-of-CONFIG_PM-where-a.patch
+patches.renesas/0406-clocksource-sh_cmt-Use-request_irq-instead-of-setup_.patch
+patches.renesas/0407-clocksource-sh_cmt-Split-channel-fields-from-sh_cmt_.patch
+patches.renesas/0408-clocksource-sh_cmt-Rename-struct-sh_cmt_priv-to-sh_c.patch
+patches.renesas/0409-clocksource-sh_cmt-Split-channel-setup-to-separate-f.patch
+patches.renesas/0410-clocksource-sh_cmt-Constify-name-argument-to-sh_cmt_.patch
+patches.renesas/0411-clocksource-sh_cmt-Rename-mapbase-mapbase_str-to-map.patch
+patches.renesas/0412-clocksource-sh_cmt-Add-memory-base-to-sh_cmt_channel.patch
+patches.renesas/0413-clocksource-sh_cmt-Add-index-to-struct-sh_cmt_channe.patch
+patches.renesas/0414-clocksource-sh_cmt-Replace-kmalloc-memset-with-kzall.patch
+patches.renesas/0415-clocksource-sh_cmt-Allocate-channels-dynamically.patch
+patches.renesas/0416-clocksource-sh_cmt-Split-static-information-from-sh_.patch
+patches.renesas/0417-clocksource-sh_cmt-Replace-hardcoded-register-values.patch
+patches.renesas/0418-clocksource-sh_cmt-Set-cpumask-to-cpu_possible_mask.patch
+patches.renesas/0419-clocksource-sh_cmt-Hardcode-CMT-clock-event-rating-t.patch
+patches.renesas/0420-clocksource-sh_cmt-Hardcode-CMT-clock-source-rating-.patch
+patches.renesas/0421-clocksource-sh_cmt-Add-support-for-multiple-channels.patch
+patches.renesas/0422-clocksource-sh_cmt-Rename-clock-to-fck-in-the-non-le.patch
+patches.renesas/0423-clocksource-sh_cmt-Remove-FSF-mail-address-from-GPL-.patch
+patches.renesas/0424-clocksource-sh_cmt-Sort-headers-alphabetically.patch
+patches.renesas/0425-clocksource-sh_cmt-Request-IRQ-for-clock-event-devic.patch
+patches.renesas/0426-clocksource-sh_cmt-Remove-unnecessary-OOM-messages.patch
+patches.renesas/0427-clocksource-sh_mtu2-Use-request_irq-instead-of-setup.patch
+patches.renesas/0428-clocksource-sh_mtu2-Turn-sh_mtu2_priv-fields-into-lo.patch
+patches.renesas/0429-clocksource-sh_mtu2-Split-channel-fields-from-sh_mtu.patch
+patches.renesas/0430-clocksource-sh_mtu2-Rename-struct-sh_mtu2_priv-to-sh.patch
+patches.renesas/0431-clocksource-sh_mtu2-Split-channel-setup-to-separate-.patch
+patches.renesas/0432-clocksource-sh_mtu2-Constify-name-argument-to-sh_mtu.patch
+patches.renesas/0433-clocksource-sh_mtu2-Add-memory-base-to-sh_mtu2_chann.patch
+patches.renesas/0434-clocksource-sh_mtu2-Add-index-to-struct-sh_mtu2_chan.patch
+patches.renesas/0435-clocksource-sh_mtu2-Replace-kmalloc-memset-with-kzal.patch
+patches.renesas/0436-clocksource-sh_mtu2-Allocate-channels-dynamically.patch
+patches.renesas/0437-clocksource-sh_mtu2-Replace-hardcoded-register-value.patch
+patches.renesas/0438-clocksource-sh_mtu2-Set-cpumask-to-cpu_possible_mask.patch
+patches.renesas/0439-clocksource-sh_mtu2-Hardcode-MTU2-clock-event-rating.patch
+patches.renesas/0440-clocksource-sh_mtu2-Add-support-for-multiple-channel.patch
+patches.renesas/0441-clocksource-sh_mtu2-Rename-clock-to-fck-in-the-non-l.patch
+patches.renesas/0442-clocksource-sh_mtu2-Remove-FSF-mail-address-from-GPL.patch
+patches.renesas/0443-clocksource-sh_mtu2-Sort-headers-alphabetically.patch
+patches.renesas/0444-clocksource-sh_mtu2-Remove-unnecessary-OOM-messages.patch
+patches.renesas/0445-pinctrl-sh-pfc-r8a7791-Split-the-DU-sync-and-cde-dis.patch
+patches.renesas/0446-sh-pfc-r8a7791-Add-SSI-pin-support.patch
+patches.renesas/0447-sh-pfc-r8a7791-Add-Audio-pin-support.patch
+patches.renesas/0448-pinctrl-pfc-r8a7790-add-i2c0-muxing.patch
+patches.renesas/0449-pinctrl-pfc-r8a7790-add-mux-data-for-IIC-B-cores.patch
+patches.renesas/0450-pinctrl-sh-pfc-Don-t-set-the-pinmux_irq-irq-field-fo.patch
+patches.renesas/0451-pinctrl-sh-pfc-r8a7740-Allow-Multiplatform-Build.patch
+patches.renesas/0452-pinctrl-sh-pfc-sh73a0-Allow-Multiplatform-Build.patch
+patches.renesas/0453-pinctrl-sh-pfc-r8a73a4-Allow-Multiplatform-Build.patch
+patches.renesas/0454-serial-sh-sci-Add-device-tree-support-for-r8a7779.patch
+patches.renesas/0455-Revert-serial-sh-sci-Add-device-tree-support-for-r8a.patch
+patches.renesas/0456-serial-sh-sci-Add-device-tree-support-for-r8a7779.patch
+patches.renesas/0457-mmc-clarify-DDR-timing-mode-between-SD-UHS-and-eMMC.patch
+patches.renesas/0458-mmc-sh_mmcif-clarify-DDR-timing-mode-between-SD-UHS-.patch
+patches.renesas/0459-cpufreq-Introduce-macros-for-cpufreq_frequency_table.patch
+patches.renesas/0460-cpufreq-Fix-build-error-on-some-platforms-that-use-c.patch
+patches.renesas/0461-sh-clk-Use-cpufreq_for_each_valid_entry-macro-for-it.patch
+patches.renesas/0462-sh-intc-Remove-pointless-irq_reserve_irqs-invocation.patch
+patches.renesas/0463-drivers-sh-pm_runtime-does-not-need-idle-callback.patch
+patches.renesas/0464-drivers-sh-Restrict-INTC_USERIMASK-to-SH4A.patch
+patches.renesas/0465-drivers-sh-pm_runtime-implementation-needs-to-suspen.patch
+patches.renesas/0466-drivers-sh-Enable-PM-runtime-for-new-R-Car-Gen2-SoCs.patch
+patches.renesas/0467-spi-rspi-Round-up-division-to-avoid-slave-overclocki.patch
+patches.renesas/0468-spi-rspi-Extract-rspi_wait_for_-tx_empty-rx_full.patch
+patches.renesas/0469-spi-rspi-Do-not-call-rspi_receive_init-for-TX-only.patch
+patches.renesas/0470-spi-rspi-Remove-unused-16-bit-DMA-support.patch
+patches.renesas/0471-spi-rspi-Use-core-SPI_MASTER_MUST_-RT-X-handling.patch
+patches.renesas/0472-spi-rspi-Extract-rspi_pio_transfer.patch
+patches.renesas/0473-spi-rspi-Don-t-consider-DMA-configuration-failures-f.patch
+patches.renesas/0474-spi-rspi-Extract-rspi_request_dma_chan.patch
+patches.renesas/0475-spi-rspi-Remove-unneeded-resource-test-in-DMA-setup.patch
+patches.renesas/0476-spi-rspi-SPI-DMA-core-needs-both-RX-and-TX-DMA-to-fu.patch
+patches.renesas/0477-spi-rspi-Use-SPI-core-DMA-mapping-framework.patch
+patches.renesas/0478-spi-rspi-Move-RSPI-specific-setup-out-of-DMA-routine.patch
+patches.renesas/0479-spi-rspi-Pass-sg_tables-instead-of-spi_tranfer-to-rs.patch
+patches.renesas/0480-spi-rspi-Merge-rspi_-_dma-into-rspi_dma_transfer.patch
+patches.renesas/0481-spi-rspi-Absorb-rspi_rz_transfer_out_in-into-rspi_rz.patch
+patches.renesas/0482-spi-rspi-Add-DMA-support-for-QSPI-on-R-Car-Gen2.patch
+patches.renesas/0483-spi-rspi-Add-DMA-support-for-RSPI-on-RZ-A1H.patch
+patches.renesas/0484-spi-rspi-Extract-rspi_common_transfer.patch
+patches.renesas/0485-ASoC-ak4642-Fix-typo-zoro-zero.patch
+patches.renesas/0486-pwm-add-period-and-polarity-to-struct-pwm_lookup.patch
+patches.renesas/0487-usb-renesas-gadget-fixup-complete-STATUS-stage-after.patch
+patches.renesas/0488-sh_eth-replace-devm_kzalloc-with-devm_kmalloc_array.patch
+patches.renesas/0489-net-sh_eth-Fix-receive-packet-exceeded-condition-in-.patch
+patches.renesas/0490-net-sh_eth-Fix-timing-of-RACT-setting-in-sh_eth_rx.patch
+patches.renesas/0491-PCI-rcar-Add-Renesas-R-Car-PCIe-driver.patch
+patches.renesas/0492-PCI-rcar-Add-MSI-support-for-PCIe.patch
+patches.renesas/0493-PCI-rcar-Add-R-Car-PCIe-device-tree-bindings.patch
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#############################################################################
projects / platform / kernel / linux-stable.git / commitdiff