ARM: dts: exynos: correct PMIC interrupt trigger level on Arndale Octa
authorKrzysztof Kozlowski <krzk@kernel.org>
Thu, 10 Dec 2020 21:28:59 +0000 (22:28 +0100)
committerKrzysztof Kozlowski <krzk@kernel.org>
Tue, 29 Dec 2020 15:44:47 +0000 (16:44 +0100)
The Samsung PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  The falling edge
interrupt will mostly work but it's not correct.

Fixes: 1fed2252713e ("ARM: dts: fix pinctrl for s2mps11-irq on exynos5420-arndale-octa")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20201210212903.216728-5-krzk@kernel.org
arch/arm/boot/dts/exynos5420-arndale-octa.dts

index bf457d0..1aad485 100644 (file)
                reg = <0x66>;
 
                interrupt-parent = <&gpx3>;
-               interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
+               interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
                pinctrl-names = "default";
                pinctrl-0 = <&s2mps11_irq>;