ARM: align .data section

Robert Jarzmik reports that his PXA25x system fails to boot with 4.12,
failing at __flush_whole_cache in arch/arm/mm/proc-xscale.S:215:

   0xc0019e20 <+0>:     ldr     r1, [pc, #788]
   0xc0019e24 <+4>:     ldr     r0, [r1]	<== here

with r1 containing 0xc06f82cd, which is the address of "clean_addr".
Examination of the System.map shows:

c06f22c8 D user_pmd_table
c06f22cc d __warned.19178
c06f22cd d clean_addr

indicating that a .data.unlikely section has appeared just before the
.data section from proc-xscale.S.  According to objdump -h, it appears
that our assembly files default their .data alignment to 2**0, which
is bad news if the preceding .data section size is not power-of-2
aligned at link time.

Add the appropriate .align directives to all assembly files in arch/arm
that are missing them where we require an appropriate alignment.

Reported-by: Robert Jarzmik <robert.jarzmik@free.fr>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>

diff --git a/arch/arm/include/debug/omap2plus.S b/arch/arm/include/debug/omap2plus.S
index 6d867ae..78e7e58 100644 (file)
--- a/arch/arm/include/debug/omap2plus.S
+++ b/arch/arm/include/debug/omap2plus.S
@@ -59,6 +59,7 @@
 #define UART_OFFSET(addr)      ((addr) & 0x00ffffff)
 
                .pushsection .data
+               .align  2
 omap_uart_phys:        .word   0
 omap_uart_virt:        .word   0
 omap_uart_lsr: .word   0

diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 9f157e7..4c0b9e5 100644 (file)
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -721,6 +721,7 @@ do_fpe:
  */
 
        .pushsection .data
+       .align  2
 ENTRY(fp_enter)
        .word   no_fp
        .popsection
@@ -1221,6 +1222,7 @@ vector_addrexcptn:
        W(b)    vector_fiq
 
        .data
+       .align  2
 
        .globl  cr_alignment
 cr_alignment:

diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 04286fd..6b1148c 100644 (file)
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -556,6 +556,7 @@ ENDPROC(__fixup_smp)
        .word   __smpalt_end
 
        .pushsection .data
+       .align  2
        .globl  smp_on_up
 smp_on_up:
        ALT_SMP(.long   1)
@@ -716,6 +717,7 @@ ENTRY(fixup_pv_table)
 ENDPROC(fixup_pv_table)
 
        .data
+       .align  2
        .globl  __pv_phys_pfn_offset
        .type   __pv_phys_pfn_offset, %object
 __pv_phys_pfn_offset:

diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S
index ec7e737..60146e3 100644 (file)
--- a/arch/arm/kernel/hyp-stub.S
+++ b/arch/arm/kernel/hyp-stub.S
@@ -31,6 +31,7 @@
  * zeroing of .bss would clobber it.
  */
 .data
+       .align  2
 ENTRY(__boot_cpu_mode)
        .long   0
 .text

diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S
index 49fadbd..81cd4d4 100644 (file)
--- a/arch/arm/kernel/iwmmxt.S
+++ b/arch/arm/kernel/iwmmxt.S
@@ -367,6 +367,7 @@ ENTRY(iwmmxt_task_release)
 ENDPROC(iwmmxt_task_release)
 
        .data
+       .align  2
 concan_owner:
        .word   0
 

diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S
index 0f6c100..9f08d21 100644 (file)
--- a/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@ -171,6 +171,7 @@ mpidr_hash_ptr:
        .long   mpidr_hash - .                  @ mpidr_hash struct offset
 
        .data
+       .align  2
        .type   sleep_save_sp, #object
 ENTRY(sleep_save_sp)
        .space  SLEEP_SAVE_SP_SZ                @ struct sleep_save_sp

diff --git a/arch/arm/mach-exynos/sleep.S b/arch/arm/mach-exynos/sleep.S
index cf95079..4292cae 100644 (file)
--- a/arch/arm/mach-exynos/sleep.S
+++ b/arch/arm/mach-exynos/sleep.S
@@ -124,6 +124,7 @@ _cp15_save_diag:
 #endif /* CONFIG_CACHE_L2X0 */
 
        .data
+       .align  2
        .globl cp15_save_diag
 cp15_save_diag:
        .long   0       @ cp15 diagnostic

diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 1b9f052..fa5fd24 100644 (file)
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -530,10 +530,12 @@ l2dis_3630_offset:
        .long   l2dis_3630 - .
 
        .data
+       .align  2
 l2dis_3630:
        .word   0
 
        .data
+       .align  2
 l2_inv_api_params:
        .word   0x1, 0x00
 

diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S
index c7a3b4a..56dfa2d 100644 (file)
--- a/arch/arm/mach-omap2/sleep44xx.S
+++ b/arch/arm/mach-omap2/sleep44xx.S
@@ -385,6 +385,7 @@ ppa_zero_params_offset:
 ENDPROC(omap_do_wfi)
 
        .data
+       .align  2
 ppa_zero_params:
        .word           0
 

diff --git a/arch/arm/mach-pxa/mioa701_bootresume.S b/arch/arm/mach-pxa/mioa701_bootresume.S
index 8159149..42d93f4 100644 (file)
--- a/arch/arm/mach-pxa/mioa701_bootresume.S
+++ b/arch/arm/mach-pxa/mioa701_bootresume.S
@@ -16,6 +16,7 @@
  *       insist on it to be truly read-only.
  */
        .data
+       .align  2
 ENTRY(mioa701_bootstrap)
 0:
        b       1f
@@ -34,4 +35,5 @@ ENTRY(mioa701_jumpaddr)
 
 ENTRY(mioa701_bootstrap_lg)
        .data
+       .align  2
        .word   2b-0b

diff --git a/arch/arm/mach-rockchip/sleep.S b/arch/arm/mach-rockchip/sleep.S
index 2eec9a3..9927f06 100644 (file)
--- a/arch/arm/mach-rockchip/sleep.S
+++ b/arch/arm/mach-rockchip/sleep.S
@@ -23,7 +23,7 @@
  * ddr to sram for system resumeing.
  * so it is ".data section".
  */
-.align
+       .align  2
 
 ENTRY(rockchip_slp_cpu_resume)
        setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1  @ set svc, irqs off

diff --git a/arch/arm/mm/cache-v4wb.S b/arch/arm/mm/cache-v4wb.S
index 2522f8c..a5084ec 100644 (file)
--- a/arch/arm/mm/cache-v4wb.S
+++ b/arch/arm/mm/cache-v4wb.S
@@ -47,6 +47,7 @@
 #define CACHE_DLIMIT   (CACHE_DSIZE * 4)
 
        .data
+       .align  2
 flush_base:
        .long   FLUSH_BASE
        .text

diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index b6bbfdb..3d75b79 100644 (file)
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -104,6 +104,7 @@
        .endm
 
        .data
+       .align  2
 clean_addr:    .word   CLEAN_ADDR
 
        .text