MIPS: Fix '[turbofan] Add CalleeSavedFPRegisters to CallDescriptor.'

Fixes debug mode assertions.

TEST=cctest/test-run-machops/RunChangeUint32ToFloat64_B
BUG=

Review URL: https://codereview.chromium.org/1211143003

Cr-Commit-Position: refs/heads/master@{#29420}

diff --git a/src/compiler/mips/code-generator-mips.cc b/src/compiler/mips/code-generator-mips.cc
index 8bb47ef..a7806cc 100644 (file)
--- a/src/compiler/mips/code-generator-mips.cc
+++ b/src/compiler/mips/code-generator-mips.cc
@@ -1082,7 +1082,9 @@ void CodeGenerator::AssemblePrologue() {
     const RegList saves = descriptor->CalleeSavedRegisters();
     // Save callee-saved registers.
     __ MultiPush(saves);
-    DCHECK(kNumCalleeSaved == base::bits::CountPopulation32(saves));
+    // kNumCalleeSaved includes the fp register, but the fp register
+    // is saved separately in TF.
+    DCHECK(kNumCalleeSaved == base::bits::CountPopulation32(saves) + 1);
     int register_save_area_size = kNumCalleeSaved * kPointerSize;
 
     const RegList saves_fpu = descriptor->CalleeSavedFPRegisters();

diff --git a/src/compiler/mips64/code-generator-mips64.cc b/src/compiler/mips64/code-generator-mips64.cc
index cb465f2..534ebfb 100644 (file)
--- a/src/compiler/mips64/code-generator-mips64.cc
+++ b/src/compiler/mips64/code-generator-mips64.cc
@@ -1155,7 +1155,9 @@ void CodeGenerator::AssemblePrologue() {
     const RegList saves = descriptor->CalleeSavedRegisters();
     // Save callee-saved registers.
     __ MultiPush(saves);
-    DCHECK(kNumCalleeSaved == base::bits::CountPopulation32(saves));
+    // kNumCalleeSaved includes the fp register, but the fp register
+    // is saved separately in TF.
+    DCHECK(kNumCalleeSaved == base::bits::CountPopulation32(saves) + 1);
     int register_save_area_size = kNumCalleeSaved * kPointerSize;
 
     const RegList saves_fpu = descriptor->CalleeSavedFPRegisters();