* config/fr30/fr30.h (PREDICATE_CODES): Remove
fp_displacement_operand, sp_displacement_operand.
+ * config/m68hc11/m68hc11-protos.h: Add a prototype for
+ m68hcc_auto_inc_p.
+ Remove the prototypes for tst_operand, cmp_operand,
+ stack_register_operand, d_register_operand,
+ hard_addr_reg_operand, splitable_operand,
+ m68hc11_logical_operator, m68hc11_arith_operator,
+ m68hc11_non_shift_operator, m68hc11_shift_operator,
+ m68hc11_unary_operator, m68hc11_eq_compare_operator,
+ non_push_operand, hard_reg_operand, and
+ reg_or_some_mem_operand.
+ * config/m68hc11/m68hc11.c (m68hcc_auto_inc_p): Make it
+ extern.
+ (tst_operand, cmp_operand, non_push_operand,
+ splitable_operand, reg_or_some_mem_operand,
+ stack_register_operand, d_register_operand,
+ hard_addr_reg_operand, hard_reg_operand,
+ m68hc11_eq_compare_operator, m68hc11_logical_operator,
+ m68hc11_arith_operator, m68hc11_non_shift_operator,
+ m68hc11_shift_operator, m68hc11_unary_operator): Move to
+ predicates.md.
+ * config/m68hc11/m68hc11.h (PREDICATE_CODES): Remove.
+ * config/m68hc11/m68hc11.md: Include predicates.md.
+ * config/m68hc11/predicates.md: New.
+
2005-04-02 Alexandre Oliva <aoliva@redhat.com>
PR debug/19345
/* Prototypes for exported functions defined in m68hc11.c
- Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
+ Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ Free Software Foundation, Inc.
Contributed by Stephane Carrez (stcarrez@nerim.fr)
This file is part of GCC.
#endif
#ifdef RTX_CODE
+extern int m68hc11_auto_inc_p (rtx);
+
extern void m68hc11_initialize_trampoline (rtx, rtx, rtx);
extern rtx m68hc11_expand_compare_and_branch (enum rtx_code, rtx, rtx, rtx);
extern int go_if_legitimate_address2 (rtx, enum machine_mode, int);
extern int reg_or_indexed_operand (rtx,enum machine_mode);
-extern int tst_operand (rtx,enum machine_mode);
-extern int cmp_operand (rtx,enum machine_mode);
extern int memory_indexed_operand (rtx, enum machine_mode);
extern void m68hc11_split_logical (enum machine_mode, int, rtx*);
extern int symbolic_memory_operand (rtx, enum machine_mode);
extern int memory_reload_operand (rtx, enum machine_mode);
-extern int stack_register_operand (rtx, enum machine_mode);
-extern int d_register_operand (rtx, enum machine_mode);
-extern int hard_addr_reg_operand (rtx, enum machine_mode);
-extern int splitable_operand (rtx, enum machine_mode);
extern int arith_src_operand (rtx, enum machine_mode);
-extern int m68hc11_logical_operator (rtx, enum machine_mode);
-extern int m68hc11_arith_operator (rtx, enum machine_mode);
-extern int m68hc11_non_shift_operator (rtx, enum machine_mode);
-extern int m68hc11_shift_operator (rtx, enum machine_mode);
-extern int m68hc11_unary_operator (rtx, enum machine_mode);
-extern int m68hc11_eq_compare_operator (rtx, enum machine_mode);
-extern int non_push_operand (rtx, enum machine_mode);
-extern int hard_reg_operand (rtx, enum machine_mode);
extern int soft_reg_operand (rtx, enum machine_mode);
-extern int reg_or_some_mem_operand (rtx, enum machine_mode);
#if defined TREE_CODE
extern void m68hc11_init_cumulative_args (CUMULATIVE_ARGS*, tree, rtx);
static int m68hc11_shift_cost (enum machine_mode, rtx, int);
static int m68hc11_rtx_costs_1 (rtx, enum rtx_code, enum rtx_code);
static bool m68hc11_rtx_costs (rtx, int, int, int *);
-static int m68hc11_auto_inc_p (rtx);
static tree m68hc11_handle_fntype_attribute (tree *, tree, tree, int, bool *);
const struct attribute_spec m68hc11_attribute_table[];
/* Returns true if X is a PRE/POST increment decrement
(same as auto_inc_p() in rtlanal.c but do not take into
account the stack). */
-static int
+int
m68hc11_auto_inc_p (rtx x)
{
return GET_CODE (x) == PRE_DEC
}
int
-tst_operand (rtx operand, enum machine_mode mode)
-{
- if (GET_CODE (operand) == MEM && reload_completed == 0)
- {
- rtx addr = XEXP (operand, 0);
- if (m68hc11_auto_inc_p (addr))
- return 0;
- }
- return nonimmediate_operand (operand, mode);
-}
-
-int
-cmp_operand (rtx operand, enum machine_mode mode)
-{
- if (GET_CODE (operand) == MEM)
- {
- rtx addr = XEXP (operand, 0);
- if (m68hc11_auto_inc_p (addr))
- return 0;
- }
- return general_operand (operand, mode);
-}
-
-int
-non_push_operand (rtx operand, enum machine_mode mode)
-{
- if (general_operand (operand, mode) == 0)
- return 0;
-
- if (push_operand (operand, mode) == 1)
- return 0;
- return 1;
-}
-
-int
-splitable_operand (rtx operand, enum machine_mode mode)
-{
- if (general_operand (operand, mode) == 0)
- return 0;
-
- if (push_operand (operand, mode) == 1)
- return 0;
-
- /* Reject a (MEM (MEM X)) because the patterns that use non_push_operand
- need to split such addresses to access the low and high part but it
- is not possible to express a valid address for the low part. */
- if (mode != QImode && GET_CODE (operand) == MEM
- && GET_CODE (XEXP (operand, 0)) == MEM)
- return 0;
- return 1;
-}
-
-int
-reg_or_some_mem_operand (rtx operand, enum machine_mode mode)
-{
- if (GET_CODE (operand) == MEM)
- {
- rtx op = XEXP (operand, 0);
-
- if (symbolic_memory_operand (op, mode))
- return 1;
-
- if (IS_STACK_PUSH (operand))
- return 1;
-
- if (m68hc11_register_indirect_p (operand, mode))
- return 1;
-
- return 0;
- }
-
- return register_operand (operand, mode);
-}
-
-int
m68hc11_symbolic_p (rtx operand, enum machine_mode mode)
{
if (GET_CODE (operand) == MEM)
}
int
-stack_register_operand (rtx operand, enum machine_mode mode ATTRIBUTE_UNUSED)
-{
- return SP_REG_P (operand);
-}
-
-int
-d_register_operand (rtx operand, enum machine_mode mode)
-{
- if (GET_MODE (operand) != mode && mode != VOIDmode)
- return 0;
-
- if (GET_CODE (operand) == SUBREG)
- operand = XEXP (operand, 0);
-
- return GET_CODE (operand) == REG
- && (REGNO (operand) >= FIRST_PSEUDO_REGISTER
- || REGNO (operand) == HARD_D_REGNUM
- || (mode == QImode && REGNO (operand) == HARD_B_REGNUM));
-}
-
-int
-hard_addr_reg_operand (rtx operand, enum machine_mode mode)
-{
- if (GET_MODE (operand) != mode && mode != VOIDmode)
- return 0;
-
- if (GET_CODE (operand) == SUBREG)
- operand = XEXP (operand, 0);
-
- return GET_CODE (operand) == REG
- && (REGNO (operand) == HARD_X_REGNUM
- || REGNO (operand) == HARD_Y_REGNUM
- || REGNO (operand) == HARD_Z_REGNUM);
-}
-
-int
-hard_reg_operand (rtx operand, enum machine_mode mode)
-{
- if (GET_MODE (operand) != mode && mode != VOIDmode)
- return 0;
-
- if (GET_CODE (operand) == SUBREG)
- operand = XEXP (operand, 0);
-
- return GET_CODE (operand) == REG
- && (REGNO (operand) >= FIRST_PSEUDO_REGISTER
- || H_REGNO_P (REGNO (operand)));
-}
-
-int
memory_indexed_operand (rtx operand, enum machine_mode mode ATTRIBUTE_UNUSED)
{
if (GET_CODE (operand) != MEM)
return 0;
}
}
-
-int
-m68hc11_eq_compare_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
-{
- return GET_CODE (op) == EQ || GET_CODE (op) == NE;
-}
-
-int
-m68hc11_logical_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
-{
- return GET_CODE (op) == AND || GET_CODE (op) == IOR || GET_CODE (op) == XOR;
-}
-
-int
-m68hc11_arith_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
-{
- return GET_CODE (op) == AND || GET_CODE (op) == IOR || GET_CODE (op) == XOR
- || GET_CODE (op) == PLUS || GET_CODE (op) == MINUS
- || GET_CODE (op) == ASHIFT || GET_CODE (op) == ASHIFTRT
- || GET_CODE (op) == LSHIFTRT || GET_CODE (op) == ROTATE
- || GET_CODE (op) == ROTATERT;
-}
-
-int
-m68hc11_non_shift_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
-{
- return GET_CODE (op) == AND || GET_CODE (op) == IOR || GET_CODE (op) == XOR
- || GET_CODE (op) == PLUS || GET_CODE (op) == MINUS;
-}
-
-/* Return true if op is a shift operator. */
-int
-m68hc11_shift_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
-{
- return GET_CODE (op) == ROTATE || GET_CODE (op) == ROTATERT
- || GET_CODE (op) == LSHIFTRT || GET_CODE (op) == ASHIFT
- || GET_CODE (op) == ASHIFTRT;
-}
-
-int
-m68hc11_unary_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
-{
- return GET_CODE (op) == NEG || GET_CODE (op) == NOT
- || GET_CODE (op) == SIGN_EXTEND || GET_CODE (op) == ZERO_EXTEND;
-}
\f
/* Emit the code to build the trampoline used to call a nested function.
/* Definitions of target machine for GNU compiler.
Motorola 68HC11 and 68HC12.
- Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
+ Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
+ Free Software Foundation, Inc.
Contributed by Stephane Carrez (stcarrez@nerim.fr)
This file is part of GCC.
\f
/* Miscellaneous Parameters. */
-/* Define the codes that are matched by predicates in m68hc11.c. */
-#define PREDICATE_CODES \
-{"stack_register_operand", {SUBREG, REG}}, \
-{"d_register_operand", {SUBREG, REG}}, \
-{"hard_addr_reg_operand", {SUBREG, REG}}, \
-{"hard_reg_operand", {SUBREG, REG}}, \
-{"m68hc11_logical_operator", {AND, IOR, XOR}}, \
-{"m68hc11_arith_operator", {AND, IOR, XOR, PLUS, MINUS, \
- ASHIFT, ASHIFTRT, LSHIFTRT, \
- ROTATE, ROTATERT }}, \
-{"m68hc11_non_shift_operator", {AND, IOR, XOR, PLUS, MINUS}}, \
-{"m68hc11_unary_operator", {NEG, NOT, SIGN_EXTEND, ZERO_EXTEND}}, \
-{"m68hc11_shift_operator", {ASHIFT, ASHIFTRT, LSHIFTRT, ROTATE, ROTATERT}},\
-{"m68hc11_eq_compare_operator", {EQ, NE}}, \
-{"non_push_operand", {SUBREG, REG, MEM}}, \
-{"splitable_operand", {SUBREG, REG, MEM}}, \
-{"reg_or_some_mem_operand", {SUBREG, REG, MEM}}, \
-{"tst_operand", {SUBREG, REG, MEM}}, \
-{"cmp_operand", {SUBREG, REG, MEM, SYMBOL_REF, LABEL_REF, \
- CONST_INT, CONST_DOUBLE}},
-
/* Specify the machine mode that this machine uses
for the index in the tablejump instruction. */
#define CASE_VECTOR_MODE Pmode
;;- Machine description file for Motorola 68HC11 and 68HC12.
-;;- Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004
+;;- Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
;;- Free Software Foundation, Inc.
;;- Contributed by Stephane Carrez (stcarrez@nerim.fr)
(SOFT_XY_REGNUM 12) ; XY soft register
])
+(include "predicates.md")
+
;;--------------------------------------------------------------------
;;- Test
;;--------------------------------------------------------------------
--- /dev/null
+;; Predicate definitions for Motorola 68HC11 and 68HC12.
+;; Copyright (C) 2005 Free Software Foundation, Inc.
+;;
+;; This file is part of GCC.
+;;
+;; GCC is free software; you can redistribute it and/or modify
+;; it under the terms of the GNU General Public License as published by
+;; the Free Software Foundation; either version 2, or (at your option)
+;; any later version.
+;;
+;; GCC is distributed in the hope that it will be useful,
+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+;; GNU General Public License for more details.
+;;
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING. If not, write to
+;; the Free Software Foundation, 59 Temple Place - Suite 330,
+;; Boston, MA 02111-1307, USA.
+
+;; TODO: Add a comment here.
+
+(define_predicate "stack_register_operand"
+ (match_code "subreg,reg")
+{
+ return SP_REG_P (op);
+})
+
+;; TODO: Add a comment here.
+
+(define_predicate "d_register_operand"
+ (match_code "subreg,reg")
+{
+ if (GET_MODE (op) != mode && mode != VOIDmode)
+ return 0;
+
+ if (GET_CODE (op) == SUBREG)
+ op = XEXP (op, 0);
+
+ return GET_CODE (op) == REG
+ && (REGNO (op) >= FIRST_PSEUDO_REGISTER
+ || REGNO (op) == HARD_D_REGNUM
+ || (mode == QImode && REGNO (op) == HARD_B_REGNUM));
+})
+
+;; TODO: Add a comment here.
+
+(define_predicate "hard_addr_reg_operand"
+ (match_code "subreg,reg")
+{
+ if (GET_MODE (op) != mode && mode != VOIDmode)
+ return 0;
+
+ if (GET_CODE (op) == SUBREG)
+ op = XEXP (op, 0);
+
+ return GET_CODE (op) == REG
+ && (REGNO (op) == HARD_X_REGNUM
+ || REGNO (op) == HARD_Y_REGNUM
+ || REGNO (op) == HARD_Z_REGNUM);
+})
+
+;; TODO: Add a comment here.
+
+(define_predicate "hard_reg_operand"
+ (match_code "subreg,reg")
+{
+ if (GET_MODE (op) != mode && mode != VOIDmode)
+ return 0;
+
+ if (GET_CODE (op) == SUBREG)
+ op = XEXP (op, 0);
+
+ return GET_CODE (op) == REG
+ && (REGNO (op) >= FIRST_PSEUDO_REGISTER
+ || H_REGNO_P (REGNO (op)));
+})
+
+;; TODO: Add a comment here.
+
+(define_predicate "m68hc11_logical_operator"
+ (match_code "and,ior,xor")
+{
+ return GET_CODE (op) == AND || GET_CODE (op) == IOR || GET_CODE (op) == XOR;
+})
+
+;; TODO: Add a comment here.
+
+(define_predicate "m68hc11_arith_operator"
+ (match_code "and,ior,xor,plus,minus,ashift,ashiftrt,lshiftrt,rotate,rotatert")
+{
+ return GET_CODE (op) == AND || GET_CODE (op) == IOR || GET_CODE (op) == XOR
+ || GET_CODE (op) == PLUS || GET_CODE (op) == MINUS
+ || GET_CODE (op) == ASHIFT || GET_CODE (op) == ASHIFTRT
+ || GET_CODE (op) == LSHIFTRT || GET_CODE (op) == ROTATE
+ || GET_CODE (op) == ROTATERT;
+})
+
+;; TODO: Add a comment here.
+
+(define_predicate "m68hc11_non_shift_operator"
+ (match_code "and,ior,xor,plus,minus")
+{
+ return GET_CODE (op) == AND || GET_CODE (op) == IOR || GET_CODE (op) == XOR
+ || GET_CODE (op) == PLUS || GET_CODE (op) == MINUS;
+})
+
+;; TODO: Add a comment here.
+
+(define_predicate "m68hc11_unary_operator"
+ (match_code "neg,not,sign_extend,zero_extend")
+{
+ return GET_CODE (op) == NEG || GET_CODE (op) == NOT
+ || GET_CODE (op) == SIGN_EXTEND || GET_CODE (op) == ZERO_EXTEND;
+})
+
+;; Return true if op is a shift operator.
+
+(define_predicate "m68hc11_shift_operator"
+ (match_code "ashift,ashiftrt,lshiftrt,rotate,rotatert")
+{
+ return GET_CODE (op) == ROTATE || GET_CODE (op) == ROTATERT
+ || GET_CODE (op) == LSHIFTRT || GET_CODE (op) == ASHIFT
+ || GET_CODE (op) == ASHIFTRT;
+})
+
+;; TODO: Add a comment here.
+
+(define_predicate "m68hc11_eq_compare_operator"
+ (match_code "eq,ne")
+{
+ return GET_CODE (op) == EQ || GET_CODE (op) == NE;
+})
+
+;; TODO: Add a comment here.
+
+(define_predicate "non_push_operand"
+ (match_code "subreg,reg,mem")
+{
+ if (general_operand (op, mode) == 0)
+ return 0;
+
+ if (push_operand (op, mode) == 1)
+ return 0;
+ return 1;
+})
+
+;; TODO: Add a comment here.
+
+(define_predicate "splitable_operand"
+ (match_code "subreg,reg,mem")
+{
+ if (general_operand (op, mode) == 0)
+ return 0;
+
+ if (push_operand (op, mode) == 1)
+ return 0;
+
+ /* Reject a (MEM (MEM X)) because the patterns that use non_push_operand
+ need to split such addresses to access the low and high part but it
+ is not possible to express a valid address for the low part. */
+ if (mode != QImode && GET_CODE (op) == MEM
+ && GET_CODE (XEXP (op, 0)) == MEM)
+ return 0;
+ return 1;
+})
+
+;; TODO: Add a comment here.
+
+(define_predicate "reg_or_some_mem_operand"
+ (match_code "subreg,reg,mem")
+{
+ if (GET_CODE (op) == MEM)
+ {
+ rtx op0 = XEXP (op, 0);
+
+ if (symbolic_memory_operand (op0, mode))
+ return 1;
+
+ if (IS_STACK_PUSH (op))
+ return 1;
+
+ if (m68hc11_register_indirect_p (op, mode))
+ return 1;
+
+ return 0;
+ }
+
+ return register_operand (op, mode);
+})
+
+;; TODO: Add a comment here.
+
+(define_predicate "tst_operand"
+ (match_code "subreg,reg,mem")
+{
+ if (GET_CODE (op) == MEM && reload_completed == 0)
+ {
+ rtx addr = XEXP (op, 0);
+ if (m68hc11_auto_inc_p (addr))
+ return 0;
+ }
+ return nonimmediate_operand (op, mode);
+})
+
+;; TODO: Add a comment here.
+
+(define_predicate "cmp_operand"
+ (match_code "subreg,reg,mem,symbol_ref,label_ref,const_int,const_double")
+{
+ if (GET_CODE (op) == MEM)
+ {
+ rtx addr = XEXP (op, 0);
+ if (m68hc11_auto_inc_p (addr))
+ return 0;
+ }
+ return general_operand (op, mode);
+})
projects / platform / upstream / linaro-gcc.git / commitdiff