spi: nxp_fspi: Fix clock imbalance
authorMarek Vasut <marex@denx.de>
Mon, 13 Jun 2022 12:35:25 +0000 (14:35 +0200)
committerStefano Babic <sbabic@denx.de>
Wed, 15 Jun 2022 09:34:38 +0000 (11:34 +0200)
The nxp_fspi_default_setup() is only ever called from nxp_fspi_probe(),
where the IP clock are initially disabled. Drop the second disabling of
clock to prevent clock enable/disable imbalance reported by clock core:

"
clk qspi_root_clk already disabled
"

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
drivers/spi/nxp_fspi.c

index 607c953..579d6ba 100644 (file)
@@ -866,9 +866,6 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f)
        u32 reg;
 
 #if CONFIG_IS_ENABLED(CLK)
-       /* disable and unprepare clock to avoid glitch pass to controller */
-       nxp_fspi_clk_disable_unprep(f);
-
        /* the default frequency, we will change it later if necessary. */
        ret = clk_set_rate(&f->clk, 20000000);
        if (ret < 0)