media: atmel: atmel-isc: add HIS to register offsets
authorEugen Hristev <eugen.hristev@microchip.com>
Tue, 13 Apr 2021 10:57:11 +0000 (12:57 +0200)
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Tue, 8 Jun 2021 11:04:36 +0000 (13:04 +0200)
The HIS submodule is a part of the atmel-isc pipeline, and stands for
Histogram. This module performs a color histogram that can be read and used
by the main processor.
Add his to the reg offsets struct.
This will allow different products to have a different reg offset for this
particular module.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
drivers/media/platform/atmel/atmel-isc-base.c
drivers/media/platform/atmel/atmel-isc-regs.h
drivers/media/platform/atmel/atmel-isc.h
drivers/media/platform/atmel/atmel-sama5d2-isc.c

index 25c90b8..5c95aa4 100644 (file)
@@ -686,12 +686,13 @@ static void isc_set_histogram(struct isc_device *isc, bool enable)
        struct isc_ctrls *ctrls = &isc->ctrls;
 
        if (enable) {
-               regmap_write(regmap, ISC_HIS_CFG,
+               regmap_write(regmap, ISC_HIS_CFG + isc->offsets.his,
                             ISC_HIS_CFG_MODE_GR |
                             (isc->config.sd_format->cfa_baycfg
                                        << ISC_HIS_CFG_BAYSEL_SHIFT) |
                                        ISC_HIS_CFG_RAR);
-               regmap_write(regmap, ISC_HIS_CTRL, ISC_HIS_CTRL_EN);
+               regmap_write(regmap, ISC_HIS_CTRL + isc->offsets.his,
+                            ISC_HIS_CTRL_EN);
                regmap_write(regmap, ISC_INTEN, ISC_INT_HISDONE);
                ctrls->hist_id = ISC_HIS_CFG_MODE_GR;
                isc_update_profile(isc);
@@ -700,7 +701,8 @@ static void isc_set_histogram(struct isc_device *isc, bool enable)
                ctrls->hist_stat = HIST_ENABLED;
        } else {
                regmap_write(regmap, ISC_INTDIS, ISC_INT_HISDONE);
-               regmap_write(regmap, ISC_HIS_CTRL, ISC_HIS_CTRL_DIS);
+               regmap_write(regmap, ISC_HIS_CTRL + isc->offsets.his,
+                            ISC_HIS_CTRL_DIS);
 
                ctrls->hist_stat = HIST_DISABLED;
        }
@@ -1836,7 +1838,8 @@ static void isc_awb_work(struct work_struct *w)
                        ctrls->awb = ISC_WB_NONE;
                }
        }
-       regmap_write(regmap, ISC_HIS_CFG, hist_id | baysel | ISC_HIS_CFG_RAR);
+       regmap_write(regmap, ISC_HIS_CFG + isc->offsets.his,
+                    hist_id | baysel | ISC_HIS_CFG_RAR);
        isc_update_profile(isc);
        /* if awb has been disabled, we don't need to start another histogram */
        if (ctrls->awb)
index 2205484..0ab280a 100644 (file)
 #define ISC_RLP_CFG_MODE_YYCC_LIMITED   0xc
 #define ISC_RLP_CFG_MODE_MASK           GENMASK(3, 0)
 
+/* Offset for HIS register specific to sama5d2 product */
+#define ISC_SAMA5D2_HIS_OFFSET 0
 /* Histogram Control Register */
 #define ISC_HIS_CTRL   0x000003d4
 
index b7d4e7f..652285d 100644 (file)
@@ -151,6 +151,7 @@ struct isc_ctrls {
  * @sub422:            Offset for the SUB422 register
  * @sub420:            Offset for the SUB420 register
  * @rlp:               Offset for the RLP register
+ * @his:               Offset for the HIS related registers
  */
 struct isc_reg_offsets {
        u32 csc;
@@ -158,6 +159,7 @@ struct isc_reg_offsets {
        u32 sub422;
        u32 sub420;
        u32 rlp;
+       u32 his;
 };
 
 /*
index 0625780..77be62a 100644 (file)
@@ -235,6 +235,7 @@ static int atmel_isc_probe(struct platform_device *pdev)
        isc->offsets.sub422 = ISC_SAMA5D2_SUB422_OFFSET;
        isc->offsets.sub420 = ISC_SAMA5D2_SUB420_OFFSET;
        isc->offsets.rlp = ISC_SAMA5D2_RLP_OFFSET;
+       isc->offsets.his = ISC_SAMA5D2_HIS_OFFSET;
 
        /* sama5d2-isc - 8 bits per beat */
        isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8;