ARM: dts: qcom: msm8226: add USB node

Add a node describing the MSM8226 USB controller and phy.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211118210210.160895-6-luca@z3ntu.xyz

diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi
index 7d48599..103c0ab 100644 (file)
--- a/arch/arm/boot/dts/qcom-msm8226.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8226.dtsi
@@ -8,6 +8,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/reset/qcom,gcc-msm8974.h>
 
 / {
        #address-cells = <1>;
@@ -229,6 +230,44 @@
                        #size-cells = <0>;
                };
 
+               usb: usb@f9a55000 {
+                       compatible = "qcom,ci-hdrc";
+                       reg = <0xf9a55000 0x200>,
+                             <0xf9a55200 0x200>;
+                       interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&gcc GCC_USB_HS_AHB_CLK>,
+                                <&gcc GCC_USB_HS_SYSTEM_CLK>;
+                       clock-names = "iface", "core";
+                       assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
+                       assigned-clock-rates = <75000000>;
+                       resets = <&gcc GCC_USB_HS_BCR>;
+                       reset-names = "core";
+                       phy_type = "ulpi";
+                       dr_mode = "otg";
+                       hnp-disable;
+                       srp-disable;
+                       adp-disable;
+                       ahb-burst-config = <0>;
+                       phy-names = "usb-phy";
+                       phys = <&usb_hs_phy>;
+                       status = "disabled";
+                       #reset-cells = <1>;
+
+                       ulpi {
+                               usb_hs_phy: phy {
+                                       compatible = "qcom,usb-hs-phy-msm8226",
+                                                    "qcom,usb-hs-phy";
+                                       #phy-cells = <0>;
+                                       clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
+                                       clock-names = "ref", "sleep";
+                                       resets = <&gcc GCC_USB2A_PHY_BCR>, <&usb 0>;
+                                       reset-names = "phy", "por";
+                                       qcom,init-seq = /bits/ 8 <0x0 0x44
+                                               0x1 0x68 0x2 0x24 0x3 0x13>;
+                               };
+                       };
+               };
+
                gcc: clock-controller@fc400000 {
                        compatible = "qcom,gcc-msm8226";
                        reg = <0xfc400000 0x4000>;