// Map register alias to the callee saved Register.
SmallVector<MCPhysReg, 4> CalleeSavedAliases;
+ // Indicate if a specified callee saved register be in the allocation order
+ // exactly as written in the tablegen descriptions or listed later.
+ BitVector IgnoreCSRForAllocOrder;
+
// Reserved registers in the current MF.
BitVector Reserved;
bool Update = false;
MF = &mf;
+ auto &STI = MF->getSubtarget();
+
// Allocate new array the first time we see a new target.
- if (MF->getSubtarget().getRegisterInfo() != TRI) {
- TRI = MF->getSubtarget().getRegisterInfo();
+ if (STI.getRegisterInfo() != TRI) {
+ TRI = STI.getRegisterInfo();
RegClass.reset(new RCInfo[TRI->getNumRegClasses()]);
Update = true;
}
}
CalleeSavedRegs = CSR;
+ // Even if CSR list is same, we could have had a different allocation order
+ // if ignoreCSRForAllocationOrder is evaluated differently.
+ BitVector CSRHintsForAllocOrder(TRI->getNumRegs());
+ for (const MCPhysReg *I = CSR; *I; ++I)
+ for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI)
+ CSRHintsForAllocOrder[*AI] = STI.ignoreCSRForAllocationOrder(mf, *AI);
+ if (IgnoreCSRForAllocOrder.size() != CSRHintsForAllocOrder.size() ||
+ IgnoreCSRForAllocOrder != CSRHintsForAllocOrder) {
+ Update = true;
+ IgnoreCSRForAllocOrder = CSRHintsForAllocOrder;
+ }
+
RegCosts = TRI->getRegisterCosts(*MF);
// Different reserved registers?