[ARM] Allow any register for DImode values in Thumb2

Ramana commented in the submission email:

    I noticed that for T32 we don't allow any old register for DImode
    values. The restriction of an even register is true only for ARM state
    because the ISA doesn't allow any old register in this place. In a few
    large .i files that I had knocking about, noticed a nice drop in stack
    usage and a generally improved register allocation strategy.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@209615 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e640faf..80ffa58 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+       * config/arm/arm.c (arm_hard_regno_mode_ok): Loosen
+       restrictions on core registers for DImode values in Thumb2.
+
 2014-04-22  Ian Bolton  <ian.bolton@arm.com>
 
        * config/arm/arm.md (*anddi_notdi_zesidi): New pattern.

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 08b5255..88d957a 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -22646,12 +22646,19 @@ arm_hard_regno_mode_ok (unsigned int regno, enum machine_mode mode)
     }
 
   /* We allow almost any value to be stored in the general registers.
-     Restrict doubleword quantities to even register pairs so that we can
-     use ldrd.  Do not allow very large Neon structure opaque modes in
-     general registers; they would use too many.  */
+     Restrict doubleword quantities to even register pairs in ARM state
+     so that we can use ldrd.  Do not allow very large Neon structure
+     opaque modes in general registers; they would use too many.  */
   if (regno <= LAST_ARM_REGNUM)
-    return !(TARGET_LDRD && GET_MODE_SIZE (mode) > 4 && (regno & 1) != 0)
-      && ARM_NUM_REGS (mode) <= 4;
+    {
+      if (ARM_NUM_REGS (mode) > 4)
+         return FALSE;
+
+      if (TARGET_THUMB2)
+       return TRUE;
+
+      return !(TARGET_LDRD && GET_MODE_SIZE (mode) > 4 && (regno & 1) != 0);
+    }
 
   if (regno == FRAME_POINTER_REGNUM
       || regno == ARG_POINTER_REGNUM)