Revert "drm/vc4: hvs: Fix frame count register readout"
authorDom Cobley <popcornmix@gmail.com>
Wed, 15 Jun 2022 14:51:40 +0000 (15:51 +0100)
committerDom Cobley <popcornmix@gmail.com>
Wed, 15 Jun 2022 14:51:40 +0000 (15:51 +0100)
This reverts commit 7e36e4f8a53d7bd4770a04478ae7a2d507643a1b.

drivers/gpu/drm/vc4/vc4_crtc.c
drivers/gpu/drm/vc4/vc4_drv.h
drivers/gpu/drm/vc4/vc4_hvs.c
drivers/gpu/drm/vc4/vc4_regs.h

index f11b824..5cdea0a 100644 (file)
@@ -125,7 +125,7 @@ static bool vc4_crtc_get_scanout_position(struct drm_crtc *crtc,
                *vpos /= 2;
 
                /* Use hpos to correct for field offset in interlaced mode. */
-               if (vc4_hvs_get_fifo_frame_count(hvs, vc4_crtc_state->assigned_channel) % 2)
+               if (VC4_GET_FIELD(val, SCALER_DISPSTATX_FRAME_COUNT) % 2)
                        *hpos += mode->crtc_htotal / 2;
        }
 
index 4a8940c..7315832 100644 (file)
@@ -983,7 +983,6 @@ void vc4_irq_reset(struct drm_device *dev);
 extern struct platform_driver vc4_hvs_driver;
 void vc4_hvs_stop_channel(struct vc4_hvs *hvs, unsigned int output);
 int vc4_hvs_get_fifo_from_output(struct vc4_hvs *hvs, unsigned int output);
-u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo);
 int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state);
 void vc4_hvs_atomic_begin(struct drm_crtc *crtc, struct drm_atomic_state *state);
 void vc4_hvs_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state);
index 5fccaa0..bcc7640 100644 (file)
@@ -389,28 +389,6 @@ static void vc5_hvs_update_gamma_lut(struct vc4_hvs *hvs,
        vc5_hvs_lut_load(hvs, vc4_crtc);
 }
 
-u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo)
-{
-       u8 field = 0;
-
-       switch (fifo) {
-       case 0:
-               field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT1),
-                                     SCALER_DISPSTAT1_FRCNT0);
-               break;
-       case 1:
-               field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT1),
-                                     SCALER_DISPSTAT1_FRCNT1);
-               break;
-       case 2:
-               field = VC4_GET_FIELD(HVS_READ(SCALER_DISPSTAT2),
-                                     SCALER_DISPSTAT2_FRCNT2);
-               break;
-       }
-
-       return field;
-}
-
 int vc4_hvs_get_fifo_from_output(struct vc4_hvs *hvs, unsigned int output)
 {
        struct vc4_dev *vc4 = hvs->vc4;
index 82b0fda..c84c5ca 100644 (file)
 # define SCALER_DISPSTATX_MODE_EOF             3
 # define SCALER_DISPSTATX_FULL                 BIT(29)
 # define SCALER_DISPSTATX_EMPTY                        BIT(28)
+# define SCALER_DISPSTATX_FRAME_COUNT_MASK     VC4_MASK(17, 12)
+# define SCALER_DISPSTATX_FRAME_COUNT_SHIFT    12
 # define SCALER_DISPSTATX_LINE_MASK            VC4_MASK(11, 0)
 # define SCALER_DISPSTATX_LINE_SHIFT           0
 
                                                 (x) * (SCALER_DISPBKGND1 - \
                                                        SCALER_DISPBKGND0))
 #define SCALER_DISPSTAT1                        0x00000058
-# define SCALER_DISPSTAT1_FRCNT0_MASK          VC4_MASK(23, 18)
-# define SCALER_DISPSTAT1_FRCNT0_SHIFT         18
-# define SCALER_DISPSTAT1_FRCNT1_MASK          VC4_MASK(17, 12)
-# define SCALER_DISPSTAT1_FRCNT1_SHIFT         12
-
 #define SCALER_DISPSTATX(x)                    (SCALER_DISPSTAT0 +        \
                                                 (x) * (SCALER_DISPSTAT1 - \
                                                        SCALER_DISPSTAT0))
-
 #define SCALER_DISPBASE1                        0x0000005c
 #define SCALER_DISPBASEX(x)                    (SCALER_DISPBASE0 +        \
                                                 (x) * (SCALER_DISPBASE1 - \
                                                 (x) * (SCALER_DISPCTRL1 - \
                                                        SCALER_DISPCTRL0))
 #define SCALER_DISPBKGND2                       0x00000064
-
 #define SCALER_DISPSTAT2                        0x00000068
-# define SCALER_DISPSTAT2_FRCNT2_MASK          VC4_MASK(17, 12)
-# define SCALER_DISPSTAT2_FRCNT2_SHIFT         12
-
 #define SCALER_DISPBASE2                        0x0000006c
 #define SCALER_DISPALPHA2                       0x00000070
 #define SCALER_GAMADDR                          0x00000078