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[test] Add missing REQUIRES: arm-registered-target
authorArthur Eubanks <aeubanks@google.com>
Wed, 20 Jul 2022 17:58:42 +0000 (10:58 -0700)
committerArthur Eubanks <aeubanks@google.com>
Wed, 20 Jul 2022 17:59:07 +0000 (10:59 -0700)
llvm/test/Transforms/CodeGenPrepare/dead-allocation.ll patch | blob | history

diff --git a/llvm/test/Transforms/CodeGenPrepare/dead-allocation.ll b/llvm/test/Transforms/CodeGenPrepare/dead-allocation.ll
index 65d775f..637040a 100644 (file)
--- a/llvm/test/Transforms/CodeGenPrepare/dead-allocation.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/dead-allocation.ll
@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; Eliminate the dead allocation instruction
+; REQUIRES: arm-registered-target
 ; RUN: opt -codegenprepare < %s -S | FileCheck %s
 
 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
Domain: System / Toolchain;