drm/amd/display: Update FCLK change latency

[Descrtipion]
- Driver hardcoded FCLK P-State latency was incorrect
- Use the value provided by PMFW header instead

Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
index 4e17f2c8d2b7ba92fa7595b3c69042578b9b911b..6ab60facc0914a57c3904a63f599179dae06957e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
@@ -131,7 +131,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_2_soc = {
        .urgent_latency_pixel_data_only_us = 4.0,
        .urgent_latency_pixel_mixed_with_vm_data_us = 4.0,
        .urgent_latency_vm_data_only_us = 4.0,
-       .fclk_change_latency_us = 20,
+       .fclk_change_latency_us = 25,
        .usr_retraining_latency_us = 2,
        .smn_latency_us = 2,
        .mall_allocated_for_dcn_mbytes = 64,