u32 dmac_err, cmac_err;
if (err != MAC_AX_ERR_L1_ERR_DMAC &&
- err != MAC_AX_ERR_L0_PROMOTE_TO_L1)
+ err != MAC_AX_ERR_L0_PROMOTE_TO_L1 &&
+ err != MAC_AX_ERR_L0_ERR_CMAC0 &&
+ err != MAC_AX_ERR_L0_ERR_CMAC1)
return;
rtw89_info(rtwdev, "--->\nerr=0x%x\n", err);
u32 rtw89_mac_get_err_status(struct rtw89_dev *rtwdev)
{
- u32 err;
+ u32 err, err_scnr;
int ret;
ret = read_poll_timeout(rtw89_read32, err, (err != 0), 1000, 100000,
err = rtw89_read32(rtwdev, R_AX_HALT_C2H);
rtw89_write32(rtwdev, R_AX_HALT_C2H_CTRL, 0);
+ err_scnr = RTW89_ERROR_SCENARIO(err);
+ if (err_scnr == RTW89_WCPU_CPU_EXCEPTION)
+ err = MAC_AX_ERR_CPU_EXCEPTION;
+ else if (err_scnr == RTW89_WCPU_ASSERTION)
+ err = MAC_AX_ERR_ASSERTION;
+
rtw89_fw_st_dbg_dump(rtwdev);
rtw89_mac_dump_err_status(rtwdev, err);
u32 qempty;
};
+enum rtw89_mac_error_scenario {
+ RTW89_WCPU_CPU_EXCEPTION = 2,
+ RTW89_WCPU_ASSERTION = 3,
+};
+
+#define RTW89_ERROR_SCENARIO(__err) ((__err) >> 28)
+
/* Define DBG and recovery enum */
enum mac_ax_err_info {
/* Get error info */
MAC_AX_ERR_L2_ERR_APB_BBRF_TO_OTHERS = 0x2370,
MAC_AX_ERR_L2_RESET_DONE = 0x2400,
MAC_AX_ERR_CPU_EXCEPTION = 0x3000,
+ MAC_AX_ERR_ASSERTION = 0x4000,
MAC_AX_GET_ERR_MAX,
MAC_AX_DUMP_SHAREBUFF_INDICATOR = 0x80000000,
{
u8 event = SER_EV_NONE;
- rtw89_info(rtwdev, "ser event = 0x%04x\n", err);
+ rtw89_info(rtwdev, "SER catches error: 0x%x\n", err);
switch (err) {
case MAC_AX_ERR_L1_ERR_DMAC:
break;
}
- if (event == SER_EV_NONE)
+ if (event == SER_EV_NONE) {
+ rtw89_warn(rtwdev, "SER cannot recognize error: 0x%x\n", err);
return -EINVAL;
+ }
ser_send_msg(&rtwdev->ser, event);
return 0;