arm64: dts: imx8mq: Add eLCDIF controller

Add a node for the eLCDIF controller, "disabled" by default.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index b3455be..04919d1 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -448,6 +448,23 @@
                                fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
                        };
 
+                       lcdif: lcd-controller@30320000 {
+                               compatible = "fsl,imx8mq-lcdif", "fsl,imx28-lcdif";
+                               reg = <0x30320000 0x10000>;
+                               interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clk IMX8MQ_CLK_LCDIF_PIXEL>;
+                               clock-names = "pix";
+                               assigned-clocks = <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>,
+                                                 <&clk IMX8MQ_VIDEO_PLL1_BYPASS>,
+                                                 <&clk IMX8MQ_CLK_LCDIF_PIXEL>,
+                                                 <&clk IMX8MQ_VIDEO_PLL1>;
+                               assigned-clock-parents = <&clk IMX8MQ_CLK_25M>,
+                                                 <&clk IMX8MQ_VIDEO_PLL1>,
+                                                 <&clk IMX8MQ_VIDEO_PLL1_OUT>;
+                               assigned-clock-rates = <0>, <0>, <0>, <594000000>;
+                               status = "disabled";
+                       };
+
                        iomuxc: iomuxc@30330000 {
                                compatible = "fsl,imx8mq-iomuxc";
                                reg = <0x30330000 0x10000>;