unsigned num_inline_push_consts;
unsigned base_inline_push_consts;
struct ac_arg view_index;
+ struct ac_arg sbt_descriptors;
};
void ac_add_arg(struct ac_shader_args *info, enum ac_arg_regfile regfile, unsigned registers,
AC_UD_VS_MAX_UD,
AC_UD_PS_MAX_UD,
AC_UD_CS_GRID_SIZE = AC_UD_SHADER_START,
+ AC_UD_CS_SBT_DESCRIPTORS,
AC_UD_CS_MAX_UD,
AC_UD_GS_MAX_UD,
AC_UD_TCS_MAX_UD,
bool uses_thread_id[3];
bool uses_local_invocation_idx;
unsigned block_size[3];
+
+ bool uses_sbt;
} cs;
struct {
uint64_t tes_inputs_read;
switch (stage) {
case MESA_SHADER_COMPUTE:
+ if (args->shader_info->cs.uses_sbt)
+ user_sgpr_count += 1;
if (args->shader_info->cs.uses_grid_size)
user_sgpr_count += 3;
break;
case MESA_SHADER_COMPUTE:
declare_global_input_sgprs(args, &user_sgpr_info);
+ if (args->shader_info->cs.uses_sbt) {
+ ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_CONST_DESC_PTR, &args->ac.sbt_descriptors);
+ }
+
if (args->shader_info->cs.uses_grid_size) {
ac_add_arg(&args->ac, AC_ARG_SGPR, 3, AC_ARG_INT, &args->ac.num_work_groups);
}
switch (stage) {
case MESA_SHADER_COMPUTE:
+ if (args->shader_info->cs.uses_sbt) {
+ set_loc_shader_ptr(args, AC_UD_CS_SBT_DESCRIPTORS, &user_sgpr_idx);
+ }
if (args->shader_info->cs.uses_grid_size) {
set_loc_shader(args, AC_UD_CS_GRID_SIZE, &user_sgpr_idx, 3);
}
case nir_intrinsic_store_output:
gather_intrinsic_store_output_info(nir, instr, info);
break;
+ case nir_intrinsic_load_sbt_amd:
+ info->cs.uses_sbt = true;
+ break;
default:
break;
}