radv: remove trailing whitespace

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7043>

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 4a302ba..7e3101c 100644 (file)
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1638,7 +1638,7 @@ radv_emit_fb_color_state(struct radv_cmd_buffer *cmd_buffer,
                radeon_set_context_reg_seq(cmd_buffer->cs, R_028C94_CB_COLOR0_DCC_BASE + index * 0x3c, 2);
                radeon_emit(cmd_buffer->cs, cb->cb_dcc_base);
                radeon_emit(cmd_buffer->cs, S_028C98_BASE_256B(cb->cb_dcc_base >> 32));
-               
+
                radeon_set_context_reg(cmd_buffer->cs, R_0287A0_CB_MRT0_EPITCH + index * 4,
                                       cb->cb_mrt_epitch);
        } else {
@@ -2496,7 +2496,7 @@ radv_flush_indirect_descriptor_sets(struct radv_cmd_buffer *cmd_buffer,
        uint32_t size = MAX_SETS * 4;
        uint32_t offset;
        void *ptr;
-       
+
        if (!radv_cmd_buffer_upload_alloc(cmd_buffer, size,
                                          256, &offset, &ptr))
                return;

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index add0744..d28bb0e 100644 (file)
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -7543,11 +7543,11 @@ static uint32_t radv_compute_valid_memory_types_attempt(struct radv_physical_dev
                                                         enum radeon_bo_flag ignore_flags)
 {
        /* Don't count GTT/CPU as relevant:
-        * 
+        *
         * - We're not fully consistent between the two.
         * - Sometimes VRAM gets VRAM|GTT.
         */
-       const enum radeon_bo_domain relevant_domains = RADEON_DOMAIN_VRAM | 
+       const enum radeon_bo_domain relevant_domains = RADEON_DOMAIN_VRAM |
                                                       RADEON_DOMAIN_GDS |
                                                       RADEON_DOMAIN_OA;
        uint32_t bits = 0;
@@ -7750,7 +7750,7 @@ void radv_GetPhysicalDeviceExternalSemaphoreProperties(
 {
        RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice);
        VkSemaphoreTypeKHR type = radv_get_semaphore_type(pExternalSemaphoreInfo->pNext, NULL);
-       
+
        if (type == VK_SEMAPHORE_TYPE_TIMELINE && pdevice->rad_info.has_timeline_syncobj &&
            pExternalSemaphoreInfo->handleType == VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT) {
                pExternalSemaphoreProperties->exportFromImportedHandleTypes = VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT;
@@ -7764,7 +7764,7 @@ void radv_GetPhysicalDeviceExternalSemaphoreProperties(
 
        /* Require has_syncobj_wait_for_submit for the syncobj signal ioctl introduced at virtually the same time */
        } else if (pdevice->rad_info.has_syncobj_wait_for_submit &&
-                  (pExternalSemaphoreInfo->handleType == VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT || 
+                  (pExternalSemaphoreInfo->handleType == VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT ||
                    pExternalSemaphoreInfo->handleType == VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_SYNC_FD_BIT)) {
                pExternalSemaphoreProperties->exportFromImportedHandleTypes = VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT | VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_SYNC_FD_BIT;
                pExternalSemaphoreProperties->compatibleHandleTypes = VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT | VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_SYNC_FD_BIT;
@@ -7862,7 +7862,7 @@ void radv_GetPhysicalDeviceExternalFenceProperties(
        RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice);
 
        if (pdevice->rad_info.has_syncobj_wait_for_submit &&
-           (pExternalFenceInfo->handleType == VK_EXTERNAL_FENCE_HANDLE_TYPE_OPAQUE_FD_BIT || 
+           (pExternalFenceInfo->handleType == VK_EXTERNAL_FENCE_HANDLE_TYPE_OPAQUE_FD_BIT ||
             pExternalFenceInfo->handleType == VK_EXTERNAL_FENCE_HANDLE_TYPE_SYNC_FD_BIT)) {
                pExternalFenceProperties->exportFromImportedHandleTypes = VK_EXTERNAL_FENCE_HANDLE_TYPE_OPAQUE_FD_BIT | VK_EXTERNAL_FENCE_HANDLE_TYPE_SYNC_FD_BIT;
                pExternalFenceProperties->compatibleHandleTypes = VK_EXTERNAL_FENCE_HANDLE_TYPE_OPAQUE_FD_BIT | VK_EXTERNAL_FENCE_HANDLE_TYPE_SYNC_FD_BIT;

diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 27601aa..b7d22b1 100644 (file)
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -1822,7 +1822,7 @@ void radv_GetImageSubresourceLayout(
 
        if (device->physical_device->rad_info.chip_class >= GFX9) {
                uint64_t level_offset = surface->is_linear ? surface->u.gfx9.offset[level] : 0;
-               
+
                pLayout->offset = plane->offset + level_offset + surface->u.gfx9.surf_slice_size * layer;
                if (image->vk_format == VK_FORMAT_R32G32B32_UINT ||
                    image->vk_format == VK_FORMAT_R32G32B32_SINT ||

diff --git a/src/amd/vulkan/radv_meta_fast_clear.c b/src/amd/vulkan/radv_meta_fast_clear.c
index f459688..228df00 100644 (file)
--- a/src/amd/vulkan/radv_meta_fast_clear.c
+++ b/src/amd/vulkan/radv_meta_fast_clear.c
@@ -568,7 +568,7 @@ radv_device_init_meta_fast_clear_flush_state(struct radv_device *device, bool on
 
 static void
 radv_emit_set_predication_state_from_image(struct radv_cmd_buffer *cmd_buffer,
-                                     struct radv_image *image, 
+                                     struct radv_image *image,
                                      uint64_t pred_offset, bool value)
 {
        uint64_t va = 0;

diff --git a/src/amd/vulkan/radv_meta_resolve.c b/src/amd/vulkan/radv_meta_resolve.c
index 1318ff1..027eee5 100644 (file)
--- a/src/amd/vulkan/radv_meta_resolve.c
+++ b/src/amd/vulkan/radv_meta_resolve.c
@@ -373,7 +373,7 @@ static void radv_pick_resolve_method_images(struct radv_device *device,
                else if (src_image->info.array_size > 1 ||
                         dest_image->info.array_size > 1)
                        *method = RESOLVE_COMPUTE;
-       
+
                if (radv_layout_dcc_compressed(device, dest_image, dest_image_layout,
                                               dest_render_loop, queue_mask)) {
                        *method = RESOLVE_FRAGMENT;

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c
index e77c080..a0ca2e0 100644 (file)
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -2749,7 +2749,7 @@ handle_ngg_outputs_post_2(struct radv_shader_context *ctx)
 
        LLVMValueRef prims_in_wave = ac_unpack_param(&ctx->ac,
                                                     ac_get_arg(&ctx->ac, ctx->args->merged_wave_info), 8, 8);
-       LLVMValueRef vtx_in_wave = ac_unpack_param(&ctx->ac, 
+       LLVMValueRef vtx_in_wave = ac_unpack_param(&ctx->ac,
                                                   ac_get_arg(&ctx->ac, ctx->args->merged_wave_info), 0, 8);
        LLVMValueRef is_gs_thread = LLVMBuildICmp(builder, LLVMIntULT,
                                                  ac_get_thread_id(&ctx->ac), prims_in_wave, "");
@@ -3491,7 +3491,7 @@ write_tess_factors(struct radv_shader_context *ctx)
                                                    0, ac_glc);
                }
        }
-       
+
        ac_build_endif(&ctx->ac, 6503);
 }
 
@@ -4385,7 +4385,7 @@ radv_compile_gs_copy_shader(struct ac_llvm_compiler *ac_llvm,
        ac_compile_llvm_module(ac_llvm, ctx.ac.module, rbinary,
                               MESA_SHADER_VERTEX, "GS Copy Shader", args->options);
        (*rbinary)->is_gs_copy_shader = true;
-       
+
 }
 
 void

diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index d7a4acd..fcd2895 100644 (file)
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -728,7 +728,7 @@ lower_view_index(nir_shader *nir)
        nir_function_impl *entry = nir_shader_get_entrypoint(nir);
        nir_builder b;
        nir_builder_init(&b, entry);
-       
+
        nir_variable *layer = NULL;
        nir_foreach_block(block, entry) {
                nir_foreach_instr_safe(instr, block) {
@@ -1159,7 +1159,7 @@ radv_shader_variant_create(struct radv_device *device,
                        .num_shared_lds_symbols = num_lds_symbols,
                        .shared_lds_symbols = lds_symbols,
                };
-               
+
                if (!ac_rtld_open(&rtld_binary, open_info)) {
                        free(variant);
                        return NULL;
@@ -1203,7 +1203,7 @@ radv_shader_variant_create(struct radv_device *device,
                struct ac_rtld_upload_info info = {
                        .binary = &rtld_binary,
                        .rx_va = radv_buffer_get_va(variant->bo) + variant->bo_offset,
-                       .rx_ptr = dest_ptr, 
+                       .rx_ptr = dest_ptr,
                };
 
                if (!ac_rtld_upload(&info)) {
@@ -1316,7 +1316,7 @@ shader_variant_compile(struct radv_device *device,
        args.is_gs_copy_shader = gs_copy_shader;
        args.is_trap_handler_shader = trap_handler_shader;
 
-       radv_declare_shader_args(&args, 
+       radv_declare_shader_args(&args,
                                 gs_copy_shader ? MESA_SHADER_VERTEX
                                                : shaders[shader_count - 1]->info.stage,
                                 shader_count >= 2,

diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index 6bb2777..72cc6d3 100644 (file)
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -383,7 +383,7 @@ struct radv_shader_binary_legacy {
        unsigned ir_size;
        unsigned disasm_size;
        unsigned stats_size;
-       
+
        /* data has size of stats_size + code_size + ir_size + disasm_size + 2,
         * where the +2 is for 0 of the ir strings. */
        uint8_t data[0];