2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
+ * config/tc-aarch64.c (aarch64_archs): Add "armv8.3-a".
+ * doc/c-aarch64.texi (-march): Likewise.
+
+2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
* config/tc-aarch64.c (aarch64_features): Fix "simd" and "crypto".
* testsuite/gas/aarch64/illegal-crypto-nofp.d: New.
* testsuite/gas/aarch64/illegal-crypto-nofp.l: New.
{"armv8-a", AARCH64_ARCH_V8},
{"armv8.1-a", AARCH64_ARCH_V8_1},
{"armv8.2-a", AARCH64_ARCH_V8_2},
+ {"armv8.3-a", AARCH64_ARCH_V8_3},
{NULL, AARCH64_ARCH_NONE}
};
issue an error message if an attempt is made to assemble an
instruction which will not execute on the target architecture. The
following architecture names are recognized: @code{armv8-a},
-@code{armv8.1-a} and @code{armv8.2-a}.
+@code{armv8.1-a}, @code{armv8.2-a} and @code{armv8.3-a}.
If both @option{-mcpu} and @option{-march} are specified, the
assembler will use the setting for @option{-mcpu}. If neither are
+2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * opcode/aarch64.h (AARCH64_FEATURE_V8_3): Define.
+ (AARCH64_ARCH_V8_3): Define.
+ (AARCH64_ARCH_V8_1, AARCH64_ARCH_V8_2): Simplify.
+
2016-11-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
* opcode/arm.h (ARM_AEXT_V8M_MAIN_DSP): Define.
/* The following bitmasks control CPU features. */
#define AARCH64_FEATURE_V8 0x00000001 /* All processors. */
#define AARCH64_FEATURE_V8_2 0x00000020 /* ARMv8.2 processors. */
+#define AARCH64_FEATURE_V8_3 0x00000040 /* ARMv8.3 processors. */
#define AARCH64_FEATURE_CRYPTO 0x00010000 /* Crypto instructions. */
#define AARCH64_FEATURE_FP 0x00020000 /* FP instructions. */
#define AARCH64_FEATURE_SIMD 0x00040000 /* SIMD instructions. */
#define AARCH64_ARCH_V8 AARCH64_FEATURE (AARCH64_FEATURE_V8, \
AARCH64_FEATURE_FP \
| AARCH64_FEATURE_SIMD)
-#define AARCH64_ARCH_V8_1 AARCH64_FEATURE (AARCH64_FEATURE_V8, \
- AARCH64_FEATURE_FP \
- | AARCH64_FEATURE_SIMD \
- | AARCH64_FEATURE_CRC \
+#define AARCH64_ARCH_V8_1 AARCH64_FEATURE (AARCH64_ARCH_V8, \
+ AARCH64_FEATURE_CRC \
| AARCH64_FEATURE_V8_1 \
| AARCH64_FEATURE_LSE \
| AARCH64_FEATURE_PAN \
| AARCH64_FEATURE_LOR \
| AARCH64_FEATURE_RDMA)
-#define AARCH64_ARCH_V8_2 AARCH64_FEATURE (AARCH64_FEATURE_V8, \
+#define AARCH64_ARCH_V8_2 AARCH64_FEATURE (AARCH64_ARCH_V8_1, \
AARCH64_FEATURE_V8_2 \
| AARCH64_FEATURE_F16 \
- | AARCH64_FEATURE_RAS \
- | AARCH64_FEATURE_FP \
- | AARCH64_FEATURE_SIMD \
- | AARCH64_FEATURE_CRC \
- | AARCH64_FEATURE_V8_1 \
- | AARCH64_FEATURE_LSE \
- | AARCH64_FEATURE_PAN \
- | AARCH64_FEATURE_LOR \
- | AARCH64_FEATURE_RDMA)
+ | AARCH64_FEATURE_RAS)
+#define AARCH64_ARCH_V8_3 AARCH64_FEATURE (AARCH64_ARCH_V8_2, \
+ AARCH64_FEATURE_V8_3)
#define AARCH64_ARCH_NONE AARCH64_FEATURE (0, 0)
#define AARCH64_ANY AARCH64_FEATURE (-1, 0) /* Any basic core. */