.hw.init = &(struct clk_init_data){
.name = "mi2s_osr_src",
.parent_data = lcc_pxo_pll4,
- .num_parents = 2,
+ .num_parents = ARRAY_SIZE(lcc_pxo_pll4),
.ops = &clk_rcg_ops,
.flags = CLK_SET_RATE_GATE,
},
.hw.init = &(struct clk_init_data){
.name = "pcm_src",
.parent_data = lcc_pxo_pll4,
- .num_parents = 2,
+ .num_parents = ARRAY_SIZE(lcc_pxo_pll4),
.ops = &clk_rcg_ops,
.flags = CLK_SET_RATE_GATE,
},
.hw.init = &(struct clk_init_data){
.name = "spdif_src",
.parent_data = lcc_pxo_pll4,
- .num_parents = 2,
+ .num_parents = ARRAY_SIZE(lcc_pxo_pll4),
.ops = &clk_rcg_ops,
.flags = CLK_SET_RATE_GATE,
},
.hw.init = &(struct clk_init_data){
.name = "ahbix",
.parent_data = lcc_pxo_pll4,
- .num_parents = 2,
+ .num_parents = ARRAY_SIZE(lcc_pxo_pll4),
.ops = &clk_rcg_lcc_ops,
},
},