arm64: dts: Add DT node for the VIPNano-QI on the A311D
authorTomeu Vizoso <tomeu.vizoso@collabora.com>
Fri, 2 Dec 2022 11:52:16 +0000 (12:52 +0100)
committerNeil Armstrong <neil.armstrong@linaro.org>
Mon, 2 Jan 2023 10:38:22 +0000 (11:38 +0100)
This "NPU" is very similar to the Vivante GPUs and Etnaviv works well
with it with just a few small changes.

v2: Add reference to RESET_NNA (Neil)
v3: Fix indentation (Neil)

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20221202115223.39051-5-tomeu.vizoso@collabora.com
[narmstrong: squash patch 8, disable NPU by default and do not enable NPU on vim3 yet]
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
arch/arm64/boot/dts/amlogic/meson-sm1.dtsi

index 9dbd508..585dd70 100644 (file)
                #clock-cells = <0>;
        };
 
+       npu: npu@ff100000 {
+               compatible = "vivante,gc";
+               reg = <0x0 0xff100000 0x0 0x20000>;
+               interrupts = <0 147 4>;
+               clocks = <&clkc CLKID_NNA_CORE_CLK>,
+                        <&clkc CLKID_NNA_AXI_CLK>;
+               clock-names = "core", "bus";
+               resets = <&reset RESET_NNA>;
+               status = "disabled";
+       };
 };
index 75ff00f..431572b 100644 (file)
 &pmu {
        compatible = "amlogic,g12b-ddr-pmu";
 };
+
+&npu {
+       power-domains = <&pwrc PWRC_G12A_NNA_ID>;
+};
index 56ca0ba..617d322 100644 (file)
 &usb {
        power-domains = <&pwrc PWRC_SM1_USB_ID>;
 };
+
+&npu {
+       power-domains = <&pwrc PWRC_SM1_NNA_ID>;
+};