arm64: dts: mediatek: mt8186: Add audio controller node

Add audio controller node for MT8186 SoC.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230118091829.755-7-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index 4b857a9..cc310f0 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -922,6 +922,68 @@
                        status = "disabled";
                };
 
+               afe: audio-controller@11210000 {
+                       compatible = "mediatek,mt8186-sound";
+                       reg = <0 0x11210000 0 0x2000>;
+                       clocks = <&infracfg_ao CLK_INFRA_AO_AUDIO>,
+                                <&infracfg_ao CLK_INFRA_AO_AUDIO_26M_BCLK>,
+                                <&topckgen CLK_TOP_AUDIO>,
+                                <&topckgen CLK_TOP_AUD_INTBUS>,
+                                <&topckgen CLK_TOP_MAINPLL_D2_D4>,
+                                <&topckgen CLK_TOP_AUD_1>,
+                                <&apmixedsys CLK_APMIXED_APLL1>,
+                                <&topckgen CLK_TOP_AUD_2>,
+                                <&apmixedsys CLK_APMIXED_APLL2>,
+                                <&topckgen CLK_TOP_AUD_ENGEN1>,
+                                <&topckgen CLK_TOP_APLL1_D8>,
+                                <&topckgen CLK_TOP_AUD_ENGEN2>,
+                                <&topckgen CLK_TOP_APLL2_D8>,
+                                <&topckgen CLK_TOP_APLL_I2S0_MCK_SEL>,
+                                <&topckgen CLK_TOP_APLL_I2S1_MCK_SEL>,
+                                <&topckgen CLK_TOP_APLL_I2S2_MCK_SEL>,
+                                <&topckgen CLK_TOP_APLL_I2S4_MCK_SEL>,
+                                <&topckgen CLK_TOP_APLL_TDMOUT_MCK_SEL>,
+                                <&topckgen CLK_TOP_APLL12_CK_DIV0>,
+                                <&topckgen CLK_TOP_APLL12_CK_DIV1>,
+                                <&topckgen CLK_TOP_APLL12_CK_DIV2>,
+                                <&topckgen CLK_TOP_APLL12_CK_DIV4>,
+                                <&topckgen CLK_TOP_APLL12_CK_DIV_TDMOUT_M>,
+                                <&topckgen CLK_TOP_AUDIO_H>,
+                                <&clk26m>;
+                       clock-names = "aud_infra_clk",
+                                     "mtkaif_26m_clk",
+                                     "top_mux_audio",
+                                     "top_mux_audio_int",
+                                     "top_mainpll_d2_d4",
+                                     "top_mux_aud_1",
+                                     "top_apll1_ck",
+                                     "top_mux_aud_2",
+                                     "top_apll2_ck",
+                                     "top_mux_aud_eng1",
+                                     "top_apll1_d8",
+                                     "top_mux_aud_eng2",
+                                     "top_apll2_d8",
+                                     "top_i2s0_m_sel",
+                                     "top_i2s1_m_sel",
+                                     "top_i2s2_m_sel",
+                                     "top_i2s4_m_sel",
+                                     "top_tdm_m_sel",
+                                     "top_apll12_div0",
+                                     "top_apll12_div1",
+                                     "top_apll12_div2",
+                                     "top_apll12_div4",
+                                     "top_apll12_div_tdm",
+                                     "top_mux_audio_h",
+                                     "top_clk26m_clk";
+                       interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>;
+                       mediatek,apmixedsys = <&apmixedsys>;
+                       mediatek,infracfg = <&infracfg_ao>;
+                       mediatek,topckgen = <&topckgen>;
+                       resets = <&watchdog MT8186_TOPRGU_AUDIO_SW_RST>;
+                       reset-names = "audiosys";
+                       status = "disabled";
+               };
+
                mmc0: mmc@11230000 {
                        compatible = "mediatek,mt8186-mmc",
                                     "mediatek,mt8183-mmc";