mtd: nand: mtk: fix incorrect register setting order about ecc irq

Currently, we trigger ECC HW before setting ecc irq. It is incorrect.
Because ECC starts working once the register ECC_CTL_REG is set as
ECC_OP_ENABLE. And this may lead an abnormal behavior of ecc irq.
So, should enable ecc irq at first, then trigger ECC.

Fixes: 1d6b1e464950 ("mtd: mediatek: driver for MTK Smart Device")
Signed-off-by: Xiaolei Li <xiaolei.li@mediatek.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>

diff --git a/drivers/mtd/nand/mtk_ecc.c b/drivers/mtd/nand/mtk_ecc.c
index 4958121..a855a4e 100644 (file)
--- a/drivers/mtd/nand/mtk_ecc.c
+++ b/drivers/mtd/nand/mtk_ecc.c
@@ -276,8 +276,6 @@ int mtk_ecc_enable(struct mtk_ecc *ecc, struct mtk_ecc_config *config)
        if (ret)
                return ret;
 
-       writew(ECC_OP_ENABLE, ecc->regs + ECC_CTL_REG(op));
-
        init_completion(&ecc->done);
        reg_val = ECC_IRQ_EN;
        /*
@@ -289,6 +287,8 @@ int mtk_ecc_enable(struct mtk_ecc *ecc, struct mtk_ecc_config *config)
                reg_val |= ECC_PG_IRQ_SEL;
        writew(reg_val, ecc->regs + ECC_IRQ_REG(op));
 
+       writew(ECC_OP_ENABLE, ecc->regs + ECC_CTL_REG(op));
+
        return 0;
 }
 EXPORT_SYMBOL(mtk_ecc_enable);